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@inproceedings{DBLP:conf/asap/AbillamaFCAZCBSK23,
author = {Pierre Abillama and
Zichen Fan and
Yu Chen and
Hyochan An and
Qirui Zhang and
Seungkyu Choi and
David T. Blaauw and
Dennis Sylvester and
Hun{-}Seok Kim},
title = {{SONA:} An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal
Weights},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {18--26},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00015},
doi = {10.1109/ASAP57973.2023.00015},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AbillamaFCAZCBSK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AliajKGJ23,
author = {Esmerald Aliaj and
Alberto Krone{-}Martins and
Joshua Garcia and
Sang{-}Woo Jun},
title = {FarSlayer: Turnkey Acceleration of Legacy Software on Commodity {FPGA}
Cards},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {172--179},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00037},
doi = {10.1109/ASAP57973.2023.00037},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AliajKGJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AnAJ23,
author = {Jiyoung An and
Esmerald Aliaj and
Sang{-}Woo Jun},
title = {PreCog: Near-Storage Accelerator for Heterogeneous {CNN} Inference},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {45--52},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00021},
doi = {10.1109/ASAP57973.2023.00021},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AnAJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BettingLES23,
author = {Jan{-}Harm L. F. Betting and
Dimitrios Liakopoulos and
Max C. W. Engelen and
Christos Strydis},
title = {Oikonomos: An Opportunistic, Deep-Learning, Resource-Recommendation
System for Cloud {HPC}},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {188--196},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00039},
doi = {10.1109/ASAP57973.2023.00039},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BettingLES23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BeyerGGVB23,
author = {Michael Beyer and
Sven Gesper and
Andre Guntoro and
Guillermo Pay{\'{a}} Vay{\'{a}} and
Holger Blume},
title = {Exploiting Subword Permutations to Maximize {CNN} Compute Performance
and Efficiency},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {61--68},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00023},
doi = {10.1109/ASAP57973.2023.00023},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BeyerGGVB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BraatzRSB23,
author = {Yannick Braatz and
Dennis Sebastian Rieber and
Taha Soliman and
Oliver Bringmann},
title = {SimPyler: {A} Compiler-Based Simulation Framework for Machine Learning
Accelerators},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {213--220},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00042},
doi = {10.1109/ASAP57973.2023.00042},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BraatzRSB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CardosoJMC23,
author = {Jo{\~{a}}o M. P. Cardoso and
Alexandra Jimborean and
Nele Mentens and
Jos{\'{e}} Gabriel F. Coutinho},
title = {Preface {ASAP} 2023},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {xi},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00005},
doi = {10.1109/ASAP57973.2023.00005},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/CardosoJMC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChenWZWM23,
author = {Jiahong Chen and
Shengzhe Wang and
Zhihao Zhang and
Suzhen Wu and
Bo Mao},
title = {iKnowFirst: An Efficient DPU-Assisted Compaction for LSM-Tree-Based
Key-Value Stores},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {53--60},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00022},
doi = {10.1109/ASAP57973.2023.00022},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ChenWZWM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DerasariGV23,
author = {Preet Derasari and
Kailash Gogineni and
Guru Venkataramani},
title = {Mayalok: {A} Cyber-Deception Hardware Using Runtime Instruction Infusion},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {33--40},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00019},
doi = {10.1109/ASAP57973.2023.00019},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/DerasariGV23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DomingosRNRTS23,
author = {Joao Mario Domingos and
Tiago Rocha and
Nuno Neves and
Nuno Roma and
Pedro Tom{\'{a}}s and
Leonel Sousa},
title = {Supporting {RISC-V} Performance Counters Through Linux Performance
Analysis Tools},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {94--101},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00027},
doi = {10.1109/ASAP57973.2023.00027},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DomingosRNRTS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GogineniMLWV23,
author = {Kailash Gogineni and
Yongsheng Mei and
Tian Lan and
Peng Wei and
Guru Venkataramani},
title = {AccMER: Accelerating Multi-Agent Experience Replay with Cache Locality-Aware
Prioritization},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {205--212},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00041},
doi = {10.1109/ASAP57973.2023.00041},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GogineniMLWV23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GourounasHFTJG23,
author = {Dimitrios Gourounas and
Bagus Hanindhito and
Arash Fathi and
Dimitar Trenev and
Lizy K. John and
Andreas Gerstlauer},
title = {{FAWS:} {FPGA} Acceleration of Large-Scale Wave Simulations},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {76--84},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00025},
doi = {10.1109/ASAP57973.2023.00025},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GourounasHFTJG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuoLWLB23,
author = {Ce Guo and
Wayne Luk and
Alexander Warren and
Joshua M. Levine and
Peter Brookes},
title = {Co-Design of Algorithm and {FPGA} Accelerator for Conditional Independence
Test},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {102--109},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00028},
doi = {10.1109/ASAP57973.2023.00028},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GuoLWLB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JiangZWL23,
author = {Shijie Jiang and
Yi Zou and
Hao Wang and
Wanwan Li},
title = {An {FFT} Accelerator Using Deeply-coupled {RISC-V} Instruction Set
Extension for Arbitrary Number of Points},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {165--171},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00036},
doi = {10.1109/ASAP57973.2023.00036},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/JiangZWL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KhandelwalS23,
author = {Shashwat Khandelwal and
Shanker Shreejith},
title = {Real-Time Zero-Day Intrusion Detection System for Automotive Controller
Area Network on FPGAs},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {139--146},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00033},
doi = {10.1109/ASAP57973.2023.00033},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KhandelwalS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KremerBBAR23,
author = {Mathijs De Kremer and
Marco Brohet and
Subhadeep Banik and
Roberto Avanzi and
Francesco Regazzoni},
title = {Resource-Constrained Encryption: Extending Ibex with a {QARMA} Hardware
Accelerator},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {147--155},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00034},
doi = {10.1109/ASAP57973.2023.00034},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KremerBBAR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KunimotoCYM23,
author = {Yoshiki Kunimoto and
Qiong Chang and
Yoshiki Yamaguchi and
Tsutomu Maruyama},
title = {{GPU} Acceleration of Multi-Object Tracking with Motion Vector Interpolation
and Affine Transformation},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {127--134},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00031},
doi = {10.1109/ASAP57973.2023.00031},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KunimotoCYM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuHK23,
author = {Yen{-}Fu Liu and
Chou{-}Ying Hsieh and
Sy{-}Yen Kuo},
title = {Boomerang: Physical-Aware Design Space Exploration Framework on {RISC-V}
SonicBOOM Microarchitecture},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {85--93},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00026},
doi = {10.1109/ASAP57973.2023.00026},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiuHK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuZZHKSRL23,
author = {Mengxi Liu and
Bo Zhou and
Zimin Zhao and
Hyeonseok Hong and
Hyun Kim and
Sungho Suh and
V{\'{\i}}tor Fortes Rey and
Paul Lukowicz},
title = {FieldHAR: {A} Fully Integrated End-to-End {RTL} Framework for Human
Activity Recognition with Neural Networks from Heterogeneous Sensors},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {110--118},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00029},
doi = {10.1109/ASAP57973.2023.00029},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiuZZHKSRL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MilletCRL23,
author = {Maxime Millet and
Adrien Cassagne and
Nicolas Rambaux and
Lionel Lacassagne},
title = {Real-Time and Approximate Iterative Optical Flow Implementation on
Low-Power Embedded CPUs},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {135--138},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00032},
doi = {10.1109/ASAP57973.2023.00032},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MilletCRL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MirandaASSJVDLFBJ23,
author = {Igor D. S. Miranda and
Aman Arora and
Zachary Susskind and
Josias S. A. Souza and
Mugdha P. Jadhao and
Luis A. Q. Villon and
Diego L. C. Dutra and
Priscila M. V. Lima and
Felipe M. G. Fran{\c{c}}a and
Maur{\'{\i}}cio Breternitz and
Lizy K. John},
title = {{COIN:} Combinational Intelligent Networks},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {27--28},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00016},
doi = {10.1109/ASAP57973.2023.00016},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MirandaASSJVDLFBJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MozafariCGM23,
author = {Seyyed Hasan Mozafari and
James J. Clark and
Warren J. Gross and
Brett H. Meyer},
title = {Efficient 1D Grouped Convolution for PyTorch a Case Study: Fast On-Device
Fine-Tuning for SqueezeBERT},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {69--75},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00024},
doi = {10.1109/ASAP57973.2023.00024},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MozafariCGM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MurilloBB23,
author = {Raul Murillo and
Alberto A. Del Barrio and
Guillermo Botella},
title = {A Suite of Division Algorithms for Posit Arithmetic},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {41--44},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00020},
doi = {10.1109/ASAP57973.2023.00020},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MurilloBB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PertuzPG23,
author = {Sergio A. Pertuz and
Ariel Podlubne and
Diana Goehringer},
title = {An Efficient Accelerator for Nonlinear Model Predictive Control},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {180--187},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00038},
doi = {10.1109/ASAP57973.2023.00038},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/PertuzPG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PopoffMRCLOD23,
author = {Maxime Popoff and
Romain Michon and
Tanguy Risset and
Pierre Cochard and
St{\'{e}}phane Letz and
Yann Orlarey and
Florent de Dinechin},
title = {Audio {DSP} to {FPGA} Compilation},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {31--32},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00018},
doi = {10.1109/ASAP57973.2023.00018},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/PopoffMRCLOD23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShahroodiMZWH23,
author = {Taha Shahroodi and
Michael Miao and
Mahdi Zahedi and
Stephan Wong and
Said Hamdioui},
title = {SieveMem: {A} Computation-in-Memory Architecture for Fast and Accurate
Pre-Alignment},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {156--164},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00035},
doi = {10.1109/ASAP57973.2023.00035},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ShahroodiMZWH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ToupasBT23,
author = {Petros Toupas and
Christos{-}Savvas Bouganis and
Dimitrios Tzovaras},
title = {{FMM-X3D:} FPGA-Based Modeling and Mapping of {X3D} for Human Action
Recognition},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {119--126},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00030},
doi = {10.1109/ASAP57973.2023.00030},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ToupasBT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WeiALJ23,
author = {Zhigang Wei and
Aman Arora and
Ruihao Li and
Lizy K. John},
title = {HLSDataset: Open-Source Dataset for ML-Assisted {FPGA} Design using
High Level Synthesis},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {197--204},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00040},
doi = {10.1109/ASAP57973.2023.00040},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WeiALJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XuYCYJW23,
author = {Zhenyu Xu and
Miaoxiang Yu and
Jillian Cai and
Qing Yang and
Yeonho Jeong and
Tao Wei},
title = {A Novel FPGA-Based Circuit Simulator for Accelerating Reinforcement
Learning-Based Design of Power Converters},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {1--9},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00013},
doi = {10.1109/ASAP57973.2023.00013},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/XuYCYJW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YuXCYW23,
author = {Miaoxiang Yu and
Zhenyu Xu and
Jillian Cai and
Qing Yang and
Tao Wei},
title = {A Heterogeneous Computer Architecture Accelerating Reinforcement Learning-based
Design for Silicon Photonic Devices},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {29--30},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00017},
doi = {10.1109/ASAP57973.2023.00017},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/YuXCYW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhaoKSYCMH23,
author = {Yifan Zhao and
Honglin Kuang and
Yi Sun and
Zhen Yang and
Chen Chen and
Jianyi Meng and
Jun Han},
title = {Enhancing {RISC-V} Vector Extension for Efficient Application of Post-Quantum
Cryptography},
booktitle = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
pages = {10--17},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023.00014},
doi = {10.1109/ASAP57973.2023.00014},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ZhaoKSYCMH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2023,
title = {34th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2023, Porto, Portugal, July 19-21,
2023},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ASAP57973.2023},
doi = {10.1109/ASAP57973.2023},
isbn = {979-8-3503-4685-5},
timestamp = {Thu, 19 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AgrawalYJ22,
author = {Rashmi Agrawal and
Ji Yang and
Haris Javaid},
title = {Efficient FPGA-based {ECDSA} Verification Engine for Permissioned
Blockchains},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {148--155},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00032},
doi = {10.1109/ASAP54787.2022.00032},
timestamp = {Tue, 26 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AgrawalYJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AhmedPBBKLRKA22,
author = {Ibrahim Ahmed and
Sahil Parmar and
Matthew Boyd and
Michael Beidler and
Kris Kang and
Bill Liu and
Kyle Roach and
John Kim and
Dennis Abts},
title = {Answer Fast: Accelerating {BERT} on the Tensor Streaming Processor},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {80--87},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00022},
doi = {10.1109/ASAP54787.2022.00022},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AhmedPBBKLRKA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChenH22,
author = {Hanqiu Chen and
Cong Hao},
title = {Mask-Net: {A} Hardware-efficient Object Detection Network with Masked
Region Proposals},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {131--138},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00030},
doi = {10.1109/ASAP54787.2022.00030},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ChenH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChristDP22,
author = {Maxime Christ and
Florent de Dinechin and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Low-precision logarithmic arithmetic for neural network accelerators},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {72--79},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00021},
doi = {10.1109/ASAP54787.2022.00021},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ChristDP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EjjehMCNSANNR22,
author = {Adel Ejjeh and
Leon Medvinsky and
Aaron Councilman and
Hemang Nehra and
Suraj Sharma and
Vikram S. Adve and
Luigi Nardi and
Eriko Nurvitadhi and
Rob A. Rutenbar},
title = {{HPVM2FPGA:} Enabling True Hardware-Agnostic {FPGA} Programming},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {1--10},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00012},
doi = {10.1109/ASAP54787.2022.00012},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EjjehMCNSANNR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HaaseJFG22,
author = {Julian Haase and
Sebastian Jaster and
Elke Franz and
Diana G{\"{o}}hringer},
title = {Secure Communication Protocol for Network-on-Chip with Authenticated
Encryption and Recovery Mechanism},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {156--160},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00033},
doi = {10.1109/ASAP54787.2022.00033},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/HaaseJFG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HepolaMJ22,
author = {Kari Hepola and
Joonas Multanen and
Pekka J{\"{a}}{\"{a}}skel{\"{a}}inen},
title = {OpenASIP 2.0: Co-Design Toolset for {RISC-V} Application-Specific
Instruction-Set Processors},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {161--165},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00034},
doi = {10.1109/ASAP54787.2022.00034},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HepolaMJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KhandelwalWS22,
author = {Shashwat Khandelwal and
Eashan Wadhwa and
Shanker Shreejith},
title = {Deep Learning-based Embedded Intrusion Detection System for Automotive
{CAN}},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {88--92},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00023},
doi = {10.1109/ASAP54787.2022.00023},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KhandelwalWS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KornelsenMCMG22,
author = {Murray L. Kornelsen and
Seyyed Hasan Mozafari and
James J. Clark and
Brett H. Meyer and
Warren J. Gross},
title = {Fast Heterogeneous Task Mapping for Reducing Edge {DNN} Latency},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {64--71},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00020},
doi = {10.1109/ASAP54787.2022.00020},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KornelsenMCMG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LuoS22,
author = {Mulong Luo and
G. Edward Suh},
title = {Accelerating Path Planning for Autonomous Driving with Hardware-Assisted
Memorization},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {126--130},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00029},
doi = {10.1109/ASAP54787.2022.00029},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LuoS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MimuraCM22,
author = {Yuzuki Mimura and
Qiong Chang and
Tsutomu Maruyama},
title = {Acceleration of video stabilization using embedded {GPU}},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {52--59},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00018},
doi = {10.1109/ASAP54787.2022.00018},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MimuraCM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MiomandreNM22,
author = {Hugo Miomandre and
Jean{-}Fran{\c{c}}ois Nezan and
Daniel M{\'{e}}nard},
title = {Design Space Exploration for Memory-Oriented Approximate Computing
Techniques},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {122--125},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00028},
doi = {10.1109/ASAP54787.2022.00028},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MiomandreNM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MirandaASVKDALF22,
author = {Igor D. S. Miranda and
Aman Arora and
Zachary Susskind and
Luis Armando Quintanilla Villon and
Rafael Fontella Katopodis and
Diego Leonel Cadette Dutra and
Leandro Santiago de Ara{\'{u}}jo and
Priscila M. V. Lima and
Felipe M. G. Fran{\c{c}}a and
Lizy K. John and
Maur{\'{\i}}cio Breternitz},
title = {LogicWiSARD: Memoryless Synthesis of Weightless Neural Networks},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {19--26},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00014},
doi = {10.1109/ASAP54787.2022.00014},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MirandaASVKDALF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NickelKHG22,
author = {Matthias Nickel and
Lester Kalms and
Tim H{\"{a}}ring and
Diana G{\"{o}}hringer},
title = {High-Performance {AKAZE} Implementation Including Parametrizable and
Generic {HLS} Modules},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {139--147},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00031},
doi = {10.1109/ASAP54787.2022.00031},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/NickelKHG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PeltekisFND22,
author = {Christodoulos Peltekis and
Dionysios Filippas and
Chrysostomos Nicopoulos and
Giorgos Dimitrakopoulos},
title = {FusedGCN: {A} Systolic Three-Matrix Multiplication Architecture for
Graph Convolutional Networks},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {93--97},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00024},
doi = {10.1109/ASAP54787.2022.00024},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PeltekisFND22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PerottiCWACB22,
author = {Matteo Perotti and
Matheus A. Cavalcante and
Nils Wistoff and
Renzo Andri and
Lukas Cavigelli and
Luca Benini},
title = {A "New Ara" for Vector Computing: An Open Source Highly Efficient
{RISC-V} {V} 1.0 Vector Processor Design},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {43--51},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00017},
doi = {10.1109/ASAP54787.2022.00017},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/PerottiCWACB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QureshiDMUWF22,
author = {Sheikh Faizan Qureshi and
Stefan A. Damjancevic and
Emil Mat{\'{u}}s and
Dmitry Utyansky and
Pieter van der Wolf and
Gerhard P. Fettweis},
title = {Efficient Synchronization for {NR-REDCAP} Implemented on a Vector
{DSP}},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {34--42},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00016},
doi = {10.1109/ASAP54787.2022.00016},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/QureshiDMUWF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RothmannP22,
author = {Marc Rothmann and
Mario Porrmann},
title = {{FAQ:} {A} Flexible Accelerator for Q-Learning with Configurable Environment},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {106--114},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00026},
doi = {10.1109/ASAP54787.2022.00026},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/RothmannP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SantosFAC22,
author = {Paulo Cesar Santos and
Bruno E. Forlin and
Marco A. Z. Alves and
Luigi Carro},
title = {Aggressive Performance Improvement on Processing-in-Memory Devices
by Adopting Hugepages},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {60--63},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00019},
doi = {10.1109/ASAP54787.2022.00019},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/SantosFAC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SiS22,
author = {Qilin Si and
Benjamin Carrion Schafer},
title = {Optimizing Behavioral Near On-Chip Memory Computing Systems},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {27--33},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00015},
doi = {10.1109/ASAP54787.2022.00015},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SiS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WadhwaKS22,
author = {Eashan Wadhwa and
Shashwat Khandelwal and
Shanker Shreejith},
title = {{IMEC:} {A} Memory-Efficient Convolution Algorithm For Quantised Neural
Network Accelerators},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {115--121},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00027},
doi = {10.1109/ASAP54787.2022.00027},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/WadhwaKS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WuLXH22,
author = {Nan Wu and
Jiwon Lee and
Yuan Xie and
Cong Hao},
title = {{LOSTIN:} Logic Optimization via Spatio-Temporal Information with
Hybrid Graph Models},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {11--18},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00013},
doi = {10.1109/ASAP54787.2022.00013},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WuLXH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangTHPZ22,
author = {Longlong Zhang and
Xuebin Tang and
Xiang Hu and
Yuanxi Peng and
Tong Zhou},
title = {Full-BNN: {A} Low Storage and Power Consumption Time-Domain Architecture
based on {FPGA}},
booktitle = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
pages = {98--105},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022.00025},
doi = {10.1109/ASAP54787.2022.00025},
timestamp = {Mon, 13 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhangTHPZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2022,
title = {33rd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2022, Gothenburg, Sweden, July
12-14, 2022},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ASAP54787.2022},
doi = {10.1109/ASAP54787.2022},
isbn = {978-1-6654-8308-7},
timestamp = {Fri, 28 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/0002AZMC0GLBT21,
author = {Cheng Tan and
Nicolas Bohm Agostini and
Jeff Zhang and
Marco Minutoli and
Vito Giovanni Castellana and
Chenhao Xie and
Tong Geng and
Ang Li and
Kevin J. Barker and
Antonino Tumeo},
title = {OpenCGRA: Democratizing Coarse-Grained Reconfigurable Arrays},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {149--155},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00029},
doi = {10.1109/ASAP52443.2021.00029},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/0002AZMC0GLBT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AgarwalC21,
author = {Sukarn Agarwal and
Shounak Chakraborty},
title = {ABACa: Access Based Allocation on Set Wise Multi-Retention in {STT-RAM}
Last Level Cache},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {171--174},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00032},
doi = {10.1109/ASAP52443.2021.00032},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AgarwalC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AndersonBCHLRWY21,
author = {Jason Helge Anderson and
Rami Beidas and
Vimal Chacko and
Hsuan Hsiao and
Xiaoyi Ling and
Omar Ragheb and
Xinyuan Wang and
Tianyi Yu},
title = {{CGRA-ME:} An Open-Source Framework for {CGRA} Architecture and {CAD}
Research : (Invited Paper)},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {156--162},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00030},
doi = {10.1109/ASAP52443.2021.00030},
timestamp = {Fri, 04 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AndersonBCHLRWY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BanerjeeIWPZX21,
author = {Jishnu Banerjee and
Sahidul Islam and
Wei Wei and
Chen Pan and
Dakai Zhu and
Mimi Xie},
title = {Memory-aware Efficient Deep Learning Mechanism for IoT Devices},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {187--194},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00035},
doi = {10.1109/ASAP52443.2021.00035},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BanerjeeIWPZX21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BertacciniB021,
author = {Luca Bertaccini and
Luca Benini and
Francesco Conti},
title = {To Buffer, or Not to Buffer? {A} Case Study on {FFT} Accelerators
for Ultra-Low-Power Multicore Clusters},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {1--8},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00008},
doi = {10.1109/ASAP52443.2021.00008},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BertacciniB021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BrownTG21,
author = {Grant Brown and
Valerio Tenace and
Pierre{-}Emmanuel Gaillardon},
title = {{NEMO-CNN:} An Efficient Near-Memory Accelerator for Convolutional
Neural Networks},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {57--60},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00016},
doi = {10.1109/ASAP52443.2021.00016},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BrownTG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CaoWSTL21,
author = {Yanpeng Cao and
Chengcheng Wang and
Changjun Song and
Yongming Tang and
He Li},
title = {Real-Time Super-Resolution System of 4K-Video Based on Deep Learning},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {69--76},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00019},
doi = {10.1109/ASAP52443.2021.00019},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CaoWSTL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChackoA21,
author = {Vimal Chacko and
Jason Helge Anderson},
title = {Power, Performance and Area Consequences of Multi-Context Support
in CGRAs},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {49--52},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00014},
doi = {10.1109/ASAP52443.2021.00014},
timestamp = {Mon, 21 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChackoA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Chitty-VenkataS21,
author = {Krishna Teja Chitty{-}Venkata and
Arun K. Somani},
title = {Array-Aware Neural Architecture Search},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {125--132},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00026},
doi = {10.1109/ASAP52443.2021.00026},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Chitty-VenkataS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FujiwaraT21,
author = {Yoshiki Fujiwara and
Shinya Takamaeda{-}Yamazaki},
title = {{ASBNN:} Acceleration of Bayesian Convolutional Neural Networks by
Algorithm-hardware Co-design},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {226--233},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00041},
doi = {10.1109/ASAP52443.2021.00041},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/FujiwaraT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HuL0W21,
author = {Xiao Hu and
Minghao Li and
Jing Tian and
Zhongfeng Wang},
title = {{DARM:} {A} Low-Complexity and Fast Modular Multiplier for Lattice-Based
Cryptography},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {175--178},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00033},
doi = {10.1109/ASAP52443.2021.00033},
timestamp = {Thu, 28 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HuL0W21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JeongC21,
author = {Hyunmin Jeong and
Deming Chen},
title = {TwinDNN: {A} Tale of Two Deep Neural Networks},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {133--140},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00027},
doi = {10.1109/ASAP52443.2021.00027},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/JeongC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiTY21,
author = {Ben Li and
Jingweijia Tan and
Kaige Yan},
title = {{AERO:} Towards Energy-Efficient Autonomous Flight in MAVs Using Approximate
Execution},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {196--202},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00036},
doi = {10.1109/ASAP52443.2021.00036},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiTY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuCHDC21,
author = {Xinheng Liu and
Yao Chen and
Cong Hao and
Ashutosh Dhar and
Deming Chen},
title = {WinoCNN: Kernel Sharing Winograd Systolic Array for Efficient Convolutional
Neural Network Acceleration on FPGAs},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {258--265},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00045},
doi = {10.1109/ASAP52443.2021.00045},
timestamp = {Tue, 19 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiuCHDC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuLH0D021,
author = {Mingshuo Liu and
Shiyi Luo and
Kevin Han and
Bo Yuan and
Ronald F. DeMara and
Yu Bai},
title = {An Efficient Real-Time Object Detection Framework on Resource-Constricted
Hardware Devices via Software and Hardware Co-design},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {77--84},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00020},
doi = {10.1109/ASAP52443.2021.00020},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiuLH0D021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MarshallPP21,
author = {Ben Marshall and
Daniel Page and
Thinh Hung Pham},
title = {A lightweight {ISE} for ChaCha on {RISC-V}},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {25--32},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00011},
doi = {10.1109/ASAP52443.2021.00011},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MarshallPP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OgakiS21,
author = {Masashi Ogaki and
Yukinori Sato},
title = {Hodgkin-Huxley-Based Neural Simulation with Networks Connecting to
Near-Neighbor Neurons},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {109--116},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00024},
doi = {10.1109/ASAP52443.2021.00024},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OgakiS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PaludoS21,
author = {Rog{\'{e}}rio Paludo and
Leonel Sousa},
title = {Number Theoretic Transform Architecture suitable to Lattice-based
Fully-Homomorphic Encryption},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {163--170},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00031},
doi = {10.1109/ASAP52443.2021.00031},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/PaludoS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PengZWLIGLZSXLD21,
author = {Hongwu Peng and
Shanglin Zhou and
Scott Weitze and
Jiaxin Li and
Sahidul Islam and
Tong Geng and
Ang Li and
Wei Zhang and
Minghu Song and
Mimi Xie and
Hang Liu and
Caiwen Ding},
title = {Binary Complex Neural Network Acceleration on {FPGA} : (Invited Paper)},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {85--92},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00021},
doi = {10.1109/ASAP52443.2021.00021},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/PengZWLIGLZSXLD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PhamMFLP21,
author = {Thinh Hung Pham and
Ben Marshall and
Alexander Fell and
Siew{-}Kei Lam and
Daniel Page},
title = {{XDIVINSA:} eXtended DIVersifying INStruction Agent to Mitigate Power
Side-Channel Leakage},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {179--186},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00034},
doi = {10.1109/ASAP52443.2021.00034},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/PhamMFLP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QasaimehZJ21,
author = {Murad Qasaimeh and
Joseph Zambreno and
Phillip H. Jones},
title = {An Efficient Hardware Architecture for Sparse Convolution using Linear
Feedback Shift Registers},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {250--257},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00044},
doi = {10.1109/ASAP52443.2021.00044},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/QasaimehZJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QianCFWJ21,
author = {Yu Qian and
Baolei Cheng and
Jianxi Fan and
Yifeng Wang and
Ruofan Jiang},
title = {Edge-disjoint spanning trees in the line graph of hypercubes},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {61--64},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00017},
doi = {10.1109/ASAP52443.2021.00017},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/QianCFWJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QiuXPWKLW21,
author = {Yuchen Qiu and
Chao Xiao and
LingHui Peng and
Junhui Wang and
Ziyang Kang and
Shiming Li and
Lei Wang},
title = {A Novel Ring-based Small-World NoC for Neuromorphic Processor},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {234--241},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00042},
doi = {10.1109/ASAP52443.2021.00042},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/QiuXPWKLW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QueWMMNJBALSPCL21,
author = {Zhiqiang Que and
Erwei Wang and
Umar Marikar and
Eric A. Moreno and
Jennifer Ngadiuba and
Hamza Javed and
Bartlomiej Borzyszkowski and
Thea Aarrestad and
Vladimir Loncar and
Sioni Summers and
Maurizio Pierini and
Peter Y. K. Cheung and
Wayne Luk},
title = {Accelerating Recurrent Neural Networks for Gravitational Wave Experiments},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {117--124},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00025},
doi = {10.1109/ASAP52443.2021.00025},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/QueWMMNJBALSPCL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SommerHA021,
author = {Lukas Sommer and
Michael Halkenh{\"{a}}user and
Cristian Axenie and
Andreas Koch},
title = {{SPNC:} Accelerating Sum-Product Network Inference on CPUs and GPUs},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {53--56},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00015},
doi = {10.1109/ASAP52443.2021.00015},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/SommerHA021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SongT021,
author = {Shihao Song and
Twisha Titirsha and
Anup Das},
title = {Improving Inference Lifetime of Neuromorphic Systems via Intelligent
Synapse Mapping},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {17--24},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00010},
doi = {10.1109/ASAP52443.2021.00010},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SongT021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SunL0K21,
author = {Mingjian Sun and
Yuan Li and
Song Chen and
Yi Kang},
title = {A Low Power Branch Prediction for Deep Learning on {RISC-V} Processor},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {203--206},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00037},
doi = {10.1109/ASAP52443.2021.00037},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/SunL0K21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/UenoKS21,
author = {Tomohiro Ueno and
Atsushi Koshiba and
Kentaro Sano},
title = {Virtual Circuit-Switching Network with Flexible Topology for High-Performance
{FPGA} Cluster},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {41--48},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00013},
doi = {10.1109/ASAP52443.2021.00013},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/UenoKS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VenierisPLV21,
author = {Stylianos I. Venieris and
Ioannis Panopoulos and
Ilias Leontiadis and
Iakovos S. Venieris},
title = {How to Reach Real-Time {AI} on Consumer Devices? Solutions for Programmable
and Custom Architectures},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {93--100},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00022},
doi = {10.1109/ASAP52443.2021.00022},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/VenierisPLV21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangL21,
author = {Yu Wang and
Peng Li},
title = {Algorithm and Hardware Co-Design for {FPGA} Acceleration of Hamiltonian
Monte Carlo Based No-U-Turn Sampler},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {9--16},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00009},
doi = {10.1109/ASAP52443.2021.00009},
timestamp = {Sat, 18 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/WangL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangYHA21,
author = {Xinyuan Wang and
Tianyi Yu and
Hsuan Hsiao and
Jason Helge Anderson},
title = {Double-Pumping the Interconnect for Area Reduction in Coarse-Grained
Reconfigurable Arrays},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {242--249},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00043},
doi = {10.1109/ASAP52443.2021.00043},
timestamp = {Fri, 04 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/WangYHA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangZWHY21,
author = {Shihang Wang and
Jianghan Zhu and
Qi Wang and
Can He and
Terry Tao Ye},
title = {Customized Instruction on {RISC-V} for Winograd-Based Convolution
Acceleration},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {65--68},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00018},
doi = {10.1109/ASAP52443.2021.00018},
timestamp = {Thu, 01 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/WangZWHY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WenJXWXZD21,
author = {Dong Wen and
Jingfei Jiang and
Jinwei Xu and
Kang Wang and
Tao Xiao and
Yang Zhao and
Yong Dou},
title = {RFC-HyPGCN: {A} Runtime Sparse Feature Compress Accelerator for Skeleton-Based
GCNs Action Recognition Model with Hybrid Pruning},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {33--40},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00012},
doi = {10.1109/ASAP52443.2021.00012},
timestamp = {Wed, 22 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WenJXWXZD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XuW0YWGW21,
author = {Yuanjia Xu and
Heng Wu and
Wenbo Zhang and
Chen Yang and
Yuewen Wu and
Heran Gao and
Tao Wang},
title = {Talos: {A} Weighted Speedup-Aware Device Placement of Deep Learning
Models},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {101--108},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00023},
doi = {10.1109/ASAP52443.2021.00023},
timestamp = {Fri, 14 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/XuW0YWGW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YangJ0W21,
author = {En{-}Yu Yang and
Tianyu Jia and
David Brooks and
Gu{-}Yeon Wei},
title = {FlexACC: {A} Programmable Accelerator with Application-Specific {ISA}
for Flexible Deep Neural Network Inference},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {266--273},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00046},
doi = {10.1109/ASAP52443.2021.00046},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/YangJ0W21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangASTLAMMCTW21,
author = {Jeff Jun Zhang and
Nicolas Bohm Agostini and
Shihao Song and
Cheng Tan and
Ankur Limaye and
Vinay Amatya and
Joseph B. Manzano and
Marco Minutoli and
Vito Giovanni Castellana and
Antonino Tumeo and
Gu{-}Yeon Wei and
David Brooks},
title = {Towards Automatic and Agile {AI/ML} Accelerator Design with End-to-End
Synthesis},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {218--225},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00040},
doi = {10.1109/ASAP52443.2021.00040},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhangASTLAMMCTW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangL21,
author = {Liping Zhang and
Qin Lu},
title = {Image caption generation method based on an interaction mechanism
and scene concept selection module},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {141--148},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00028},
doi = {10.1109/ASAP52443.2021.00028},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ZhangL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangWFG21,
author = {Huanwen Zhang and
Yan Wang and
Jianxi Fan and
Ruyan Guo},
title = {Parallel Construction of Independent Spanning Trees on Folded Crossed
Cubes},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {207--210},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00038},
doi = {10.1109/ASAP52443.2021.00038},
timestamp = {Fri, 02 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhangWFG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangWZRJ21,
author = {Sizhe Zhang and
Ruixuan Wang and
Jeff Jun Zhang and
Abbas Rahimi and
Xun Jiao},
title = {Assessing Robustness of Hyperdimensional Computing Against Errors
in Associative Memory : (Invited Paper)},
booktitle = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
pages = {211--217},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021.00039},
doi = {10.1109/ASAP52443.2021.00039},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhangWZRJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2021,
title = {32nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2021, Virtual Conference, USA,
July 7-9, 2021},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ASAP52443.2021},
doi = {10.1109/ASAP52443.2021},
isbn = {978-1-6654-2701-2},
timestamp = {Mon, 30 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/0002TR20,
author = {Nuno Neves and
Pedro Tom{\'{a}}s and
Nuno Roma},
title = {Reconfigurable Stream-based Tensor Unit with Variable-Precision Posit
Arithmetic},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {149--156},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00033},
doi = {10.1109/ASAP49362.2020.00033},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/0002TR20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/0002ZLWLZC20,
author = {Dawen Xu and
Ziyang Zhu and
Cheng Liu and
Ying Wang and
Huawei Li and
Lei Zhang and
Kwang{-}Ting Cheng},
title = {Persistent Fault Analysis of Neural Networks on FPGA-based Acceleration
System},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {85--92},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00024},
doi = {10.1109/ASAP49362.2020.00024},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/0002ZLWLZC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AbdelhamidYB20,
author = {Riadh Ben Abdelhamid and
Yoshiki Yamaguchi and
Taisuke Boku},
title = {Condensing an overload of parallel computing ingredients into a single
architecture recipe},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {25--28},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00013},
doi = {10.1109/ASAP49362.2020.00013},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AbdelhamidYB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ArnoldCJ20,
author = {Mark G. Arnold and
Ed Chester and
Corey Johnson},
title = {Training Neural Nets using only an Approximate Tableless {LNS} {ALU}},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {69--72},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00020},
doi = {10.1109/ASAP49362.2020.00020},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ArnoldCJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AroraWJ20,
author = {Aman Arora and
Zhigang Wei and
Lizy K. John},
title = {Hamamu: Specializing FPGAs for {ML} Applications by Adding Hard Matrix
Multiplier Blocks},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {53--60},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00018},
doi = {10.1109/ASAP49362.2020.00018},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AroraWJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AsiaticiMI20,
author = {Mikhail Asiatici and
Damian Maiorano and
Paolo Ienne},
title = {FPGAs in the Datacenters: the Case of Parallel Hybrid Super Scalar
String Sample Sort},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {133--140},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00031},
doi = {10.1109/ASAP49362.2020.00031},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AsiaticiMI20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BarthelRP20,
author = {Moritz B{\"{a}}rthel and
Jochen Rust and
Steffen Paul},
title = {Combining Fixed-Point and {SORN} Arithmetic in a {MIMO} BPSK-Symbol
Detection Architecture},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {181--184},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00037},
doi = {10.1109/ASAP49362.2020.00037},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BarthelRP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BrandWBT20,
author = {Marcel Brand and
Michael Witterauf and
Alberto Bosio and
J{\"{u}}rgen Teich},
title = {Anytime Floating-Point Addition and Multiplication-Concepts and Implementations},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {157--164},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00034},
doi = {10.1109/ASAP49362.2020.00034},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BrandWBT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Chitty-VenkataS20,
author = {Krishna Teja Chitty{-}Venkata and
Arun K. Somani},
title = {Array Aware Training/Pruning: Methods for Efficient Forward Propagation
on Array-based Neural Network Accelerators},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {37--44},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00016},
doi = {10.1109/ASAP49362.2020.00016},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Chitty-VenkataS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DeySPM20,
author = {Somdip Dey and
Amit Kumar Singh and
Dilip Kumar Prasad and
Klaus D. McDonald{-}Maier},
title = {Temporal Motionless Analysis of Video using {CNN} in MPSoC},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {73--76},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00021},
doi = {10.1109/ASAP49362.2020.00021},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/DeySPM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DiasCGF20,
author = {Leonardo Alves Dias and
Maria G. F. Coutinho and
Elena I. Gaura and
Marcelo A. C. Fernandes},
title = {A New Hardware Approach to Self-Organizing Maps},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {205--212},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00041},
doi = {10.1109/ASAP49362.2020.00041},
timestamp = {Fri, 05 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DiasCGF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GibsonCTCOS20,
author = {Perry Gibson and
Jos{\'{e}} Cano and
Jack Turner and
Elliot J. Crowley and
Michael F. P. O'Boyle and
Amos J. Storkey},
title = {Optimizing Grouped Convolutions on Edge Devices},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {189--196},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00039},
doi = {10.1109/ASAP49362.2020.00039},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GibsonCTCOS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JoldesP20,
author = {Mioara Joldes and
Bogdan Pasca},
title = {Efficient Floating-Point Implementation of the Probit Function on
FPGAs},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {173--180},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00036},
doi = {10.1109/ASAP49362.2020.00036},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JoldesP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KangMJ20,
author = {Seongyoung Kang and
Jinyeong Moon and
Sang{-}Woo Jun},
title = {FPGA-Accelerated Time Series Mining on Low-Power IoT Devices},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {33--36},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00015},
doi = {10.1109/ASAP49362.2020.00015},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KangMJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KobayashiFYBYAU20,
author = {Ryohei Kobayashi and
Norihisa Fujita and
Yoshiki Yamaguchi and
Taisuke Boku and
Kohji Yoshikawa and
Makito Abe and
Masayuki Umemura},
title = {Accelerating Radiative Transfer Simulation with {GPU-FPGA} Cooperative
Computation},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {9--16},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00011},
doi = {10.1109/ASAP49362.2020.00011},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KobayashiFYBYAU20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KochHN20,
author = {Dirk Koch and
Frank Hannig and
Javier Navaridas},
title = {Message from the Conference Chairs - {ASAP} 2020},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {i--ii},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00005},
doi = {10.1109/ASAP49362.2020.00005},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KochHN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LohWG20,
author = {Johnson Loh and
Jianan Wen and
Tobias Gemmeke},
title = {Low-Cost {DNN} Hardware Accelerator for Wearable, High-Quality Cardiac
Arrythmia Detection},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {213--216},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00042},
doi = {10.1109/ASAP49362.2020.00042},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LohWG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MbongueSBB20,
author = {Joel Mandebi Mbongue and
Alex Shuping and
Pankaj Bhowmik and
Christophe Bobda},
title = {Architecture Support for {FPGA} Multi-tenancy in the Cloud},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {125--132},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00030},
doi = {10.1109/ASAP49362.2020.00030},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MbongueSBB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MehrabianSE20,
author = {Armin Mehrabian and
Volker J. Sorger and
Tarek A. El{-}Ghazawi},
title = {A Design Methodology for Post-Moore's Law Accelerators: The Case of
a Photonic Neuromorphic Processor},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {113--116},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00028},
doi = {10.1109/ASAP49362.2020.00028},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MehrabianSE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MengGGL20,
author = {Jiuxi Meng and
Ce Guo and
Nadeen Gebara and
Wayne Luk},
title = {Fast and Accurate Training of Ensemble Models with FPGA-based Switch},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {81--84},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00023},
doi = {10.1109/ASAP49362.2020.00023},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MengGGL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NaylorMMTBFMBB20,
author = {Matthew Naylor and
Simon W. Moore and
Andrey Mokhov and
David B. Thomas and
Jonathan R. Beaumont and
Shane T. Fleming and
A. Theodore Markettos and
Thomas Bytheway and
Andrew D. Brown},
title = {Termination detection for fine-grained message-passing architectures},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {17--24},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00012},
doi = {10.1109/ASAP49362.2020.00012},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NaylorMMTBFMBB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PivezhandiJZ20,
author = {Mohammad Pivezhandi and
Phillip H. Jones and
Joseph Zambreno},
title = {ParaHist: {FPGA} Implementation of Parallel Event-Based Histogram
for Optical Flow Calculation},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {185--188},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00038},
doi = {10.1109/ASAP49362.2020.00038},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/PivezhandiJZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PodobasSM20,
author = {Artur Podobas and
Kentaro Sano and
Satoshi Matsuoka},
title = {A Template-based Framework for Exploring Coarse-Grained Reconfigurable
Architectures},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {1--8},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00010},
doi = {10.1109/ASAP49362.2020.00010},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/PodobasSM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ReubenP20,
author = {John Reuben and
Stefan Pechmann},
title = {A Parallel-friendly Majority Gate to Accelerate In-memory Computation},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {93--100},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00025},
doi = {10.1109/ASAP49362.2020.00025},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ReubenP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Richter-Brockmann20,
author = {Jan Richter{-}Brockmann and
Tim G{\"{u}}neysu},
title = {Improved Side-Channel Resistance by Dynamic Fault-Injection Countermeasures},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {117--124},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00029},
doi = {10.1109/ASAP49362.2020.00029},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/Richter-Brockmann20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SestitoSCP20,
author = {Cristian Sestito and
Fanny Spagnolo and
Pasquale Corsonello and
Stefania Perri},
title = {An Efficient Convolution Engine based on the {\`{A}}-trous Spatial
Pyramid Pooling},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {77--80},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00022},
doi = {10.1109/ASAP49362.2020.00022},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/SestitoSCP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SolimanOKPLKGW20,
author = {Taha Soliman and
Ricardo Olivo and
Tobias Kirchner and
Cecilia De la Parra and
Maximilian Lederer and
Thomas K{\"{a}}mpfe and
Andre Guntoro and
Norbert Wehn},
title = {Efficient FeFET Crossbar Accelerator for Binary Neural Networks},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {109--112},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00027},
doi = {10.1109/ASAP49362.2020.00027},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/SolimanOKPLKGW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TingGSB20,
author = {Hsin{-}Yu Ting and
Tootiya Giyahchi and
Ardalan Amiri Sani and
Eli Bozorgzadeh},
title = {Dynamic Sharing in Multi-accelerators of Neural Networks on an {FPGA}
Edge Device},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {197--204},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00040},
doi = {10.1109/ASAP49362.2020.00040},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/TingGSB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TyeMBS20,
author = {Nathaniel Joseph Tye and
James Timothy Meech and
Bilgesu Arif Bilgin and
Phillip Stanley{-}Marbell},
title = {A System for Generating Non-Uniform Random Variates using Graphene
Field-Effect Transistors},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {101--108},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00026},
doi = {10.1109/ASAP49362.2020.00026},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/TyeMBS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VandebonCLNN20,
author = {Jessica Vandebon and
Jos{\'{e}} Gabriel F. Coutinho and
Wayne Luk and
Eriko Nurvitadhi and
Mishali Naik},
title = {{SLATE:} Managing Heterogeneous Cloud Functions},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {141--148},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00032},
doi = {10.1109/ASAP49362.2020.00032},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/VandebonCLNN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WeiAPJ20,
author = {Zhigang Wei and
Aman Arora and
Pragenesh Patel and
Lizy Kurian John},
title = {Design Space Exploration for Softmax Implementations},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {45--52},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00017},
doi = {10.1109/ASAP49362.2020.00017},
timestamp = {Sun, 12 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WeiAPJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XuSQ20,
author = {Qian Xu and
Guowei Sun and
Gang Qu},
title = {{BWOLF:} Bit-Width Optimization for Statistical Divergence with -Logarithmic
Functions},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {165--172},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00035},
doi = {10.1109/ASAP49362.2020.00035},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XuSQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YoshidaUOUIN20,
author = {Shuhei Yoshida and
Yuta Ukon and
Shoko Ohteru and
Hiroyuki Uzawa and
Namiko Ikeda and
Koyo Nitta},
title = {FPGA-Based Network Microburst Analysis System with Flow Specification
and Efficient Packet Capturing},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {29--32},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00014},
doi = {10.1109/ASAP49362.2020.00014},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/YoshidaUOUIN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangZP20,
author = {Bingyi Zhang and
Hanqing Zeng and
Viktor K. Prasanna},
title = {Hardware Acceleration of Large Scale {GCN} Inference},
booktitle = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
pages = {61--68},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASAP49362.2020.00019},
doi = {10.1109/ASAP49362.2020.00019},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ZhangZP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2020,
title = {31st {IEEE} International Conference on Application-specific Systems,
Architectures and Processors , {ASAP} 2020, Manchester, United Kingdom,
July 6-8, 2020},
publisher = {{IEEE}},
year = {2020},
url = {https://ieeexplore.ieee.org/xpl/conhome/9146895/proceeding},
isbn = {978-1-7281-7147-0},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/0004CU19,
author = {Muhammad Irfan and
Ray C. C. Cheung and
Zahid Ullah},
title = {Bank-selective Strategy for Gate-based Ternary Content-addressable
Memory on FPGAs},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {288--291},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00019},
doi = {10.1109/ASAP.2019.00019},
timestamp = {Thu, 12 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/0004CU19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AbdelhamidYB19,
author = {Riadh Ben Abdelhamid and
Yoshiki Yamaguchi and
Taisuke Boku},
title = {{MITRACA:} Manycore Interlinked Torus Reconfigurable Accelerator Architecture},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {38},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-35},
doi = {10.1109/ASAP.2019.00-35},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AbdelhamidYB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AbeysingheVWB19,
author = {Madushan Abeysinghe and
Jesse Villarreal and
Lucas Weaver and
Jason D. Bakos},
title = {OpenVX Graph Optimization for Visual Processor Units},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {123--130},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-19},
doi = {10.1109/ASAP.2019.00-19},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AbeysingheVWB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AndersonSASE19,
author = {Jeff Anderson and
Shuai Sun and
Yousra Al{-}Kabani and
Volker J. Sorger and
Tarek A. El{-}Ghazawi},
title = {Photonic Processor for Fully Discretized Neural Networks},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {25--32},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-41},
doi = {10.1109/ASAP.2019.00-41},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AndersonSASE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ArafaBCSE19,
author = {Yehia Arafa and
Abdel{-}Hameed A. Badawy and
Gopinath Chennupati and
Nandakishore Santhi and
Stephan J. Eidenbenz},
title = {{POSTER:} GPUs Pipeline Latency Analysis},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {139},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-13},
doi = {10.1109/ASAP.2019.00-13},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ArafaBCSE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ArndtLB19,
author = {Oliver Jakob Arndt and
Matthias L{\"{u}}ders and
Holger Blume},
title = {Statistical Performance Prediction for Multicore Applications Based
on Scalability Characteristics},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {255--262},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00015},
doi = {10.1109/ASAP.2019.00015},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ArndtLB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AsadiN19,
author = {Sina Asadi and
M. Hassan Najafi},
title = {Context-Aware Number Generator for Deterministic Bit-stream Computing},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {140},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-12},
doi = {10.1109/ASAP.2019.00-12},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AsadiN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BhowmikPB19,
author = {Pankaj Bhowmik and
Md Jubaer Hossain Pantho and
Christophe Bobda},
title = {Event-Based Re-configurable Hierarchical Processors for Smart Image
Sensors},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {115--122},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-20},
doi = {10.1109/ASAP.2019.00-20},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BhowmikPB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BrunieLR19,
author = {Nicolas Brunie and
Christoph Quirin Lauter and
Guillaume Revy},
title = {Precision Adaptation for Fast and Accurate Polynomial Evaluation Generation},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {41},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-32},
doi = {10.1109/ASAP.2019.00-32},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BrunieLR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CastanedaBGS19,
author = {Oscar Casta{\~{n}}eda and
Maria Bobbett and
Alexandra Gallyas{-}Sanhueza and
Christoph Studer},
title = {{PPAC:} {A} Versatile In-Memory Accelerator for Matrix-Vector-Product-Like
Operations},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {149--156},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.000-9},
doi = {10.1109/ASAP.2019.000-9},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CastanedaBGS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChiangC19,
author = {Wei{-}Kuo Chiang and
He{-}Xin Chen},
title = {A Quantitative Approach for Refactoring NFV-based Mobile Core Networks},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {135},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-17},
doi = {10.1109/ASAP.2019.00-17},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChiangC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Chitty-VenkataS19,
author = {Krishna Teja Chitty{-}Venkata and
Arun K. Somani},
title = {Impact of Structural Faults on Neural Network Performance},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {35},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-38},
doi = {10.1109/ASAP.2019.00-38},
timestamp = {Wed, 05 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/Chitty-VenkataS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DiamantopoulosH19,
author = {Dionysios Diamantopoulos and
Christoph Hagleitner},
title = {HelmGemm: Managing GPUs and FPGAs for Transprecision {GEMM} Workloads
in Containerized Environments},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {71--74},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-27},
doi = {10.1109/ASAP.2019.00-27},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/DiamantopoulosH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FanLZFQLNL19,
author = {Hongxiang Fan and
Cheng Luo and
Chenglong Zeng and
Martin Ferianc and
Zhiqiang Que and
Shuanglong Liu and
Xinyu Niu and
Wayne Luk},
title = {{F-E3D:} FPGA-based Acceleration of an Efficient 3D Convolutional
Neural Network for Human Action Recognition},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {1--8},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-44},
doi = {10.1109/ASAP.2019.00-44},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FanLZFQLNL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FangCLAH19,
author = {Jian Fang and
Jianyu Chen and
Jinho Lee and
Zaid Al{-}Ars and
H. Peter Hofstee},
title = {Refine and Recycle: {A} Method to Increase Decompression Parallelism},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {272--280},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00017},
doi = {10.1109/ASAP.2019.00017},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FangCLAH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FangJCR19,
author = {Zhenman Fang and
Farnoosh Javadi and
Jason Cong and
Glenn Reinman},
title = {Understanding Performance Gains of Accelerator-Rich Architectures},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {239--246},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00013},
doi = {10.1109/ASAP.2019.00013},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/FangJCR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GaoR19,
author = {Tianqi Gao and
Rob A. Rutenbar},
title = {A Virtual Image Accelerator for Graph Cuts Inference on {FPGA}},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {137},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-15},
doi = {10.1109/ASAP.2019.00-15},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GaoR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GautierAK19,
author = {Quentin Gautier and
Alric Althoff and
Ryan Kastner},
title = {{FPGA} Architectures for Real-time Dense {SLAM}},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {83--90},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-25},
doi = {10.1109/ASAP.2019.00-25},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GautierAK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GengWWYSLH19,
author = {Tong Geng and
Tianqi Wang and
Chunshu Wu and
Chen Yang and
Shuaiwen Leon Song and
Ang Li and
Martin C. Herbordt},
title = {{LP-BNN:} Ultra-low-Latency {BNN} Inference with Layer Parallelism},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {9--16},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-43},
doi = {10.1109/ASAP.2019.00-43},
timestamp = {Tue, 29 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GengWWYSLH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GivakiHNKGGR19,
author = {Kamyar Givaki and
Reza Hojabr and
M. Hassan Najafi and
Ahmad Khonsari and
M. Hossein Gholamrezayi and
Saeid Gorgin and
Dara Rahmati},
title = {Using Residue Number Systems to Accelerate Deterministic Bit-stream
Multiplication},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {40},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-33},
doi = {10.1109/ASAP.2019.00-33},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GivakiHNKGGR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuoLLWL19,
author = {Ce Guo and
Wayne Luk and
Stanley Qing Shui Loh and
Alexander Warren and
Joshua M. Levine},
title = {Customisable Control Policy Learning for Robotics},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {91--98},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-24},
doi = {10.1109/ASAP.2019.00-24},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GuoLLWL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuoPZQD19,
author = {Haoqiang Guo and
Lu Peng and
Jian Zhang and
Fang Qi and
Lide Duan},
title = {Fooling {AI} with {AI:} An Accelerator for Adversarial Attacks on
Deep Learning Visual Classification},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {136},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-16},
doi = {10.1109/ASAP.2019.00-16},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GuoPZQD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HuangC019,
author = {Wei{-}pei Huang and
Ray C. C. Cheung and
Hong Yan},
title = {An Efficient Application Specific Instruction Set Processor {(ASIP)}
for Tensor Computation},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {37},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-36},
doi = {10.1109/ASAP.2019.00-36},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/HuangC019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JinF19,
author = {Zheming Jin and
Hal Finkel},
title = {Base64 Encoding on Heterogeneous Computing Platforms},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {247--254},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00014},
doi = {10.1109/ASAP.2019.00014},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/JinF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KarakchiDB19,
author = {Rasha Karakchi and
Charles Daniels and
Jason D. Bakos},
title = {An Overlay Architecture for Pattern Matching},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {165--172},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.000-7},
doi = {10.1109/ASAP.2019.000-7},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KarakchiDB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KritikakisK19,
author = {Charalampos Kritikakis and
Dirk Koch},
title = {End-to-end Dynamic Stream Processing on Maxeler {HLS} Platforms},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {59--66},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-29},
doi = {10.1109/ASAP.2019.00-29},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KritikakisK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KumarathungaGSS19,
author = {Dilshan Kumarathunga and
Omega Gamage and
Asitha Samarasinghe and
Nipuna Saranga and
Ranga Rodrigo and
Ajith A. Pasqual},
title = {{VLIW} Based Runtime Reconfigurable Machine Vision Coprocessor Architecture
for Edge Computing},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {103--106},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-22},
doi = {10.1109/ASAP.2019.00-22},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KumarathungaGSS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KungMZDC19,
author = {H. T. Kung and
Bradley McDanel and
Sai Qian Zhang and
Xin Dong and
Chih{-}Chiang Chen},
title = {Maestro: {A} Memory-on-Logic Architecture for Coordinated Parallel
Use of Many Systolic Arrays},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {42--50},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-31},
doi = {10.1109/ASAP.2019.00-31},
timestamp = {Tue, 18 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KungMZDC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Kvatinsky19,
author = {Shahar Kvatinsky},
title = {Real Processing-in-Memory with Memristive Memory Processing Unit (mMPU)},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {142--148},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-10},
doi = {10.1109/ASAP.2019.00-10},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/Kvatinsky19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LagasseBB19,
author = {Jacqueline Lagasse and
Christopher Bartoli and
Wayne P. Burleson},
title = {Combining Clock and Voltage Noise Countermeasures Against Power Side-Channel
Analysis},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {214--217},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00009},
doi = {10.1109/ASAP.2019.00009},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LagasseBB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeP19,
author = {Byeong Kil Lee and
Jordan Pattee},
title = {Implications for Hardware Acceleration of Malware Detection},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {138},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-14},
doi = {10.1109/ASAP.2019.00-14},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LeeP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiS19,
author = {Yuancheng Li and
Jiaqi Shi},
title = {CRbS: {A} Code Reordering Based Speeding-up Method of Irregular Loops
on {CMP}},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {34},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-39},
doi = {10.1109/ASAP.2019.00-39},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LuongNNP19,
author = {Tieu{-}Khanh Luong and
Van{-}Tinh Nguyen and
Anh{-}Thai Nguyen and
Emanuel M. Popovici},
title = {Efficient Architectures and Implementation of Arithmetic Functions
Approximation Based Stochastic Computing},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {281--287},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00018},
doi = {10.1109/ASAP.2019.00018},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LuongNNP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MahmudE19,
author = {Naveed Mahmud and
Esam El{-}Araby},
title = {Improving Emulation of Quantum Algorithms using Space-Efficient Hardware
Architectures},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {206--213},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.000-1},
doi = {10.1109/ASAP.2019.000-1},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MahmudE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MalikG19,
author = {Sharad Malik and
Pareesa Ameneh Golnari},
title = {Sparse Matrix to Matrix Multiplication: {A} Representation and Architecture
for Acceleration},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {67--70},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-28},
doi = {10.1109/ASAP.2019.00-28},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MalikG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MathisS19,
author = {Brett Mathis and
James E. Stine},
title = {A Well-Equipped Implementation: Normal/Denormalized Half/Single/Double
Precision {IEEE} 754 Floating-Point Adder/Subtracter},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {227--234},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00011},
doi = {10.1109/ASAP.2019.00011},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MathisS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MatoussiDSM19,
author = {Oumaima Matoussi and
Yves Durand and
Olivier Sentieys and
Anca Molnos},
title = {Error Analysis of the Square Root Operation for the Purpose of Precision
Tuning: {A} Case Study on K-means},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {75--82},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-26},
doi = {10.1109/ASAP.2019.00-26},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MatoussiDSM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MengGNCL19,
author = {Jiuxi Meng and
Nadeen Gebara and
Ho{-}Cheung Ng and
Paolo Costa and
Wayne Luk},
title = {Investigating the Feasibility of FPGA-based Network Switches},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {218--226},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00010},
doi = {10.1109/ASAP.2019.00010},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MengGNCL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MurrayFKS19,
author = {Sean Murray and
Will Floyd{-}Jones and
George Dimitri Konidaris and
Daniel J. Sorin},
title = {A Programmable Architecture for Robot Motion Planning Acceleration},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {185--188},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.000-4},
doi = {10.1109/ASAP.2019.000-4},
timestamp = {Tue, 19 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MurrayFKS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NajafiFBL19,
author = {M. Hassan Najafi and
S. Rasoul Faraji and
Kia Bazargan and
David J. Lilja},
title = {Energy-Efficient Near-Sensor Convolution using Pulsed Unary Processing},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {36},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-37},
doi = {10.1109/ASAP.2019.00-37},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/NajafiFBL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ObaAAMT19,
author = {Yuka Oba and
Kota Ando and
Tetsuya Asai and
Masato Motomura and
Shinya Takamaeda{-}Yamazaki},
title = {DeltaNet: Differential Binary Neural Network},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {39},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-34},
doi = {10.1109/ASAP.2019.00-34},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ObaAAMT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QueNLTN0L19,
author = {Zhiqiang Que and
Thomas Nugent and
Shuanglong Liu and
Li Tian and
Xinyu Niu and
Yongxin Zhu and
Wayne Luk},
title = {Efficient Weight Reuse for Large LSTMs},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {17--24},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-42},
doi = {10.1109/ASAP.2019.00-42},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/QueNLTN0L19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RanasingheBSJPS19,
author = {Nisal Ranasinghe and
Ravindu Bangamuarachchi and
Jayath Seneviratne and
Achini Jayawardane and
Ajith Pasqual and
R. M. A. U. Senarath},
title = {{SMPTE} {ST} 2110 Compliant Scalable Architecture on {FPGA} for end
to end Uncompressed Professional Video Transport Over {IP} Networks},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {235--238},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00012},
doi = {10.1109/ASAP.2019.00012},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/RanasingheBSJPS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RanawakaETCAS19,
author = {Piyumal Ranawaka and
Mongkol Ekpanyapong and
Adriano Tavares and
Jorge Cabral and
Krit Athikulwongse and
Vitor Alberto Silva},
title = {Application Specific Architecture for Hardware Accelerating {HOG-SVM}
to Achieve High Throughput on {HD} Frames},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {131--134},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-18},
doi = {10.1109/ASAP.2019.00-18},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/RanawakaETCAS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SahaDZ19,
author = {Saunak Saha and
Henry Duwe and
Joseph Zambreno},
title = {An Adaptive Memory Management Strategy Towards Energy Efficient Machine
Inference in Event-Driven Neuromorphic Accelerators},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {197--205},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.000-2},
doi = {10.1109/ASAP.2019.000-2},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/SahaDZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShiZQS19,
author = {Zejun Shi and
Dongqin Zhou and
Keni Qiu and
Jiwu Shu},
title = {Leveraging Energy Cycle Regularity to Predict Adaptive Mode for Non-volatile
Processors},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {189--196},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.000-3},
doi = {10.1109/ASAP.2019.000-3},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ShiZQS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SigurbergssonHQ19,
author = {Bj{\"{o}}rn Sigurbergsson and
Tom Hogervorst and
Tong Dong Qiu and
Razvan Nane},
title = {Sparstition: {A} Partitioning Scheme for Large-Scale Sparse Matrix
Vector Multiplication on {FPGA}},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {51--58},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-30},
doi = {10.1109/ASAP.2019.00-30},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/SigurbergssonHQ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VandebonCLC19,
author = {Jessica Vandebon and
Jos{\'{e}} Gabriel F. Coutinho and
Wayne Luk and
Thomas Chau},
title = {Transparent Heterogeneous Cloud Acceleration},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {33},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-40},
doi = {10.1109/ASAP.2019.00-40},
timestamp = {Sun, 11 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/VandebonCLC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VossZVHMOLG19,
author = {Nils Voss and
Peter Ziegenhein and
Lukas Vermond and
Joost Hoozemans and
Oskar Mencer and
Uwe Oelfke and
Wayne Luk and
Georgi Gaydadjiev},
title = {Towards Real Time Radiotherapy Simulation},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {173--180},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.000-6},
doi = {10.1109/ASAP.2019.000-6},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/VossZVHMOLG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangGJH19,
author = {Tianqi Wang and
Tong Geng and
Xi Jin and
Martin C. Herbordt},
title = {Accelerating AP3M-Based Computational Astrophysics Simulations with
Reconfigurable Clusters},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {181--184},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.000-5},
doi = {10.1109/ASAP.2019.000-5},
timestamp = {Mon, 05 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/WangGJH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangL0ZHK19,
author = {Feng Wang and
Guojie Luo and
Guangyu Sun and
Jiaxi Zhang and
Peng Huang and
Jinfeng Kang},
title = {Parallel Stateful Logic in {RRAM:} Theoretical Analysis and Arithmetic
Design},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {157--164},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.000-8},
doi = {10.1109/ASAP.2019.000-8},
timestamp = {Tue, 08 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WangL0ZHK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XiaDJL0DDSSZL19,
author = {Lixue Xia and
Lansong Diao and
Zhao Jiang and
Hao Liang and
Kai Chen and
Li Ding and
Shunli Dou and
Zibin Su and
Meng Sun and
Jiansong Zhang and
Wei Lin},
title = {{PAI-FCNN:} {FPGA} Based Inference System for Complex {CNN} Models},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {107--114},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-21},
doi = {10.1109/ASAP.2019.00-21},
timestamp = {Mon, 12 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/XiaDJL0DDSSZL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XuXL0DCLZ19,
author = {Dawen Xu and
KouZi Xing and
Cheng Liu and
Ying Wang and
Yulin Dai and
Long Cheng and
Huawei Li and
Lei Zhang},
title = {Resilient Neural Network Training for Accelerators with Computing
Errors},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {99--102},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-23},
doi = {10.1109/ASAP.2019.00-23},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/XuXL0DCLZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YangGWLSSSH19,
author = {Chen Yang and
Tong Geng and
Tianqi Wang and
Charles Lin and
Jiayi Sheng and
Vipin Sachdeva and
Woody Sherman and
Martin C. Herbordt},
title = {Molecular Dynamics Range-Limited Force Evaluation Optimized for FPGAs},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {263--271},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00016},
doi = {10.1109/ASAP.2019.00016},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/YangGWLSSSH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhengCHC19,
author = {Wenpei Zheng and
Sheng{-}Yang Chiu and
Jui{-}Chien Hsieh and
Chaochang Chiu},
title = {Smart Rabbit - {A} Wearable Device As An Intelligent Pacer for Marathon
Runners},
booktitle = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
pages = {141},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/ASAP.2019.00-11},
doi = {10.1109/ASAP.2019.00-11},
timestamp = {Mon, 09 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/ZhengCHC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2019,
title = {30th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2019, New York, NY, USA, July
15-17, 2019},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/xpl/conhome/8812310/proceeding},
isbn = {978-1-7281-1601-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Afzal0AGTFH18,
author = {Ayesha Afzal and
Christian Schmitt and
Samer Alhaddad and
Yevgen Grynko and
J{\"{u}}rgen Teich and
Jens F{\"{o}}rstner and
Frank Hannig},
title = {Solving Maxwell's Equations with Modern {C++} and {SYCL:} {A} Case
Study},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445127},
doi = {10.1109/ASAP.2018.8445127},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Afzal0AGTFH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AkbariMDL18,
author = {Nasrin Akbari and
Mehdi Modarressi and
Masoud Daneshtalab and
Mohammad Loni},
title = {A Customized Processing-in-Memory Architecture for Biological Sequence
Alignment},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445124},
doi = {10.1109/ASAP.2018.8445124},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AkbariMDL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChangM18,
author = {Qiong Chang and
Tsutomu Maruyama},
title = {Real-Time High-Quality Stereo Matching System on a {GPU}},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445111},
doi = {10.1109/ASAP.2018.8445111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChangM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DumasGP18,
author = {Julie Dumas and
Eric Guthmuller and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Dynamic Coherent Cluster: {A} Scalable Sharing Set Management Approach},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445107},
doi = {10.1109/ASAP.2018.8445107},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/DumasGP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ErdemSBOSD18,
author = {Ahmet Erdem and
Cristina Silvano and
Thomas Boesch and
Andrea C. Ornstein and
Surinder Pal Singh and
Giuseppe Desoli},
title = {Design Space Exploration for Orlando Ultra Low-Power Convolutional
Neural Network SoC},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445096},
doi = {10.1109/ASAP.2018.8445096},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ErdemSBOSD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FlamandR0LPRB18,
author = {Eric Flamand and
Davide Rossi and
Francesco Conti and
Igor Loi and
Antonio Pullini and
Florent Rotenberg and
Luca Benini},
title = {{GAP-8:} {A} {RISC-V} SoC for {AI} at the Edge of the IoT},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445101},
doi = {10.1109/ASAP.2018.8445101},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FlamandR0LPRB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/France-PilloisM18,
author = {Maxime France{-}Pillois and
J{\'{e}}r{\^{o}}me Martin and
Fr{\'{e}}d{\'{e}}ric Rousseau},
title = {Linux synchronization barrier on MPSoC: Hardware/software accurate
study and optimization},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445120},
doi = {10.1109/ASAP.2018.8445120},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/France-PilloisM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KlimeckMHP018,
author = {Daniel Klimeck and
Hanno Gerd Meyer and
Jens Hagemeyer and
Mario Porrmann and
Ulrich R{\"{u}}ckert},
title = {Resource-efficient Reconfigurable Computer-on-Module for Embedded
Vision Applications},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445091},
doi = {10.1109/ASAP.2018.8445091},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KlimeckMHP018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiRC18,
author = {Huiren Li and
Anand Ramachandran and
Deming Chen},
title = {{GPU} Acceleration of Advanced k-mer Counting for Computational Genomics},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445084},
doi = {10.1109/ASAP.2018.8445084},
timestamp = {Fri, 08 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiRC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiaoLCL18,
author = {Yi{-}Lun Liao and
Yu{-}Cheng Li and
Nae{-}Chyun Chen and
Yi{-}Chang Lu},
title = {Adaptively Banded Smith-Waterman Algorithm for Long Reads and Its
Hardware Accelerator},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445105},
doi = {10.1109/ASAP.2018.8445105},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiaoLCL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LoschP18,
author = {Achim L{\"{o}}sch and
Marco Platzner},
title = {A Highly Accurate Energy Model for Task Execution on Heterogeneous
Compute Nodes},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445098},
doi = {10.1109/ASAP.2018.8445098},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LoschP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MakraniSDRH18,
author = {Hosein Mohammadi Makrani and
Hossein Sayadi and
Sai Manoj P. D. and
Setareh Rafatirad and
Houman Homayoun},
title = {Compressive Sensing on Storage Data: An Effective Solution to Alleviate
{I/0} Bottleneck in Data- Intensive Workloads},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445131},
doi = {10.1109/ASAP.2018.8445131},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MakraniSDRH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MondigoST18,
author = {Antoniette Mondigo and
Kentaro Sano and
Hiroyuki Takizawa},
title = {Performance Estimation of Deeply Pipelined Fluid Simulation on Multiple
FPGAs with High-speed Communication Subsystem},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445100},
doi = {10.1109/ASAP.2018.8445100},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/MondigoST18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NguyenBS18,
author = {Tuan D. Nguyen and
Son Bui and
James E. Stine},
title = {Clarifications and Optimizations on Rounding for IEEE-compliant Floating-Point
Multiplication},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445092},
doi = {10.1109/ASAP.2018.8445092},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NguyenBS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OrdazK18,
author = {Jose Raul Garcia Ordaz and
Dirk Koch},
title = {A Soft Dual-Processor System with a Partially Run-Time Reconfigurable
Shared 128-Bit {SIMD} Engine},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445115},
doi = {10.1109/ASAP.2018.8445115},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OrdazK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PlastirasTKT18,
author = {George Plastiras and
Maria Terzi and
Christos Kyrkou and
Theocharis Theocharides},
title = {Edge Intelligence: Challenges and Opportunities of Near-Sensor Machine
Learning Applications},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445118},
doi = {10.1109/ASAP.2018.8445118},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PlastirasTKT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RabozziSTS18,
author = {Marco Rabozzi and
Emanuele Del Sozzo and
Lorenzo Di Tucci and
Marco D. Santambrogio},
title = {Five-point algorithm: An efficient cloud-based {FPGA} implementation},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445097},
doi = {10.1109/ASAP.2018.8445097},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RabozziSTS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RongXWXW18,
author = {Zelin Rong and
Peidai Xie and
Jingyuan Wang and
Shenglin Xu and
Yongjun Wang},
title = {Clean the Scratch Registers: {A} Way to Mitigate Return-Oriented Programming
Attacks},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445132},
doi = {10.1109/ASAP.2018.8445132},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RongXWXW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RussellTL18,
author = {Francis P. Russell and
James Stanley Targett and
Wayne Luk},
title = {From Tensor Algebra to Hardware Accelerators: Generating Streaming
Architectures for Solving Partial Differential Equations},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445093},
doi = {10.1109/ASAP.2018.8445093},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RussellTL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Saint-GeniesBR18,
author = {Hugues de Lassus Saint{-}Genies and
Nicolas Brunie and
Guillaume Revy},
title = {Meta-implementation of vectorized logarithm function in binary floating-point
arithmetic},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445102},
doi = {10.1109/ASAP.2018.8445102},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Saint-GeniesBR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Salinas-Hilburg18,
author = {Juan Carlos Salinas{-}Hilburg and
Marina Zapater and
Jos{\'{e}} Manuel Moya and
Jos{\'{e}} Luis Ayala},
title = {Fast Energy Estimation Through Partial Execution of {HPC} Applications},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445089},
doi = {10.1109/ASAP.2018.8445089},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Salinas-Hilburg18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SampietroCTSS18,
author = {Davide Sampietro and
Chiara Crippa and
Lorenzo Di Tucci and
Emanuele Del Sozzo and
Marco D. Santambrogio},
title = {FPGA-based PairHMM Forward Algorithm for {DNA} Variant Calling},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445119},
doi = {10.1109/ASAP.2018.8445119},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SampietroCTSS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SarcherSZDSVK18,
author = {Julian Sarcher and
Christian Scheglmann and
Alexander Zoellner and
Tim Dolereit and
Michael Schaeferling and
Matthias Vahl and
Gundolf Kiefer},
title = {A Configurable Framework for Hough-Transform-Based Embedded Object
Recognition Systems},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445086},
doi = {10.1109/ASAP.2018.8445086},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SarcherSZDSVK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SasoH18,
author = {Kaoru Saso and
Yuko Hara{-}Azumi},
title = {Simple Instruction-Set Computer for Area and Energy-Sensitive IoT
Edge Devices},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445085},
doi = {10.1109/ASAP.2018.8445085},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SasoH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShankarLHW18,
author = {Subramanian Shiva Shankar and
Pinxing Lin and
Andreas Herkersdorf and
Thomas Wild},
title = {BiSME: {A} Hardware Coprocessor to Perform Signature Matching at Multi-Gigabit
Rates},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445090},
doi = {10.1109/ASAP.2018.8445090},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShankarLHW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShaoTMLCWJ18,
author = {Shengjia Shao and
Jason Tsai and
Michal Mysior and
Wayne Luk and
Thomas Chau and
Alexander Warren and
Ben Jeppesen},
title = {Towards Hardware Accelerated Reinforcement Learning for Application-Specific
Robotic Control},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445099},
doi = {10.1109/ASAP.2018.8445099},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShaoTMLCWJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SinhaGSD18,
author = {Mitali Sinha and
Sri Harsha Gade and
Wazir Singh and
Sujay Deb},
title = {Data-flow Aware {CNN} Accelerator with Hybrid Wireless Interconnection},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445126},
doi = {10.1109/ASAP.2018.8445126},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SinhaGSD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SousaWBTHT18,
author = {{\'{E}}ricles Sousa and
Michael Witterauf and
Marcel Brand and
Alexandru Tanase and
Frank Hannig and
J{\"{u}}rgen Teich},
title = {Invasive Computing for Predictability of Multiple Non-functional Properties:
{A} Cyber-Physical System Case Study},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445109},
doi = {10.1109/ASAP.2018.8445109},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SousaWBTHT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SozzoBAS18,
author = {Emanuele Del Sozzo and
Riyadh Baghdadi and
Saman P. Amarasinghe and
Marco D. Santambrogio},
title = {A Unified Backend for Targeting FPGAs from DSLs},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445108},
doi = {10.1109/ASAP.2018.8445108},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SozzoBAS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SozzoRTSS18,
author = {Emanuele Del Sozzo and
Marco Rabozzi and
Lorenzo Di Tucci and
Donatella Sciuto and
Marco D. Santambrogio},
title = {A Scalable {FPGA} Design for Cloud N-Body Simulation},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445106},
doi = {10.1109/ASAP.2018.8445106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SozzoRTSS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TheodoropoulosR18,
author = {Dimitris Theodoropoulos and
Andrea Reale and
Dimitris Syrivelis and
Maciej Bielski and
Nikolaos Alachiotis and
Dionisios N. Pnevmatikatos},
title = {{REMAP:} Remote mEmory Manager for disAggregated Platforms},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445095},
doi = {10.1109/ASAP.2018.8445095},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TheodoropoulosR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VitaLBPPB18,
author = {Antonio De Vita and
Gian Domenico Licciardo and
Luigi Di Benedetto and
Danilo Pau and
Emanuele Plebani and
Angelo Bosco},
title = {Low-power Design of a Gravity Rotation Module for {HAR} Systems Based
on Inertial Sensors},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445130},
doi = {10.1109/ASAP.2018.8445130},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VitaLBPPB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangKWH0K18,
author = {Xiebing Wang and
Christopher Kiwus and
Canhao Wu and
Biao Hu and
Kai Huang and
Alois C. Knoll},
title = {Implementing and Parallelizing Real-time Lane Detection on Heterogeneous
Platforms},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445110},
doi = {10.1109/ASAP.2018.8445110},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WangKWH0K18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WijeratneJDP18,
author = {Sasindu Wijeratne and
Sandaruwan Jayaweera and
Mahesh Dananjaya and
Ajith Pasqual},
title = {Reconfigurable Co-Processor Architecture with Limited Numerical Precision
to Accelerate Deep Convolutiosnal Neural Networks},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445087},
doi = {10.1109/ASAP.2018.8445087},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WijeratneJDP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XiaoWY18,
author = {Linlong Xiao and
Nanzhi Wang and
Guocai Yang},
title = {A Reading Comprehension Style Question Answering Model Based On Attention
Mechanism},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445117},
doi = {10.1109/ASAP.2018.8445117},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XiaoWY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YueLYW18,
author = {Yang Yue and
Ying Li and
Kexin Yi and
Zhonghai Wu},
title = {Synthetic Data Approach for Classification and Regression},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445094},
doi = {10.1109/ASAP.2018.8445094},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YueLYW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhaJSY18,
author = {Daolu Zha and
Xi Jin and
Rui Shang and
Pengfei Yang},
title = {A Real-Time Learning-Based Super-Resolution System Using Direct Simple
Functions},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445121},
doi = {10.1109/ASAP.2018.8445121},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhaJSY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhaoLNWDNWSCCL18,
author = {Ruizhe Zhao and
Shuanglong Liu and
Ho{-}Cheung Ng and
Erwei Wang and
James J. Davis and
Xinyu Niu and
Xiwei Wang and
Huifeng Shi and
George A. Constantinides and
Peter Y. K. Cheung and
Wayne Luk},
title = {Hardware Compilation of Deep Neural Networks: An Overview},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445088},
doi = {10.1109/ASAP.2018.8445088},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhaoLNWDNWSCCL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhuYD18,
author = {Zulun Zhu and
Shaowu Yang and
Huadong Dai},
title = {Enhanced Visual Loop Closing for Laser-Based {SLAM}},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445128},
doi = {10.1109/ASAP.2018.8445128},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhuYD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZolfaghariRN18,
author = {Hesam Zolfaghari and
Davide Rossi and
Jari Nurmi},
title = {An Explicitly Parallel Architecture for Packet Parsing in Software
Defined Networks},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445123},
doi = {10.1109/ASAP.2018.8445123},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZolfaghariRN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZouL18,
author = {Bin Zou and
Yantao Li},
title = {Touch-based Smartphone Authentication Using Import Vector Domain Description},
booktitle = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
pages = {1--4},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://doi.org/10.1109/ASAP.2018.8445125},
doi = {10.1109/ASAP.2018.8445125},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZouL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2018,
title = {29th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2018, Milano, Italy, July 10-12,
2018},
publisher = {{IEEE} Computer Society},
year = {2018},
url = {https://ieeexplore.ieee.org/xpl/conhome/8424123/proceeding},
isbn = {978-1-5386-7479-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BrandHTT17,
author = {Marcel Brand and
Frank Hannig and
Alexandru Tanase and
J{\"{u}}rgen Teich},
title = {Efficiency in {ILP} processing by using orthogonality},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {207},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995282},
doi = {10.1109/ASAP.2017.7995282},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BrandHTT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChenL17,
author = {Jing Chen and
Xue Liu},
title = {A fast and accurate logarithm accelerator for scientific applications},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {208},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995283},
doi = {10.1109/ASAP.2017.7995283},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChenL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChinSRZKHA17,
author = {S. Alexander Chin and
Noriaki Sakamoto and
Allan Rui and
Jim Zhao and
Jin Hee Kim and
Yuko Hara{-}Azumi and
Jason Helge Anderson},
title = {{CGRA-ME:} {A} unified framework for {CGRA} modelling and exploration},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {184--189},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995277},
doi = {10.1109/ASAP.2017.7995277},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChinSRZKHA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DangS17,
author = {Vinh Dang and
Kevin Skadron},
title = {Acceleration of Frequent Itemset Mining on {FPGA} using SDAccel and
Vivado {HLS}},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {195--200},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995279},
doi = {10.1109/ASAP.2017.7995279},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DangS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EdwardsL17,
author = {Joe Edwards and
Guy G. F. Lemieux},
title = {Real-time object detection in software with custom vector instructions
and algorithm changes},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {75--82},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995262},
doi = {10.1109/ASAP.2017.7995262},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EdwardsL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EguroK17,
author = {Ken Eguro and
Ryan Kastner},
title = {A message from the general chair and program chair},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995245},
doi = {10.1109/ASAP.2017.7995245},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EguroK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GongTLY17,
author = {Yili Gong and
Jia Tang and
Wenhai Li and
Zihui Ye},
title = {Massive spatial query on the Kepler architecture},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {111--118},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995267},
doi = {10.1109/ASAP.2017.7995267},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GongTLY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HascoetDND17,
author = {Julien Hascoet and
Karol Desnos and
Jean{-}Fran{\c{c}}ois Nezan and
Beno{\^{\i}}t Dupont de Dinechin},
title = {Hierarchical Dataflow Model for efficient programming of clustered
manycore processors},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {137--142},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995270},
doi = {10.1109/ASAP.2017.7995270},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HascoetDND17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HuoL17,
author = {Yuanhong Huo and
Dake Liu},
title = {High-throughput area-efficient processor for 3GPP {LTE} cryptographic
core algorithms},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {210},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995285},
doi = {10.1109/ASAP.2017.7995285},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HuoL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KhanABM17,
author = {Jehandad Khan and
Peter Athanas and
Skip Booth and
John Marshall},
title = {OpenCL-based design pattern for line rate packet processing},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {190--194},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995278},
doi = {10.1109/ASAP.2017.7995278},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KhanABM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KonigsmarkCW17,
author = {S. T. Choden Konigsmark and
Deming Chen and
Martin D. F. Wong},
title = {High-Level Synthesis for side-channel defense},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {37--44},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995257},
doi = {10.1109/ASAP.2017.7995257},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KonigsmarkCW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiCCXL17,
author = {Juan Li and
Zhengguo Chen and
Zhiguang Chen and
Nong Xiao and
Fang Liu},
title = {{KV-FTL:} {A} novel key-value based {FTL} scheme for large scale SSDs},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {211},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995286},
doi = {10.1109/ASAP.2017.7995286},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiCCXL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiLQ17,
author = {Binyang Li and
Bo Li and
Depei Qian},
title = {PFSI.sw: {A} programming framework for sea ice model algorithms based
on Sunway many-core processor},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {119--126},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995268},
doi = {10.1109/ASAP.2017.7995268},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiLQ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiP17,
author = {Yuanfang Li and
Ardavan Pedram},
title = {{CATERPILLAR:} Coarse Grain Reconfigurable Architecture for accelerating
the training of Deep Neural Networks},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {1--10},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995252},
doi = {10.1109/ASAP.2017.7995252},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiSWLLWB17,
author = {Lin Li and
Adrian E. Sapio and
Jiahao Wu and
Yanzhou Liu and
Kyunghun Lee and
Marilyn Wolf and
Shuvra S. Bhattacharyya},
title = {Design and implementation of adaptive signal processing systems using
Markov decision processes},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {170--175},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995275},
doi = {10.1109/ASAP.2017.7995275},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiSWLLWB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LinWTYZLL17,
author = {Jie Lin and
Qingbo Wu and
Yusong Tan and
Jie Yu and
Qi Zhang and
Xiaoling Li and
Lei Luo},
title = {MicRun: {A} framework for scale-free graph algorithms on {SIMD} architecture
of the Xeon Phi},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {127--136},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995269},
doi = {10.1109/ASAP.2017.7995269},
timestamp = {Wed, 22 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LinWTYZLL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuLTC17,
author = {Yangguo Liu and
Junlin Lu and
Dong Tong and
Xu Cheng},
title = {A Staged Memory Resource Management Method for {CMP} systems},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {91--98},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995264},
doi = {10.1109/ASAP.2017.7995264},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiuLTC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuXGC17,
author = {Haoyu Liu and
Huahu Xu and
Honghao Gao and
Danqi Chu},
title = {Model checking cloud rendering system for the QoS evaluation},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {209},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995284},
doi = {10.1109/ASAP.2017.7995284},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiuXGC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LoschP17,
author = {Achim L{\"{o}}sch and
Marco Platzner},
title = {reMinMin: {A} novel static energy-centric list scheduling approach
based on real measurements},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {149--154},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995272},
doi = {10.1109/ASAP.2017.7995272},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LoschP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MalekpourRIP17,
author = {Amin Malekpour and
Roshan G. Ragel and
Aleksandar Ignjatovic and
Sri Parameswaran},
title = {DoSGuard: Protecting pipelined MPSoCs against hardware Trojan based
DoS attacks},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {45--52},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995258},
doi = {10.1109/ASAP.2017.7995258},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MalekpourRIP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NazemiNP17,
author = {Mahdi Nazemi and
Shahin Nazarian and
Massoud Pedram},
title = {High-performance {FPGA} implementation of equivariant adaptive separation
via independence algorithm for Independent Component Analysis},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {25--28},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995255},
doi = {10.1109/ASAP.2017.7995255},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NazemiNP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OzkanRHT17,
author = {M. Akif Ozkan and
Oliver Reiche and
Frank Hannig and
J{\"{u}}rgen Teich},
title = {Hardware design and analysis of efficient loop coarsening and border
handling for image processing},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {155--163},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995273},
doi = {10.1109/ASAP.2017.7995273},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OzkanRHT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PodiliZP17,
author = {Abhinav Podili and
Chi Zhang and
Viktor K. Prasanna},
title = {Fast and efficient implementation of Convolutional Neural Networks
on {FPGA}},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {11--18},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995253},
doi = {10.1109/ASAP.2017.7995253},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PodiliZP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PoudelGM17,
author = {Bikash Poudel and
Naresh Kumar Giri and
Arslan Munir},
title = {Design and comparative evaluation of {GPGPU-} and FPGA-based MPSoC
{ECU} architectures for secure, dependable, and real-time automotive
{CPS}},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {29--36},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995256},
doi = {10.1109/ASAP.2017.7995256},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PoudelGM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PouraghilyWT17,
author = {Arman Pouraghily and
Tilman Wolf and
Russell Tessier},
title = {Hardware support for embedded operating system security},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {61--66},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995260},
doi = {10.1109/ASAP.2017.7995260},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PouraghilyWT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SenanayakeLWAAT17,
author = {Rishan Senanayake and
Namitha Liyanage and
Sasindu Wijeratne and
Sachille Atapattu and
Kasun Athukorala and
P. M. K. Tharaka and
Geethan Karunaratne and
R. M. A. U. Senarath and
Ishantha Perera and
Ashen Ekanayake and
Ajith Pasqual},
title = {High performance hardware architectures for Intra Block Copy and Palette
Coding for {HEVC} screen content coding extension},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {164--169},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995274},
doi = {10.1109/ASAP.2017.7995274},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SenanayakeLWAAT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShahrouziP17,
author = {S. Navid Shahrouzi and
Darshika G. Perera},
title = {An efficient embedded multi-ported memory architecture for next-generation
FPGAs},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {83--90},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995263},
doi = {10.1109/ASAP.2017.7995263},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShahrouziP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SommerKK17,
author = {Lukas Sommer and
Jens Korinth and
Andreas Koch},
title = {OpenMP device offloading to {FPGA} accelerators},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {201--205},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995280},
doi = {10.1109/ASAP.2017.7995280},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SommerKK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TabelWS17,
author = {Stefan Tabel and
Korbinian Weikl and
Walter Stechele},
title = {Hardware-accelerated {CCD} readout smear correction for Fast Solar
Polarimeter},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {67--74},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995261},
doi = {10.1109/ASAP.2017.7995261},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TabelWS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TanCLW17,
author = {Hongbing Tan and
Haiyan Chen and
Sheng Liu and
Jianguo Wu},
title = {Modeling and evaluation for gather/scatter operations in Vector-SIMD
architectures},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {143--148},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995271},
doi = {10.1109/ASAP.2017.7995271},
timestamp = {Tue, 26 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TanCLW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TsaiLCLJH17,
author = {Chun{-}Jen Tsai and
Cheng{-}Ju Lin and
Cheng{-}Yang Chen and
Yan{-}Hung Lin and
Wei{-}Jhong Ji and
Sheng{-}Di Hong},
title = {Hardwiring the {OS} kernel into a Java application processor},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {53--60},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995259},
doi = {10.1109/ASAP.2017.7995259},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TsaiLCLJH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VasudevanAG17,
author = {Aravind Vasudevan and
Andrew Anderson and
David Gregg},
title = {Parallel Multi Channel convolution using General Matrix Multiplication},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {19--24},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995254},
doi = {10.1109/ASAP.2017.7995254},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VasudevanAG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangWZL17,
author = {Yanpeng Wang and
Mei Wen and
Chunyuan Zhang and
Jie Lin},
title = {RVNet: {A} fast and high energy efficiency network packet processing
system on {RISC-V}},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {107--110},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995266},
doi = {10.1109/ASAP.2017.7995266},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WangWZL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangZJ17,
author = {Pei Zhang and
Joseph Zambreno and
Phillip H. Jones},
title = {An embedded scalable linear model predictive hardware-based controller
using {ADMM}},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {176--183},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995276},
doi = {10.1109/ASAP.2017.7995276},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhangZJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhaoTLN17,
author = {Ruizhe Zhao and
Tim Todman and
Wayne Luk and
Xinyu Niu},
title = {DeepPump: Multi-pumping deep Neural Networks},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {206},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995281},
doi = {10.1109/ASAP.2017.7995281},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhaoTLN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhouFT17,
author = {Wei Zhou and
Dan Feng and
Zhipeng Tan},
title = {CFStore: Boosting Hybrid storage performance by device crossfire},
booktitle = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
pages = {99--106},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ASAP.2017.7995265},
doi = {10.1109/ASAP.2017.7995265},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhouFT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2017,
title = {28th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2017, Seattle, WA, USA, July
10-12, 2017},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://ieeexplore.ieee.org/xpl/conhome/7990450/proceeding},
isbn = {978-1-5090-4825-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Abdelrahman16,
author = {Tarek S. Abdelrahman},
title = {Accelerating K-means clustering on a tightly-coupled processor-FPGA
heterogeneous system},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {176--181},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760789},
doi = {10.1109/ASAP.2016.7760789},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Abdelrahman16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AffesAAVB16,
author = {Hend Affes and
Amal Ben Ameur and
Michel Auguin and
Fran{\c{c}}ois Verdier and
Calypso Barnes},
title = {An {ESL} framework for low power architecture design space exploration},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {227--228},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760801},
doi = {10.1109/ASAP.2016.7760801},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AffesAAVB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AliABBB16,
author = {Amine Ait Si Ali and
Abbes Amira and
Faycal Bensaali and
Mohieddine Benammar and
Amine Bermak},
title = {{HW/SW} co-design based implementation of Gas discrimination},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {237--238},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760806},
doi = {10.1109/ASAP.2016.7760806},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AliABBB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ArnoldCC16,
author = {Mark G. Arnold and
Ed Chester and
John R. Cowles},
title = {Guarding the guards: Enhancing {LNS} performance for common applications},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {123--130},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760781},
doi = {10.1109/ASAP.2016.7760781},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ArnoldCC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AtapattuLMPP16,
author = {Sachille Atapattu and
Namitha Liyanage and
Nisal Menuka and
Ishantha Perera and
Ajith Pasqual},
title = {Real time all intra {HEVC} {HD} encoder on {FPGA}},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {191--195},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760792},
doi = {10.1109/ASAP.2016.7760792},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AtapattuLMPP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Atoofian16,
author = {Ehsan Atoofian},
title = {Compressed {L1} data cache and {L2} cache in GPGPUs},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760766},
doi = {10.1109/ASAP.2016.7760766},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Atoofian16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BonnotNM16,
author = {Justine Bonnot and
Erwan Nogues and
Daniel M{\'{e}}nard},
title = {New non-uniform segmentation technique for software function evaluation},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {131--138},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760782},
doi = {10.1109/ASAP.2016.7760782},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BonnotNM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CaiS16,
author = {Jian Cai and
Aviral Shrivastava},
title = {Efficient pointer management of stack data for software managed multicores},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {67--74},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760774},
doi = {10.1109/ASAP.2016.7760774},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CaiS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChenZSGVBM16,
author = {Guoyang Chen and
Huiyang Zhou and
Xipeng Shen and
Joshua Gahm and
Narayan Venkat and
Skip Booth and
John Marshall},
title = {OpenCL-based erasure coding on heterogeneous architectures},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {33--40},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760770},
doi = {10.1109/ASAP.2016.7760770},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChenZSGVBM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChengLSSZW16,
author = {Zhinan Cheng and
Xi Li and
Jiachen Song and
Beilei Sun and
Xuehai Zhou and
Chao Wang},
title = {Display power reduction for mobile closed-source games},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {223--224},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760799},
doi = {10.1109/ASAP.2016.7760799},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChengLSSZW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChoiLBA16,
author = {Jongsok Choi and
Ruolong Lian and
Stephen Dean Brown and
Jason Helge Anderson},
title = {A unified software approach to specify pipeline and spatial parallelism
in {FPGA} hardware},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {75--82},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760775},
doi = {10.1109/ASAP.2016.7760775},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChoiLBA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CirenoAB16,
author = {Maria Cireno and
Andre Aziz and
Edna Barros},
title = {Temporized data prefetching algorithm for NoC-based multiprocessor
systems},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {235--236},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760805},
doi = {10.1109/ASAP.2016.7760805},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CirenoAB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CollangeJMP16,
author = {Caroline Collange and
Mioara Joldes and
Jean{-}Michel Muller and
Valentina Popescu},
title = {Parallel floating-point expansions for extended-precision {GPU} computations},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {139--146},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760783},
doi = {10.1109/ASAP.2016.7760783},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CollangeJMP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EissaESAF16,
author = {Ahmed S. Eissa and
Mahmoud A. Elmohr and
Mostafa A. Saleh and
Khaled E. Ahmed and
Mohammed M. Farag},
title = {{SHA-3} Instruction Set Extension for {A} 32-bit {RISC} processor
architecture},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {233--234},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760804},
doi = {10.1109/ASAP.2016.7760804},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EissaESAF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FerreiraSAFBLM16,
author = {Antonyus P. A. Ferreira and
Joao G. M. Silva and
Jefferson R. L. Anjos and
Luiz H. A. Figueiroa and
Edna Natividade da Silva Barros and
Manoel Eus{\'{e}}bio de Lima and
Victor Wanderley Costa de Medeiros},
title = {A hardware accelerator for the alignment of multiple {DNA} sequences
in forensic identification},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {186--190},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760791},
doi = {10.1109/ASAP.2016.7760791},
timestamp = {Mon, 04 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FerreiraSAFBLM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FuXGYXZSWY16,
author = {Haohuan Fu and
Jingheng Xu and
Lin Gan and
Chao Yang and
Wei Xue and
Wenlai Zhao and
Wen Shi and
Xinliang Wang and
Guangwen Yang},
title = {Unleashing the performance potential of {CPU-GPU} platforms for the
3D atmospheric Euler solver},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {41--49},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760771},
doi = {10.1109/ASAP.2016.7760771},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FuXGYXZSWY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HaasKALSFL16,
author = {Sebastian Haas and
Tomas Karnagel and
Oliver Arnold and
Erik Laux and
Benjamin Schlegel and
Gerhard P. Fettweis and
Wolfgang Lehner},
title = {HW/SW-database-codesign for compressed bitmap index processing},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {50--57},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760772},
doi = {10.1109/ASAP.2016.7760772},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/HaasKALSFL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JaiswalS16,
author = {Manish Kumar Jaiswal and
Hayden Kwok{-}Hay So},
title = {Architecture for quadruple precision floating point division with
multi-precision support},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {239--240},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760807},
doi = {10.1109/ASAP.2016.7760807},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JaiswalS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JapHB16,
author = {Dirmanto Jap and
Wei He and
Shivam Bhasin},
title = {Supervised and unsupervised machine learning for side-channel based
Trojan detection},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {17--24},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760768},
doi = {10.1109/ASAP.2016.7760768},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JapHB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KassensWSGS16,
author = {Jan Christian K{\"{a}}ssens and
Lars Wienbrandt and
Manfred Schimmler and
Jorge Gonz{\'{a}}lez{-}Dom{\'{\i}}nguez and
Bertil Schmidt},
title = {Combining {GPU} and {FPGA} technology for efficient exhaustive interaction
analysis in {GWAS}},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {170--175},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760788},
doi = {10.1109/ASAP.2016.7760788},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KassensWSGS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KrommydasSF16,
author = {Konstantinos Krommydas and
Ruchira Sasanka and
Wu{-}chun Feng},
title = {Bridging the {FPGA} programmability-portability Gap via automatic
OpenCL code generation and tuning},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {213--218},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760796},
doi = {10.1109/ASAP.2016.7760796},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KrommydasSF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiGBAVB16,
author = {Lin Li and
Amanullah Ghazi and
Jani Boutellier and
Lauri Anttila and
Mikko Valkama and
Shuvra S. Bhattacharyya},
title = {Design space exploration and constrained multiobjective optimization
for digital predistortion systems},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {182--185},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760790},
doi = {10.1109/ASAP.2016.7760790},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiGBAVB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LindseyLL16,
author = {Ben Lindsey and
Matthew Leslie and
Wayne Luk},
title = {A Domain Specific Language for accelerated Multilevel Monte Carlo
simulations},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {99--106},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760778},
doi = {10.1109/ASAP.2016.7760778},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LindseyLL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MeloB16,
author = {Cecil Accetti R. de A. Melo and
Edna Barros},
title = {Oolong: {A} Baseband processor extension to the {RISC-V} {ISA}},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {241--242},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760808},
doi = {10.1109/ASAP.2016.7760808},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MeloB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MiyauchiT16,
author = {Tetsuo Miyauchi and
Kiyofumi Tanaka},
title = {Configuration technique for adaptability of multicore processors on
{FPGA}},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {219--220},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760797},
doi = {10.1109/ASAP.2016.7760797},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MiyauchiT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MohammadniaS16,
author = {Mohammad Reza Mohammadnia and
Lesley Shannon},
title = {A multi-beam Scan Mode Synthetic Aperture Radar processor suitable
for satellite operation},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {83--90},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760776},
doi = {10.1109/ASAP.2016.7760776},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MohammadniaS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OrdazK16,
author = {Jose Raul Garcia Ordaz and
Dirk Koch},
title = {soft-NEON: {A} study on replacing the {NEON} engine of an {ARM} SoC
with a reconfigurable fabric},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {229--230},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760802},
doi = {10.1109/ASAP.2016.7760802},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OrdazK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OrosaA16,
author = {Lois Orosa and
Rodolfo Azevedo},
title = {Temporal frequent value locality},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {147--152},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760784},
doi = {10.1109/ASAP.2016.7760784},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OrosaA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Osorio16,
author = {Roberto R. Osorio},
title = {Pipelined {FPGA} implementation of numerical integration of the Hodgkin-Huxley
model},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {202--206},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760794},
doi = {10.1109/ASAP.2016.7760794},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Osorio16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PetrakisAGPOOPS16,
author = {Polydoros Petrakis and
Mohammed Abuteir and
Miltos D. Grammatikakis and
Kyprianos Papadimitriou and
Roman Obermaisser and
Zaher Owda and
Antonis Papagrigoriou and
Michael Soulie and
Marcello Coppola},
title = {On-chip networks for mixed-criticality systems},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {164--169},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760787},
doi = {10.1109/ASAP.2016.7760787},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PetrakisAGPOOPS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RossalesL16,
author = {Isabela Rossales and
Maximiliam Luppe},
title = {Architecture for fractal dimension estimation based on Minkowski-Bouligand
method using integer distances},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {231--232},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760803},
doi = {10.1109/ASAP.2016.7760803},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RossalesL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SantosBA16,
author = {Marcus V. D. dos Santos and
Edna Barros and
Andre Aziz},
title = {A MPSoC cache design space exploration approach based on {ABC} algorithm
to optimize energy consumption and performance},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {153--158},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760785},
doi = {10.1109/ASAP.2016.7760785},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SantosBA16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SartorWB16,
author = {Anderson Luiz Sartor and
Stephan Wong and
Antonio C. S. Beck},
title = {Adaptive {ILP} control to increase fault tolerance for {VLIW} processors},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {9--16},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760767},
doi = {10.1109/ASAP.2016.7760767},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SartorWB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SasdrichG16,
author = {Pascal Sasdrich and
Tim G{\"{u}}neysu},
title = {A grain in the silicon: SCA-protected {AES} in less than 30 slices},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {25--32},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760769},
doi = {10.1109/ASAP.2016.7760769},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SasdrichG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShoshkovSK16,
author = {Tsvetan Shoshkov and
Todor P. Stefanov and
Bart Kienhuis},
title = {Parametrized system level design: Real-time X-Ray image processing
case study},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {196--201},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760793},
doi = {10.1109/ASAP.2016.7760793},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShoshkovSK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SpindeldreierWR16,
author = {Christian Spindeldreier and
Thijs J. Wendrich and
Ernst Maria Rasel and
Wolfgang Ertmer and
Holger Blume},
title = {FPGA-based frequency estimation of a {DFB} laser using Rb spectroscopy
for space missions},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {207--212},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760795},
doi = {10.1109/ASAP.2016.7760795},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SpindeldreierWR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TanikellaKJLS16,
author = {Karthik Tanikella and
Yohan Ko and
Reiley Jeyapaul and
Kyoungwoo Lee and
Aviral Shrivastava},
title = {gemV: {A} validated toolset for the early exploration of system reliability},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {159--163},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760786},
doi = {10.1109/ASAP.2016.7760786},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TanikellaKJLS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Thomas16,
author = {David B. Thomas},
title = {Synthesisable recursion for {C++} {HLS} tools},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {91--98},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760777},
doi = {10.1109/ASAP.2016.7760777},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Thomas16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ThomasF16,
author = {David Thomas and
Suhaib A. Fahmy},
title = {Message from the {ASAP} 2016 chairs},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {iii--iv},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760764},
doi = {10.1109/ASAP.2016.7760764},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ThomasF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WimerK16,
author = {Shmuel Wimer and
Israel Koren},
title = {Energy efficient deeply fused dot-product multiplication architecture},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {115--122},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760780},
doi = {10.1109/ASAP.2016.7760780},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WimerK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WitteraufTHT16,
author = {Michael Witterauf and
Alexandru Tanase and
Frank Hannig and
J{\"{u}}rgen Teich},
title = {Modulo scheduling of symbolically tiled loops for tightly coupled
processor arrays},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {58--66},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760773},
doi = {10.1109/ASAP.2016.7760773},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WitteraufTHT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XiaoILK16,
author = {Shanlin Xiao and
Tsuyoshi Isshiki and
Dongju Li and
Hiroaki Kunieda},
title = {An efficient embedded processor for object detection using {ASIP}
methodology},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {225--226},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760800},
doi = {10.1109/ASAP.2016.7760800},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XiaoILK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XuFGSPSY16,
author = {Jingheng Xu and
Haohuan Fu and
Lin Gan and
Yu Song and
Hongbo Peng and
Wen Shi and
Guangwen Yang},
title = {Performance optimization of Jacobi stencil algorithms based on {POWER8}
architecture},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {221--222},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760798},
doi = {10.1109/ASAP.2016.7760798},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XuFGSPSY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YuFSCZLLWM16,
author = {Teng Yu and
Bo Feng and
Mark Stillwell and
Jos{\'{e}} Gabriel F. Coutinho and
Wenlai Zhao and
Shuang Liang and
Wayne Luk and
Alexander L. Wolf and
Yuchun Ma},
title = {Relation-oriented resource allocation for multi-accelerator systems},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {243--244},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760809},
doi = {10.1109/ASAP.2016.7760809},
timestamp = {Thu, 22 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YuFSCZLLWM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhaoFLYWFMY16,
author = {Wenlai Zhao and
Haohuan Fu and
Wayne Luk and
Teng Yu and
Shaojun Wang and
Bo Feng and
Yuchun Ma and
Guangwen Yang},
title = {{F-CNN:} An FPGA-based framework for training Convolutional Neural
Networks},
booktitle = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
pages = {107--114},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://doi.org/10.1109/ASAP.2016.7760779},
doi = {10.1109/ASAP.2016.7760779},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhaoFLYWFMY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2016,
title = {27th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2016, London, United Kingdom,
July 6-8, 2016},
publisher = {{IEEE} Computer Society},
year = {2016},
url = {https://ieeexplore.ieee.org/xpl/conhome/7750935/proceeding},
isbn = {978-1-5090-1503-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AhmedH15,
author = {Tanvir Ahmed and
Yuko Hara{-}Azumi},
title = {Timing speculation-aware instruction set extension for resource-constrained
embedded systems},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {30--34},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245701},
doi = {10.1109/ASAP.2015.7245701},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AhmedH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ArslanGK15,
author = {Mehmet Ali Arslan and
Flavius Gruian and
Krzysztof Kuchcinski},
title = {Application-set driven exploration for custom processor architectures},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {70--71},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245710},
doi = {10.1109/ASAP.2015.7245710},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ArslanGK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Arvind15,
author = {Arvind},
title = {BlueDBM: {A} multi-access, distributed flash store for Big Data analytics},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245693},
doi = {10.1109/ASAP.2015.7245693},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Arvind15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CataniaMMPP15,
author = {Vincenzo Catania and
Andrea Mineo and
Salvatore Monteleone and
Maurizio Palesi and
Davide Patti},
title = {Noxim: An open, extensible and cycle-accurate network on chip simulator},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {162--163},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245728},
doi = {10.1109/ASAP.2015.7245728},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CataniaMMPP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChengLSGS15,
author = {Zhinan Cheng and
Xi Li and
Beilei Sun and
Ce Gao and
Jiachen Song},
title = {Automatic frame rate-based {DVFS} of game},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {158--159},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245726},
doi = {10.1109/ASAP.2015.7245726},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChengLSGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Chiou15,
author = {Derek Chiou},
title = {Accelerating data centers with reconfigurable logic},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245694},
doi = {10.1109/ASAP.2015.7245694},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Chiou15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CowanCG15,
author = {Glenn E. R. Cowan and
Kevin Cushon and
Warren J. Gross},
title = {Mixed-signal implementation of differential decoding using binary
message passing algorithms},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {116--119},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245718},
doi = {10.1109/ASAP.2015.7245718},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CowanCG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DenmanABCDFHHHH15,
author = {Nolan Denman and
Mandana Amiri and
Kevin Bandura and
Liam Connor and
Matt Dobbs and
Mateus Fandino and
Mark Halpern and
Adam D. Hincks and
Gary Hinshaw and
Carolin H{\"{o}}fer and
Peter Klages and
Kiyoshi Masui and
Juan Mena Parra and
Laura Newburgh and
Andre Recnik and
J. Richard Shaw and
Kris Sigurdson and
Kendrick Smith and
Keith Vanderlinde},
title = {A GPU-based correlator X-engine implemented on the {CHIME} Pathfinder},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {35--40},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245702},
doi = {10.1109/ASAP.2015.7245702},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DenmanABCDFHHHH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DevigoDAS15,
author = {Rodrigo Devigo and
Liana Dessandre Duenha and
Rodolfo Azevedo and
Ricardo Santos},
title = {MultiExplorer: {A} tool set for multicore system-on-chip design exploration},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {160--161},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245727},
doi = {10.1109/ASAP.2015.7245727},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/DevigoDAS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DikenOJJCM15,
author = {Erkan Diken and
Martin J. O'Riordan and
Roel Jordans and
Lech J{\'{o}}zwiak and
Henk Corporaal and
David Moloney},
title = {Mixed-length {SIMD} code generation for {VLIW} architectures with
multiple native vector-widths},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {181--188},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245732},
doi = {10.1109/ASAP.2015.7245732},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DikenOJJCM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DineEVB15,
author = {Abdelhamid Dine and
Abdelhafid Elouardi and
Bastien Vincke and
Samir Bouaziz},
title = {Speeding up graph-based {SLAM} algorithm: {A} GPU-based heterogeneous
architecture study},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {72--73},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245711},
doi = {10.1109/ASAP.2015.7245711},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DineEVB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FangLFL15,
author = {Xin Fang and
Pei Luo and
Yunsi Fei and
Miriam Leeser},
title = {Balance power leakage to fight against side-channel analysis at gate
level in FPGAs},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {154--155},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245724},
doi = {10.1109/ASAP.2015.7245724},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FangLFL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FarahiniH15,
author = {Nasim Farahini and
Ahmed Hemani},
title = {Atomic stream computation unit based on micro-thread level parallelism},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {25--29},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245700},
doi = {10.1109/ASAP.2015.7245700},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FarahiniH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FunieGBLS15,
author = {Andreea{-}Ingrid Funie and
Paul Grigoras and
Pavel Burovskiy and
Wayne Luk and
Mark Salmon},
title = {Reconfigurable acceleration of fitness evaluation in trading strategies},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {210--217},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245736},
doi = {10.1109/ASAP.2015.7245736},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FunieGBLS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GawandeMTTKH15,
author = {Nitin A. Gawande and
Joseph B. Manzano and
Antonino Tumeo and
Nathan R. Tallent and
Darren J. Kerbyson and
Adolfy Hoisie},
title = {Power and performance trade-offs for Space Time Adaptive Processing},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {41--48},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245703},
doi = {10.1109/ASAP.2015.7245703},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GawandeMTTKH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Gonzalez-Alvarez15,
author = {Cecilia Gonz{\'{a}}lez{-}Alvarez and
Jennifer B. Sartor and
Carlos {\'{A}}lvarez and
Daniel Jim{\'{e}}nez{-}Gonz{\'{a}}lez and
Lieven Eeckhout},
title = {Automatic design of domain-specific instructions for low-power processors},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245697},
doi = {10.1109/ASAP.2015.7245697},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Gonzalez-Alvarez15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HeJ15,
author = {Wei He and
Dirmanto Jap},
title = {Dual-rail active protection system against side-channel analysis in
FPGAs},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {64--65},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245707},
doi = {10.1109/ASAP.2015.7245707},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HeJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HillCGL15,
author = {Kenneth Hill and
Stefan Craciun and
Alan D. George and
Herman Lam},
title = {Comparative analysis of OpenCL vs. {HDL} with image-processing kernels
on Stratix-V {FPGA}},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {189--193},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245733},
doi = {10.1109/ASAP.2015.7245733},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HillCGL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HoangSHC15,
author = {Tung Thanh Hoang and
Amirali Shambayati and
Henry Hoffmann and
Andrew A. Chien},
title = {Does arithmetic logic dominate data movement? a systematic comparison
of energy-efficiency for {FFT} accelerators},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {66--67},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245708},
doi = {10.1109/ASAP.2015.7245708},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HoangSHC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Kapre15,
author = {Nachiket Kapre},
title = {Custom FPGA-based soft-processors for sparse graph acceleration},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {9--16},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245698},
doi = {10.1109/ASAP.2015.7245698},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Kapre15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KlagesBDRSV15,
author = {Peter Klages and
Kevin Bandura and
Nolan Denman and
Andre Recnik and
Jonathan Sievers and
Keith Vanderlinde},
title = {{GPU} kernels for high-speed 4-bit astrophysical data processing},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {164--165},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245729},
doi = {10.1109/ASAP.2015.7245729},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KlagesBDRSV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeLCP15,
author = {Moon Sung Lee and
Yongje Lee and
Jung Hee Cheon and
Yunheung Paek},
title = {Accelerating bootstrapping in {FHEW} using GPUs},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {128--135},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245720},
doi = {10.1109/ASAP.2015.7245720},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeLCP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiNL15,
author = {Bingzhe Li and
M. Hassan Najafi and
David J. Lilja},
title = {An {FPGA} implementation of a Restricted Boltzmann Machine classifier
using stochastic bit streams},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {68--69},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245709},
doi = {10.1109/ASAP.2015.7245709},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiNL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuS15,
author = {Yongchao Liu and
Bertil Schmidt},
title = {LightSpMV: Faster CSR-based sparse matrix-vector multiplication on
CUDA-enabled GPUs},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {82--89},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245713},
doi = {10.1109/ASAP.2015.7245713},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiuS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LuoZFD15,
author = {Pei Luo and
Liwei Zhang and
Yunsi Fei and
A. Adam Ding},
title = {Towards secure cryptographic software implementation against side-channel
power analysis attacks},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {144--148},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245722},
doi = {10.1109/ASAP.2015.7245722},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LuoZFD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MartinsSEB15,
author = {Paulo Martins and
Leonel Sousa and
Julien Eynard and
Jean{-}Claude Bajard},
title = {Programmable {RNS} lattice-based parallel cryptographic decryption},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {149--153},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245723},
doi = {10.1109/ASAP.2015.7245723},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MartinsSEB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MaruseacGOR15,
author = {Mihai Maruseac and
Gabriel Ghinita and
Ming Ouyang and
Razvan Rughinis},
title = {Hardware acceleration of Private Information Retrieval protocols using
GPUs},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {120--127},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245719},
doi = {10.1109/ASAP.2015.7245719},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MaruseacGOR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PoligGS15,
author = {Raphael Polig and
Heiner Giefers and
Walter Stechele},
title = {A soft-core processor array for relational operators},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {17--24},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245699},
doi = {10.1109/ASAP.2015.7245699},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PoligGS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RecnikBDHHKPV15,
author = {Andre Recnik and
Kevin Bandura and
Nolan Denman and
Adam D. Hincks and
Gary Hinshaw and
Peter Klages and
Ue{-}Li Pen and
Keith Vanderlinde},
title = {An efficient real-time data pipeline for the {CHIME} Pathfinder radio
telescope X-engine},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {57--61},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245705},
doi = {10.1109/ASAP.2015.7245705},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RecnikBDHHKPV15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RezaZGAR15,
author = {Tahsin Reza and
Aaron Zimmer and
Parwant Ghuman and
Tanuj kr Aasawat and
Matei Ripeanu},
title = {Accelerating persistent scatterer pixel selection for InSAR processing},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {49--56},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245704},
doi = {10.1109/ASAP.2015.7245704},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RezaZGAR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RudolphS15,
author = {Dylan Rudolph and
Greg Stitt},
title = {An interpolation-based approach to multi-parameter performance modeling
for heterogeneous systems},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {174--180},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245731},
doi = {10.1109/ASAP.2015.7245731},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RudolphS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Saint-GeniesDR15,
author = {Hugues de Lassus Saint{-}Genies and
David Defour and
Guillaume Revy},
title = {Range reduction based on Pythagorean triples for trigonometric function
evaluation},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {74--81},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245712},
doi = {10.1109/ASAP.2015.7245712},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Saint-GeniesDR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SchmidRHT15,
author = {Moritz Schmid and
Oliver Reiche and
Frank Hannig and
J{\"{u}}rgen Teich},
title = {Loop coarsening in C-based High-Level Synthesis},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {166--173},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245730},
doi = {10.1109/ASAP.2015.7245730},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SchmidRHT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShastriSR15,
author = {Aniruddha Shastri and
Greg Stitt and
Eduardo Riccio},
title = {A scheduling and binding heuristic for high-level synthesis of fault-tolerant
{FPGA} applications},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {202--209},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245735},
doi = {10.1109/ASAP.2015.7245735},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShastriSR15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TabkhiSS15,
author = {Hamed Tabkhi and
Majid Sabbagh and
Gunar Schirner},
title = {An efficient architecture solution for low-power real-time background
subtraction},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {218--225},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245737},
doi = {10.1109/ASAP.2015.7245737},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TabkhiSS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TadeMAK15,
author = {Seiichi Tade and
Hiroki Matsutani and
Hideharu Amano and
Michihiro Koibuchi},
title = {A metamorphotic Network-on-Chip for various types of parallel applications},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {98--105},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245715},
doi = {10.1109/ASAP.2015.7245715},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TadeMAK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TanaseWTHL15,
author = {Alexandru Tanase and
Michael Witterauf and
J{\"{u}}rgen Teich and
Frank Hannig and
Vahid Lari},
title = {On-demand fault-tolerant loop processing on massively parallel processor
arrays},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {194--201},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245734},
doi = {10.1109/ASAP.2015.7245734},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TanaseWTHL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TangLG15,
author = {Jie Tang and
Chen Liu and
Jean{-}Luc Gaudiot},
title = {How can Garbage Collection be energy efficient by dynamic offloading?},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {156--157},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245725},
doi = {10.1109/ASAP.2015.7245725},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TangLG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ThomasPHTW15,
author = {Tedy Thomas and
Arman Pouraghily and
Kekai Hu and
Russell Tessier and
Tilman Wolf},
title = {Multi-task support for security-enabled embedded processors},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {136--143},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245721},
doi = {10.1109/ASAP.2015.7245721},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ThomasPHTW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ThompsonS15,
author = {S. Ross Thompson and
James E. Stine},
title = {An {IEEE} 754 double-precision floating-point multiplier for denormalized
and normalized floating-point numbers},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {62--63},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245706},
doi = {10.1109/ASAP.2015.7245706},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ThompsonS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangHCE15,
author = {Ran Wang and
Jie Han and
Bruce F. Cockburn and
Duncan G. Elliott},
title = {Stochastic circuit design and performance evaluation of vector quantization},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {111--115},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245717},
doi = {10.1109/ASAP.2015.7245717},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WangHCE15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WongHG15,
author = {Andrew J. Wong and
Saied Hemati and
Warren J. Gross},
title = {Efficient implementation of structured long block-length {LDPC} codes},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {234--238},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245739},
doi = {10.1109/ASAP.2015.7245739},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WongHG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WuCT15,
author = {Ming{-}Ju Wu and
Yan{-}Ting Chen and
Chun{-}Jen Tsai},
title = {Dynamic pipeline-partitioned video decoding on symmetric stream multiprocessors},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {106--110},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245716},
doi = {10.1109/ASAP.2015.7245716},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WuCT15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhengWJWCJ15,
author = {Ran Zheng and
Wei Wang and
Hai Jin and
Song Wu and
Yong Chen and
Han Jiang},
title = {GPU-based multifrontal optimizing method in sparse Cholesky factorization},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {90--97},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245714},
doi = {10.1109/ASAP.2015.7245714},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhengWJWCJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhouQP15,
author = {Shijie Zhou and
Yun Rock Qu and
Viktor K. Prasanna},
title = {Large-scale packet classification on {FPGA}},
booktitle = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
pages = {226--233},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://doi.org/10.1109/ASAP.2015.7245738},
doi = {10.1109/ASAP.2015.7245738},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhouQP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2015,
title = {26th {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2015, Toronto, ON, Canada, July
27-29, 2015},
publisher = {{IEEE} Computer Society},
year = {2015},
url = {https://ieeexplore.ieee.org/xpl/conhome/7227129/proceeding},
isbn = {978-1-4799-1925-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2015.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AkinFH14,
author = {Berkin Akin and
Franz Franchetti and
James C. Hoe},
title = {Understanding the design space of DRAM-optimized hardware {FFT} accelerators},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {248--255},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868669},
doi = {10.1109/ASAP.2014.6868669},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AkinFH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AlrimeihR14,
author = {Hamad Alrimeih and
Daler N. Rakhmatov},
title = {Pipelined modular multiplier supporting multiple standard prime fields},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {48--56},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868630},
doi = {10.1109/ASAP.2014.6868630},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AlrimeihR14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AltamimiRM14,
author = {Amro Altamimi and
Daler N. Rakhmatov and
Michael McGuire},
title = {Polar baseband receiver for low-end {WLAN}},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {68--69},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868633},
doi = {10.1109/ASAP.2014.6868633},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AltamimiRM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AndradePFSS14,
author = {Jo{\~{a}}o Andrade and
Frederico Pratas and
Gabriel Falc{\~{a}}o and
V{\'{\i}}tor Manuel Mendes da Silva and
Leonel Sousa},
title = {Combining flexibility with low power: Dataflow and wide-pipeline {LDPC}
decoding engines in the Gbit/s era},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {264--269},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868671},
doi = {10.1109/ASAP.2014.6868671},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AndradePFSS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Atasu14,
author = {Kubilay Atasu},
title = {Resource-efficient regular expression matching architecture for text
analytics},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {1--8},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868623},
doi = {10.1109/ASAP.2014.6868623},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Atasu14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BadawiHL14,
author = {Mohammad Badawi and
Ahmed Hemani and
Zhonghai Lu},
title = {Customizable coarse-grained energy-efficient reconfigurable packet
processing architecture},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {30--35},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868627},
doi = {10.1109/ASAP.2014.6868627},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BadawiHL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BigouT14,
author = {Karim Bigou and
Arnaud Tisserand},
title = {{RNS} modular multiplication through reduced base extensions},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {57--62},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868631},
doi = {10.1109/ASAP.2014.6868631},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BigouT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BildosolaMB14,
author = {I{\~{n}}aki Bildosola and
Unai Martinez{-}Corral and
Koldo Basterretxea},
title = {Adaptive scalable {SVD} unit for fast processing of large {LSE} problems},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {17--24},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868625},
doi = {10.1109/ASAP.2014.6868625},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BildosolaMB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChangT14,
author = {Yun{-}Nan Chang and
Ting{-}Chi Tong},
title = {Design of a 2D graphics front-end rendering processor},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {70--71},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868634},
doi = {10.1109/ASAP.2014.6868634},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChangT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChoiS14,
author = {Yuk{-}Ming Choi and
Hayden Kwok{-}Hay So},
title = {Map-reduce processing of k-means algorithm with FPGA-accelerated computer
cluster},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {9--16},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868624},
doi = {10.1109/ASAP.2014.6868624},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChoiS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ClercqPSV14,
author = {Ruan de Clercq and
Frank Piessens and
Dries Schellekens and
Ingrid Verbauwhede},
title = {Secure interrupts on low-end microcontrollers},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {147--152},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868649},
doi = {10.1109/ASAP.2014.6868649},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ClercqPSV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ConosMP14,
author = {Nathaniel A. Conos and
Saro Meguerdichian and
Miodrag Potkonjak},
title = {Coordinated and adaptive power gating and dynamic voltage scaling
for energy minimization},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {100--107},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868643},
doi = {10.1109/ASAP.2014.6868643},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ConosMP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ContiPMB14,
author = {Francesco Conti and
Chuck Pilkington and
Andrea Marongiu and
Luca Benini},
title = {He-P2012: Architectural heterogeneity exploration on a scalable many-core
platform},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {114--120},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868645},
doi = {10.1109/ASAP.2014.6868645},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ContiPMB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CushonHMG14,
author = {Kevin Cushon and
Saied Hemati and
Shie Mannor and
Warren J. Gross},
title = {Energy-efficient gear-shift {LDPC} decoders},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {219--223},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868665},
doi = {10.1109/ASAP.2014.6868665},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CushonHMG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DenholmITBL14,
author = {Stewart Denholm and
Hiroaki Inoue and
Takashi Takenaka and
Tobias Becker and
Wayne Luk},
title = {Low latency {FPGA} acceleration of market data feed arbitration},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {36--40},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868628},
doi = {10.1109/ASAP.2014.6868628},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DenholmITBL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DinechinIM14,
author = {Florent de Dinechin and
Matei Istoan and
Abdelbassat Massouri},
title = {Sum-of-product architectures computing just right},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {41--47},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868629},
doi = {10.1109/ASAP.2014.6868629},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DinechinIM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GangadharanTC14,
author = {Deepak Gangadharan and
J{\"{u}}rgen Teich and
Samarjit Chakraborty},
title = {Quality-aware video decoding on thermally-constrained MPSoC platforms},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {256--263},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868670},
doi = {10.1109/ASAP.2014.6868670},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GangadharanTC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GautschiMTSBABMK14,
author = {Michael Gautschi and
Michael Muehlberghuber and
Andreas Traber and
Sven Stucki and
Matthias Baer and
Renzo Andri and
Luca Benini and
Beat Muheim and
Hubert Kaeslin},
title = {{SIR10US:} {A} tightly coupled elliptic-curve cryptography co-processor
for the OpenRISC},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {25--29},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868626},
doi = {10.1109/ASAP.2014.6868626},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GautschiMTSBABMK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GiefersPH14,
author = {Heiner Giefers and
Raphael Polig and
Christoph Hagleitner},
title = {Analyzing the energy-efficiency of dense linear algebra kernels by
power-profiling a hybrid {CPU/FPGA} system},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {92--99},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868642},
doi = {10.1109/ASAP.2014.6868642},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GiefersPH14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuoLW14,
author = {Ce Guo and
Wayne Luk and
Stephen Weston},
title = {Pipelined reconfigurable accelerator for ordinal pattern encoding},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {194--201},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868662},
doi = {10.1109/ASAP.2014.6868662},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GuoLW14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HallC14,
author = {Michael J. Hall and
Roger D. Chamberlain},
title = {Performance modeling of virtualized custom logic computations},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {72--73},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868635},
doi = {10.1109/ASAP.2014.6868635},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HallC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HanHSBDD14,
author = {Junyi Han and
Robert Haines and
Adel Salhli and
John Martin Brooke and
Bruce D'Amora and
Bob Danani},
title = {Virtual science on the move: Interactive access to simulations on
supercomputers},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {178--179},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868654},
doi = {10.1109/ASAP.2014.6868654},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HanHSBDD14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HayekMSBGE14,
author = {Ali Hayek and
Bashier Machmur and
Michael Schreiber and
Josef B{\"{o}}rcs{\"{o}}k and
Stefan Golz and
Mario Epp},
title = {HICore1: "Safety on a chip" turnkey solution for industrial control},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {74--75},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868636},
doi = {10.1109/ASAP.2014.6868636},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HayekMSBGE14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HussainAHAN14,
author = {Waqar Hussain and
Roberto Airoldi and
Henry Hoffmann and
Tapani Ahonen and
Jari Nurmi},
title = {Design of an accelerator-rich architecture by integrating multiple
heterogeneous coarse grain reconfigurable arrays over a network-on-chip},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {131--138},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868647},
doi = {10.1109/ASAP.2014.6868647},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HussainAHAN14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HussainPUCAV14,
author = {Tassadaq Hussain and
Oscar Palomar and
Osman S. Unsal and
Adri{\'{a}}n Cristal and
Eduard Ayguad{\'{e}} and
Mateo Valero},
title = {{PVMC:} Programmable Vector Memory Controller},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {240--247},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868668},
doi = {10.1109/ASAP.2014.6868668},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HussainPUCAV14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JaicSS14,
author = {Keerthan Jaic and
Melissa C. Smith and
Nilim Sarma},
title = {A practical network intrusion detection system for inline FPGAs on
10GbE network adapters},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {180--181},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868655},
doi = {10.1109/ASAP.2014.6868655},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JaicSS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JaliliS14,
author = {Majid Jalili and
Hamid Sarbazi{-}Azad},
title = {A compression-based morphable {PCM} architecture for improving resistance
drift tolerance},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {232--239},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868667},
doi = {10.1109/ASAP.2014.6868667},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JaliliS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JoldesMP14,
author = {Mioara Joldes and
Jean{-}Michel Muller and
Valentina Popescu},
title = {On the computation of the reciprocal of floating point expansions
using an adapted Newton-Raphson iteration},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {63--67},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868632},
doi = {10.1109/ASAP.2014.6868632},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JoldesMP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KrommydasFOAB14,
author = {Konstantinos Krommydas and
Wu{-}chun Feng and
Muhsen Owaida and
Christos D. Antonopoulos and
Nikolaos Bellas},
title = {On the characterization of OpenCL dwarfs on fixed and reconfigurable
platforms},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {153--160},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868650},
doi = {10.1109/ASAP.2014.6868650},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KrommydasFOAB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LashgarB14,
author = {Ahmad Lashgar and
Amirali Baniasadi},
title = {A case against small data types in GPGPUs},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {108--113},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868644},
doi = {10.1109/ASAP.2014.6868644},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LashgarB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiZYLYZ14,
author = {Yanhua Li and
Youhui Zhang and
Jianfeng Yang and
Wayne Luk and
Guangwen Yang and
Weimin Zheng},
title = {An approach of processor core customization for stencil computation},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {182--183},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868656},
doi = {10.1109/ASAP.2014.6868656},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiZYLYZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuS14,
author = {Yongchao Liu and
Bertil Schmidt},
title = {{SWAPHI:} Smith-waterman protein database search on Xeon Phi coprocessors},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {184--185},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868657},
doi = {10.1109/ASAP.2014.6868657},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiuS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MaCA14,
author = {Lin Ma and
Roger D. Chamberlain and
Kunal Agrawal},
title = {Performance modeling for highly-threaded many-core GPUs},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {84--91},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868641},
doi = {10.1109/ASAP.2014.6868641},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MaCA14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MataiKK14,
author = {Janarbek Matai and
Joo{-}Young Kim and
Ryan Kastner},
title = {Energy efficient canonical huffman encoding},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {202--209},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868663},
doi = {10.1109/ASAP.2014.6868663},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MataiKK14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ModarressiS14,
author = {Mehdi Modarressi and
Hamid Sarbazi{-}Azad},
title = {A reconfigurable network-on-chip architecture for heterogeneous CMPs
in the dark-silicon era},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {76--77},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868637},
doi = {10.1109/ASAP.2014.6868637},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ModarressiS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OngFL14,
author = {Kevin Shen{-}Hoong Ong and
Suhaib A. Fahmy and
Keck Voon Ling},
title = {A scalable and compact systolic architecture for linear solvers},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {186--187},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868658},
doi = {10.1109/ASAP.2014.6868658},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OngFL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PaoneGPZS14,
author = {Edoardo Paone and
Davide Gadioli and
Gianluca Palermo and
Vittorio Zaccaria and
Cristina Silvano},
title = {Evaluating orthogonality between application auto-tuning and run-time
resource management for adaptive OpenCL applications},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {161--168},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868651},
doi = {10.1109/ASAP.2014.6868651},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PaoneGPZS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PeyretCTMC14,
author = {Thomas Peyret and
Gwenol{\'{e}} Corre and
Mathieu Thevenin and
Kevin J. M. Martin and
Philippe Coussy},
title = {Efficient application mapping on CGRAs based on backward simultaneous
scheduling/binding and dynamic graph transformations},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {169--172},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868652},
doi = {10.1109/ASAP.2014.6868652},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PeyretCTMC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PintoB14,
author = {Christian Pinto and
Luca Benini},
title = {Exploring DMA-assisted prefetching strategies for software caches
on multicore clusters},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {224--231},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868666},
doi = {10.1109/ASAP.2014.6868666},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PintoB14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PontieM14,
author = {Simon Pontie and
Paolo Maistri},
title = {Randomized windows for secure scalar multiplication on elliptic curves},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {78--79},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868638},
doi = {10.1109/ASAP.2014.6868638},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PontieM14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RakossyMANC14,
author = {Zolt{\'{a}}n Endre R{\'{a}}kossy and
Farhad Merchant and
Axel Acosta{-}Aponte and
S. K. Nandy and
Anupam Chattopadhyay},
title = {Efficient and scalable CGRA-based implementation of Column-wise Givens
Rotation},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {188--189},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868659},
doi = {10.1109/ASAP.2014.6868659},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RakossyMANC14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SamiP14,
author = {Mariagiovanna Sami and
Gianluca Palermo},
title = {Virtual semi-concurrent self-checking for heterogeneous MPSoC architectures},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {80--81},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868639},
doi = {10.1109/ASAP.2014.6868639},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SamiP14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SchmidTHTBG14,
author = {Moritz Schmid and
Alexandru Tanase and
Frank Hannig and
J{\"{u}}rgen Teich and
Vivek Singh Bhadouria and
Dibyendu Ghoshal},
title = {Domain-specific augmentations for High-Level Synthesis},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {173--177},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868653},
doi = {10.1109/ASAP.2014.6868653},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SchmidTHTBG14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TabkhiBS14,
author = {Hamed Tabkhi and
Robert Bushey and
Gunar Schirner},
title = {Function-Level Processor {(FLP):} Raising efficiency by operating
at function granularity for market-oriented MPSoC},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {121--130},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868646},
doi = {10.1109/ASAP.2014.6868646},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TabkhiBS14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/UenoISY14,
author = {Tomohiro Ueno and
Ryo Ito and
Kentaro Sano and
Satoru Yamamoto},
title = {Bandwidth compression of multiple numerical data streams for high
performance custom computing},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {190--191},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868660},
doi = {10.1109/ASAP.2014.6868660},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/UenoISY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WuL14,
author = {Zhenzhi Wu and
Dake Liu},
title = {Flexible multistandard {FEC} processor design with {ASIP} methodology},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {210--218},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868664},
doi = {10.1109/ASAP.2014.6868664},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WuL14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XiaoILKZ14,
author = {Hao Xiao and
Tsuyoshi Isshiki and
Dongju Li and
Hiroaki Kunieda and
Guanyu Zhu},
title = {Distributed synchronization for message-passing based embedded multiprocessors},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {82--83},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868640},
doi = {10.1109/ASAP.2014.6868640},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XiaoILKZ14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XuHZHY14,
author = {Shizhen Xu and
Xiaomeng Huang and
Yan Zhang and
Yong Hu and
Guangwen Yang},
title = {A customized {GPU} acceleration of the princeton ocean model},
booktitle = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
pages = {192--193},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/ASAP.2014.6868661},
doi = {10.1109/ASAP.2014.6868661},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XuHZHY14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2014,
title = {{IEEE} 25th International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2014, Zurich, Switzerland, June
18-20, 2014},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://ieeexplore.ieee.org/xpl/conhome/6857731/proceeding},
isbn = {978-1-4799-3609-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2014.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/0002D13,
author = {Wei Zhang and
Yiqiang Ding},
title = {Standard deviation of {CPI:} {A} new metric to evaluate architectural
time predictability},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {111--112},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567562},
doi = {10.1109/ASAP.2013.6567562},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/0002D13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/0002D13a,
author = {Wei Zhang and
Yiqiang Ding},
title = {Hybrid SPM-cache architectures to achieve high time predictability
and performance},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {297--304},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567593},
doi = {10.1109/ASAP.2013.6567593},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/0002D13a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AgarwalP13,
author = {Kanak Agarwal and
Raphael Polig},
title = {A high-speed and large-scale dictionary matching engine for Information
Extraction systems},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {59--66},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567551},
doi = {10.1109/ASAP.2013.6567551},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AgarwalP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ArnoldC13,
author = {Mark G. Arnold and
Caroline Collange},
title = {The Denormal Logarithmic Number System},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {117--124},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567564},
doi = {10.1109/ASAP.2013.6567564},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ArnoldC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BankasGC13,
author = {Edem Kwedzo Bankas and
Kazeem Alagbe Gbolagade and
Sorin Dan Cotofana},
title = {An effective New {CRT} based reverse converter for a novel moduli
set \{2\({}^{\mbox{2n+1}}\) - 1, 2\({}^{\mbox{2n+1}}\), 2\({}^{\mbox{2n}}\)
- 1\}},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {142--146},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567567},
doi = {10.1109/ASAP.2013.6567567},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BankasGC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BoppuHT13,
author = {Srinivas Boppu and
Frank Hannig and
J{\"{u}}rgen Teich},
title = {Loop program mapping and compact code generation for programmable
hardware accelerators},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {10--17},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567544},
doi = {10.1109/ASAP.2013.6567544},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BoppuHT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CappelloS13,
author = {John D. Cappello and
Dave Strenski},
title = {A practical measure of {FPGA} floating point acceleration for High
Performance Computing},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {160--167},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567570},
doi = {10.1109/ASAP.2013.6567570},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CappelloS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CarbonLC13,
author = {M. Alexandre Carbon and
Yves Lhuillier and
Henri{-}Pierre Charles},
title = {Hardware acceleration for Just-In-Time compilation on heterogeneous
embedded systems},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {203--210},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567576},
doi = {10.1109/ASAP.2013.6567576},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CarbonLC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChenHHK13,
author = {Gang Chen and
Kai Huang and
Jia Huang and
Alois C. Knoll},
title = {Cache partitioning and scheduling for energy optimization of real-time
MPSoCs},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {35--41},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567548},
doi = {10.1109/ASAP.2013.6567548},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChenHHK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CookeFSH13,
author = {Patrick Cooke and
Jeremy Fowers and
Greg Stitt and
Lee Hunt},
title = {A comparison of correntropy-based feature tracking on FPGAs and GPUs},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {237--240},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567580},
doi = {10.1109/ASAP.2013.6567580},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CookeFSH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CraciunWGLP13,
author = {Stefan Craciun and
Gongyu Wang and
Alan D. George and
Herman Lam and
Jos{\'{e}} C. Pr{\'{\i}}ncipe},
title = {A scalable {RC} architecture for mean-shift clustering},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {370--374},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567603},
doi = {10.1109/ASAP.2013.6567603},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CraciunWGLP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DangEDC13,
author = {Vinh Q. Dang and
Esam El{-}Araby and
Lam H. Dao and
Lin{-}Ching Chang},
title = {Accelerating nonlinear diffusion tensor estimation for medical image
processing using high performance {GPU} clusters},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {265--268},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567587},
doi = {10.1109/ASAP.2013.6567587},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DangEDC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GaoB13,
author = {Yang Gao and
Jason D. Bakos},
title = {Sparse matrix-vector multiply on the Texas Instruments {C6678} Digital
Signal Processor},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {168--174},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567571},
doi = {10.1109/ASAP.2013.6567571},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GaoB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GrigorasNCLBP13,
author = {Paul Grigoras and
Xinyu Niu and
Jos{\'{e}} Gabriel F. Coutinho and
Wayne Luk and
Jacob A. Bower and
Oliver Pell},
title = {Aspect driven compilation for dataflow designs},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {18--25},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567545},
doi = {10.1109/ASAP.2013.6567545},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GrigorasNCLBP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GrivasMYW13,
author = {Athanasios K. Grivas and
Terrence S. T. Mak and
Alex Yakovlev and
Jonny Wray},
title = {Novel Multi-Layer Network Decomposition boosting acceleration of multi-core
algorithms},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {249--252},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567583},
doi = {10.1109/ASAP.2013.6567583},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GrivasMYW13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuQ13,
author = {Junjun Gu and
Gang Qu},
title = {Incorporating temperature-leakage interdependency into dynamic voltage
scaling for real-time systems},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {289--296},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567592},
doi = {10.1109/ASAP.2013.6567592},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GuQ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuoL13,
author = {Ce Guo and
Wayne Luk},
title = {Accelerating {HAC} estimation for multivariate time series},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {42--49},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567549},
doi = {10.1109/ASAP.2013.6567549},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GuoL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HajkazemiBA13,
author = {Mohammad Hossein Hajkazemi and
Amirali Baniasadi and
Hossein Asadi},
title = {{FARHAD:} {A} Fault-Tolerant Power-Aware Hybrid Adder for add intensive
applications},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {153--159},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567569},
doi = {10.1109/ASAP.2013.6567569},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HajkazemiBA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HaoS13,
author = {Lu Hao and
Greg Stitt},
title = {Virtual finite-state-machine architectures for fast compilation and
portability},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {91--94},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567557},
doi = {10.1109/ASAP.2013.6567557},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HaoS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Hartenstein13,
author = {Reiner W. Hartenstein},
title = {The tunnel vision syndrome: Massively delaying progress},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567541},
doi = {10.1109/ASAP.2013.6567541},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Hartenstein13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HeoHE13,
author = {Seok Won Heo and
Suk Joong Huh and
Milos D. Ercegovac},
title = {Power optimization of sum-of-products design for signal processing
applications},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {192--197},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567574},
doi = {10.1109/ASAP.2013.6567574},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HeoHE13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HussainCAN13,
author = {Waqar Hussain and
Xiaolin Chen and
Gerd Ascheid and
Jari Nurmi},
title = {A Reconfigurable Application-specific Instruction-set Processor for
Fast Fourier Transform processing},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {339--345},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567599},
doi = {10.1109/ASAP.2013.6567599},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HussainCAN13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/IoualalenM13,
author = {Arnault Ioualalen and
Matthieu Martel},
title = {Synthesizing accurate floating-point formulas},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {113--116},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567563},
doi = {10.1109/ASAP.2013.6567563},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/IoualalenM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Jafari13,
author = {Roozbeh Jafari},
title = {Wireless health: Challenges and opportunities},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567540},
doi = {10.1109/ASAP.2013.6567540},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Jafari13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JarollahiGOG13,
author = {Hooman Jarollahi and
Vincent Gripon and
Naoya Onizawa and
Warren J. Gross},
title = {A low-power Content-Addressable Memory based on clustered-sparse networks},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {305--308},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567594},
doi = {10.1109/ASAP.2013.6567594},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JarollahiGOG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Jiang13,
author = {Hong Jiang},
title = {An application-aware approach to systems support for big data},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567537},
doi = {10.1109/ASAP.2013.6567537},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Jiang13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KangKLKSLP13,
author = {Jihoon Kang and
Yohan Ko and
Jongwon Lee and
Yongjoo Kim and
Hwisoo So and
Kyoungwoo Lee and
Yunheung Paek},
title = {Selective validations for efficient protections on Coarse-Grained
Reconfigurable Architectures},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {95--98},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567558},
doi = {10.1109/ASAP.2013.6567558},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KangKLKSLP13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KirchgessnerGL13,
author = {Robert Kirchgessner and
Alan D. George and
Herman Lam},
title = {Reconfigurable computing middleware for application portability and
productivity},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {211--218},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567577},
doi = {10.1109/ASAP.2013.6567577},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KirchgessnerGL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Kung13,
author = {Sun{-}Yuan Kung},
title = {From green computing to big-data learning: {A} kernel learning perspective},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567539},
doi = {10.1109/ASAP.2013.6567539},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Kung13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LandyS13,
author = {Aaron Landy and
Greg Stitt},
title = {Pseudo-constant logic optimization},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {99--102},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567559},
doi = {10.1109/ASAP.2013.6567559},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LandyS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LenziFFF13,
author = {Karlo Gusso Lenzi and
Felipe A. P. Figueiredo and
Jos{\'{e}} A. Bianco Filho and
Fabr{\'{\i}}cio L. Figueiredo},
title = {On the performance of code block segmentation for LTE-advanced},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {253--256},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567584},
doi = {10.1109/ASAP.2013.6567584},
timestamp = {Sun, 14 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LenziFFF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiL13,
author = {Peng Li and
David J. Lilja},
title = {Accelerating the performance of stochastic encoding-based computations
by sharing bits in consecutive bit streams},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {257--260},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567585},
doi = {10.1109/ASAP.2013.6567585},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiSTCB13,
author = {Da Li and
Kittisak Sajjapongse and
Huan Truong and
Gavin C. Conant and
Michela Becchi},
title = {A distributed {CPU-GPU} framework for pairwise alignments on large-scale
sequence datasets},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {329--338},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567598},
doi = {10.1109/ASAP.2013.6567598},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiSTCB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MalikHG13,
author = {Jamshaid Sarwar Malik and
Ahmed Hemani and
Nasirud Din Gohar},
title = {Unifying {CORDIC} and Box-Muller algorithms: An accurate and efficient
Gaussian Random Number generator},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {277--280},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567590},
doi = {10.1109/ASAP.2013.6567590},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MalikHG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MatutinoCS13,
author = {Pedro Miguens Matutino and
Ricardo Chaves and
Leonel Sousa},
title = {A compact and scalable {RNS} architecture},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {125--132},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567565},
doi = {10.1109/ASAP.2013.6567565},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MatutinoCS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MinS13,
author = {Jae Hong Min and
Earl E. Swartzlander Jr.},
title = {Fused floating-point two-term sum-of-squares unit},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {147--152},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567568},
doi = {10.1109/ASAP.2013.6567568},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MinS13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MonsonWH13,
author = {Joshua S. Monson and
Michael J. Wirthlin and
Brad L. Hutchings},
title = {Implementing high-performance, low-power FPGA-based optical flow accelerators
in {C}},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {363--369},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567602},
doi = {10.1109/ASAP.2013.6567602},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MonsonWH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NevesSPMTFR13,
author = {Nuno Neves and
Nuno Sebasti{\~{a}}o and
Andre Patricio and
David Martins de Matos and
Pedro Tom{\'{a}}s and
Paulo F. Flores and
Nuno Roma},
title = {BioBlaze: Multi-core {SIMD} {ASIP} for {DNA} sequence alignment},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {241--244},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567581},
doi = {10.1109/ASAP.2013.6567581},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NevesSPMTFR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NjikiEBCR13,
author = {Mickael Njiki and
Abdelhafid Elouardi and
Samir Bouaziz and
Olivier Casula and
Olivier Roy},
title = {A real-time implementation of the Total Focusing Method for rapid
and precise diagnostic in non destructive evaluation},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {245--248},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567582},
doi = {10.1109/ASAP.2013.6567582},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NjikiEBCR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PageM13,
author = {Adam Page and
Tinoosh Mohsenin},
title = {An efficient {\&} reconfigurable {FPGA} and {ASIC} implementation
of a spectral Doppler ultrasound imaging system},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {198--202},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567575},
doi = {10.1109/ASAP.2013.6567575},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PageM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ParkG13,
author = {Hyungman Park and
Andreas Gerstlauer},
title = {Toward a fast stochastic simulation processor for biochemical reaction
networks},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {50--58},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567550},
doi = {10.1109/ASAP.2013.6567550},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ParkG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PedramMG13,
author = {Ardavan Pedram and
John D. McCalpin and
Andreas Gerstlauer},
title = {Transforming a linear algebra core to an {FFT} accelerator},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {175--184},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567572},
doi = {10.1109/ASAP.2013.6567572},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PedramMG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PhamJCFM13,
author = {Khoa Dang Pham and
Abhishek Kumar Jain and
Jin Cui and
Suhaib A. Fahmy and
Douglas L. Maskell},
title = {Microkernel hypervisor for a hybrid {ARM-FPGA} platform},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {219--226},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567578},
doi = {10.1109/ASAP.2013.6567578},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PhamJCFM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PintoB13,
author = {Christian Pinto and
Luca Benini},
title = {A highly efficient, thread-safe software cache implementation for
tightly-coupled multicore clusters},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {281--288},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567591},
doi = {10.1109/ASAP.2013.6567591},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PintoB13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PrakashLSC13,
author = {Alok Prakash and
Siew Kei Lam and
Thambipillai Srikanthan and
Christopher T. Clarke},
title = {Modelling communication overhead for accessing local memories in hardware
accelerators},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {31--34},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567547},
doi = {10.1109/ASAP.2013.6567547},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PrakashLSC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QiuZFSX13,
author = {Keni Qiu and
Mengying Zhao and
Chenchen Fu and
Liang Shi and
Chun Jason Xue},
title = {Migration-aware loop retiming for {STT-RAM} based hybrid cache for
embedded systems},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {83--86},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567555},
doi = {10.1109/ASAP.2013.6567555},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/QiuZFSX13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RykunovMSYK13,
author = {Maxim Rykunov and
Andrey Mokhov and
Danil Sokolov and
Alex Yakovlev and
Albert Koelmans},
title = {Design-for-adaptivity of microarchitectures},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {314--320},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567596},
doi = {10.1109/ASAP.2013.6567596},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RykunovMSYK13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SchmidtF13,
author = {Andrew G. Schmidt and
Matthew French},
title = {Fast lossless image compression with Radiation Hardening by hardware/software
co-design on platform FPGAs},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {103--106},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567560},
doi = {10.1109/ASAP.2013.6567560},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SchmidtF13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SchneiderMG13,
author = {Tobias Schneider and
Ingo von Maurich and
Tim G{\"{u}}neysu},
title = {Efficient implementation of cryptographic primitives on the {GA144}
multi-core architecture},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {67--74},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567552},
doi = {10.1109/ASAP.2013.6567552},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SchneiderMG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SecchiCTVPR13,
author = {Simone Secchi and
Marco Ceriani and
Antonino Tumeo and
Oreste Villa and
Gianluca Palermo and
Luigi Raffo},
title = {Exploring hardware support for scaling irregular applications on multi-node
multi-core architectures},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {309--313},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567595},
doi = {10.1109/ASAP.2013.6567595},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SecchiCTVPR13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShagrithayaKA13,
author = {Kavya Shagrithaya and
Krzysztof Kepa and
Peter Athanas},
title = {Enabling development of OpenCL applications on {FPGA} platforms},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {26--30},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567546},
doi = {10.1109/ASAP.2013.6567546},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShagrithayaKA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SkalickyLLLG13,
author = {Sam Skalicky and
Sonia L{\'{o}}pez and
Marcin Lukowiak and
James Letendre and
David Gasser},
title = {Linear algebra computations in heterogeneous systems},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {273--276},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567589},
doi = {10.1109/ASAP.2013.6567589},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SkalickyLLLG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SureshBZ13,
author = {Shashank Suresh and
Spiridon F. Beldianu and
Sotirios G. Ziavras},
title = {{FPGA} and {ASIC} square root designs for high performance and power
efficiency},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {269--272},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567588},
doi = {10.1109/ASAP.2013.6567588},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SureshBZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TajammulJHPT13,
author = {Muhammad Adeel Tajammul and
Syed M. A. H. Jafri and
Ahmed Hemani and
Juha Plosila and
Hannu Tenhunen},
title = {Private configuration environments {(PCE)} for efficient reconfiguration,
in CGRAs},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {227--236},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567579},
doi = {10.1109/ASAP.2013.6567579},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TajammulJHPT13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TangHCNBHH13,
author = {Li Tang and
Xiaobo Sharon Hu and
Danny Z. Chen and
Michael T. Niemier and
Richard F. Barrett and
Simon D. Hammond and
Genie Hsieh},
title = {{GPU} acceleration of Data Assembly in Finite Element Methods and
its energy implications},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {321--328},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567597},
doi = {10.1109/ASAP.2013.6567597},
timestamp = {Sun, 17 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/TangHCNBHH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TangLCL13,
author = {Jie Tang and
Chen Liu and
Yu{-}Liang Chou and
Shaoshan Liu},
title = {{OCP:} Offload Co-Processor for energy efficiency in embedded mobile
systems},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {107--110},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567561},
doi = {10.1109/ASAP.2013.6567561},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TangLCL13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TeichTH13,
author = {J{\"{u}}rgen Teich and
Alexandru Tanase and
Frank Hannig},
title = {Symbolic parallelization of loop programs for massively parallel processor
arrays},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {1--9},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567543},
doi = {10.1109/ASAP.2013.6567543},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TeichTH13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Torrellas13,
author = {Josep Torrellas},
title = {Extreme scale computer architecture: Energy efficiency from the ground
up},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {1},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567538},
doi = {10.1109/ASAP.2013.6567538},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Torrellas13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TownsendZ13,
author = {Kevin Townsend and
Joseph Zambreno},
title = {Reduce, Reuse, Recycle (R\({}^{\mbox{3}}\)): {A} design methodology
for Sparse Matrix Vector Multiplication on reconfigurable platforms},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {185--191},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567573},
doi = {10.1109/ASAP.2013.6567573},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TownsendZ13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/UlianaKA13,
author = {David Uliana and
Krzysztof Kepa and
Peter Athanas},
title = {FPGA-based {HPC} application design for non-experts},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {261--264},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567586},
doi = {10.1109/ASAP.2013.6567586},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/UlianaKA13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VoicuLEC13,
author = {George Razvan Voicu and
Mihai Lefter and
Marius Enachescu and
Sorin Dan Cotofana},
title = {3D stacked wide-operand adders: {A} case study},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {133--141},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567566},
doi = {10.1109/ASAP.2013.6567566},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VoicuLEC13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VosoughiWSCG13,
author = {Aida Vosoughi and
Guohui Wang and
Hao Shen and
Joseph R. Cavallaro and
Yuanbin Guo},
title = {Highly scalable on-the-fly interleaved address generation for {UMTS/HSPA+}
parallel turbo decoder},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {356--362},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567601},
doi = {10.1109/ASAP.2013.6567601},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VosoughiWSCG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WettinPHBDG13,
author = {Paul Wettin and
Partha Pratim Pande and
Deuk Hyoun Heo and
Benjamin Belzer and
Sujay Deb and
Amlan Ganguly},
title = {Design space exploration for reliable mm-wave wireless NoC architectures},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {79--82},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567554},
doi = {10.1109/ASAP.2013.6567554},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WettinPHBDG13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YaoGFN13,
author = {Tao Yao and
Deyuan Gao and
Xiaoya Fan and
Jari Nurmi},
title = {Correctly rounded architectures for Floating-Point multi-operand addition
and dot-product computation},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {346--355},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567600},
doi = {10.1109/ASAP.2013.6567600},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YaoGFN13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YessinREM13,
author = {Gabriel Yessin and
Lubomir Riha and
Tarek A. El{-}Ghazawi and
David Mayhew},
title = {Application-specific processors for web-browsing: An exploration and
evaluation of the design space},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {87--90},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567556},
doi = {10.1109/ASAP.2013.6567556},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YessinREM13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhengMKO13,
author = {Geng Zheng and
Saraju P. Mohanty and
Elias Kougianos and
Oghenekarho Okobiah},
title = {iVAMS: Intelligent metamodel-integrated Verilog-AMS for circuit-accurate
system-level mixed-signal design exploration},
booktitle = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
pages = {75--78},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://doi.org/10.1109/ASAP.2013.6567553},
doi = {10.1109/ASAP.2013.6567553},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhengMKO13.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2013,
title = {24th International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2013, Washington, DC, USA, June 5-7, 2013},
publisher = {{IEEE} Computer Society},
year = {2013},
url = {https://ieeexplore.ieee.org/xpl/conhome/6558539/proceeding},
isbn = {978-1-4799-0494-5},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2013.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AzharSAVHAL12,
author = {Muhammad Waqar Azhar and
Magnus Sj{\"{a}}lander and
Hasan Ali and
Akshay Vijayashekar and
Tung Thanh Hoang and
Kashan Khurshid Ansari and
Per Larsson{-}Edefors},
title = {Viterbi Accelerator for Embedded Processor Datapaths},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {133--140},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.24},
doi = {10.1109/ASAP.2012.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AzharSAVHAL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Bertels12,
author = {Koen Bertels},
title = {{EU} Collaborative Research on Application-Specific Systems},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {32--45},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.35},
doi = {10.1109/ASAP.2012.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Bertels12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BetkaouiWTL12,
author = {Brahim Betkaoui and
Yu Wang and
David B. Thomas and
Wayne Luk},
title = {A Reconfigurable Computing Approach for Efficient and Scalable Parallel
Graph Exploration},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {8--15},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.30},
doi = {10.1109/ASAP.2012.30},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BetkaouiWTL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BrisebarreEM12,
author = {Nicolas Brisebarre and
Milos D. Ercegovac and
Jean{-}Michel Muller},
title = {(M, p, k)-Friendly Points: {A} Table-Based Method for Trigonometric
Function Evaluation},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {46--52},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.17},
doi = {10.1109/ASAP.2012.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BrisebarreEM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ConstantinBG12,
author = {Jeremy Constantin and
Andreas Burg and
Frank K. G{\"{u}}rkaynak},
title = {Instruction Set Extensions for Cryptographic Hash Functions on a Microcontroller
Architecture},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {117--124},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.13},
doi = {10.1109/ASAP.2012.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ConstantinBG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Garcia-VegaGVZ12,
author = {Carlos Garcia{-}Vega and
Sonia Gonz{\'{a}}lez{-}Navarro and
Julio Villalba{-}Moreno and
Emilio L. Zapata},
title = {On-line Decimal Adder with {RBCD} Representation},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {53--60},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.27},
doi = {10.1109/ASAP.2012.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Garcia-VegaGVZ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GhoshDUV12,
author = {Santosh Ghosh and
Jeroen Delvaux and
Leif Uhsadel and
Ingrid Verbauwhede},
title = {A Speed Area Optimized Embedded Co-processor for McEliece Cryptosystem},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {102--108},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.16},
doi = {10.1109/ASAP.2012.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GhoshDUV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GilaniKS12,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
title = {Virtual Floating-Point Units for Low-Power Embedded Processors},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {61--68},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.28},
doi = {10.1109/ASAP.2012.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GilaniKS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HaastregtK12,
author = {Sven van Haastregt and
Bart Kienhuis},
title = {Enabling Automatic Pipeline Utilization Improvement in Polyhedral
Process Network Implementations},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {173--176},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.23},
doi = {10.1109/ASAP.2012.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HaastregtK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HuangWX12,
author = {Libo Huang and
Zhiying Wang and
Nong Xiao},
title = {Accelerating NoC-Based {MPI} Primitives via Communication Architecture
Customization},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {141--148},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.33},
doi = {10.1109/ASAP.2012.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HuangWX12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JeannerodJ12,
author = {Claude{-}Pierre Jeannerod and
Jingyan Jourdan{-}Lu},
title = {Simultaneous Floating-Point Sine and Cosine for {VLIW} Integer Processors},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {69--76},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.12},
doi = {10.1109/ASAP.2012.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JeannerodJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JohnstonR12,
author = {Jeffrey R. Johnston and
Rob A. Rutenbar},
title = {A High-Rate, Low-Power, {ASIC} Speech Decoder Using Finite State Transducers},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {77--85},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.25},
doi = {10.1109/ASAP.2012.25},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JohnstonR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KavvadiasM12,
author = {Nikolaos Kavvadias and
Kostas Masselos},
title = {Automated Synthesis of FSMD-Based Accelerators for Hardware Compilation},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {157--160},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.29},
doi = {10.1109/ASAP.2012.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KavvadiasM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LariMBHT12,
author = {Vahid Lari and
Shravan Muddasani and
Srinivas Boppu and
Frank Hannig and
J{\"{u}}rgen Teich},
title = {Design of Low Power On-chip Processor Arrays},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {165--168},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.10},
doi = {10.1109/ASAP.2012.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LariMBHT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeMB12,
author = {Roto Le and
Joseph L. Mundy and
R. Iris Bahar},
title = {High Performance Parallel {JPEG2000} Streaming Decoder Using {GPGPU-CPU}
Heterogeneous System},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {16--23},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.34},
doi = {10.1109/ASAP.2012.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeMB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MaC12,
author = {Lin Ma and
Roger D. Chamberlain},
title = {A Performance Model for Memory Bandwidth Constrained Applications
on Graphics Engines},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {24--31},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.19},
doi = {10.1109/ASAP.2012.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MaC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MartinMRB12,
author = {Pedro Mart{\'{\i}}n and
Osmell Machado and
Francisco J. Rodr{\'{\i}}guez and
Emilio Jos{\'{e}} Bueno},
title = {Design Space Exploration for the Implementation of a Predictive Current
Controller Based on {FPGA}},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {161--164},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.9},
doi = {10.1109/ASAP.2012.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MartinMRB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/McKeownW12,
author = {Stephen McKeown and
Roger F. Woods},
title = {Novel Application of Genetic Sequencing Algorithms to Optimization
of Hardware Resource Sharing for {DSP}},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {169--172},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.15},
doi = {10.1109/ASAP.2012.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/McKeownW12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ModarressiS12,
author = {Mehdi Modarressi and
Hamid Sarbazi{-}Azad},
title = {Reconfigurable Cluster-Based Networks-on-Chip for Application-Specific
MPSoCs},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {153--156},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.32},
doi = {10.1109/ASAP.2012.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ModarressiS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NgoSIRB12,
author = {Hau T. Ngo and
Jennifer Shafer and
Robert W. Ives and
Ryan N. Rakvic and
Randy P. Broussard},
title = {Real Time Iris Segmentation on {FPGA}},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.26},
doi = {10.1109/ASAP.2012.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NgoSIRB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NietoVB12,
author = {Alejandro Nieto and
David L{\'{o}}pez Vilari{\~{n}}o and
V{\'{\i}}ctor M. Brea},
title = {{SIMD/MIMD} Dynamically-Reconfigurable Architecture for High-Performance
Embedded Vision Systems},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {94--101},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.8},
doi = {10.1109/ASAP.2012.8},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NietoVB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PedramGKGSG12,
author = {Ardavan Pedram and
Syed Zohaib Gilani and
Nam Sung Kim and
Robert A. van de Geijn and
Michael J. Schulte and
Andreas Gerstlauer},
title = {A Linear Algebra Core Design for Efficient Level-3 {BLAS}},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {149--152},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.18},
doi = {10.1109/ASAP.2012.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PedramGKGSG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SullivanS12,
author = {Michael B. Sullivan and
Earl E. Swartzlander Jr.},
title = {Long Residue Checking for Adders},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {177--180},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.31},
doi = {10.1109/ASAP.2012.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SullivanS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TodmanL12,
author = {Tim Todman and
Wayne Luk},
title = {Reconfigurable Design Automation by High-Level Exploration},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {185--188},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.20},
doi = {10.1109/ASAP.2012.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TodmanL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/UgurdagBAGG12,
author = {H. Fatih Ugurdag and
Ali Basaran and
Taylan Akdogan and
V. Ugur G{\"{u}}ney and
Sezer G{\"{o}}ren},
title = {{FPGA} Based Particle Identification in High Energy Physics Experiments},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {181--184},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.22},
doi = {10.1109/ASAP.2012.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/UgurdagBAGG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/UhsadelUVP12,
author = {Leif Uhsadel and
Markus Ullrich and
Ingrid Verbauwhede and
Bart Preneel},
title = {Interface Design for Mapping a Variety of {RSA} Exponentiation Algorithms
on a {HW/SW} Co-design Platform},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {109--116},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.11},
doi = {10.1109/ASAP.2012.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/UhsadelUVP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZakiPBF12,
author = {George F. Zaki and
William Plishker and
Shuvra S. Bhattacharyya and
Frank Fruth},
title = {Partial Expansion Graphs: Exposing Parallelism and Dynamic Scheduling
Opportunities for {DSP} Applications},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {86--93},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.14},
doi = {10.1109/ASAP.2012.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZakiPBF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhuVSHPF12,
author = {Qiuling Zhu and
Kaushik Vaidyanathan and
Ofer Shacham and
Mark Horowitz and
Larry T. Pileggi and
Franz Franchetti},
title = {Design Automation Framework for Application-Specific Logic-in-Memory
Blocks},
booktitle = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
pages = {125--132},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/ASAP.2012.21},
doi = {10.1109/ASAP.2012.21},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhuVSHPF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2012,
title = {23rd {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2012, Delft, The Netherlands,
July 9-11, 2012},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://ieeexplore.ieee.org/xpl/conhome/6341240/proceeding},
isbn = {978-1-4673-2243-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2012.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AkkasS11,
author = {Ahmet Akkas and
Michael J. Schulte},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {A decimal floating-point fused multiply-add unit with a novel decimal
leading-zero anticipator},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {43--50},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043235},
doi = {10.1109/ASAP.2011.6043235},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AkkasS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AldhamABC11,
author = {Mark Aldham and
Jason Helge Anderson and
Stephen Dean Brown and
Andrew Canis},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Low-cost hardware profiling of run-time and energy in {FPGA} embedded
processors},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {61--68},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043237},
doi = {10.1109/ASAP.2011.6043237},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AldhamABC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ArnoldKP11,
author = {Mark G. Arnold and
Ioannis Kouretas and
Vassilis Paliouras},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {A Residue Logarithmic Number System {ALU} using interpolation and
cotransformation},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {255--258},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043281},
doi = {10.1109/ASAP.2011.6043281},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ArnoldKP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BaiSK11,
author = {Ke Bai and
Aviral Shrivastava and
Saleel Kudchadker},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Stack data management for Limited Local Memory {(LLM)} multi-core
processors},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {231--234},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043275},
doi = {10.1109/ASAP.2011.6043275},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/BaiSK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BanzDCB11,
author = {Christian Banz and
Carsten Dolar and
Fabian Cholewa and
Holger Blume},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Instruction set extension for high throughput disparity estimation
in stereo image processing},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {169--175},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043265},
doi = {10.1109/ASAP.2011.6043265},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BanzDCB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BeiselWPB11,
author = {Tobias Beisel and
Tobias Wiersema and
Christian Plessl and
Andr{\'{e}} Brinkmann},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Cooperative multitasking for heterogeneous accelerators in the Linux
Completely Fair Scheduler},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {223--226},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043273},
doi = {10.1109/ASAP.2011.6043273},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BeiselWPB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Cong11,
author = {Jason Cong},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Era of customization and specialization},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {3},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043228},
doi = {10.1109/ASAP.2011.6043228},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Cong11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CongGHLXZ11,
author = {Jason Cong and
Karthik Gururaj and
Muhuan Huang and
Sen Li and
Bingjun Xiao and
Yi Zou},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Domain-specific processor with 3D integration for medical image processing},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {247--250},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043279},
doi = {10.1109/ASAP.2011.6043279},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CongGHLXZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CongGRV11,
author = {Jason Cong and
Beayna Grigorian and
Glenn Reinman and
Marco Vitanza},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Accelerating vision and navigation applications on a customizable
platform},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {25--32},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043233},
doi = {10.1109/ASAP.2011.6043233},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CongGRV11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DenholmTPL11,
author = {Stewart Denholm and
Kuen Hung Tsoi and
Peter R. Pietzuch and
Wayne Luk},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {CusComNet: {A} customisable network for reconfigurable heterogeneous
clusters},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {9--16},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043231},
doi = {10.1109/ASAP.2011.6043231},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DenholmTPL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DinechinMPP11,
author = {Florent de Dinechin and
Jean{-}Michel Muller and
Bogdan Pasca and
Alexandru Plesco},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {An {FPGA} architecture for solving the Table Maker's Dilemma},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {187--194},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043267},
doi = {10.1109/ASAP.2011.6043267},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DinechinMPP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EmreC11,
author = {Yunus Emre and
Chaitali Chakrabarti},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Low energy motion estimation via selective aproximations},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {176--183},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043266},
doi = {10.1109/ASAP.2011.6043266},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EmreC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ErdemLPB11,
author = {Oguzhan Erdem and
Hoang Le and
Viktor K. Prasanna and
C{\"{u}}neyt F. Bazlama{\c{c}}ci},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Hybrid data structure for {IP} lookup in virtual routers using FPGAs},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {95--102},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043257},
doi = {10.1109/ASAP.2011.6043257},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ErdemLPB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Flynn11,
author = {Michael J. Flynn},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {More than 50 years of parallel processing and still no easy path to
speedup},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {4},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043229},
doi = {10.1109/ASAP.2011.6043229},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Flynn11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GilaniKS11,
author = {Syed Zohaib Gilani and
Nam Sung Kim and
Michael J. Schulte},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Energy-efficient floating-point arithmetic for software-defined radio
architectures},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {122--129},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043260},
doi = {10.1109/ASAP.2011.6043260},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GilaniKS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Jara-BerrocalG11,
author = {Abelardo Jara{-}Berrocal and
Ann Gordon{-}Ross},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {An integrated development toolset and implementation methodology for
partially reconfigurable system-on-chips},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {219--222},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043272},
doi = {10.1109/ASAP.2011.6043272},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Jara-BerrocalG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KnodelPS11,
author = {Oliver Knodel and
Thomas B. Preu{\ss}er and
Rainer G. Spallek},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Next-generation massively parallel short-read mapping on FPGAs},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {195--201},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043268},
doi = {10.1109/ASAP.2011.6043268},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KnodelPS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LancasterSBC11,
author = {Joseph M. Lancaster and
E. F. Berkley Shands and
Jeremy D. Buhler and
Roger D. Chamberlain},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {TimeTrial: {A} low-impact performance profiler for streaming data
applications},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {69--76},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043238},
doi = {10.1109/ASAP.2011.6043238},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LancasterSBC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LariNHT11,
author = {Vahid Lari and
Andriy Narovlyanskyy and
Frank Hannig and
J{\"{u}}rgen Teich},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Decentralized dynamic resource management support for massively parallel
processor arrays},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {87--94},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043240},
doi = {10.1109/ASAP.2011.6043240},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LariNHT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiL11,
author = {Peng Li and
David J. Lilja},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {A low power fault-tolerance architecture for the kernel density estimation
based image segmentation algorithm},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {161--168},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043264},
doi = {10.1109/ASAP.2011.6043264},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MartinekL11,
author = {Tom{\'{a}}s Mart{\'{\i}}nek and
Matej Lexa},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Architecture model for approximate tandem repeat detection},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {239--242},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043277},
doi = {10.1109/ASAP.2011.6043277},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MartinekL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MikloEW11,
author = {Marko Miklo and
Carl R. Elks and
Ronald D. Williams},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Design of a high performance {FPGA} based fault injector for real-time
safety-critical systems},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {243--246},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043278},
doi = {10.1109/ASAP.2011.6043278},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MikloEW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NaneHSKSB11,
author = {Razvan Nane and
Sven van Haastregt and
Todor P. Stefanov and
Bart Kienhuis and
Vlad Mihai Sima and
Koen Bertels},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {{IP-XACT} extensions for Reconfigurable Computing},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {215--218},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043271},
doi = {10.1109/ASAP.2011.6043271},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NaneHSKSB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NetoTR11,
author = {Jo{\~{a}}o Carlos N{\'{e}}to and
Alexandre F. Tenca and
Wilson Vicente Ruggiero},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {A parallel k-partition method to perform Montgomery Multiplication},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {251--254},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043280},
doi = {10.1109/ASAP.2011.6043280},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NetoTR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NevesA11,
author = {Samuel Neves and
Filipe Ara{\'{u}}jo},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {On the performance of {GPU} public-key cryptography},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {133--140},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043261},
doi = {10.1109/ASAP.2011.6043261},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NevesA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PadmanabhanCC11,
author = {Shobana Padmanabhan and
Yixin Chen and
Roger D. Chamberlain},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Optimal design-space exploration of streaming applications},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {227--230},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043274},
doi = {10.1109/ASAP.2011.6043274},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PadmanabhanCC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PedramGG11,
author = {Ardavan Pedram and
Andreas Gerstlauer and
Robert A. van de Geijn},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {A high-performance, low-power linear algebra core},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {35--42},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043234},
doi = {10.1109/ASAP.2011.6043234},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PedramGG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PengZKH11,
author = {Yanjie Peng and
Kai Zhang and
Andrew G. Klein and
Xinming Huang},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Design and implementation of a belief propagation detector for sparse
channels},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {259--262},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043282},
doi = {10.1109/ASAP.2011.6043282},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PengZKH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Pomante11,
author = {Luigi Pomante},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {System-level design space exploration for dedicated heterogeneous
multi-processor systems},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {79--86},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043239},
doi = {10.1109/ASAP.2011.6043239},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Pomante11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Prasanna11,
author = {Viktor K. Prasanna},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Architectures for Green routers},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {5},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043230},
doi = {10.1109/ASAP.2011.6043230},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Prasanna11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RedlichCF11,
author = {Rodolfo Redlich and
Gonzalo Carvajal and
Miguel E. Figueroa},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {An FPGA-based real-time nonuniformity correction system for Infrared
Focal Plane Arrays},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {202--208},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043269},
doi = {10.1109/ASAP.2011.6043269},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RedlichCF11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShamiH11,
author = {Muhammad Ali Shami and
Ahmed Hemani},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Address generation scheme for a coarse grain reconfigurable architecture},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {17--24},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043232},
doi = {10.1109/ASAP.2011.6043232},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShamiH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SinghPE11,
author = {Shawn Singh and
Seung hyun Pan and
Milos D. Ercegovac},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Accelerating the photon mapping algorithm and its hardware implementation},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {149--157},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043263},
doi = {10.1109/ASAP.2011.6043263},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SinghPE11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SourdisK11,
author = {Ioannis Sourdis and
Sri Harsha Katamaneni},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Longest Prefix Match and updates in Range Tries},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {51--58},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043236},
doi = {10.1109/ASAP.2011.6043236},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SourdisK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/StranoBGY11,
author = {Alessandro Strano and
Davide Bertozzi and
Arnaud Grasset and
Sami Yehia},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Exploiting structural redundancy of {SIMD} accelerators for their
built-in self-testing/diagnosis and reconfiguration},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {141--148},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043262},
doi = {10.1109/ASAP.2011.6043262},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/StranoBGY11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangSCG11,
author = {Guohui Wang and
Yang Sun and
Joseph R. Cavallaro and
Yuanbin Guo},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {High-throughput Contention-Free concurrent interleaver architecture
for multi-standard turbo decoder},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {113--121},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043259},
doi = {10.1109/ASAP.2011.6043259},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WangSCG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X11,
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Message from the conference chairs},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043224},
doi = {10.1109/ASAP.2011.6043224},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XiaoC11,
author = {Chenglong Xiao and
Emmanuel Casseau},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {Efficient custom instruction enumeration for extensible processors},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {211--214},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043270},
doi = {10.1109/ASAP.2011.6043270},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XiaoC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhouGCCZ11,
author = {Changsheng Zhou and
Yunlong Ge and
Xubin Chen and
Yun Chen and
Xiaoyang Zeng},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {An area-Efficient {LDPC} decoder for multi-standard with conflict
resolution},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {105--112},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043258},
doi = {10.1109/ASAP.2011.6043258},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhouGCCZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhouQ11,
author = {Zheng Zhou and
Gang Qu},
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {An energy efficient adaptive event detection scheme for wireless sensor
network},
booktitle = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
pages = {235--238},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/ASAP.2011.6043276},
doi = {10.1109/ASAP.2011.6043276},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhouQ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2011,
editor = {Joseph R. Cavallaro and
Milos D. Ercegovac and
Frank Hannig and
Paolo Ienne and
Earl E. Swartzlander Jr. and
Alexandre F. Tenca},
title = {22nd {IEEE} International Conference on Application-specific Systems,
Architectures and Processors, {ASAP} 2011, Santa Monica, CA, USA,
Sept. 11-14, 2011},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://ieeexplore.ieee.org/xpl/conhome/6033675/proceeding},
isbn = {978-1-4577-1291-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AliasDP10,
author = {Christophe Alias and
Alain Darte and
Alexandru Plesco},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Optimizing {DDR-SDRAM} communications at C-level for automatically-generated
hardware accelerators an experience with the Altera {C2H} {HLS} tool},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {329--332},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540967},
doi = {10.1109/ASAP.2010.5540967},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AliasDP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AntaoBS10,
author = {Samuel Antao and
Jean{-}Claude Bajard and
Leonel Sousa},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Elliptic Curve point multiplication on GPUs},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {192--199},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5541000},
doi = {10.1109/ASAP.2010.5541000},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AntaoBS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AtakA10,
author = {Oguzhan Atak and
Abdullah Atalar},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {An efficient computation model for coarse grained reconfigurable architectures
and its applications to a reconfigurable computer},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {289--292},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5541009},
doi = {10.1109/ASAP.2010.5541009},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AtakA10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AzmanBMBL10,
author = {Amelia W. Azman and
Abbas Bigdeli and
Yasir Mohd{-}Mustafah and
Morteza Biglari{-}Abhari and
Brian C. Lovell},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A Bayesian network-based framework with Constraint Satisfaction Problem
{(CSP)} formulations for {FPGA} system design},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {81--88},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540784},
doi = {10.1109/ASAP.2010.5540784},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AzmanBMBL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BassiriS10,
author = {Maisam Mansub Bassiri and
Hadi Shahriar Shahhoseini},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A New approach in on-line task scheduling for reconfigurable computing
systems},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {321--324},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540975},
doi = {10.1109/ASAP.2010.5540975},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BassiriS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BeiselNP10,
author = {Tobias Beisel and
Manuel Niekamp and
Christian Plessl},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Using shared library interposing for transparent application acceleration
in systems with heterogeneous hardware accelerators},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {65--72},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540798},
doi = {10.1109/ASAP.2010.5540798},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BeiselNP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Brandner10,
author = {Florian Brandner},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Completeness of automatically generated instruction selectors},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {175--182},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540994},
doi = {10.1109/ASAP.2010.5540994},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Brandner10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BrisebarreLMMPE10,
author = {Nicolas Brisebarre and
Nicolas Louvet and
{\'{E}}rik Martin{-}Dorel and
Jean{-}Michel Muller and
Adrien Panhaleux and
Milos D. Ercegovac},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Implementing decimal floating-point arithmetic through binary: Some
suggestions},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {317--320},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540969},
doi = {10.1109/ASAP.2010.5540969},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BrisebarreLMMPE10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CanivetMLVCR10,
author = {Gaetan Canivet and
Paolo Maistri and
R{\'{e}}gis Leveugle and
Fr{\'{e}}d{\'{e}}ric Valette and
Jessy Cl{\'{e}}di{\`{e}}re and
Marc Renaudin},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Dependability analysis of a countermeasure against fault attacks by
means of laser shots onto a SRAM-based {FPGA}},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {115--122},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540765},
doi = {10.1109/ASAP.2010.5540765},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CanivetMLVCR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CheC10,
author = {Weijia Che and
Karam S. Chatha},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Design of an Automatic Target Recognition algorithm on the {IBM} Cell
Broadband Engine},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {21--28},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540770},
doi = {10.1109/ASAP.2010.5540770},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CheC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DaveSG10,
author = {Dhara Dave and
Christos Strydis and
Georgi Gaydadjiev},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {ImpEDE: {A} multidimensional design-space exploration framework for
biomedical-implant processors},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {39--46},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540809},
doi = {10.1109/ASAP.2010.5540809},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/DaveSG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DebGCPBH10,
author = {Sujay Deb and
Amlan Ganguly and
Kevin Chang and
Partha Pratim Pande and
Benjamin Belzer and
Deuk Hyoun Heo},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Enhancing performance of network-on-chip architectures with millimeter-wave
wireless interconnects},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {73--80},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540799},
doi = {10.1109/ASAP.2010.5540799},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DebGCPBH10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DinechinJP10,
author = {Florent de Dinechin and
Mioara Joldes and
Bogdan Pasca},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Automatic generation of polynomial-based hardware architectures for
function evaluation},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {216--222},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540952},
doi = {10.1109/ASAP.2010.5540952},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DinechinJP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DohiBLHS10,
author = {Keisuke Dohi and
Khaled Benkrid and
Cheng Ling and
Tsuyoshi Hamada and
Yuichiro Shibata},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible
GPUs},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {29--36},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540796},
doi = {10.1109/ASAP.2010.5540796},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DohiBLHS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DotanCK10,
author = {Yocheved Dotan and
Orgad Chen and
Gil Katz},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Comparing the robustness of fault-tolerant enhancements when applied
to lookup tables and random logic for nano-computing},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {107--114},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540775},
doi = {10.1109/ASAP.2010.5540775},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DotanCK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DuttaHSK10,
author = {Hritam Dutta and
Frank Hannig and
Moritz Schmid and
Joachim Keinert},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Modeling and synthesis of communication subsystems for loop accelerator
pipelines},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {125--132},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540760},
doi = {10.1109/ASAP.2010.5540760},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DuttaHSK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FanKWG10,
author = {Xin Fan and
Milos Krstic and
Christoph Wolf and
Eckhard Grass},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A {GALS} {FFT} processor with clock modulation for low-EMI applications},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {273--278},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5541014},
doi = {10.1109/ASAP.2010.5541014},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FanKWG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FlochWK10,
author = {Antoine Floch and
Christophe Wolinski and
Krzysztof Kuchcinski},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Combined scheduling and instruction selection for processors with
reconfigurable cell fabric},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {167--174},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540997},
doi = {10.1109/ASAP.2010.5540997},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FlochWK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GbolagadeVC10,
author = {Kazeem Alagbe Gbolagade and
George Razvan Voicu and
Sorin Dan Cotofana},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Memoryless RNS-to-binary converters for the \{2\({}^{\mbox{n+1}}\)
- 1, 2\({}^{\mbox{n}}\), 2\({}^{\mbox{n}}\) - 1\} moduli set},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {301--304},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540979},
doi = {10.1109/ASAP.2010.5540979},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GbolagadeVC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HassanBK10,
author = {Mohamed N. Hassan and
Mohammed Benaissa and
Anastasios Kanakis},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Flexible hardware/software co-design for scalable elliptic curve cryptography
for low-resource applications},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {285--288},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540993},
doi = {10.1109/ASAP.2010.5540993},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HassanBK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HoangJHSSL10,
author = {Tung Thanh Hoang and
Ulf Jalmbrant and
Erik der Hagopian and
Kasyab P. Subramaniyan and
Magnus Sj{\"{a}}lander and
Per Larsson{-}Edefors},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Design space exploration for an embedded processor with flexible datapath
interconnect},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {55--62},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540812},
doi = {10.1109/ASAP.2010.5540812},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HoangJHSSL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JacobBC10,
author = {Arpith C. Jacob and
Jeremy D. Buhler and
Roger D. Chamberlain},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Design of throughput-optimized arrays from recurrence abstractions},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {133--140},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540753},
doi = {10.1109/ASAP.2010.5540753},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JacobBC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Jerraya10,
author = {Ahmed Amine Jerraya},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Convergence of design and fabrication technologies, a key enabler
for {HW-SW} integration},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {3},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540793},
doi = {10.1109/ASAP.2010.5540793},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Jerraya10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JungSB10,
author = {Seung Chul Jung and
Aviral Shrivastava and
Ke Bai},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Dynamic code mapping for limited local memory systems},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {13--20},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540773},
doi = {10.1109/ASAP.2010.5540773},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/JungSB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KamalAKHDN10,
author = {Mehdi Kamal and
Neda Kazemian Amiri and
Arezoo Kamran and
Seyyed Alireza Hoseini and
Masoud Dehyadegari and
Hamid Noori},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Dual-purpose custom instruction identification algorithm based on
Particle Swarm Optimization},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {159--166},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5541012},
doi = {10.1109/ASAP.2010.5541012},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KamalAKHDN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KatahiraSY10,
author = {Kazuya Katahira and
Kentaro Sano and
Satoru Yamamoto},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {FPGA-based lossless compressors of floating-point data streams to
enhance memory bandwidth},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {246--253},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540973},
doi = {10.1109/ASAP.2010.5540973},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KatahiraSY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KavunY10,
author = {Elif Bilge Kavun and
Tolga Yal{\c{c}}in},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A pipelined camellia architecture for compact hardware implementation},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {305--308},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540987},
doi = {10.1109/ASAP.2010.5540987},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KavunY10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KocabasFV10,
author = {{\"{U}}nal Ko{\c{c}}abas and
Junfeng Fan and
Ingrid Verbauwhede},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Implementation of binary edwards curves for very-constrained devices},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {185--191},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5541003},
doi = {10.1109/ASAP.2010.5541003},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KocabasFV10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KuangOKB10,
author = {Heng Kuang and
Olga Ormandjieva and
Stan Klasa and
Jamal Bentahar},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A formal specification of fault-tolerance in prospecting asteroid
mission with Reactive Autonomie Systems Framework},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {99--106},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540769},
doi = {10.1109/ASAP.2010.5540769},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KuangOKB10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiABCL10,
author = {Peng Li and
Kunal Agrawal and
Jeremy Buhler and
Roger D. Chamberlain and
Joseph M. Lancaster},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Deadlock-avoidance for streaming applications with split-join structure:
Two case studies},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {333--336},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540957},
doi = {10.1109/ASAP.2010.5540957},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiABCL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiDS10,
author = {Jian Li and
David Dickin and
Lesley Shannon},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Customizing controller instruction sets for application-specific architectures},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {337--340},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540965},
doi = {10.1109/ASAP.2010.5540965},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiDS10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiHYFMG10,
author = {Chunshu Li and
Kai Huang and
Xiaolang Yan and
Jiong Feng and
De Ma and
Haitong Ge},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A high efficient memory architecture for {H.264/AVC} motion compensation},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {239--245},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540963},
doi = {10.1109/ASAP.2010.5540963},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiHYFMG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiTSC10,
author = {Xun Li and
Mohit Tiwari and
Timothy Sherwood and
Frederic T. Chong},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Function flattening for lease-based, information-leak-free systems},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {349--352},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540946},
doi = {10.1109/ASAP.2010.5540946},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiTSC10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuN10,
author = {Wei Liu and
Alberto Nannarelli},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Power dissipation challenges in multicore floating-point units},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {257--264},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540986},
doi = {10.1109/ASAP.2010.5540986},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiuN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuPFG10,
author = {Shaoshan Liu and
Richard Neil Pittman and
Alessandro Form and
Jean{-}Luc Gaudiot},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {On energy efficiency of reconfigurable systems with run-time partial
reconfiguration},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {265--272},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540985},
doi = {10.1109/ASAP.2010.5540985},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiuPFG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LouvetMP10,
author = {Nicolas Louvet and
Jean{-}Michel Muller and
Adrien Panhaleux},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Newton-Raphson algorithms for floating-point division using an {FMA}},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {200--207},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540948},
doi = {10.1109/ASAP.2010.5540948},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LouvetMP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MajumderSPK10,
author = {Turbo Majumder and
Souradip Sarkar and
Partha Pratim Pande and
Ananth Kalyanaraman},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {An optimized NoC architecture for accelerating {TSP} kernels in breakpoint
median problem},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {89--96},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540797},
doi = {10.1109/ASAP.2010.5540797},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MajumderSPK10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ManleyMG10,
author = {Raymond Manley and
Paul Magrath and
David Gregg},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Code generation for hardware accelerated {AES}},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {345--348},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540955},
doi = {10.1109/ASAP.2010.5540955},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ManleyMG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MasleL10,
author = {Adrien Le Masle and
Wayne Luk},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Design space exploration of parametric pipelined designs},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {47--54},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540815},
doi = {10.1109/ASAP.2010.5540815},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MasleL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Nassif10,
author = {Sani R. Nassif},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {The light at the end of the {CMOS} tunnel},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {4--9},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540756},
doi = {10.1109/ASAP.2010.5540756},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Nassif10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PengCZMG10,
author = {Xiao Peng and
Zhixiang Chen and
Xiongxin Zhao and
Fumiaki Maehara and
Satoshi Goto},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {High parallel variation Banyan network based permutation network for
reconfigurable {LDPC} decoder},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {233--238},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540964},
doi = {10.1109/ASAP.2010.5540964},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PengCZMG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PiatBR10,
author = {Jonathan Piat and
Shuvra S. Bhattacharyya and
Micka{\"{e}}l Raulet},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Loop transformations for interface-based hierarchies {IN} {SDF} graphs},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {341--344},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540954},
doi = {10.1109/ASAP.2010.5540954},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PiatBR10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShahRV10,
author = {Jimit Shah and
K. S. Raghunandan and
Kuruvilla Varghese},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Area optimized {H.264} Intra prediction architecture for 1080p {HD}
resolution},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {297--300},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540989},
doi = {10.1109/ASAP.2010.5540989},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShahRV10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SzeferCL10,
author = {Jakub Szefer and
Yu{-}Yuan Chen and
Ruby B. Lee},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {General-purpose {FPGA} platform for efficient encryption and hashing},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {309--312},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540976},
doi = {10.1109/ASAP.2010.5540976},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SzeferCL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TangLGLG10,
author = {Jie Tang and
Shaoshan Liu and
Zhimin Gu and
Xiao{-}Feng Li and
Jean{-}Luc Gaudiot},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Hardware-assisted middleware: Acceleration of garbage collection operations},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {281--284},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5541011},
doi = {10.1109/ASAP.2010.5541011},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TangLGLG10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TasdemirKN10,
author = {Emrah Tasdemir and
G{\"{o}}tz Kappen and
Tobias G. Noll},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Potential of using block floating point arithmetic in ASIP-based GNSS-receivers},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {293--296},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540988},
doi = {10.1109/ASAP.2010.5540988},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TasdemirKN10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ThomasL10,
author = {David B. Thomas and
Wayne Luk},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {An FPGA-specific algorithm for direct generation of multi-variate
Gaussian random numbers},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {208--215},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5541005},
doi = {10.1109/ASAP.2010.5541005},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ThomasL10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VanderbauwhedeMCP10,
author = {Wim Vanderbauwhede and
Martin Margala and
Sai Rahul Chalamalasetti and
Sohan Purohit},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A C++-embedded Domain-Specific Language for programming the {MORA}
soft processor array},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {141--148},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540750},
doi = {10.1109/ASAP.2010.5540750},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VanderbauwhedeMCP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VayaMBP10,
author = {Guillermo Pay{\'{a}} Vay{\'{a}} and
Javier Mart{\'{\i}}n{-}Langerwerf and
Holger Blume and
Peter Pirsch},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A forwarding-sensitive instruction scheduling approach to reduce register
file constraints in {VLIW} architectures},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {151--158},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5541015},
doi = {10.1109/ASAP.2010.5541015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VayaMBP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VliegenMGBKTV10,
author = {Jo Vliegen and
Nele Mentens and
Jan Genoe and
An Braeken and
Serge Kubera and
Abdellah Touhafi and
Ingrid Verbauwhede},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A compact FPGA-based architecture for elliptic curve cryptography
over prime fields},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {313--316},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540977},
doi = {10.1109/ASAP.2010.5540977},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VliegenMGBKTV10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WrayLP10,
author = {Stephen Wray and
Wayne Luk and
Peter R. Pietzuch},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {Exploring algorithmic trading in reconfigurable hardware},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {325--328},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540966},
doi = {10.1109/ASAP.2010.5540966},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WrayLP10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XiangBHZ10,
author = {Bo Xiang and
Dan Bao and
Shuangqu Huang and
Xiaoyang Zeng},
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {A fully-overlapped multi-mode {QC-LDPC} decoder architecture for mobile
WiMAX applications},
booktitle = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
pages = {225--232},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://doi.org/10.1109/ASAP.2010.5540958},
doi = {10.1109/ASAP.2010.5540958},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XiangBHZ10.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2010,
editor = {Fran{\c{c}}ois Charot and
Frank Hannig and
J{\"{u}}rgen Teich and
Christophe Wolinski},
title = {21st {IEEE} International Conference on Application-specific Systems
Architectures and Processors, {ASAP} 2010, Rennes, France, 7-9 July
2010},
publisher = {{IEEE} Computer Society},
year = {2010},
url = {https://ieeexplore.ieee.org/xpl/conhome/5523683/proceeding},
isbn = {978-1-4244-6967-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2010.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AyoubO09,
author = {Raid Ayoub and
Alex Orailoglu},
title = {Filtering Global History: Power and Performance Efficient Branch Predictor},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {203--206},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.26},
doi = {10.1109/ASAP.2009.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AyoubO09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BennisLT09,
author = {Abderrahmane Bennis and
Miriam Leeser and
Gilead Tadmor},
title = {Implementing a Highly Parameterized Digital {PIV} System on Reconfigurable
Hardware},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {32--37},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.20},
doi = {10.1109/ASAP.2009.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BennisLT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChenS09,
author = {Jun Chen and
James E. Stine},
title = {Parallel Prefix Ling Structures for Modulo 2n-1 Addition},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {16--23},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.43},
doi = {10.1109/ASAP.2009.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChenS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CheungKV09,
author = {Ray C. C. Cheung and
{\c{C}}etin Kaya Ko{\c{c}} and
John D. Villasenor},
title = {A High-Performance Hardware Architecture for Spectral Hash Algorithm},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {215--218},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.31},
doi = {10.1109/ASAP.2009.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CheungKV09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChoBMK09,
author = {Junguk Cho and
Bridget Benson and
Shahnam Mirzaei and
Ryan Kastner},
title = {Parallelized Architecture of Multiple Classifiers for Face Detection},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {75--82},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.38},
doi = {10.1109/ASAP.2009.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChoBMK09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DatlaTM09,
author = {Satyendra R. Datla and
Mitchell A. Thornton and
David W. Matula},
title = {A Low Power High Performance Radix-4 Approximate Squaring Circuit},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {91--97},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.35},
doi = {10.1109/ASAP.2009.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DatlaTM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DormianiEM09,
author = {Pouya Dormiani and
Milos D. Ercegovac and
Jean{-}Michel Muller},
title = {Design and Implementation of a Radix-4 Complex Division Unit with
Prescaling},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {83--90},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.32},
doi = {10.1109/ASAP.2009.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DormianiEM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DuttaZHT09,
author = {Hritam Dutta and
Jiali Zhai and
Frank Hannig and
J{\"{u}}rgen Teich},
title = {Impact of Loop Tiling on the Controller Logic of Acceleration Engines},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {161--168},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.21},
doi = {10.1109/ASAP.2009.21},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DuttaZHT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EslamiBF09,
author = {Fatemeh Eslami and
Amirali Baniasadi and
Mostafa Farahani},
title = {Application Specific Transistor Sizing for Low Power Full Adders},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {195--198},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.23},
doi = {10.1109/ASAP.2009.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EslamiBF09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FidjelandRSL09,
author = {Andreas Fidjeland and
Etienne B. Roesch and
Murray Shanahan and
Wayne Luk},
title = {NeMo: {A} Platform for Neural Modelling of Spiking Neurons Using GPUs},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {137--144},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.24},
doi = {10.1109/ASAP.2009.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FidjelandRSL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FilhoJ09,
author = {Arnaldo P. Azevedo Filho and
Ben H. H. Juurlink},
title = {Scalar Processing Overhead on SIMD-Only Architectures},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {183--190},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.12},
doi = {10.1109/ASAP.2009.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FilhoJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GenserBSHB09,
author = {Andreas Genser and
Christian Bachmann and
Christian Steger and
Jos Hulzink and
Mladen Berekovic},
title = {Low-Power {ASIP} Architecture Exploration and Optimization for Reed-Solomon
Processing},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {177--182},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.15},
doi = {10.1109/ASAP.2009.15},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GenserBSHB09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuerinP09,
author = {Xavier Guerin and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {A System Framework for the Design of Embedded Software Targeting Heterogeneous
Multi-core SoCs},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {153--160},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.9},
doi = {10.1109/ASAP.2009.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GuerinP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HerbordtKD09,
author = {Martin C. Herbordt and
Md. Ashfaquzzaman Khan and
Tony Dean},
title = {Parallel Discrete Event Simulation of Molecular Dynamics Through Event-Based
Decomposition},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {129--136},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.39},
doi = {10.1109/ASAP.2009.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HerbordtKD09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HormigoOQJVZ09,
author = {Javier Hormigo and
Manuel Ortiz and
Francisco J. Quiles and
Francisco J. Jaime and
Julio Villalba and
Emilio L. Zapata},
title = {Efficient Implementation of Carry-Save Adders in FPGAs},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {207--210},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.22},
doi = {10.1109/ASAP.2009.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HormigoOQJVZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JiangP09,
author = {Weirong Jiang and
Viktor K. Prasanna},
title = {A FPGA-based Parallel Architecture for Scalable High-Speed Packet
Classification},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {24--31},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.17},
doi = {10.1109/ASAP.2009.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JiangP09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JinKNJKJ09,
author = {Seunghun Jin and
Dongkyun Kim and
Thuy Tuong Nguyen and
Bongjin Jun and
Daijin Kim and
Jae Wook Jeon},
title = {An FPGA-based Parallel Hardware Architecture for Real-Time Face Detection
Using a Face Certainty Map},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {61--66},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.36},
doi = {10.1109/ASAP.2009.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JinKNJKJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KhanCM09,
author = {Shafqat Khan and
Emmanuel Casseau and
Daniel M{\'{e}}nard},
title = {Reconfigurable {SWP} Operator for Multimedia Processing},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {199--202},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.13},
doi = {10.1109/ASAP.2009.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KhanCM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LamoureuxFL09,
author = {Julien Lamoureux and
Tony Field and
Wayne Luk},
title = {Accelerating a Virtual Ecology Model with FPGAs},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {67--74},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.27},
doi = {10.1109/ASAP.2009.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LamoureuxFL09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LangN09,
author = {Tom{\'{a}}s Lang and
Alberto Nannarelli},
title = {Division Unit for Binary Integer Decimals},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.42},
doi = {10.1109/ASAP.2009.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LangN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiangH09,
author = {Cao Liang and
Xinming Huang},
title = {Mapping Parallel {FFT} Algorithm onto SmartCell Coarse-Grained Reconfigurable
Architecture},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {231--234},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.33},
doi = {10.1109/ASAP.2009.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiangH09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuSM09,
author = {Yongchao Liu and
Bertil Schmidt and
Douglas L. Maskell},
title = {{MSA-CUDA:} Multiple Sequence Alignment on Graphics Processing Units
with {CUDA}},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {121--128},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.14},
doi = {10.1109/ASAP.2009.14},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/LiuSM09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MalitaS09,
author = {Mihaela Malita and
Gheorghe Stefan},
title = {Integral Parallel Architecture {\&} Berkeley's Motifs},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {191--194},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.40},
doi = {10.1109/ASAP.2009.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MalitaS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MartinWKFC09,
author = {Kevin J. M. Martin and
Christophe Wolinski and
Krzysztof Kuchcinski and
Antoine Floch and
Fran{\c{c}}ois Charot},
title = {Constraint-Driven Instructions Selection and Application Scheduling
in the {DURASE} system},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {145--152},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.19},
doi = {10.1109/ASAP.2009.19},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MartinWKFC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MeenderinckJ09,
author = {Cor Meenderinck and
Ben H. H. Juurlink},
title = {Specialization of the Cell {SPE} for Media Applications},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {46--52},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.10},
doi = {10.1109/ASAP.2009.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MeenderinckJ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MembarthKDHT09,
author = {Richard Membarth and
Philipp Kutzer and
Hritam Dutta and
Frank Hannig and
J{\"{u}}rgen Teich},
title = {Acceleration of Multiresolution Imaging Algorithms: {A} Comparative
Study},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {211--214},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.8},
doi = {10.1109/ASAP.2009.8},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MembarthKDHT09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MohdS09,
author = {Bassam Jamil Mohd and
Earl E. Swartzlander Jr.},
title = {A Power-Scalable Switch-Based Multi-processor {FFT}},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {114--120},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.18},
doi = {10.1109/ASAP.2009.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MohdS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NakajimaW09,
author = {Mao Nakajima and
Minoru Watanabe},
title = {A 16-context Optically Reconfigurable Gate Array},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {227--230},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.41},
doi = {10.1109/ASAP.2009.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NakajimaW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PanZ09,
author = {Yangyang Pan and
Tong Zhang},
title = {Improving {VLIW} Processor Performance Using Three-Dimensional {(3D)}
{DRAM} Stacking},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {38--45},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.11},
doi = {10.1109/ASAP.2009.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PanZ09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ParkZC09,
author = {Yong{-}Joon Park and
Zhao Zhang and
Songqing Chen},
title = {Run-Time Detection of Malwares via Dynamic Control-Flow Inspection},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {223--226},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.30},
doi = {10.1109/ASAP.2009.30},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ParkZC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RaoAVSCSMNN09,
author = {Adarsha Rao and
Mythri Alle and
Sainath V and
Reyaz Shaik and
Rajashekhar Chowhan and
Sreeramula Sankaraiah and
Sravanthi Mantha and
S. K. Nandy and
Ranjani Narayan},
title = {An Input Triggered Polymorphic {ASIC} for {H.264} Decoding},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {106--113},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.7},
doi = {10.1109/ASAP.2009.7},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RaoAVSCSMNN09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SankaradassJCCDCG09,
author = {Murugan Sankaradass and
Venkata Jakkula and
Srihari Cadambi and
Srimat T. Chakradhar and
Igor Durdanovic and
Eric Cosatto and
Hans Peter Graf},
title = {A Massively Parallel Coprocessor for Convolutional Neural Networks},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {53--60},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.25},
doi = {10.1109/ASAP.2009.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SankaradassJCCDCG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShoufanWMHS09,
author = {Abdulhadi Shoufan and
Thorsten Wink and
H. Gregor Molter and
Sorin A. Huss and
Falko Strenzke},
title = {A Novel Processor Architecture for McEliece Cryptosystem and {FPGA}
Platforms},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {98--105},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.29},
doi = {10.1109/ASAP.2009.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShoufanWMHS09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/StrydisG09,
author = {Christos Strydis and
Georgi Gaydadjiev},
title = {Evaluating Various Branch-Prediction Schemes for Biomedical-Implant
Processors},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {169--176},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.37},
doi = {10.1109/ASAP.2009.37},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/StrydisG09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TsenGSHC09,
author = {Charles Tsen and
Sonia Gonz{\'{a}}lez{-}Navarro and
Michael J. Schulte and
Brian J. Hickmann and
Katherine Compton},
title = {A Combined Decimal and Binary Floating-Point Multiplier},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {8--15},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.28},
doi = {10.1109/ASAP.2009.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TsenGSHC09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VespaMW09,
author = {Lucas Vespa and
Mini Mathew and
Ning Weng},
title = {{P3FSM:} Portable Predictive Pattern Matching Finite State Machine},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {219--222},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.16},
doi = {10.1109/ASAP.2009.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VespaMW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangHW09,
author = {Kai Zhang and
Xinming Huang and
Zhongfeng Wang},
title = {An Area-Efficient {LDPC} Decoder Architecture and Implementation for
{CMMB} Systems},
booktitle = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
pages = {235--238},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://doi.org/10.1109/ASAP.2009.34},
doi = {10.1109/ASAP.2009.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhangHW09.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2009,
title = {20th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2009, July 7-9, 2009, Boston,
MA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2009},
url = {https://ieeexplore.ieee.org/xpl/conhome/5199994/proceeding},
isbn = {978-0-7695-3732-0},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2009.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AdrshaANN08,
author = {Adarsha Rao and
Mythri Alle and
S. K. Nandy and
Ranjani Narayan},
title = {Architecture of a polymorphic {ASIC} for interoperability across multi-mode
{H.264} decoders},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {287--292},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580193},
doi = {10.1109/ASAP.2008.4580193},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AdrshaANN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AlleVRNFRNN08,
author = {Mythri Alle and
Keshavan Varadarajan and
Ramesh C. Ramesh and
Joseph Nimmy and
Alexander Fell and
Adarsha Rao and
S. K. Nandy and
Ranjani Narayan},
title = {Synthesis of application accelerators on Runtime Reconfigurable Hardware},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {13--18},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580147},
doi = {10.1109/ASAP.2008.4580147},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/AlleVRNFRNN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AmaricaiVUPB08,
author = {Alexandru Amaricai and
Mircea Vladutiu and
Mihai Udrescu and
Lucian Prodan and
Oana Boncalo},
title = {Floating point multiplication rounding schemes for interval arithmetic},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {19--24},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580148},
doi = {10.1109/ASAP.2008.4580148},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AmaricaiVUPB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AtasuMLOD08,
author = {Kubilay Atasu and
Oskar Mencer and
Wayne Luk and
Can C. {\"{O}}zturan and
G{\"{u}}nhan D{\"{u}}ndar},
title = {Fast custom instruction identification by convex subgraph enumeration},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580145},
doi = {10.1109/ASAP.2008.4580145},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AtasuMLOD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AticiBFVY08,
author = {Ali Can Atici and
Lejla Batina and
Junfeng Fan and
Ingrid Verbauwhede and
Siddika Berna {\"{O}}rs},
title = {Low-cost implementations of {NTRU} for pervasive security},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {79--84},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580158},
doi = {10.1109/ASAP.2008.4580158},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AticiBFVY08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BalasubramanianCBRD08,
author = {Sundar Balasubramanian and
Harold W. Carter and
Andrey Bogdanov and
Andy Rupp and
Jintai Ding},
title = {Fast multivariate signature generation in hardware: The case of rainbow},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {25--30},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580149},
doi = {10.1109/ASAP.2008.4580149},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BalasubramanianCBRD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BraganzaL08,
author = {Sherman Braganza and
Miriam Leeser},
title = {An efficient implementation of a phase unwrapping kernel on reconfigurable
hardware},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {138--143},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580168},
doi = {10.1109/ASAP.2008.4580168},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BraganzaL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BrisebarreCEMT08,
author = {Nicolas Brisebarre and
Sylvain Chevillard and
Milos D. Ercegovac and
Jean{-}Michel Muller and
Serge Torres},
title = {An efficient method for evaluating polynomial and rational function
approximations},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {233--238},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580185},
doi = {10.1109/ASAP.2008.4580185},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BrisebarreCEMT08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BrisebarreDM08,
author = {Nicolas Brisebarre and
Florent de Dinechin and
Jean{-}Michel Muller},
title = {Integer and floating-point constant multipliers for FPGAs},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {239--244},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580184},
doi = {10.1109/ASAP.2008.4580184},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BrisebarreDM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DalalSH08,
author = {Ishaan L. Dalal and
Deian Stefan and
Jared Harwayne{-}Gidansky},
title = {Low discrepancy sequences for Monte Carlo simulations on reconfigurable
platforms},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {108--113},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580163},
doi = {10.1109/ASAP.2008.4580163},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DalalSH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DashS08,
author = {Santanu Kumar Dash and
Thambipillai Srikanthan},
title = {Rapid estimation of instruction cache hit rates using loop profiling},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {263--268},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580189},
doi = {10.1109/ASAP.2008.4580189},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DashS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DickinS08,
author = {David Dickin and
Lesley Shannon},
title = {Extending the {SIMPPL} SoC architectural framework to support application-specific
architectures on multi-FPGA platforms},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {67--72},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580156},
doi = {10.1109/ASAP.2008.4580156},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DickinS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DivyasreeRV08,
author = {J. Divyasree and
H. Rajashekar and
Kuruvilla Varghese},
title = {Dynamically reconfigurable regular expression matching architecture},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {120--125},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580165},
doi = {10.1109/ASAP.2008.4580165},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DivyasreeRV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FlattBHSP08,
author = {Holger Flatt and
Steffen Blume and
Sebastian Hesselbarth and
Torsten Sch{\"{u}}nemann and
Peter Pirsch},
title = {A parallel hardware architecture for connected component labeling
based on fast label merging},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {144--149},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580169},
doi = {10.1109/ASAP.2008.4580169},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FlattBHSP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GarciaBA08,
author = {Andres Garcia and
Mladen Berekovic and
Tom Vander Aa},
title = {Mapping of the {AES} cryptographic algorithm on a Coarse-Grain reconfigurable
array processor},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {245--250},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580186},
doi = {10.1109/ASAP.2008.4580186},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/GarciaBA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuanF08,
author = {Xuan Guan and
Yunsi Fei},
title = {Reducing power consumption of embedded processors through register
file partitioning and compiler support},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {269--274},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580190},
doi = {10.1109/ASAP.2008.4580190},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GuanF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuntoroG08,
author = {Andre Guntoro and
Manfred Glesner},
title = {Novel approach on lifting-based {DWT} and {IDWT} processor with multi-context
configuration to support different wavelet filters},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {299--304},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580195},
doi = {10.1109/ASAP.2008.4580195},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GuntoroG08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HaixinGH08,
author = {Haixin Wang and
Guoqiang Bai and
Hongyi Chen},
title = {Zodiac: System architecture implementation for a high-performance
Network Security Processor},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {91--96},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580160},
doi = {10.1109/ASAP.2008.4580160},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HaixinGH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HilewitzLL08,
author = {Yedidya Hilewitz and
C{\'{e}}dric Lauradoux and
Ruby B. Lee},
title = {Bit matrix multiplication in commodity processors},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {7--12},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580146},
doi = {10.1109/ASAP.2008.4580146},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HilewitzLL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HosseinabadyN08,
author = {Mohammad Hosseinabady and
Jos{\'{e}} L. N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez},
title = {Fault-tolerant dynamically reconfigurable NoC-based SoC},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {31--36},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580150},
doi = {10.1109/ASAP.2008.4580150},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HosseinabadyN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JacobBC08,
author = {Arpith C. Jacob and
Jeremy Buhler and
Roger D. Chamberlain},
title = {Accelerating Nussinov {RNA} secondary structure prediction with systolic
arrays on FPGAs},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {191--196},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580177},
doi = {10.1109/ASAP.2008.4580177},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JacobBC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JovanovicTW08,
author = {Slavisa Jovanovic and
Camel Tanougast and
Serge Weber},
title = {A new high-performance scalable dynamic interconnection for FPGA-based
reconfigurable systems},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {61--66},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580155},
doi = {10.1109/ASAP.2008.4580155},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JovanovicTW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KhanNRED08,
author = {Jehangir Khan and
Sma{\"{\i}}l Niar and
Atika Rivenq and
Yassin Elhillali and
Jean{-}Luc Dekeyser},
title = {An MPSoC architecture for the Multiple Target Tracking application
in driver assistant system},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {126--131},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580166},
doi = {10.1109/ASAP.2008.4580166},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KhanNRED08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KiasariHS08,
author = {Abbas Eslami Kiasari and
Shaahin Hessabi and
Hamid Sarbazi{-}Azad},
title = {{PERMAP:} {A} performance-aware mapping for application-specific SoCs},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {73--78},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580157},
doi = {10.1109/ASAP.2008.4580157},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KiasariHS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KnezzevicSLV08,
author = {Miroslav Knezevic and
Kazuo Sakiyama and
Yong Ki Lee and
Ingrid Verbauwhede},
title = {On the high-throughput implementation of {RIPEMD-160} hash algorithm},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {85--90},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580159},
doi = {10.1109/ASAP.2008.4580159},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KnezzevicSLV08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KobayashiJRCI08,
author = {Yuki Kobayashi and
Murali Jayapala and
Praveen Raghavan and
Francky Catthoor and
Masaharu Imai},
title = {Operation shuffling over cycle boundaries for low energy {L0} clustering},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {150--155},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580170},
doi = {10.1109/ASAP.2008.4580170},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KobayashiJRCI08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KundetiFR08,
author = {Vamsi Kundeti and
Yunsi Fei and
Sanguthevar Rajasekaran},
title = {An efficient digital circuit for implementing Sequence Alignment algorithm
in an extended processor},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {156--161},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580171},
doi = {10.1109/ASAP.2008.4580171},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KundetiFR08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LangenJ08,
author = {Pepijn J. de Langen and
Ben H. H. Juurlink},
title = {Memory copies in multi-level memory systems},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {281--286},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580192},
doi = {10.1109/ASAP.2008.4580192},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LangenJ08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeSYM08,
author = {Jason Lee and
Lesley Shannon and
Matthew J. Yedlin and
Gary F. Margrave},
title = {A multi-FPGA application-specific architecture for accelerating a
floating point Fourier Integral Operator},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {197--202},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580178},
doi = {10.1109/ASAP.2008.4580178},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeSYM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LlorenteKWH08,
author = {Daniel Llorente and
Kimon Karras and
Thomas Wild and
Andreas Herkersdorf},
title = {Buffer allocation for advanced packet segmentation in Network Processors},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {221--226},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580182},
doi = {10.1109/ASAP.2008.4580182},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LlorenteKWH08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LorunserQMPWHSWPN08,
author = {Thomas Lor{\"{u}}nser and
Edwin Querasser and
Thomas Matyus and
Momtchil Peev and
Johannes Wolkerstorfer and
Michael Hutter and
Alexander Szekely and
Ilse Wimberger and
Christian Pfaffel{-}Janser and
Andreas Neppach},
title = {Security processor with quantum key distribution},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {37--42},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580151},
doi = {10.1109/ASAP.2008.4580151},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LorunserQMPWHSWPN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MbayeBSP08,
author = {Maria Mbaye and
Normand B{\'{e}}langer and
Yvon Savaria and
Samuel Pierre},
title = {Loop-oriented metrics for exploring an application-specific architecture
design-space},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {257--262},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580188},
doi = {10.1109/ASAP.2008.4580188},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MbayeBSP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Meher08,
author = {Pramod Kumar Meher},
title = {Efficient systolization of cyclic convolution for systolic implementation
of sinusoidal transforms},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {97--101},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580161},
doi = {10.1109/ASAP.2008.4580161},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Meher08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MeherP08,
author = {Pramod Kumar Meher and
Jagdish Chandra Patra},
title = {Fully-pipelined efficient architectures for {FPGA} realization of
discrete Hadamard transform},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {43--48},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580152},
doi = {10.1109/ASAP.2008.4580152},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MeherP08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MirzaeiIKWC08,
author = {Shahnam Mirzaei and
Ali Irturk and
Ryan Kastner and
Brad T. Weals and
Richard E. Cagley},
title = {Design space exploration of a cooperative {MIMO} receiver for reconfigurable
architectures},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {167--172},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580173},
doi = {10.1109/ASAP.2008.4580173},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MirzaeiIKWC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MohantyM08,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Concurrent systolic architecture for high-throughput implementation
of 3-dimensional discrete wavelet transform},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {162--166},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580172},
doi = {10.1109/ASAP.2008.4580172},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MohantyM08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MohantyM08a,
author = {Basant K. Mohanty and
Pramod Kumar Meher},
title = {Throughput-scalable hybrid-pipeline architecture for multilevel lifting
2-D {DWT} of {JPEG} 2000 coder},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {305--309},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580196},
doi = {10.1109/ASAP.2008.4580196},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MohantyM08a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NakajimaW08,
author = {Mao Nakajima and
Minoru Watanabe},
title = {Dynamic holographic reconfiguration on a four-context {ODRGA}},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {173--178},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580174},
doi = {10.1109/ASAP.2008.4580174},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NakajimaW08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NimmyRVAFNN08,
author = {Joseph Nimmy and
C. Ramesh Reddy and
Keshavan Varadarajan and
Mythri Alle and
Alexander Fell and
S. K. Nandy and
Ranjani Narayan},
title = {{RECONNECT:} {A} NoC for polymorphic ASICs using a low overhead single
cycle router},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {251--256},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580187},
doi = {10.1109/ASAP.2008.4580187},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/NimmyRVAFNN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OsorioB08,
author = {Roberto R. Osorio and
Javier D. Bruguera},
title = {An {FPGA} architecture for {CABAC} decoding in manycore systems},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {293--298},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580194},
doi = {10.1109/ASAP.2008.4580194},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OsorioB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PardoMC08,
author = {Fernando Pardo and
Paula L{\'{o}}pez Martinez and
Diego Cabello},
title = {FPGA-based hardware accelerator of the heat equation with applications
on infrared thermography},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {179--184},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580175},
doi = {10.1109/ASAP.2008.4580175},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PardoMC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RahmatySN08,
author = {Masih Rahmaty and
Mohammad S. Sadri and
Mehdi Ataei Naeini},
title = {{FPGA} based singular value decomposition for image processing applications},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {185--190},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580176},
doi = {10.1109/ASAP.2008.4580176},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RahmatySN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RajoreGJN08,
author = {Ritesh Rajore and
Ganesh Garga and
H. S. Jamadagni and
S. K. Nandy},
title = {Reconfigurable Viterbi decoder on mesh connected multiprocessor architecture},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {49--54},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580153},
doi = {10.1109/ASAP.2008.4580153},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/RajoreGJN08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/RamdasEAB08,
author = {Tirath Ramdas and
Gregory K. Egan and
David Abramson and
Kim K. Baldridge},
title = {Run-time thread sorting to expose data-level parallelism},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {55--60},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580154},
doi = {10.1109/ASAP.2008.4580154},
timestamp = {Tue, 20 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/RamdasEAB08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SunZGC08,
author = {Yang Sun and
Yuming Zhu and
Manish Goel and
Joseph R. Cavallaro},
title = {Configurable and scalable high throughput turbo decoder architecture
for multiple 4G wireless standards},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {209--214},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580180},
doi = {10.1109/ASAP.2008.4580180},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SunZGC08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TavaresKMF08,
author = {Marcos B. S. Tavares and
Steffen Kunze and
Emil Mat{\'{u}}s and
Gerhard P. Fettweis},
title = {Architecture and {VLSI} realization of a high-speed programmable decoder
for {LDPC} convolutional codes},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {215--220},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580181},
doi = {10.1109/ASAP.2008.4580181},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TavaresKMF08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ThomasL08,
author = {David B. Thomas and
Wayne Luk},
title = {Resource efficient generators for the floating-point uniform and exponential
distributions},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {102--107},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580162},
doi = {10.1109/ASAP.2008.4580162},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ThomasL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TumeoMPFS08,
author = {Antonino Tumeo and
Matteo Monchiero and
Gianluca Palermo and
Fabrizio Ferrandi and
Donatella Sciuto},
title = {Lightweight {DMA} management mechanisms for multiprocessors on {FPGA}},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {275--280},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580191},
doi = {10.1109/ASAP.2008.4580191},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TumeoMPFS08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VanderperrenD08,
author = {Yves Vanderperren and
Wim Dehaene},
title = {A subsampling pulsed {UWB} demodulator based on a flexible complex
{SVD}},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {114--119},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580164},
doi = {10.1109/ASAP.2008.4580164},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VanderperrenD08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VazquezA08,
author = {{\'{A}}lvaro V{\'{a}}zquez and
Elisardo Antelo},
title = {New insights on Ling adders},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {227--232},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580183},
doi = {10.1109/ASAP.2008.4580183},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VazquezA08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YiuHGLSL08,
author = {Ka Fai Cedric Yiu and
Chun Hok Ho and
Nedelko Grbic and
Yao Lu and
Xiaoxiang Shi and
Wayne Luk},
title = {Reconfigurable acceleration of microphone array algorithms for speech
enhancement},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {203--208},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580179},
doi = {10.1109/ASAP.2008.4580179},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YiuHGLSL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangL08,
author = {Wangyuan Zhang and
Tao Li},
title = {Managing multi-core soft-error reliability through utility-driven
cross domain optimization},
booktitle = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
pages = {132--137},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://doi.org/10.1109/ASAP.2008.4580167},
doi = {10.1109/ASAP.2008.4580167},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhangL08.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2008,
title = {19th {IEEE} International Conference on Application-Specific Systems,
Architectures and Processors, {ASAP} 2008, July 2-4, 2008, Leuven,
Belgium},
publisher = {{IEEE} Computer Society},
year = {2008},
url = {https://ieeexplore.ieee.org/xpl/conhome/4569858/proceeding},
isbn = {978-1-4244-1897-8},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2008.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AguiarKSS07,
author = {Alexandra Aguiar and
M{\'{a}}rcio Eduardo Kreutz and
Rafael Santos and
Tatiana Santos},
title = {Design Flow of a Dedicated Computer Cluster Customized for a Distributed
Genetic Algorithm Application},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {148--153},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429972},
doi = {10.1109/ASAP.2007.4429972},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AguiarKSS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AlamVS07,
author = {Sadaf R. Alam and
Jeffrey S. Vetter and
Melissa C. Smith},
title = {An Application Specific Memory Characterization Technique for Co-processor
Accelerators},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {353--358},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459289},
doi = {10.1109/ASAP.2007.4459289},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AlamVS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AlimohammadFCS07,
author = {Amirhossein Alimohammad and
Saeed Fouladi Fard and
Bruce F. Cockburn and
Christian Schlegel},
title = {A Compact Fading Channel Simulator Using Timing-Driven Resource Sharing},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {154--159},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429973},
doi = {10.1109/ASAP.2007.4429973},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AlimohammadFCS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ArmstrongP07,
author = {D. A. Armstrong and
M. W. Pearson},
title = {A Rapid Prototyping Platform for Wireless Medium Access Control Protocols},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {403--408},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459297},
doi = {10.1109/ASAP.2007.4459297},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ArmstrongP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AzarmehrM07,
author = {Mahzad Azarmehr and
Roberto Muscedere},
title = {A Simple Central Processing Unit with Multi-Dimensional Logarithmic
Number System Extensions},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {342--345},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4430003},
doi = {10.1109/ASAP.2007.4430003},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AzarmehrM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BayrakciA07,
author = {Alp Arslan Bayrakci and
Ahmet Akkas},
title = {Reduced Delay {BCD} Adder},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {266--271},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429991},
doi = {10.1109/ASAP.2007.4429991},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BayrakciA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BimbergTMF07,
author = {Marcel Bimberg and
Marcos B. S. Tavares and
Emil Mat{\'{u}}s and
Gerhard P. Fettweis},
title = {A High-Throughput Programmable Decoder for {LDPC} Convolutional Codes},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {239--246},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429987},
doi = {10.1109/ASAP.2007.4429987},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BimbergTMF07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BonziniP07,
author = {Paolo Bonzini and
Laura Pozzi},
title = {A Retargetable Framework for Automated Discovery of Custom Instructions},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {334--341},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4430002},
doi = {10.1109/ASAP.2007.4430002},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BonziniP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BouchebabaBLPN07,
author = {Youcef Bouchebaba and
Essaid Bensoudane and
Bruno Lavigueur and
Pierre G. Paulin and
Gabriela Nicolescu},
title = {Two-level tiling for MPSoC architecture},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {314--319},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429999},
doi = {10.1109/ASAP.2007.4429999},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BouchebabaBLPN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BourduasZ07,
author = {Stephan Bourduas and
Zeljko Zilic},
title = {Latency Reduction of Global Traffic in Wormhole-Routed Meshes Using
Hierarchical Rings for Global Routing},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {302--307},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429997},
doi = {10.1109/ASAP.2007.4429997},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BourduasZ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BoustanyLB07,
author = {C. Boustany and
Ahmed Lakhsasi and
Mohammed Bougataya},
title = {Design and implementation of a surface peak thermal detector algorithm},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {234--238},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429986},
doi = {10.1109/ASAP.2007.4429986},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BoustanyLB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BraganzaL07,
author = {Sherman Braganza and
Miriam Leeser},
title = {The 1D Discrete Cosine Transform For Large Point Sizes Implemented
On Reconfigurable Hardware},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {101--106},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429965},
doi = {10.1109/ASAP.2007.4429965},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BraganzaL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CalderonGV07,
author = {Humberto Calderon and
Georgi Gaydadjiev and
Stamatis Vassiliadis},
title = {Reconfigurable Universal Adder},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {186--191},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429978},
doi = {10.1109/ASAP.2007.4429978},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CalderonGV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CollangeDD07,
author = {Caroline Collange and
Marc Daumas and
David Defour},
title = {Graphic processors to speed-up simulations for the design of high
performance solar receptors},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {377--382},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459293},
doi = {10.1109/ASAP.2007.4459293},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CollangeDD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CopeCL07,
author = {Ben Cope and
Peter Y. K. Cheung and
Wayne Luk},
title = {Bridging the Gap between FPGAs and Multi-Processor Architectures:
{A} Video Processing Perspective},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {308--313},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429998},
doi = {10.1109/ASAP.2007.4429998},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CopeCL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DarteQ07,
author = {Alain Darte and
C. Quinson},
title = {Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {140--147},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429971},
doi = {10.1109/ASAP.2007.4429971},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DarteQ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DerrienQ07,
author = {Steven Derrien and
Patrice Quinton},
title = {Parallelizing {HMMER} for Hardware Acceleration on FPGAs},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {10--17},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429951},
doi = {10.1109/ASAP.2007.4429951},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DerrienQ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DouZLZ07,
author = {Yong Dou and
Jie Zhou and
Yuanwu Lei and
Xingming Zhou},
title = {{FPGA} {SAR} Processor with Window Memory Accesses},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {95--100},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429964},
doi = {10.1109/ASAP.2007.4429964},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DouZLZ07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DuarteW07,
author = {Filipa Duarte and
Stephan Wong},
title = {A memcpy Hardware Accelerator Solution for Non Cache-line Aligned
Copies},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {397--402},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459296},
doi = {10.1109/ASAP.2007.4459296},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DuarteW07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ErcegovacM07,
author = {Milos D. Ercegovac and
Jean{-}Michel Muller},
title = {A Hardware-Oriented Method for Evaluating Complex Polynomials},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {122--127},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429968},
doi = {10.1109/ASAP.2007.4429968},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ErcegovacM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FaruqueH07,
author = {Mohammad Abdullah Al Faruque and
J{\"{o}}rg Henkel},
title = {Transaction Specific Virtual Channel Allocation in QoS Supported On-chip
Communication},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {48--53},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429957},
doi = {10.1109/ASAP.2007.4429957},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FaruqueH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GaoCAL07,
author = {Shuli Gao and
Noureddine Chabini and
Dhamin Al{-}Khalili and
J. M. Pierre Langlois},
title = {FPGA-Based Efficient Design Approach for Large-Size Two's Complement
Squarers},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {18--23},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429952},
doi = {10.1109/ASAP.2007.4429952},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GaoCAL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuoLMF07,
author = {Jie Guo and
Jun Liu and
Bj{\"{o}}rn Mennenga and
Gerhard P. Fettweis},
title = {A Phase-Coupled Compiler Backend for a New {VLIW} Processor Architecture
Using Two-step Register Allocation},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {346--352},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459288},
doi = {10.1109/ASAP.2007.4459288},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GuoLMF07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HanninenT07,
author = {Ismo H{\"{a}}nninen and
Jarmo Takala},
title = {Robust Adders Based on Quantum-Dot Cellular Automata},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {391--396},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459295},
doi = {10.1109/ASAP.2007.4459295},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HanninenT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HuangGT07,
author = {Kai Huang and
D. Grunert and
Lothar Thiele},
title = {Windowed FIFOs for FPGA-based Multiprocessor Systems},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {36--41},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429955},
doi = {10.1109/ASAP.2007.4429955},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HuangGT07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HurSWV07,
author = {Jae Young Hur and
Todor P. Stefanov and
Stephan Wong and
Stamatis Vassiliadis},
title = {Customizing Reconfigurable On-Chip Crossbar Scheduler},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {210--215},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429982},
doi = {10.1109/ASAP.2007.4429982},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HurSWV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/IbrahimB07,
author = {Walid Ibrahim and
Valeriu Beiu},
title = {Long Live Small Fan-in Majority Gates Their Reign Looks Like Coming!},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {278--283},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429993},
doi = {10.1109/ASAP.2007.4429993},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/IbrahimB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JiSQK07,
author = {Weixing Ji and
Feng Shi and
Baojun Qiao and
Muhammad Kamran},
title = {The Design of a Novel Object-oriented Processor : {OOMIPS}},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {198--203},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429980},
doi = {10.1109/ASAP.2007.4429980},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JiSQK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JosephsonLL07,
author = {William Josephson and
Ruby B. Lee and
Kai Li},
title = {{ISA} Support for Fingerprinting and Erasure Codes},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {415--422},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459299},
doi = {10.1109/ASAP.2007.4459299},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JosephsonLL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KappenBPN07,
author = {G{\"{o}}tz Kappen and
S. el Bahri and
O. Priebe and
Tobias G. Noll},
title = {Evaluation of a Tightly Coupled {ASIP} / Co-Processor Architecture
Used in {GNSS} Receivers},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {296--301},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429996},
doi = {10.1109/ASAP.2007.4429996},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KappenBPN07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KikkeriS07,
author = {Nikhil Kikkeri and
Peter{-}Michael Seidel},
title = {An {FPGA} Implementation of a Fully Verified Double Precision {IEEE}
Floating-Point Adder},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {83--88},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429962},
doi = {10.1109/ASAP.2007.4429962},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KikkeriS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KooFHG07,
author = {Jahyun J. Koo and
David Fern{\'{a}}ndez and
Ashraf Haddad and
Warren J. Gross},
title = {Evaluation of a High-Level-Language Methodology for High-Performance
Reconfigurable Computers},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {30--35},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429954},
doi = {10.1109/ASAP.2007.4429954},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KooFHG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Kouadri-MostefaouiSP07,
author = {Abdellah{-}Medjadji Kouadri{-}Mostefaoui and
Benaoumeur Senouci and
Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
title = {Scalable Multi-FPGA Platform for Networks-On-Chip Emulation},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {54--60},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429958},
doi = {10.1109/ASAP.2007.4429958},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Kouadri-MostefaouiSP07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KoziriDSK07,
author = {Maria G. Koziri and
Antonios N. Dadaliaris and
Georgios I. Stamoulis and
Ioannis Katsavounidis},
title = {A Novel Low-Power Motion Estimation Design for {H.264}},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {247--252},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429988},
doi = {10.1109/ASAP.2007.4429988},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KoziriDSK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LamS07,
author = {Siew Kei Lam and
Thambipillai Srikanthan},
title = {Estimating Area Costs of Custom Instructions for FPGA-based Reconfigurable
Processors},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {89--94},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429963},
doi = {10.1109/ASAP.2007.4429963},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LamS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeLC07,
author = {Imyong Lee and
Dongwook Lee and
Kiyoung Choi},
title = {Memory Operation Inclusive Instruction-Set Extensions and Data Path
Generation},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {383--390},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459294},
doi = {10.1109/ASAP.2007.4459294},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeLC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiaoJS07,
author = {Xiongfei Liao and
Wu Jigang and
Thambipillai Srikanthan},
title = {Temperature-Aware Submesh Allocation Scheme for Heat Balancing on
Chip-Multiprocessors},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {228--233},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429985},
doi = {10.1109/ASAP.2007.4429985},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiaoJS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LuMS07,
author = {Liang Lu and
John V. McCanny and
Sakir Sezer},
title = {Reconfigurable Motion Estimation Architecture for Multi-standard Video
Compression},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {253--259},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429989},
doi = {10.1109/ASAP.2007.4429989},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LuMS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MamidiSIG07,
author = {Suman Mamidi and
Michael J. Schulte and
Daniel Iancu and
C. John Glossner},
title = {Architecture Support for Reconfigurable Multithreaded Processors in
Programmable Communication Systems},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {320--327},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4430000},
doi = {10.1109/ASAP.2007.4430000},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MamidiSIG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MedirattaD07,
author = {Sumit D. Mediratta and
Jeffrey T. Draper},
title = {Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip
Router},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {69--75},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429960},
doi = {10.1109/ASAP.2007.4429960},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MedirattaD07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Meher07,
author = {Pramod Kumar Meher},
title = {Systolic Formulation for Low-Complexity Serial-Parallel Implementation
of Unified Finite Field Multiplication over GF(2\({}^{\mbox{m}}\))},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429970},
doi = {10.1109/ASAP.2007.4429970},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Meher07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MontgomeryA07,
author = {David Montgomery and
Ali Akoglu},
title = {Methodology and Toolset for {ASIP} Design and Development Targeting
Cryptography-Based Applications},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {365--370},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459291},
doi = {10.1109/ASAP.2007.4459291},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MontgomeryA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NgoGA07,
author = {Hau T. Ngo and
Satyanadh Gundimada and
Vijayan K. Asari},
title = {Design and Implementation of an Efficient and Power-Aware Architecture
for Skin Segmentation in Color Video Stream},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {216--221},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429983},
doi = {10.1109/ASAP.2007.4429983},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NgoGA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NibbelinkRM07,
author = {K. Nibbelink and
Sanjay V. Rajopadhye and
Richard McConnell},
title = {0/1 Knapsack on Hardware: {A} Complete Solution},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {160--167},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429974},
doi = {10.1109/ASAP.2007.4429974},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NibbelinkRM07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OsorioB07,
author = {Roberto R. Osorio and
Javier D. Bruguera},
title = {Entropy Coding on a Programmable Processor Array for Multimedia SoC},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {222--227},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429984},
doi = {10.1109/ASAP.2007.4429984},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OsorioB07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PalermoMSLC07,
author = {Gianluca Palermo and
Giovanni Mariani and
Cristina Silvano and
Riccardo Locatelli and
Marcello Coppola},
title = {Mapping and Topology Customization Approaches for Application-Specific
STNoC Designs},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {61--68},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429959},
doi = {10.1109/ASAP.2007.4429959},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PalermoMSLC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ParkZL07,
author = {Yong{-}Joon Park and
Zhao Zhang and
Gyungho Lee},
title = {An Efficient Hardware Support for Control Data Validation},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {409--414},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459298},
doi = {10.1109/ASAP.2007.4459298},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ParkZL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PengQLYC07,
author = {Jianying Peng and
Xing Qin and
Dexian Li and
Xiaolang Yan and
Xiexiong Chen},
title = {An Efficient {SIMD} Architecture with Parallel Memory for 2D Cosine
Transforms of Video Coding},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {260--265},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429990},
doi = {10.1109/ASAP.2007.4429990},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PengQLYC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QuZCC07,
author = {Ning Qu and
Yansong Zheng and
Wei Cao and
Xu Cheng},
title = {{GISP:} {A} Transparent Superpage Support Framework for Linux},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {359--364},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459290},
doi = {10.1109/ASAP.2007.4459290},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/QuZCC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QuachZG07,
author = {Nhut Thanh Quach and
Bahman Zafarifar and
Georgi Gaydadjiev},
title = {Real-time FPGA-implementation for blue-sky Detection},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {76--82},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429961},
doi = {10.1109/ASAP.2007.4429961},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/QuachZG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SarmdiH07,
author = {Siavash Bayat Sarmadi and
M. Anwar Hasan},
title = {Run-Time Error Detection in Polynomial Basis Multiplication Using
Linear Codes},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {204--209},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429981},
doi = {10.1109/ASAP.2007.4429981},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SarmdiH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SchwarzC07,
author = {Eric M. Schwarz and
Steven R. Carlough},
title = {Power6 Decimal Divide},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429969},
doi = {10.1109/ASAP.2007.4429969},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SchwarzC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShahbahramiJV07,
author = {Asadollah Shahbahrami and
Ben H. H. Juurlink and
Stamatis Vassiliadis},
title = {{SIMD} Vectorization of Histogram Functions},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {174--179},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429976},
doi = {10.1109/ASAP.2007.4429976},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShahbahramiJV07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShiJQLH07,
author = {Feng Shi and
Weixing Ji and
Baojun Qiao and
Bin Liu and
Haroon{-}ul{-}Rashid},
title = {A Triplet-based Computer Architecture Supporting Parallel Object Computing},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {192--197},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429979},
doi = {10.1109/ASAP.2007.4429979},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShiJQLH07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ThomasBL07,
author = {David B. Thomas and
Jacob A. Bower and
Wayne Luk},
title = {Automatic Generation and Optimisation of Reconfigurable Financial
Monte-Carlo Simulations},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {168--173},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429975},
doi = {10.1109/ASAP.2007.4429975},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ThomasBL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TsenSG07,
author = {Charles Tsen and
Michael J. Schulte and
Sonia Gonz{\'{a}}lez{-}Navarro},
title = {Hardware Design of a Binary Integer Decimal-based {IEEE} {P754} Rounding
Unit},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {115--121},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429967},
doi = {10.1109/ASAP.2007.4429967},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TsenSG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TumeoMPFS07,
author = {Antonino Tumeo and
Matteo Monchiero and
Gianluca Palermo and
Fabrizio Ferrandi and
Donatella Sciuto},
title = {A Self-Reconfigurable Implementation of the {JPEG} Encoder},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {24--29},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429953},
doi = {10.1109/ASAP.2007.4429953},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TumeoMPFS07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VillalbaHL07,
author = {Julio Villalba and
Javier Hormigo and
Tom{\'{a}}s Lang},
title = {Improving the Throughput of On-line Addition for Data Streams},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {272--277},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429992},
doi = {10.1109/ASAP.2007.4429992},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VillalbaHL07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VouzisCA07,
author = {Panagiotis D. Vouzis and
Caroline Collange and
Mark G. Arnold},
title = {{LNS} Subtraction Using Novel Cotransformation and/or Interpolation},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {107--114},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429966},
doi = {10.1109/ASAP.2007.4429966},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VouzisCA07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangCC07,
author = {Wei{-}Ting Wang and
Yi{-}Chi Chen and
Chung{-}Ping Chung},
title = {A Run-Time Reconfigurable Fabric for 3D Texture Filtering},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {180--185},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429977},
doi = {10.1109/ASAP.2007.4429977},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WangCC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Wilde07,
author = {Doran K. Wilde},
title = {Computing Digit Selection Regions for Digit Recurrences},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {284--289},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429994},
doi = {10.1109/ASAP.2007.4429994},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Wilde07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WolinskiK07,
author = {Christophe Wolinski and
Krzysztof Kuchcinski},
title = {Identification of Application Specific Instructions Based on Sub-Graph
Isomorphism Constraints},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {328--333},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4430001},
doi = {10.1109/ASAP.2007.4430001},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WolinskiK07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhouHCY07,
author = {Bo Zhou and
Xiaobo Sharon Hu and
Danny Z. Chen and
Cedric X. Yu},
title = {Hardware Acceleration for 3-D Radiation Dose Calculation},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {290--295},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429995},
doi = {10.1109/ASAP.2007.4429995},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhouHCY07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhouHZSC07,
author = {Zhixiong Zhou and
Hu He and
Yanjun Zhang and
Yihe Sun and
Adriel Cheng},
title = {A 2-Dimension Force-Directed Scheduling Algorithm for Register-File-Connectivity
Clustered {VLIW} Architecture},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {371--376},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4459292},
doi = {10.1109/ASAP.2007.4459292},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhouHZSC07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhuPG07,
author = {Haibo Zhu and
Partha Pratim Pande and
Cristian Grecu},
title = {Performance Evaluation of Adaptive Routing Algorithms for achieving
Fault Tolerance in NoC Fabrics},
booktitle = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
pages = {42--47},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://doi.org/10.1109/ASAP.2007.4429956},
doi = {10.1109/ASAP.2007.4429956},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhuPG07.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2007,
title = {{IEEE} International Conference on Application-Specific Systems, Architectures
and Processors, {ASAP} 2007, Montr{\'{e}}al, Qu{\'{e}}bec,
Canada, July 8-11, 2007},
publisher = {{IEEE} Computer Society},
year = {2007},
url = {https://ieeexplore.ieee.org/xpl/conhome/4429947/proceeding},
isbn = {978-1-4244-1026-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2007.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AlleBN06,
author = {Mythri Alle and
Jayanta Biswas and
S. K. Nandy},
title = {High Performance {VLSI} Architecture Design for {H.264} {CAVLC} Decoder},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {317--322},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.36},
doi = {10.1109/ASAP.2006.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AlleBN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Arnold06,
author = {Jeffrey M. Arnold},
title = {Software Configurable Processors},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {45--49},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.61},
doi = {10.1109/ASAP.2006.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Arnold06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BalasaKPVC06,
author = {Florin Balasa and
Per Gunnar Kjeldsberg and
Martin Palkovic and
Arnout Vandecappelle and
Francky Catthoor},
title = {Loop Transformation Methodologies for Array-Oriented Memory Management},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {205--212},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.42},
doi = {10.1109/ASAP.2006.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BalasaKPVC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BalkanQV06,
author = {Aydin O. Balkan and
Gang Qu and
Uzi Vishkin},
title = {A Mesh-of-Trees Interconnection Network for Single-Chip Parallel Processing},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {73--80},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.6},
doi = {10.1109/ASAP.2006.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BalkanQV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BertoniBRR06,
author = {Guido Bertoni and
Luca Breveglieri and
Roberto Farina and
Francesco Regazzoni},
title = {Speeding Up {AES} By Extending a 32 bit Processor Instruction Set},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {275--282},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.62},
doi = {10.1109/ASAP.2006.62},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BertoniBRR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BhaveMG06,
author = {Aasavari Bhave and
Eur{\'{\i}}pides Montagne and
Edgar Granados},
title = {Describing Quantum Circuits with Systolic Arrays},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {109--113},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.25},
doi = {10.1109/ASAP.2006.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BhaveMG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BouchebabaNAC06,
author = {Youcef Bouchebaba and
Gabriela Nicolescu and
El Mostapha Aboulhamid and
Fabien Coelho},
title = {Buffer and register allocation for memory space optimization},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {283--290},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.20},
doi = {10.1109/ASAP.2006.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BouchebabaNAC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CalderonV06,
author = {Humberto Calderon and
Stamatis Vassiliadis},
title = {Reconfigurable Fixed Point Dense and Sparse Matrix-Vector Multiply/Add
Unit},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {311--316},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.58},
doi = {10.1109/ASAP.2006.58},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CalderonV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Cappello06,
author = {Peter R. Cappello},
title = {Multicore processors as Array Processors: Research Opportunities},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {169--172},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.47},
doi = {10.1109/ASAP.2006.47},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Cappello06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CastellanosS06,
author = {Ivan D. Castellanos and
James E. Stine},
title = {A 64-bit Decimal Floating-Point Comparator},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {138--144},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.2},
doi = {10.1109/ASAP.2006.2},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CastellanosS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChanGCWV06,
author = {Herwin Chan and
Miguel Griot and
Andres I. Vila Casado and
Richard D. Wesel and
Ingrid Verbauwhede},
title = {High Speed Channel Coding Architectures for the Uncoordinated {OR}
Channel},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {265--268},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.37},
doi = {10.1109/ASAP.2006.37},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChanGCWV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ClaussK06,
author = {Philippe Clauss and
B{\'{e}}n{\'{e}}dicte Kenmei},
title = {Polyhedral Modeling and Analysis of Memory Access Profiles},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {191--198},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.54},
doi = {10.1109/ASAP.2006.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ClaussK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DaneshtalabSAFN06,
author = {Masoud Daneshtalab and
Ashkan Sobhani and
Ali Afzali{-}Kusha and
Omid Fatemi and
Zainalabedin Navabi},
title = {NoC Hot Spot minimization Using AntNet Dynamic Routing Algorithm},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {33--38},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.49},
doi = {10.1109/ASAP.2006.49},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DaneshtalabSAFN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DeprettereSBS06,
author = {Ed F. Deprettere and
Todor P. Stefanov and
Shuvra S. Bhattacharyya and
Mainak Sen},
title = {Affine Nested Loop Programs and their Binary Parameterized Dataflow
Graph Counterparts},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {186--190},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.7},
doi = {10.1109/ASAP.2006.7},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DeprettereSBS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DimitrakopoulosMGN06,
author = {Giorgos Dimitrakopoulos and
Christos Mavrokefalidis and
Costas Galanopoulos and
Dimitris Nikolos},
title = {An Energy-Delay Efficient Subword Permutation Unit},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {245--252},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.10},
doi = {10.1109/ASAP.2006.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DimitrakopoulosMGN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DormaleABQL06,
author = {Guerric Meurice de Dormale and
Renaud Ambroise and
David Bol and
Jean{-}Jacques Quisquater and
Jean{-}Didier Legat},
title = {Low-Cost Elliptic Curve Digital Signature Coprocessor for Smart Cards},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {347--353},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.44},
doi = {10.1109/ASAP.2006.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DormaleABQL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DuttaHTHH06,
author = {Hritam Dutta and
Frank Hannig and
J{\"{u}}rgen Teich and
Benno Heigl and
Heinz Hornegger},
title = {A Design Methodology for Hardware Acceleration of Adaptive Filter
Algorithms in Image Processing},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {331--340},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.4},
doi = {10.1109/ASAP.2006.4},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DuttaHTHH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Ebeling06,
author = {Carl Ebeling},
title = {Configurable Computing Platforms - Promises, Promises},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {3--4},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.22},
doi = {10.1109/ASAP.2006.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Ebeling06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HeQLZ06,
author = {Chuan He and
Guan Qin and
Mi Lu and
Wei Zhao},
title = {An Efficient Implementation of High-Accuracy Finite Difference Computing
Engine on FPGAs},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {95--98},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.9},
doi = {10.1109/ASAP.2006.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HeQLZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HilewitzL06,
author = {Yedidya Hilewitz and
Ruby B. Lee},
title = {Fast Bit Compression and Expansion with Parallel Extract and Parallel
Deposit Instructions},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {65--72},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.33},
doi = {10.1109/ASAP.2006.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HilewitzL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HuaPQ06,
author = {Shaoxiong Hua and
Pushkin R. Pari and
Gang Qu},
title = {Dual-Processor Design of Energy Efficient Fault-Tolerant System},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {239--244},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.27},
doi = {10.1109/ASAP.2006.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HuaPQ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HugheyB06,
author = {Richard Hughey and
Andrea Di Blas},
title = {The {UCSC} Kestrel Application-Unspecific Processor},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {163--168},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.66},
doi = {10.1109/ASAP.2006.66},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HugheyB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ItueroL06,
author = {Pablo Ituero and
Marisa L{\'{o}}pez{-}Vallejo},
title = {New Schemes in Clustered {VLIW} Processors Applied to Turbo Decoding},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {291--296},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.48},
doi = {10.1109/ASAP.2006.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ItueroL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JaimeVHZ06,
author = {Francisco J. Jaime and
Julio Villalba and
Javier Hormigo and
Emilio L. Zapata},
title = {Pipelined Range Reduction for Floating Point Numbers},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {145--152},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.53},
doi = {10.1109/ASAP.2006.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JaimeVHZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Jullien06,
author = {Graham A. Jullien},
title = {Array Processing Using Alternate Arithmetic - {A} 20 Year Legacy},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {199--204},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.18},
doi = {10.1109/ASAP.2006.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Jullien06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KarkootiRC06,
author = {Marjan Karkooti and
Predrag Radosavljevic and
Joseph R. Cavallaro},
title = {Configurable, High Throughput, Irregular {LDPC} Decoder Architecture:
Tradeoff Analysis and Implementation},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {360--367},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.23},
doi = {10.1109/ASAP.2006.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KarkootiRC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KimR06,
author = {DaeGon Kim and
Sanjay V. Rajopadhye},
title = {An Improved Systolic Architecture for {LU} Decomposition},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {231--238},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.12},
doi = {10.1109/ASAP.2006.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KimR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KoZP06,
author = {Ming{-}Yung Ko and
Claudiu Zissulescu and
Sebastian Puthenpurayil},
title = {Parameterized Looped Schedules for Compact Representationof Execution
Sequences},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {223--230},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.51},
doi = {10.1109/ASAP.2006.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KoZP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LaiSQV06,
author = {Bo{-}Cheng Charles Lai and
Patrick Schaumont and
Wei Qin and
Ingrid Verbauwhede},
title = {Cross Layer Design to Multi-thread a Data-Pipelining Application on
a Multi-processor on Chip},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {15--18},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.24},
doi = {10.1109/ASAP.2006.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LaiSQV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeCV06,
author = {Yong Ki Lee and
Herwin Chan and
Ingrid Verbauwhede},
title = {Throughput Optimized {SHA-1} Architecture Using Unfolding Transformation},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {354--359},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.68},
doi = {10.1109/ASAP.2006.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeCV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeM06,
author = {Woo Hyung Lee and
Pinaki Mazumder},
title = {Parallel Processing Based Power Reduction in a 256 State Viterbi Decoder},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {182--185},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.50},
doi = {10.1109/ASAP.2006.50},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiFTM06,
author = {Lun Li and
Alex Fit{-}Florea and
Mitchell A. Thornton and
David W. Matula},
title = {Performance Evaluation of a Novel Direct Table Lookup Method and Architecture
with Application to 16-bit Integer Functions},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {99--104},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.52},
doi = {10.1109/ASAP.2006.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiFTM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Lopresti06,
author = {Daniel P. Lopresti},
title = {Three Computationally Demanding Problems in Search of {ASAP} Solutions},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {214--222},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.67},
doi = {10.1109/ASAP.2006.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Lopresti06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Martin06,
author = {Grant Martin},
title = {Recent Developments in Configurable and Extensible Processors},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {39--44},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.57},
doi = {10.1109/ASAP.2006.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Martin06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Master06,
author = {Paul L. Master},
title = {Reconfigurable Hardware and Software Architectural Constructs for
the Enablement of Resilient Computing Systems},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {50--55},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.59},
doi = {10.1109/ASAP.2006.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Master06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MattosWC06,
author = {J{\'{u}}lio C. B. de Mattos and
Stephan Wong and
Luigi Carro},
title = {The Molen FemtoJava Engine},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {19--22},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.64},
doi = {10.1109/ASAP.2006.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MattosWC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/McCannyWM06,
author = {John V. McCanny and
Roger F. Woods and
John G. McWhirter},
title = {From Bit Level Systolic Arrays to {HDTV} Processor Chips},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {159--162},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.35},
doi = {10.1109/ASAP.2006.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/McCannyWM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MesmanFCB06,
author = {Bart Mesman and
Hamed Fatemi and
Henk Corporaal and
Twan Basten},
title = {Dynamic-SIMD for lens distortion compensation},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {261--264},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.29},
doi = {10.1109/ASAP.2006.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MesmanFCB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MorrisPA06,
author = {Gerald R. Morris and
Viktor K. Prasanna and
Richard D. Anderson},
title = {An FPGA-Based Application-Specific Processor for Efficient Reduction
of Multiple Variable-Length Floating-Point Data Sets},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {323--330},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.11},
doi = {10.1109/ASAP.2006.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MorrisPA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Nelson06,
author = {Brent E. Nelson},
title = {The Mythical {CCM:} In Search of Usable (and Resuable) FPGA-Based
General Computing Machines},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {5--14},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.65},
doi = {10.1109/ASAP.2006.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Nelson06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OhP06,
author = {Daesun Oh and
Keshab K. Parhi},
title = {Low Complexity Design of High Speed Parallel Decision Feedback Equalizers},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {118--124},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.43},
doi = {10.1109/ASAP.2006.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OhP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PhamS06,
author = {Tung N. Pham and
Earl E. Swartzlander Jr.},
title = {Design of Radix-4 {SRT} Dividers in 65 Nanometer {CMOS} Technology},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {105--108},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.26},
doi = {10.1109/ASAP.2006.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PhamS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PorteroTMMCC06,
author = {Antoni Portero and
Guillermo Talavera and
Marius Monton and
Borja Mart{\'{\i}}nez and
Francky Catthoor and
Jordi Carrabina},
title = {Dynamic Voltage Scaling for Power Efficient {MPEG4-SP} Implementation},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {257--260},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.28},
doi = {10.1109/ASAP.2006.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PorteroTMMCC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PreuberS06,
author = {Thomas B. Preu{\ss}er and
Rainer G. Spallek},
title = {Analysis of a Fully-Scalable Digital Fractional Clock Divider},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {173--177},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.14},
doi = {10.1109/ASAP.2006.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PreuberS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/QiuXZSLS06,
author = {Mei Kang Qiu and
Chun Xue and
Qingfeng Zhuge and
Zili Shao and
Meilin Liu and
Edwin Hsing{-}Mean Sha},
title = {Voltage Assignment and Loop Scheduling for Energy Minimization while
Satisfying Timing Constraint with Guaranteed Probability},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {178--181},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.69},
doi = {10.1109/ASAP.2006.69},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/QiuXZSLS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SantosAA06,
author = {Ricardo Santos and
Rodolfo Azevedo and
Guido Araujo},
title = {2D-VLIW: An Architecture Based on the Geometry of Computation},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {87--94},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.1},
doi = {10.1109/ASAP.2006.1},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SantosAA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SarrafAM06,
author = {Elie H. Sarraf and
Messaoud Ahmed Ouameur and
Daniel Massicotte},
title = {{FPGA} Implementation of Beamforming Receivers Based on {MRC} and
{NC-LMS} for {DS-CDMA} System},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {114--117},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.34},
doi = {10.1109/ASAP.2006.34},
timestamp = {Thu, 07 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SarrafAM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ScherrerFR06,
author = {Antoine Scherrer and
Antoine Fraboulet and
Tanguy Risset},
title = {A Generic Multi-Phase On-Chip Traffic Generation Environment},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {23--27},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.5},
doi = {10.1109/ASAP.2006.5},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ScherrerFR06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SiegelM06,
author = {Sebastian Siegel and
Renate Merker},
title = {Minimum Cost for Channels and Registers in Processor Arrays by Avoiding
Redundancy},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {28--32},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.46},
doi = {10.1109/ASAP.2006.46},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SiegelM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SinghBN06,
author = {Sandeep B. Singh and
Jayanta Biswas and
S. K. Nandy},
title = {A Cost Effective Pipelined Divider for Double Precision Floating Point
Number},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {132--137},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.3},
doi = {10.1109/ASAP.2006.3},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SinghBN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SmythMM06,
author = {Neil Smyth and
M{\'{a}}ire McLoone and
John V. McCanny},
title = {An Adaptable And Scalable Asymmetric Cryptographic Processor},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {341--346},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.8},
doi = {10.1109/ASAP.2006.8},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SmythMM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Swartzlander06,
author = {Earl E. Swartzlander Jr.},
title = {Systolic {FFT} Processors: Past, Present and Future},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {153--158},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.63},
doi = {10.1109/ASAP.2006.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Swartzlander06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SydowNBN06,
author = {Thorsten von Sydow and
Bernd Neumann and
Holger Blume and
Tobias G. Noll},
title = {Quantitative Analysis of Embedded FPGA-Architectures for Arithmetic},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {125--131},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.56},
doi = {10.1109/ASAP.2006.56},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SydowNBN06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TangBS06,
author = {Jun Tang and
Tejas M. Bhatt and
Vishwas Sundaramurthy},
title = {Reconfigurable Shuffle Network Design in {LDPC} Decoders},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {81--86},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.60},
doi = {10.1109/ASAP.2006.60},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TangBS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TaussigHNK06,
author = {Drew Taussig and
Andreas Hoffmann and
Achim Nohl and
Andrea Kroll},
title = {Application Specific Processing: {A} Tools Approach},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {56--64},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.15},
doi = {10.1109/ASAP.2006.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TaussigHNK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WarsawL06,
author = {Thomas Warsaw and
Marcin Lukowiak},
title = {Architecture design of an {H.264/AVC} decoder for real-time {FPGA}
implementation},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {253--256},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.17},
doi = {10.1109/ASAP.2006.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WarsawL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X06,
title = {Message from the Conference Chairs},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.45},
doi = {10.1109/ASAP.2006.45},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X06a,
title = {Program Committee},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.55},
doi = {10.1109/ASAP.2006.55},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X06b,
title = {External Referees},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.32},
doi = {10.1109/ASAP.2006.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X06b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XianSJ06,
author = {Feng Xian and
Witawas Srisa{-}an and
Hong Jiang},
title = {Evaluating Hardware Support for Reference Counting Using Software
Configurable Processors},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {297--302},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.31},
doi = {10.1109/ASAP.2006.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XianSJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YaoL06,
author = {Kung Yao and
Flavio Lorenzelli},
title = {An Overview of Systolic Array Concepts and Applications for Linear
Algebra and Signal Processing},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {213},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.13},
doi = {10.1109/ASAP.2006.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YaoL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YiyuYF06,
author = {Yiyu Tan and
Chihang Yau and
Anthony S. Fong},
title = {Architectural Support on Object-Oriented Programming in a {JAVA} Processor},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {303--310},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.16},
doi = {10.1109/ASAP.2006.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YiyuYF06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhangYG06,
author = {Youtao Zhang and
Jun Yang and
Lan Gao},
title = {Efficient Group KeyManagement with Tamper-resistant {ISA} Extensions},
booktitle = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
pages = {269--274},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://doi.org/10.1109/ASAP.2006.30},
doi = {10.1109/ASAP.2006.30},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhangYG06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2006,
title = {2006 {IEEE} International Conference on Application-Specific Systems,
Architecture and Processors {(ASAP} 2006), 11-13 September 2006, Steamboat
Springs, Colorado, {USA}},
publisher = {{IEEE} Computer Society},
year = {2006},
url = {https://ieeexplore.ieee.org/xpl/conhome/4019472/proceeding},
isbn = {0-7695-2682-9},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2006.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AsciaCPP05,
author = {Giuseppe Ascia and
Vincenzo Catania and
Maurizio Palesi and
Davide Patti},
title = {Exploring Design Space of {VLIW} Architectures},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {86--91},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.33},
doi = {10.1109/ASAP.2005.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AsciaCPP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AvedilloQP05,
author = {Maria J. Avedillo and
Jos{\'{e}} M. Quintana and
H{\'{e}}ctor Pettenghi},
title = {Logic Models Supporting the Design of MOBILE-based {RTD} Circuits},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {254--259},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.43},
doi = {10.1109/ASAP.2005.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AvedilloQP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BatinaMPV05,
author = {Lejla Batina and
Nele Mentens and
Bart Preneel and
Ingrid Verbauwhede},
title = {Side-channel aware design: Algorithms and Architectures for Elliptic
Curve Cryptography over GF(2\({}^{\mbox{n}}\))},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {350--355},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.57},
doi = {10.1109/ASAP.2005.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BatinaMPV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BeiuANRD05,
author = {Valeriu Beiu and
Snorre Aunet and
Jabulani Nyathi and
Ray Robert Rydberg III and
Asbj{\o}rn Djupdal},
title = {On the Advantages of Serial Architectures for Low-Power Reliable Computations},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {276--281},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.48},
doi = {10.1109/ASAP.2005.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BeiuANRD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BeuchatM05,
author = {Jean{-}Luc Beuchat and
Jean{-}Michel Muller},
title = {Multiplication Algorithms for Radix-2 RN-Codings and Two's Complement
Multiplication Algorithms for Radix-2 RN-Codings and Two's Complement},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {303--308},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.45},
doi = {10.1109/ASAP.2005.45},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BeuchatM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BurianST05,
author = {Adrian Burian and
Perttu Salmela and
Jarmo Takala},
title = {Complex Fixed-Point Matrix Inversion Using Transport Triggered Architecture},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {107--112},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.25},
doi = {10.1109/ASAP.2005.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BurianST05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Cardoso05,
author = {Jo{\~{a}}o M. P. Cardoso},
title = {On Estimations for Compiling Software to FPGA-based Systems},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {225--230},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.47},
doi = {10.1109/ASAP.2005.47},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Cardoso05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Chakraborty05,
author = {Samarjit Chakraborty},
title = {Towards a Framework for System-Level Design of Multiprocessor SoC
Platforms for Media Processing},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {65--72},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.63},
doi = {10.1109/ASAP.2005.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Chakraborty05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChehidaA05,
author = {Karim Ben Chehida and
Michel Auguin},
title = {A SW/Configware Codesign Methodology for Control Dominated Applications},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {56--64},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.10},
doi = {10.1109/ASAP.2005.10},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChehidaA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CotofanaSLISZGR05,
author = {Sorin Cotofana and
Alexandre Schmid and
Yusuf Leblebici and
Adrian M. Ionescu and
Oliver Soffke and
Peter Zipf and
Manfred Glesner and
Antonio Rubio},
title = {{CONAN} - {A} Design Exploration Framework for Reliable Nano-Electronics},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {260--267},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.26},
doi = {10.1109/ASAP.2005.26},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/CotofanaSLISZGR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DarteDR05,
author = {Alain Darte and
Steven Derrien and
Tanguy Risset},
title = {Hardware/Software Interface for Multi-Dimensional Processor Arrays},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {28--35},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.38},
doi = {10.1109/ASAP.2005.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DarteDR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DetreyD05,
author = {J{\'{e}}r{\'{e}}mie Detrey and
Florent de Dinechin},
title = {Table-based polynomials for fast hardware function evaluation},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {328--333},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.61},
doi = {10.1109/ASAP.2005.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DetreyD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DimitroulakosGG05,
author = {Grigoris Dimitroulakos and
Michalis D. Galanis and
Costas E. Goutis},
title = {Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained
Reconfigurable Arrays},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {161--168},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.12},
doi = {10.1109/ASAP.2005.12},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DimitroulakosGG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EberleWGSG05,
author = {Hans Eberle and
Arvinderpal Wander and
Nils Gura and
Sheueling Chang Shantz and
Vipul Gupta},
title = {Architectural Extensions for Elliptic Curve Cryptography over GF(2\({}^{\mbox{m}}\))
on 8-bit Microprocessors},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {343--349},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.15},
doi = {10.1109/ASAP.2005.15},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EberleWGSG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EfthymiouGP05,
author = {Aristides Efthymiou and
Jim D. Garside and
Ioannis Papaefstathiou},
title = {A Low-Power Processor Architecture Optimized forWireless Devices},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {185--190},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.7},
doi = {10.1109/ASAP.2005.7},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EfthymiouGP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ErcegovacM05,
author = {Milos D. Ercegovac and
Jean{-}Michel Muller},
title = {Variable Radix Real and Complex Digit-Recurrence Division},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {316--321},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.66},
doi = {10.1109/ASAP.2005.66},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ErcegovacM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FidjelandL05,
author = {Andreas Fidjeland and
Wayne Luk},
title = {Customising Application-Speci.c Multiprocessor Systems: a Case Study},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {239--246},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.28},
doi = {10.1109/ASAP.2005.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FidjelandL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FiskiranL05,
author = {A. Murat Fiskiran and
Ruby B. Lee},
title = {On-Chip Lookup Tables for Fast Symmetric-Key Encryption},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {356--363},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.49},
doi = {10.1109/ASAP.2005.49},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FiskiranL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Flynn05,
author = {Michael J. Flynn},
title = {Area - Time - Power and Design effort: the basic tradeoffs in Application
Specific Systems},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {3},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.17},
doi = {10.1109/ASAP.2005.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Flynn05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FrederickVS05,
author = {Michael T. Frederick and
Nathan A. VanderHorn and
Arun K. Somani},
title = {Real-time {H/W} Implementation of the Approximate Discrete Radon Transform},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {399--404},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.54},
doi = {10.1109/ASAP.2005.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FrederickVS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GalanisDG05,
author = {Michalis D. Galanis and
Grigoris Dimitroulakos and
Costas E. Goutis},
title = {Speedups from Partitioning Critical Software Parts to Coarse-Grain
Reconfigurable Hardware},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {50--59},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.60},
doi = {10.1109/ASAP.2005.60},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GalanisDG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HanTGF05,
author = {Jie Han and
Erin Taylor and
Jianbo Gao and
Jos{\'{e}} A. B. Fortes},
title = {Faults, Error Bounds and Reliability of Nanoelectronic Circuits},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {247--253},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.36},
doi = {10.1109/ASAP.2005.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HanTGF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HorstBLM05,
author = {M. Van Der Horst and
Kees van Berkel and
Johan Lukkien and
Rudolf H. Mak},
title = {Recursive Filtering on a Vector {DSP} with Linear Speedup},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {379--386},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.55},
doi = {10.1109/ASAP.2005.55},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HorstBLM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JacobsN05,
author = {Tom R. Jacobs and
Jos{\'{e}} L. N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez},
title = {A Thread and Data-Parallel {MPEG-4} Video Encoder for a System-On-Chip
Multiprocessor},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {405--410},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.11},
doi = {10.1109/ASAP.2005.11},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JacobsN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JagerNR05,
author = {Bj{\"{o}}rn J{\"{a}}ger and
J{\"{o}}rg{-}Christian Niemann and
Ulrich R{\"{u}}ckert},
title = {Analytical approach to massively parallel architectures for nanotechnologies},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {268--275},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.14},
doi = {10.1109/ASAP.2005.14},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JagerNR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KamalizadTBH05,
author = {Amir Hosein Kamalizad and
Nozar Tabrizi and
Nader Bagherzadeh and
Akira Hatanaka},
title = {A Programmable {DSP} Architecture for Wireless Communication Systems},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {231--238},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.9},
doi = {10.1109/ASAP.2005.9},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KamalizadTBH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KavvadiasN05,
author = {Nikolaos Kavvadias and
Spiridon Nikolaidis},
title = {Automated Instruction-Set Extension of Embedded Processors with Application
to {MPEG-4} Video Encoding},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {140--145},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.20},
doi = {10.1109/ASAP.2005.20},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KavvadiasN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KellyMM05,
author = {Peter M. Kelly and
T. Martin McGinnity and
Liam P. Maguire},
title = {Reducing Interconnection Resource Overhead in Nano-scale FPGAs through
{MVL} Signal Systems},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {282--287},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.56},
doi = {10.1109/ASAP.2005.56},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KellyMM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KianzadBQ05,
author = {Vida Kianzad and
Shuvra S. Bhattacharyya and
Gang Qu},
title = {{CASPER:} An Integrated Energy-Driven Approach for Task Graph Scheduling
on Distributed Embedded Systems},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {191--197},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.23},
doi = {10.1109/ASAP.2005.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KianzadBQ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LHours05,
author = {Ludovic L'Hours},
title = {Generating Efficient Custom {FPGA} Soft-Cores for Control-Dominated
Applications},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {127--133},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.37},
doi = {10.1109/ASAP.2005.37},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LHours05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LambrechtsRLTAJCVDCRC05,
author = {Andy Lambrechts and
Praveen Raghavan and
Anthony Leroy and
Guillermo Talavera and
Tom Vander Aa and
Murali Jayapala and
Francky Catthoor and
Diederik Verkest and
Geert Deconinck and
Henk Corporaal and
Fr{\'{e}}d{\'{e}}ric Robert and
Jordi Carrabina},
title = {Power Breakdown Analysis for a Heterogeneous NoC Platform Running
a Video Application},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {179--184},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.52},
doi = {10.1109/ASAP.2005.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LambrechtsRLTAJCVDCRC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeJJ05,
author = {Byeong Kil Lee and
Lizy Kurian John and
Eugene John},
title = {Architectural Support for Accelerating Congestion Control Applications
in Network Processors},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {169--178},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.16},
doi = {10.1109/ASAP.2005.16},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeJJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LemaitreAD05,
author = {J{\'{e}}r{\^{o}}me Lemaitre and
Sylvain Alliot and
Ed F. Deprettere},
title = {Behavioral specification of control interface for signal processing
applications},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {43--49},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.21},
doi = {10.1109/ASAP.2005.21},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LemaitreAD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LucasE05,
author = {Amilcar do Carmo Lucas and
Rolf Ernst},
title = {An Image Processor for Digital Film},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {219--224},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.13},
doi = {10.1109/ASAP.2005.13},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LucasE05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MamidiIISG05,
author = {Suman Mamidi and
Daniel Iancu and
Andrei Iancu and
Michael J. Schulte and
John Glossner},
title = {Instruction Set Extensions for Reed-Solomon Encoding and Decoding},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {364--369},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.42},
doi = {10.1109/ASAP.2005.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MamidiIISG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MeenderinckCL05,
author = {Cor Meenderinck and
Sorin Cotofana and
Casper Lageweg},
title = {High Radix Addition Via Conditional Charge Transport in Single Electron
Tunneling Technology},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {294--302},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.39},
doi = {10.1109/ASAP.2005.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MeenderinckCL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MichardTV05,
author = {Romain Michard and
Arnaud Tisserand and
Nicolas Veyrat{-}Charvillon},
title = {Small {FPGA} polynomial approximations with 3-bit coefficients and
low-precision estimations of the powers of x},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {334--342},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.59},
doi = {10.1109/ASAP.2005.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MichardTV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MozumdarKCKSMAL05,
author = {Mohammad Mostafizur Rahman Mozumdar and
Kingshuk Karuri and
Anupam Chattopadhyay and
Stefan Kraemer and
Hanno Scharw{\"{a}}chter and
Heinrich Meyr and
Gerd Ascheid and
Rainer Leupers},
title = {Instruction Set Customization of Application Specific Processors for
Network Processing: {A} Case Study},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {154--160},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.41},
doi = {10.1109/ASAP.2005.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MozumdarKCKSMAL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NB05,
author = {Bharath N and
Nagaraju Bussa},
title = {Artificial Deadlock Detection in Process Networks for {ECLIPSE}},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {22--27},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.18},
doi = {10.1109/ASAP.2005.18},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NgL05,
author = {Enrico Ng and
Gyungho Lee},
title = {Eliminating Sorting in {IP} Lookup Devices using Partitioned Table},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {119--126},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.32},
doi = {10.1109/ASAP.2005.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NgL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/NguyenS05,
author = {Thi Nguyen and
Kaijian Shi},
title = {Virtual Hierarchical Design Representations for Distributed Optimization
of Multi-Million Gate Designs},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {204--212},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.68},
doi = {10.1109/ASAP.2005.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/NguyenS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Nunez-YanezC05,
author = {Jos{\'{e}} L. N{\'{u}}{\~{n}}ez{-}Y{\'{a}}{\~{n}}ez and
Vassilios A. Chouliaras},
title = {Design and Implementation of a High-Performance and Silicon Efficient
Arithmetic Coding Accelerator for the {H.264} Advanced Video Codec},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {411--416},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.30},
doi = {10.1109/ASAP.2005.30},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Nunez-YanezC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OgrasHM05,
author = {{\"{U}}mit Y. Ogras and
Jingcao Hu and
Radu Marculescu},
title = {Communication-Centric SoC Design for Nanoscale Domain},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {73--78},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.24},
doi = {10.1109/ASAP.2005.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OgrasHM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PasrichaB05,
author = {Sudeep Pasricha and
Mohamed Ben{-}Romdhane},
title = {Using {TLM} for Exploring Bus-based SoC Communication Architectures},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {79--85},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.65},
doi = {10.1109/ASAP.2005.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PasrichaB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PisharathC05,
author = {Jayaprakash Pisharath and
Alok N. Choudhary},
title = {Design of a Hardware Accelerator for Density Based Clustering Applications},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {101--106},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.31},
doi = {10.1109/ASAP.2005.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PisharathC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PlesslP05,
author = {Christian Plessl and
Marco Platzner},
title = {Zippy - {A} coarse-grained reconfigurable array with support for hardware
virtualization},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {213--218},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.69},
doi = {10.1109/ASAP.2005.69},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PlesslP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SalmelaJST05,
author = {Perttu Salmela and
Tuomas J{\"{a}}rvinen and
Teemu Sipil{\"{a}} and
Jarmo Takala},
title = {256-State Rate 1/2 Viterbi Decoder on {TTA} Processor},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {370--378},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.5},
doi = {10.1109/ASAP.2005.5},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SalmelaJST05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SanuS05,
author = {Moboluwaji O. Sanu and
Earl E. Swartzlander Jr.},
title = {Multiply-Accumulate Architecture for a Special Class of Optimal Extension
Fields},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.46},
doi = {10.1109/ASAP.2005.46},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SanuS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SchlichterHHT05,
author = {Thomas Schlichter and
Christian Haubelt and
Frank Hannig and
J{\"{u}}rgen Teich},
title = {Using Symbolic Feasibility Tests during Design Space Exploration of
Heterogeneous Multi-Processor Systems},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {9--14},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.64},
doi = {10.1109/ASAP.2005.64},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SchlichterHHT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShahbahramiJV05,
author = {Asadollah Shahbahrami and
Ben H. H. Juurlink and
Stamatis Vassiliadis},
title = {Performance Comparison of {SIMD} Implementations of the Discrete Wavelet
Transform},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {393--398},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.51},
doi = {10.1109/ASAP.2005.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShahbahramiJV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SteinerCIJDM05,
author = {Ian Steiner and
P. Chan and
Laurent Imbert and
Graham A. Jullien and
Vassil S. Dimitrov and
G. H. McGibney},
title = {A Fault-Tolerant Modulus Replication Complex {FIR} Filter},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {387--392},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.6},
doi = {10.1109/ASAP.2005.6},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SteinerCIJDM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Tanaka05,
author = {Kiyofumi Tanaka},
title = {Casablanca {II:} Implementation of a Real-Time {RISC}},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {36--42},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.22},
doi = {10.1109/ASAP.2005.22},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Tanaka05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TsengLLL05,
author = {Kuo{-}Kun Tseng and
Ying{-}Dar Lin and
Tsern{-}Huei Lee and
Yuan{-}Cheng Lai},
title = {A Parallel Automaton String Matching with Pre-Hashing and Root-Indexing
Techniques for Content Filtering Coprocessor},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {113--118},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.8},
doi = {10.1109/ASAP.2005.8},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TsengLLL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VassiliadisSG05,
author = {Stamatis Vassiliadis and
Leonel Sousa and
Georgi Gaydadjiev},
title = {The Midlifekicker Microarchitecture Evaluation Metric},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {92--100},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.62},
doi = {10.1109/ASAP.2005.62},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VassiliadisSG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VillalbaHPZ05,
author = {Julio Villalba and
Javier Hormigo and
Jose M. Prades and
Emilio L. Zapata},
title = {On-line Multioperand Addition Based on On-line Full Adders},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {322--327},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.50},
doi = {10.1109/ASAP.2005.50},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VillalbaHPZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WaerdtV05,
author = {Jan{-}Willem van de Waerdt and
Stamatis Vassiliadis},
title = {Instruction Set Architecture Enhancements for Video Processing},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {146--153},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.40},
doi = {10.1109/ASAP.2005.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WaerdtV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WalusMSJ05,
author = {Konrad Walus and
Mike Mazur and
Gabriel Schulhof and
Graham A. Jullien},
title = {Simple 4-Bit Processor Based On Quantum-Dot Cellular Automata {(QCA)}},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {288--293},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.58},
doi = {10.1109/ASAP.2005.58},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WalusMSJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangS05,
author = {Liang{-}Kai Wang and
Michael J. Schulte},
title = {Decimal Floating-Point Square Root Using Newton-Raphson Iteration},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {309--315},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.29},
doi = {10.1109/ASAP.2005.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WangS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X05,
title = {Title Page},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.4},
doi = {10.1109/ASAP.2005.4},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X05a,
title = {Copyright Page},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.1},
doi = {10.1109/ASAP.2005.1},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X05a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X05b,
title = {Message from the Conference Chairs},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.44},
doi = {10.1109/ASAP.2005.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X05b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X05c,
title = {Conference Organizers},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.27},
doi = {10.1109/ASAP.2005.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X05c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X05d,
title = {Program Committee},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.53},
doi = {10.1109/ASAP.2005.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X05d.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/X05e,
title = {External Referees},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.35},
doi = {10.1109/ASAP.2005.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/X05e.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YangJHHZHY05,
author = {Yang Yang and
Tong Jing and
Xianlong Hong and
Yu Hu and
Qi Zhu and
Xiaodong Hu and
Guiying Yan},
title = {Via-Aware Global Routing for Good {VLSI} Manufacturability and High
Yield},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {198--203},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.67},
doi = {10.1109/ASAP.2005.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YangJHHZHY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZissulescuKD05,
author = {Claudiu Zissulescu and
Bart Kienhuis and
Ed F. Deprettere},
title = {Expression Synthesis in Process Networks generated by {LAURA}},
booktitle = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
pages = {15--21},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ASAP.2005.34},
doi = {10.1109/ASAP.2005.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZissulescuKD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2005,
title = {16th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2005), 23-25 July 2005, Samos,
Greece},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://ieeexplore.ieee.org/xpl/conhome/10334/proceeding},
isbn = {0-7695-2407-9},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AmftLOMLT04,
author = {Oliver Amft and
Michael Lauffer and
Stijn Ossevoort and
Fabrizio Macaluso and
Paul Lukowicz and
Gerhard Tr{\"{o}}ster},
title = {Design of the {QBIC} Wearable Computing Platform},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {398--410},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10001},
doi = {10.1109/ASAP.2004.10001},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AmftLOMLT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Beiu04,
author = {Valeriu Beiu},
title = {A Novel Highly Reliable Low-Power Nano Architecture When von Neumann
Augments},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {167--177},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10021},
doi = {10.1109/ASAP.2004.10021},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Beiu04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BrebnerJKK04,
author = {Gordon J. Brebner and
Philip James{-}Roxby and
Eric Keller and
Chidamber Kulkarni},
title = {Hyper-Programmable Architectures for Adaptable Networked Systems},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {328--338},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10037},
doi = {10.1109/ASAP.2004.10037},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BrebnerJKK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BreveglieriKM04,
author = {Luca Breveglieri and
Israel Koren and
Paolo Maistri},
title = {Detecting Faults in Four Symmetric Key Block Ciphers},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {258--268},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10035},
doi = {10.1109/ASAP.2004.10035},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BreveglieriKM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CastanierFP04,
author = {Fabien Castanier and
Alberto Ferrante and
Vincenzo Piuri},
title = {A Packet Scheduling Algorithm for IPSec Multi-Accelerator Based Systems},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {387--397},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10016},
doi = {10.1109/ASAP.2004.10016},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CastanierFP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CharotNQW04,
author = {Fran{\c{c}}ois Charot and
Madeleine Nyamsi and
Patrice Quinton and
Charles Wagner},
title = {Modeling and Scheduling Parallel Data Flow Systems using Structured
Systems of Recurrence Equations},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {6--16},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10032},
doi = {10.1109/ASAP.2004.10032},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CharotNQW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CourtH04,
author = {Tom Van Court and
Martin C. Herbordt},
title = {Families of FPGA-Based Algorithms for Approximate String Matching},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {354--364},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10013},
doi = {10.1109/ASAP.2004.10013},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CourtH04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DilparicA04,
author = {Ljiljana Dilparic and
D. K. Arvind},
title = {Design and Evaluation of a Network-Based Asynchronous Architecture
for Cryptographic Devices},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {191--201},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10017},
doi = {10.1109/ASAP.2004.10017},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DilparicA04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EberleGSGRS04,
author = {Hans Eberle and
Nils Gura and
Sheueling Chang Shantz and
Vipul Gupta and
Leonard Rarick and
Shreyas Sundaram},
title = {A Public-Key Cryptographic Processor for {RSA} and {ECC}},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {98--110},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10015},
doi = {10.1109/ASAP.2004.10015},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EberleGSGRS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ErcegovacM04,
author = {Milos D. Ercegovac and
Jean{-}Michel Muller},
title = {Complex Square Root with Operand Prescaling},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {52--62},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10014},
doi = {10.1109/ASAP.2004.10014},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ErcegovacM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FiskiranL04,
author = {A. Murat Fiskiran and
Ruby B. Lee},
title = {Evaluating Instruction Set Extensions for Fast Arithmetic on Binary
Finite Fields},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {125--136},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10003},
doi = {10.1109/ASAP.2004.10003},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FiskiranL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Fit-FloreaM04,
author = {Alex Fit{-}Florea and
David W. Matula},
title = {A Digit-Serial Algorithm for the Discrete Logarithm Modulo 2\({}^{\mbox{k}}\)},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {236--246},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10033},
doi = {10.1109/ASAP.2004.10033},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Fit-FloreaM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FrabouletR04,
author = {Antoine Fraboulet and
Tanguy Risset},
title = {Efficient On-Chip Communications for Data-Flow IPs},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {293--303},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10036},
doi = {10.1109/ASAP.2004.10036},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FrabouletR04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GomezMVPC04,
author = {Jos{\'{e}} Ignacio G{\'{o}}mez and
Paul Marchal and
Sven Verdoolaege and
Luis Pi{\~{n}}uel and
Francky Catthoor},
title = {Optimizing the Memory Bandwidth with Loop Morphing},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {213--223},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10020},
doi = {10.1109/ASAP.2004.10020},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GomezMVPC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GrossschadlKP04,
author = {Johann Gro{\ss}sch{\"{a}}dl and
Sandeep S. Kumar and
Christof Paar},
title = {Architectural Support for Arithmetic in Optimal Extension Fields},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {111--124},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10004},
doi = {10.1109/ASAP.2004.10004},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GrossschadlKP04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HannigT04,
author = {Frank Hannig and
J{\"{u}}rgen Teich},
title = {Resource Constrained and Speculative Scheduling of an Algorithm Class
with Run-Time Dependent Conditionals},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {17--27},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10029},
doi = {10.1109/ASAP.2004.10029},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HannigT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HosangadiFK04,
author = {Anup Hosangadi and
Farzan Fallah and
Ryan Kastner},
title = {Common Subexpression Elimination Involving Multiple Variables for
Linear {DSP} Synthesis},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {202--212},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10022},
doi = {10.1109/ASAP.2004.10022},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HosangadiFK04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JarvinenSST04,
author = {Tuomas J{\"{a}}rvinen and
Perttu Salmela and
Harri Sorokin and
Jarmo Takala},
title = {Stride Permutation Networks for Array Processors},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {376--386},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10002},
doi = {10.1109/ASAP.2004.10002},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JarvinenSST04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KianzadB04,
author = {Vida Kianzad and
Shuvra S. Bhattacharyya},
title = {{CHARMED:} {A} Multi-Objective Co-Synthesis Framework for Multi-Mode
Embedded Systems},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {28--40},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10027},
doi = {10.1109/ASAP.2004.10027},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KianzadB04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KimW04,
author = {Jongmyon Kim and
D. Scott Wills},
title = {Efficient Processing of Color Image Sequences Using a Color-Aware
Instruction Set on Mobile Systems},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {137--149},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10007},
doi = {10.1109/ASAP.2004.10007},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KimW04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KrishnamurthyBCFGL04,
author = {Praveen Krishnamurthy and
Jeremy Buhler and
Roger D. Chamberlain and
Mark A. Franklin and
Kwame Gyang and
Joseph M. Lancaster},
title = {Biosequence Similarity Search on the Mercury System},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {365--375},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10011},
doi = {10.1109/ASAP.2004.10011},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KrishnamurthyBCFGL04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KudlurFCM04,
author = {Manjunath Kudlur and
Kevin Fan and
Michael L. Chu and
Scott A. Mahlke},
title = {Automatic Synthesis of Customized Local Memories for Multicluster
Application Accelerators},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {304--314},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10030},
doi = {10.1109/ASAP.2004.10030},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KudlurFCM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LagewegCV04,
author = {Casper Lageweg and
Sorin Cotofana and
Stamatis Vassiliadis},
title = {Binary Multiplication based on Single Electron Tunneling},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {152--166},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10019},
doi = {10.1109/ASAP.2004.10019},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LagewegCV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Sangireddy04,
author = {Rama Sangireddy},
title = {Register Organization for Enhanced On-Chip Parallelism},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {180--190},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10018},
doi = {10.1109/ASAP.2004.10018},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Sangireddy04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SanuSC04,
author = {Moboluwaji O. Sanu and
Earl E. Swartzlander Jr. and
Craig M. Chase},
title = {Parallel Montgomery Multipliers},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {63--72},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10008},
doi = {10.1109/ASAP.2004.10008},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SanuSC04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SchulteCGWMBV04,
author = {Michael J. Schulte and
Kai Chirca and
John Glossner and
Haoran Wang and
Suman Mamidi and
Pablo I. Balzola and
Stamatis Vassiliadis},
title = {A Low-Power Carry Skip Adder with Fast Saturation},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {269--279},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10038},
doi = {10.1109/ASAP.2004.10038},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SchulteCGWMBV04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShaoZLXS04,
author = {Zili Shao and
Qingfeng Zhuge and
Meilin Liu and
Bin Xiao and
Edwin Hsing{-}Mean Sha},
title = {Switching-Activity Minimization on Instruction-Level Loop Scheduling
for {VLIWDSP} Applications},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {224--234},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10023},
doi = {10.1109/ASAP.2004.10023},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShaoZLXS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SiegelM04,
author = {Sebastian Siegel and
Renate Merker},
title = {Optimized Data-Reuse in Processor Arrays},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {315--325},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10024},
doi = {10.1109/ASAP.2004.10024},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SiegelM04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TawalbehT04,
author = {Lo'ai Ali Tawalbeh and
Alexandre F. Tenca},
title = {An Algorithm and Hardware Architecture for Integrated Modular Division
and Multiplication in GF(p) and GF(2\({}^{\mbox{n}}\))},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {247--257},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10034},
doi = {10.1109/ASAP.2004.10034},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TawalbehT04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TencaSS04,
author = {Alexandre F. Tenca and
Ajay C. Shantilal and
Mohammed H. Sinky},
title = {Improved-Throughput Networks of Basic On-Line Arithmetic Modules for
{DSP} Applications},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {73--83},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10000},
doi = {10.1109/ASAP.2004.10000},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TencaSS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TurjanKD04,
author = {Alexandru Turjan and
Bart Kienhuis and
Ed F. Deprettere},
title = {A Hierarchical Classification Scheme to Derive Interprocess Communication
in Process Networks},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {282--292},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10025},
doi = {10.1109/ASAP.2004.10025},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TurjanKD04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VuleticPI04,
author = {Miljan Vuletic and
Laura Pozzi and
Paolo Ienne},
title = {Programming Transparency and Portable Hardware Interfacing: Towards
General-Purpose Reconfigurable Computing},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {339--351},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10028},
doi = {10.1109/ASAP.2004.10028},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VuleticPI04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WangS04,
author = {Liang{-}Kai Wang and
Michael J. Schulte},
title = {Decimal Floating-Point Division Using Newton-Raphson Iteration},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {84--95},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10005},
doi = {10.1109/ASAP.2004.10005},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WangS04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/XieLKVI04,
author = {Yuan Xie and
Lin Li and
Mahmut T. Kandemir and
Narayanan Vijaykrishnan and
Mary Jane Irwin},
title = {Reliability-Aware Co-Synthesis for Embedded Systems},
booktitle = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
pages = {41--50},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2004.10031},
doi = {10.1109/ASAP.2004.10031},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/XieLKVI04.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2004,
title = {15th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2004), 27-29 September 2004,
Galveston, TX, {USA}},
publisher = {{IEEE} Computer Society},
year = {2004},
url = {https://ieeexplore.ieee.org/xpl/conhome/9306/proceeding},
isbn = {0-7695-2226-2},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2004.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Arnold03,
author = {Mark G. Arnold},
title = {Iterative Methods for Logarithmic Subtraction},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {315--525},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212855},
doi = {10.1109/ASAP.2003.1212855},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Arnold03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AuB03,
author = {Lai{-}Sze Au and
Neil Burgess},
title = {Unified Radix-4 Multiplier for GF(p) and GF(2n)},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {226--236},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212846},
doi = {10.1109/ASAP.2003.1212846},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AuB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AyalaLVL03,
author = {Jos{\'{e}} L. Ayala and
Marisa Luisa L{\'{o}}pez{-}Vallejo and
Alexander V. Veidenbaum and
Carlos A. Lopez},
title = {Energy Aware Register File Implementation through Instruction Predecode},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {86--96},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212832},
doi = {10.1109/ASAP.2003.1212832},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AyalaLVL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Beauchat03,
author = {Jean{-}Luc Beuchat},
title = {Modular Multiplication for {FPGA} Implementation of the {IDEA} Block
Cipher},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {412--422},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212864},
doi = {10.1109/ASAP.2003.1212864},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Beauchat03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BertoniBKMP03,
author = {Guido Bertoni and
Luca Breveglieri and
Israel Koren and
Paolo Maistri and
Vincenzo Piuri},
title = {Concurrent Fault Detection in a Hardware Implementation of the {RC5}
Encryption Algorithm},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {423--432},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212865},
doi = {10.1109/ASAP.2003.1212865},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BertoniBKMP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BunimovS03,
author = {Viktor Bunimov and
Manfred Schimmler},
title = {Area and Time Efficient Modular Multiplication of Large Integers},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {400},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212863},
doi = {10.1109/ASAP.2003.1212863},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BunimovS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChandrasekharLC03,
author = {Vikram Chandrasekhar and
Frank Livingston and
Joseph R. Cavallaro},
title = {Reducing dynamic power consumption in next generation {DS-CDMA} mobile
communication receivers},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {260--270},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212850},
doi = {10.1109/ASAP.2003.1212850},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChandrasekharLC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChenC03,
author = {Chichyang Chen and
Rui{-}Lin Chen},
title = {Performance-Improved Computation of Very Large Word-Length {LNS} Addition/Subtraction
Using Signed-Digit Arithmetic},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {337--347},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212857},
doi = {10.1109/ASAP.2003.1212857},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChenC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DijkSD03,
author = {Hylke W. van Dijk and
Henk J. Sips and
Ed F. Deprettere},
title = {Context-Aware Process Networks},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {6--16},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212825},
doi = {10.1109/ASAP.2003.1212825},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DijkSD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DimitrakopoulosVNE03,
author = {Giorgos Dimitrakopoulos and
Haridimos T. Vergos and
Dimitris Nikolos and
Costas Efstathiou},
title = {A Family of Parallel-Pre.x Modulo 2n - 1 Adders},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {326--336},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212856},
doi = {10.1109/ASAP.2003.1212856},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DimitrakopoulosVNE03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DragerF03,
author = {Thorsten Dr{\"{a}}ger and
Gerhard P. Fettweis},
title = {Using Group Theory to Specify Application Specific Interconnection
Networks for {SIMD} DSPs},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {51},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212829},
doi = {10.1109/ASAP.2003.1212829},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DragerF03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/EberleGS03,
author = {Hans Eberle and
Nils Gura and
Sheueling Chang Shantz},
title = {A Cryptograhpic Processor for Arbitrary Elliptic Curves over},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {444--454},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212867},
doi = {10.1109/ASAP.2003.1212867},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/EberleGS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/El-KhashabS03,
author = {Ayman M. El{-}Khashab and
Earl E. Swartzlander Jr.},
title = {An Architecture for a Radix-4 Modular Pipeline Fast Fourier Transform},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {378--388},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212861},
doi = {10.1109/ASAP.2003.1212861},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/El-KhashabS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ErleS03,
author = {Mark A. Erle and
Michael J. Schulte},
title = {Decimal Multiplication Via Carry-Save Addition},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {348},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212858},
doi = {10.1109/ASAP.2003.1212858},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ErleS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/FanCCMRSM03,
author = {Kevin Fan and
Nathan Clark and
Michael L. Chu and
K. V. Manjunath and
Rajiv A. Ravindran and
Mikhail Smelyanskiy and
Scott A. Mahlke},
title = {Systematic Register Bypass Customization for Application-Specific
Processors},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {64--74},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212830},
doi = {10.1109/ASAP.2003.1212830},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/FanCCMRSM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GoldsteinBMV03,
author = {Seth Copen Goldstein and
Mihai Budiu and
Mahim Mishra and
Girish Venkataramani},
title = {Reconfigurable Computing and Electronic Nanotechnology},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {132},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212837},
doi = {10.1109/ASAP.2003.1212837},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GoldsteinBMV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GrossschadlK03,
author = {Johann Gro{\ss}sch{\"{a}}dl and
Guy{-}Armand Kamendje},
title = {Instruction Set Extension for Fast Elliptic Curve Cryptography over
Binary Finite Fields GF(2m)},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {455},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212868},
doi = {10.1109/ASAP.2003.1212868},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GrossschadlK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/GuillouQR03,
author = {Anne{-}Claire Guillou and
Patrice Quinton and
Tanguy Risset},
title = {Hardware Synthesis for Multi-Dimensional Time},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {40--50},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212828},
doi = {10.1109/ASAP.2003.1212828},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/GuillouQR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HeoCLS03,
author = {Kyung Lan Heo and
Sung M. Cho and
Jung Hoo Lee and
Myung Hoon Sunwoo},
title = {Application-Specific {DSP} Architecture For Fast Fourier Transform},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {369--377},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212860},
doi = {10.1109/ASAP.2003.1212860},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HeoCLS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/IrwinP03,
author = {James Irwin and
Dan Page},
title = {Using Media Processors for Low-Memory {AES} Implementation},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {144--154},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212838},
doi = {10.1109/ASAP.2003.1212838},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/IrwinP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/JanesGCL03,
author = {David B. Janes and
Subhasis Ghosh and
Jaewon Choi and
Saurabh Lodha},
title = {Circuit Characteristics of Molecular Electronic Components},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {125--131},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212836},
doi = {10.1109/ASAP.2003.1212836},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/JanesGCL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KangGSG03,
author = {Jung{-}Yup Kang and
Sandeep Gupta and
Saurabh Shah and
Jean{-}Luc Gaudiot},
title = {An Efficient {PIM} (Processor-In-Memory) Architecture for Motion Estimation},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {282--292},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212852},
doi = {10.1109/ASAP.2003.1212852},
timestamp = {Fri, 22 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/KangGSG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KornarosOP03,
author = {George Kornaros and
Theofanis Orphanoudakis and
Ioannis Papaefstathiou},
title = {{GFS:} An Efficient Implementation of Fair Scheduling for Mult-Gigabit
Packet Networks},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {389--399},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212862},
doi = {10.1109/ASAP.2003.1212862},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KornarosOP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LakshminarayananR03,
author = {Lakshminarayanan Renganarayanan and
Sanjay V. Rajopadhye},
title = {Switched Memory Architectures-Moving Beyond Systolic Arrays},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {28--39},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212827},
doi = {10.1109/ASAP.2003.1212827},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LakshminarayananR03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Lee03,
author = {Ruby B. Lee},
title = {Challenges in the Design of Security-Aware Processors},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {2},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212824},
doi = {10.1109/ASAP.2003.1212824},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Lee03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeCD03,
author = {Jong{-}eun Lee and
Kiyoung Choi and
Nikil D. Dutt},
title = {Evaluating Memory Architectures for Media Applications on Coarse-Grained
Recon.gurable Architectures},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {172--182},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2003.10002},
doi = {10.1109/ASAP.2003.10002},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeCD03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiuDM03,
author = {Zhaohui Liu and
Kevin Dickson and
John V. McCanny},
title = {A floating-point {CORDIC} based {SVD} processor},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {194--203},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212843},
doi = {10.1109/ASAP.2003.1212843},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiuDM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Muller03,
author = {Jean{-}Michel Muller},
title = {Complex Division with Prescaling of Operands},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {304--314},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212854},
doi = {10.1109/ASAP.2003.1212854},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Muller03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/OrsBPV03,
author = {Siddika Berna {\"{O}}rs and
Lejla Batina and
Bart Preneel and
Joos Vandewalle},
title = {Hardware Implementation of an Elliptic Curve Processor over GF(p)},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {433--443},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212866},
doi = {10.1109/ASAP.2003.1212866},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/OrsBPV03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PattonL03,
author = {P. H. Chan and
Jack Y. B. Lee},
title = {An Efficient Disk-Array-Based Server Design for a Multicast Video
Streaming System},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {271--281},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212851},
doi = {10.1109/ASAP.2003.1212851},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PattonL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PeymandoustPIM03,
author = {Armita Peymandoust and
Laura Pozzi and
Paolo Ienne and
Giovanni De Micheli},
title = {Automatic Instruction Set Extension and Utilization for Embedded Processors},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {108},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212834},
doi = {10.1109/ASAP.2003.1212834},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PeymandoustPIM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SangireddyS03,
author = {Rama Sangireddy and
Arun K. Somani},
title = {Application-Specific Computing with Adaptive Register File Architectures},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {183},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.ieeecomputersociety.org/10.1109/ASAP.2003.10001},
doi = {10.1109/ASAP.2003.10001},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SangireddyS03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SchulteMKWG03,
author = {Michael J. Schulte and
Louis Marquette and
Shankar Krithivasan and
E. George Walters III and
John Glossner},
title = {Combined Multiplication and Sum-of-Squares Units},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {204--214},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212844},
doi = {10.1109/ASAP.2003.1212844},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SchulteMKWG03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ShiYL03,
author = {Zhijie Shi and
Xiao Yang and
Ruby B. Lee},
title = {Arbitrary Bit Permutations in One or Two Cycles},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {237},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212847},
doi = {10.1109/ASAP.2003.1212847},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ShiYL03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SimaVCE03,
author = {Mihai Sima and
Stamatis Vassiliadis and
Sorin Cotofana and
Jos T. J. van Eijndhoven},
title = {Color Space Conversion for {MPEG} decoding on FPGA-augmented TriMedia
Processor},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {250--259},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212848},
doi = {10.1109/ASAP.2003.1212848},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SimaVCE03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SimonenSN03,
author = {Piia Simonen and
Ilkka Saastamoinen and
Jari Nurmi},
title = {Variable-Length Instruction Compression for Area Minimization},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {155--160},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212839},
doi = {10.1109/ASAP.2003.1212839},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SimonenSN03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SinghPGRPP03,
author = {Abhishek Singh and
Dhananjay S. Phatak and
Tom Goff and
Mike Riggs and
James F. Plusquellic and
Chintan Patel},
title = {Comparison of Branching {CORDIC} Implementations},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {215--225},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212845},
doi = {10.1109/ASAP.2003.1212845},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SinghPGRPP03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TurjanK03,
author = {Alexandru Turjan and
Bart Kienhuis},
title = {Storage Management in Process Networks using the Lexicographically
Maximal Preimage},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {75--85},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212831},
doi = {10.1109/ASAP.2003.1212831},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TurjanK03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/VerdoolaegeBJC03,
author = {Sven Verdoolaege and
Maurice Bruynooghe and
Gerda Janssens and
Francky Catthoor},
title = {Multi-dimentsional Incremetal Loops Fusion for Data Locality},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {17--27},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212826},
doi = {10.1109/ASAP.2003.1212826},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/VerdoolaegeBJC03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/WieferinkKNH03,
author = {Andreas Wieferink and
Tim Kogel and
Achim Nohl and
Andreas Hoffmann},
title = {Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {161--171},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212840},
doi = {10.1109/ASAP.2003.1212840},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/WieferinkKNH03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YamadaM03,
author = {Toshishige Yamada and
M. Meyyappan},
title = {Nanotechnology in the Development of Future Computing Systems},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {120--124},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212835},
doi = {10.1109/ASAP.2003.1212835},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YamadaM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YeM03,
author = {Terry Tao Ye and
Giovanni De Micheli},
title = {Physical Planning for On-Chip Multiprocessor Networks and Switch Fabrics},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {97--107},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212833},
doi = {10.1109/ASAP.2003.1212833},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YeM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/YeowM03,
author = {Swee Yeow Yap and
John V. McCanny},
title = {A {VLSI} Architecture for Advanced Video Coding Motion Estimation},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {293},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212853},
doi = {10.1109/ASAP.2003.1212853},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/YeowM03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ZhuB03,
author = {Yiqun Zhu and
Mohammed Benaissa},
title = {Reconfigurable Viterbi Decoding Using a New {ACS} Pipelining Technique},
booktitle = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
pages = {360--368},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://doi.org/10.1109/ASAP.2003.1212859},
doi = {10.1109/ASAP.2003.1212859},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ZhuB03.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/asap/2003,
title = {14th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2003), 24-26 June 2003, The
Hague, The Netherlands},
publisher = {{IEEE} Computer Society},
year = {2003},
url = {https://ieeexplore.ieee.org/xpl/conhome/8604/proceeding},
isbn = {0-7695-1992-X},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/asap/2003.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Akkas02,
author = {Ahmet Akkas},
title = {A Combined Interval and Floating-Point Comparator/Selector},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {208--217},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030720},
doi = {10.1109/ASAP.2002.1030720},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Akkas02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AlamBJ02,
author = {Mehboob Alam and
Wael M. Badawy and
Graham A. Jullien},
title = {A Novel Pipelined Threads Architecture for {AES} Encryption Algorithm},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {296--302},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030728},
doi = {10.1109/ASAP.2002.1030728},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AlamBJ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/AnteloLMN02,
author = {Elisardo Antelo and
Tom{\'{a}}s Lang and
Paolo Montuschi and
Alberto Nannarelli},
title = {Fast Radix-4 Retimed Division with Selection by Comparisons},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {185--196},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030718},
doi = {10.1109/ASAP.2002.1030718},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/AnteloLMN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Arnold02,
author = {Mark G. Arnold},
title = {Reduced Power Consumption for {MPEG} Decoding with {LNS}},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {65--75},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030705},
doi = {10.1109/ASAP.2002.1030705},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Arnold02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BertoniBKMP02,
author = {Guido Bertoni and
Luca Breveglieri and
Israel Koren and
Paolo Maistri and
Vincenzo Piuri},
title = {On the Propagation of Faults and Their Detection in a Hardware Implementation
of the Advanced Encryption Standard},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {303},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030729},
doi = {10.1109/ASAP.2002.1030729},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BertoniBKMP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/BlumeHFN02,
author = {Holger Blume and
H. H{\"{u}}bert and
H. T. Feldk{\"{a}}mper and
Tobias G. Noll},
title = {Model-Based Exploration of the Design Space for Heterogeneous Systems
on Chip},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {29--40},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030702},
doi = {10.1109/ASAP.2002.1030702},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/BlumeHFN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Burgess02,
author = {Neil Burgess},
title = {{PAPA} - Packed Arithmetic on a Prefix Adder for Multimedia Applications},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {197--207},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030719},
doi = {10.1109/ASAP.2002.1030719},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Burgess02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CacheraR02,
author = {David Cachera and
Tanguy Risset},
title = {Advances in Bit Width Selection Methodology},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {381--390},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030737},
doi = {10.1109/ASAP.2002.1030737},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CacheraR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChamberlainFK02,
author = {Roger D. Chamberlain and
Mark A. Franklin and
Praveen Krishnamurthy},
title = {Optical Network Reconfiguration for Signal Processing Applications},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {344},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030733},
doi = {10.1109/ASAP.2002.1030733},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChamberlainFK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChesterC02,
author = {E. I. Chester and
John N. Coleman},
title = {Matrix Engine for Signal Processing Applications Using the Logarithmic
Number System},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {315--324},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030730},
doi = {10.1109/ASAP.2002.1030730},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChesterC02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ChungMK02,
author = {Chris Y. Chung and
Ravi Managuli and
Yongmin Kim},
title = {Design and Evaluation of a Multimedia Computing Architecture Based
on a 3D Graphics Pipeline},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {243--252},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030723},
doi = {10.1109/ASAP.2002.1030723},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ChungMK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/CurrieSGSR02,
author = {Steven M. Currie and
Paul R. Schumacher and
Barry K. Gilbert and
Earl E. Swartzlander Jr. and
Barbara A. Randall},
title = {Implementation of a Single Chip, Pipelined, Complex, One-Dimensional
Fast FourierTransform in 0.25 mu m BulkCMOS},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {335--343},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030732},
doi = {10.1109/ASAP.2002.1030732},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/CurrieSGSR02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DarteH02,
author = {Alain Darte and
Guillaume Huard},
title = {New Results on Array Contraction},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {359--370},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030735},
doi = {10.1109/ASAP.2002.1030735},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DarteH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DeVoreCEOF02,
author = {Michael D. DeVore and
Roger D. Chamberlain and
George Engel and
Joseph A. O'Sullivan and
Mark A. Franklin},
title = {Tradeoffs Between Quality of Results and Resource Consumption in a
Recognition System},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {391},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030738},
doi = {10.1109/ASAP.2002.1030738},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DeVoreCEOF02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/DraperSMK02,
author = {Jeffrey T. Draper and
Jeff Sondeen and
Sumit D. Mediratta and
Ihn Kim},
title = {Implementation of a 32-bit {RISC} Processor for the Data-Intensive
Architecture Processing-In-Memory Chip},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {163--172},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030716},
doi = {10.1109/ASAP.2002.1030716},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/DraperSMK02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Fortes02,
author = {Jos{\'{e}} A. B. Fortes},
title = {Nanocomputing with Delays},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {3},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030699},
doi = {10.1109/ASAP.2002.1030699},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Fortes02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/HossainPBP02,
author = {Afzal Hossain and
Daniel J. Pease and
James S. Burns and
Nasima Parveen},
title = {A Mathematical Model of Trace Cache},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {151--162},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030715},
doi = {10.1109/ASAP.2002.1030715},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/HossainPBP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/IrwinMMP02,
author = {James Irwin and
David May and
Henk L. Muller and
Dan Page},
title = {Predictable Instruction Caching for Media Processors},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {141--150},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030713},
doi = {10.1109/ASAP.2002.1030713},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/IrwinMMP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/IrwinPS02,
author = {James Irwin and
Dan Page and
Nigel P. Smart},
title = {Instruction Stream Mutation for Non-Deterministic Processors},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {286--295},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030727},
doi = {10.1109/ASAP.2002.1030727},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/IrwinPS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/KangS02,
author = {Chang Yong Kang and
Earl E. Swartzlander Jr.},
title = {An Analysis of the {CORDIC} Algorithm for Direct Digital Frequency
Synthesis},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {111--119},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030709},
doi = {10.1109/ASAP.2002.1030709},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/KangS02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Kornerup02,
author = {Peter Kornerup},
title = {Reviewing 4-to-2 Adders for Multi-Operand Addition},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {218},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030721},
doi = {10.1109/ASAP.2002.1030721},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Kornerup02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeFSY02,
author = {Ruby B. Lee and
A. Murat Fiskiran and
Zhijie Shi and
Xiao Yang},
title = {Refining Instruction Set Architecture for High-Performance Multimedia
Processing in Constrained Environments},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {253--264},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030724},
doi = {10.1109/ASAP.2002.1030724},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeFSY02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LeeJ02,
author = {Byeong Kil Lee and
Lizy Kurian John},
title = {Implications of Programmable General Purpose Processors for Compression/Encryption
Applications},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {233--242},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030722},
doi = {10.1109/ASAP.2002.1030722},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LeeJ02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LiaoH02,
author = {Tsai{-}Yun Liao and
Ta{-}Yin Hu},
title = {A CORBA-Based {GIS-T} for Ambulance Assignment},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {371--380},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030736},
doi = {10.1109/ASAP.2002.1030736},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LiaoH02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/LuT02,
author = {Chih{-}Chung Lu and
Shau{-}Yin Tseng},
title = {Integrated Design of {AES} (Advanced Encryption Standard) Encrypter
and Decrypter},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {277--285},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030726},
doi = {10.1109/ASAP.2002.1030726},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/LuT02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ManjunathaiahM02,
author = {Manju Manjunathaiah and
Graham M. Megson},
title = {Compositional Technique for Synthesising Multi-Phase Regular Arrays},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {7--16},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030700},
doi = {10.1109/ASAP.2002.1030700},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ManjunathaiahM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MatulaFM02,
author = {David W. Matula and
Alex Fit{-}Florea and
Lee D. McFearin},
title = {Evaluating Products of Non Linear Functions by Indirect Bipartite
Table Lookup},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {120--129},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030710},
doi = {10.1109/ASAP.2002.1030710},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MatulaFM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MohantyCJP02,
author = {Sumit Mohanty and
Seonil Choi and
Ju{-}wook Jang and
Viktor K. Prasanna},
title = {A Model-Based Methodology for Application Specific Energy Efficient
Data Path Design Using FPGAs},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {76--87},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030706},
doi = {10.1109/ASAP.2002.1030706},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MohantyCJP02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/MuscedereDJM02,
author = {Roberto Muscedere and
Vassil S. Dimitrov and
Graham A. Jullien and
William C. Miller},
title = {Efficient Conversion From Binary to Multi-Digit Multi-Dimensional
Logarithmic Number Systems Using Arrays of Range Addressable Look-Up
Tables},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {130},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030711},
doi = {10.1109/ASAP.2002.1030711},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/MuscedereDJM02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/ParkLKHY02,
author = {Woo{-}Chan Park and
Kil{-}Whan Lee and
Il{-}San Kim and
Tack{-}Don Han and
Sung{-}Bong Yang},
title = {A Mid-Texturing Pixel Rasterization Pipeline Architecture for 3D Rendering
Processors},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {173},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030717},
doi = {10.1109/ASAP.2002.1030717},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/ParkLKHY02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/PineiroEB02,
author = {Jos{\'{e}}{-}Alejandro Pi{\~{n}}eiro and
Milos D. Ercegovac and
Javier D. Bruguera},
title = {High-Radix Logarithm with Selection by Rounding},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {101--110},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030708},
doi = {10.1109/ASAP.2002.1030708},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/PineiroEB02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/Shiue02,
author = {Wen{-}Tsong Shiue},
title = {Low Power Memory Design},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {55--64},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030704},
doi = {10.1109/ASAP.2002.1030704},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/Shiue02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SitaramanRE02,
author = {K. Sitaraman and
N. Ranganathan and
Abdel Ejnioui},
title = {A {VLSI} Architecture for Object Recognition Using Tree Matching},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {325--334},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030731},
doi = {10.1109/ASAP.2002.1030731},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SitaramanRE02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/SpiveyBN02,
author = {Gary Spivey and
Shuvra S. Bhattacharyya and
Kazuo Nakajima},
title = {A Component Architecture for FPGA-Based, {DSP} System Design},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {41},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030703},
doi = {10.1109/ASAP.2002.1030703},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/SpiveyBN02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/asap/TurjanKD02,
author = {Alexandru Turjan and
Bart Kienhuis and
Ed F. Deprettere},
title = {A Compile Time Based Approach for Solving Out-of-Order Communication
in Kahn Process Networks},
booktitle = {13th {IEEE} International Conference on Application-Specific Systems,
Architectures, and Processors {(ASAP} 2002), 17-19 July 2002, San
Jose, CA, {USA}},
pages = {17--28},
publisher = {{IEEE} Computer Society},
year = {2002},
url = {https://doi.org/10.1109/ASAP.2002.1030701},
doi = {10.1109/ASAP.2002.1030701},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/asap/TurjanKD02.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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