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@inproceedings{DBLP:conf/cases/AbhinavN16, author = {Abhinav and Rupesh Nasre}, title = {FastCollect: offloading generational garbage collection to integrated GPUs}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {21:1--21:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968520}, doi = {10.1145/2968455.2968520}, timestamp = {Tue, 06 Nov 2018 11:07:42 +0100}, biburl = {https://dblp.org/rec/conf/cases/AbhinavN16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/BogdanPASH16, author = {Paul Bogdan and Partha Pratim Pande and Hussam Amrouch and Muhammad Shafique and J{\"{o}}rg Henkel}, title = {Power and thermal management in massive multicore chips: theoretical foundation meets architectural innovation and resource allocation}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {4:1--4:2}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2974013}, doi = {10.1145/2968455.2974013}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cases/BogdanPASH16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/CarlePMMHB16, author = {Thomas Carle and Dimitra Papagiannopoulou and Tali Moreshet and Andrea Marongiu and Maurice Herlihy and R. Iris Bahar}, title = {Thrifty-malloc: {A} {HW/SW} codesign for the dynamic management of hardware transactional memory in embedded multicore systems}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {20:1--20:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968513}, doi = {10.1145/2968455.2968513}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cases/CarlePMMHB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/ChoiDKDPMM16, author = {Wonje Choi and Karthi Duraisamy and Ryan Gary Kim and Janardhan Rao Doppa and Partha Pratim Pande and Radu Marculescu and Diana Marculescu}, title = {Hybrid network-on-chip architectures for accelerating deep learning kernels on heterogeneous manycore platforms}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {13:1--13:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968510}, doi = {10.1145/2968455.2968510}, timestamp = {Fri, 12 May 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cases/ChoiDKDPMM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/FedericoA16, author = {Alessandro Di Federico and Giovanni Agosta}, title = {A jump-target identification method for multi-architecture static binary translation}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {17:1--17:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968514}, doi = {10.1145/2968455.2968514}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/FedericoA16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/HegdeSRK16, author = {Gopalakrishna Hegde and Siddhartha and Nachiappan Ramasamy and Nachiket Kapre}, title = {CaffePresso: an optimized library for deep learning on embedded accelerator-based platforms}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {14:1--14:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968511}, doi = {10.1145/2968455.2968511}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/HegdeSRK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/IbrahimBCSP16, author = {Mohamed Ibrahim and Craig Boswell and Krishnendu Chakrabarty and Kristin Scott and Miroslav Pajic}, title = {A real-time digital-microfluidic platform for epigenetics}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {10:1--10:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968516}, doi = {10.1145/2968455.2968516}, timestamp = {Mon, 03 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/IbrahimBCSP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/KhadraSK16, author = {M. Ammar {Ben Khadra} and Dominik Stoffel and Wolfgang Kunz}, title = {Speculative disassembly of binary code}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {16:1--16:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968505}, doi = {10.1145/2968455.2968505}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/KhadraSK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/MantovaniCPGC16, author = {Paolo Mantovani and Emilio G. Cota and Christian Pilato and Giuseppe Di Guglielmo and Luca P. Carloni}, title = {Handling large data sets for high-performance embedded applications in heterogeneous systems-on-chip}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {3:1--3:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968509}, doi = {10.1145/2968455.2968509}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/MantovaniCPGC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/MitropoulouPJ16, author = {Konstantina Mitropoulou and Vasileios Porpodas and Timothy M. Jones}, title = {{COMET:} communication-optimised multi-threaded error-detection technique}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {7:1--7:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968508}, doi = {10.1145/2968455.2968508}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/MitropoulouPJ16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/Oppermann0RS16, author = {Julian Oppermann and Andreas Koch and Melanie Reuter{-}Oppermann and Oliver Sinnen}, title = {ILP-based modulo scheduling for high-level synthesis}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {1:1--1:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968512}, doi = {10.1145/2968455.2968512}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/Oppermann0RS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/PonugotiTM16, author = {Mounika Ponugoti and Amrish K. Tewar and Aleksandar Milenkovic}, title = {On-the-fly load data value tracing in multicores}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {18:1--18:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968507}, doi = {10.1145/2968455.2968507}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/PonugotiTM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/SanchezGMSWLM16, author = {Carlos Sanchez and Peter Gavin and Daniel Moreau and Magnus Sj{\"{a}}lander and David B. Whalley and Per Larsson{-}Edefors and Sally A. McKee}, title = {Redesigning a tagless access buffer to require minimal {ISA} changes}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {19:1--19:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968504}, doi = {10.1145/2968455.2968504}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cases/SanchezGMSWLM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/SteuwerRD16, author = {Michel Steuwer and Toomas Remmelg and Christophe Dubach}, title = {Matrix multiplication beyond auto-tuning: rewrite-based {GPU} code generation}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {15:1--15:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968521}, doi = {10.1145/2968455.2968521}, timestamp = {Wed, 14 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/SteuwerRD16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/SutarRR16, author = {Soubhagya Sutar and Arnab Raha and Vijay Raghunathan}, title = {{D-PUF:} an intrinsically reconfigurable {DRAM} {PUF} for device authentication in embedded systems}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {12:1--12:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968519}, doi = {10.1145/2968455.2968519}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/SutarRR16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/TagliaviniHMB16, author = {Giuseppe Tagliavini and Germain Haugou and Andrea Marongiu and Luca Benini}, title = {Enabling OpenVX support in mW-scale parallel accelerators}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {2:1--2:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968518}, doi = {10.1145/2968455.2968518}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/TagliaviniHMB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/TanKVKMP16, author = {Cheng Tan and Aditi Kulkarni Mohite and Vanchinathan Venkataramani and Manupa Karunaratne and Tulika Mitra and Li{-}Shiuan Peh}, title = {{LOCUS:} low-power customizable many-core architecture for wearables}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {11:1--11:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968506}, doi = {10.1145/2968455.2968506}, timestamp = {Sat, 25 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cases/TanKVKMP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/TzilisSVRS16, author = {Stavros Tzilis and Ioannis Sourdis and Vasileios Vasilikos and Dimitrios Rodopoulos and Dimitrios Soudris}, title = {Runtime management of adaptive MPSoCs for graceful degradation}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {5:1--5:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968517}, doi = {10.1145/2968455.2968517}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/TzilisSVRS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/WangXCTLY16, author = {Yu Wang and Lixue Xia and Ming Cheng and Tianqi Tang and Boxun Li and Huazhong Yang}, title = {{RRAM} based learning acceleration}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {9:1--9:2}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2981124}, doi = {10.1145/2968455.2981124}, timestamp = {Tue, 24 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cases/WangXCTLY16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/ZengHT16, author = {Luyuan Zeng and Pengcheng Huang and Lothar Thiele}, title = {Towards the design of fault-tolerant mixed-criticality systems on multicores}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {6:1--6:10}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2968515}, doi = {10.1145/2968455.2968515}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/ZengHT16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/cases/ZhangJCX16, author = {Youhui Zhang and Yu Ji and Wenguang Chen and Yuan Xie}, title = {Neural network transformation under hardware constraints}, booktitle = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, pages = {8:1}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455.2981122}, doi = {10.1145/2968455.2981122}, timestamp = {Wed, 19 Jun 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/cases/ZhangJCX16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/cases/2016, title = {2016 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, {CASES} 2016, Pittsburgh, Pennsylvania, USA, October 1-7, 2016}, publisher = {{ACM}}, year = {2016}, url = {https://doi.org/10.1145/2968455}, doi = {10.1145/2968455}, isbn = {978-1-4503-4482-1}, timestamp = {Tue, 06 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/cases/2016.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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