Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSearch dblp for Publications
export results for "toc:db/conf/charme/charme2005.bht:"
download as .bib file
@inproceedings{DBLP:conf/charme/AmlaDKKM05,
author = {Nina Amla and
Xiaoqun Du and
Andreas Kuehlmann and
Robert P. Kurshan and
Kenneth L. McMillan},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {An Analysis of SAT-Based Model Checking Techniques in an Industrial
Environment},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {254--268},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_20},
doi = {10.1007/11560548\_20},
timestamp = {Tue, 14 May 2019 10:00:39 +0200},
biburl = {https://dblp.org/rec/conf/charme/AmlaDKKM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/AxelssonCS05,
author = {Emil Axelsson and
Koen Claessen and
Mary Sheeran},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Wired: Wire-Aware Circuit Design},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {5--19},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_4},
doi = {10.1007/11560548\_4},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/AxelssonCS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/BaumgartnerM05,
author = {Jason Baumgartner and
Hari Mony},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Maximal Input Reduction of Sequential Netlists via Synergistic Reparameterization
and Localization Strategies},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {222--237},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_18},
doi = {10.1007/11560548\_18},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/BaumgartnerM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/BhattacharyaGG05,
author = {Ritwik Bhattacharya and
Steven M. German and
Ganesh Gopalakrishnan},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Symbolic Partial Order Reduction for Rule Based Transition Systems},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {332--335},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_25},
doi = {10.1007/11560548\_25},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/BhattacharyaGG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/BustanFGKV05,
author = {Doron Bustan and
Alon Flaisher and
Orna Grumberg and
Orna Kupferman and
Moshe Y. Vardi},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Regular Vacuity},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {191--206},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_16},
doi = {10.1007/11560548\_16},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/BustanFGKV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/Buttner05,
author = {Wolfram B{\"{u}}ttner},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Is Formal Verification Bound to Remain a Junior Partner of Simulation?},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {1},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_1},
doi = {10.1007/11560548\_1},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/Buttner05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/ChakrabartiCHKM05,
author = {Arindam Chakrabarti and
Krishnendu Chatterjee and
Thomas A. Henzinger and
Orna Kupferman and
Rupak Majumdar},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Verifying Quantitative Properties Using Bound Functions},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {50--64},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_7},
doi = {10.1007/11560548\_7},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/ChakrabartiCHKM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/ChocklerF05,
author = {Hana Chockler and
Kathi Fisler},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Temporal Modalities for Concisely Capturing Timing Diagrams},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {176--190},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_15},
doi = {10.1007/11560548\_15},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/charme/ChocklerF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/CiardoY05,
author = {Gianfranco Ciardo and
Andy Jinqing Yu},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Saturation-Based Symbolic Reachability Analysis Using Conjunctive
and Disjunctive Partitioning},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {146--161},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_13},
doi = {10.1007/11560548\_13},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/charme/CiardoY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/DalingerHP05,
author = {Iakov Dalinger and
Mark A. Hillebrand and
Wolfgang J. Paul},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {On the Verification of Memory Management Mechanisms},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {301--316},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_23},
doi = {10.1007/11560548\_23},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/DalingerHP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/FerdinandH05,
author = {Christian Ferdinand and
Reinhold Heckmann},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Verifying Timing Behavior by Abstract Interpretation of Executable
Code},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {336--339},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_26},
doi = {10.1007/11560548\_26},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/FerdinandH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/Fujita05,
author = {Masahiro Fujita},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Behavior-RTL Equivalence Checking Based on Data Transfer Analysis
with Virtual Controllers and Datapaths},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {340--344},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_27},
doi = {10.1007/11560548\_27},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/Fujita05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/GebremichaelVZGRR05,
author = {Biniam Gebremichael and
Frits W. Vaandrager and
Miaomiao Zhang and
Kees Goossens and
Edwin Rijpkema and
Andrei Radulescu},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Deadlock Prevention in the {\AE}thereal Protocol},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {345--348},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_28},
doi = {10.1007/11560548\_28},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/GebremichaelVZGRR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/GrosseD05,
author = {Daniel Gro{\ss}e and
Rolf Drechsler},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Acceleration of SAT-Based Iterative Property Checking},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {349--353},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_29},
doi = {10.1007/11560548\_29},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/charme/GrosseD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/GrumbergHIS05,
author = {Orna Grumberg and
Tamir Heyman and
Nili Ifergan and
Assaf Schuster},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Achieving Speedups in Distributed Symbolic Reachability Analysis Through
Asynchronous Computation},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {129--145},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_12},
doi = {10.1007/11560548\_12},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/GrumbergHIS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/GurfinkelC05,
author = {Arie Gurfinkel and
Marsha Chechik},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {How Thorough Is Thorough Enough?},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {65--80},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_8},
doi = {10.1007/11560548\_8},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/charme/GurfinkelC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/HuntR05,
author = {Warren A. Hunt Jr. and
Erik Reeber},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Formalization of the {DE2} Language},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {20--34},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_5},
doi = {10.1007/11560548\_5},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/HuntR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/ImaiK05,
author = {Masaharu Imai and
Akira Kitajima},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Verification Challenges in Configurable Processor Design with {ASIP}
Meister},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {2},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_2},
doi = {10.1007/11560548\_2},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/ImaiK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/IyerJPSS05,
author = {Subramanian K. Iyer and
Jawahar Jain and
Mukul R. Prasad and
Debashis Sahoo and
Thomas Sidle},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Error Detection Using {BMC} in a Parallel Environment},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {354--358},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_30},
doi = {10.1007/11560548\_30},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/IyerJPSS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/KapschitzG05,
author = {Tsachy Kapschitz and
Ran Ginosar},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Formal Verification of Synchronizers},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {359--362},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_31},
doi = {10.1007/11560548\_31},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/KapschitzG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/Lamport05,
author = {Leslie Lamport},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Real-Time Model Checking Is Really Simple},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {162--175},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_14},
doi = {10.1007/11560548\_14},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/Lamport05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/ManoliosS05,
author = {Panagiotis Manolios and
Sudarshan K. Srinivasan},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {A Parameterized Benchmark Suite of Hard Pipelined-Machine-Verification
Problems},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {363--366},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_32},
doi = {10.1007/11560548\_32},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/charme/ManoliosS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/Marques-Silva05,
author = {Jo{\~{a}}o Marques{-}Silva},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Improvements to the Implementation of Interpolant-Based Model Checking},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {367--370},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_33},
doi = {10.1007/11560548\_33},
timestamp = {Mon, 03 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/Marques-Silva05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/MatousekSV05,
author = {Petr Matousek and
Ales Smrcka and
Tom{\'{a}}s Vojnar},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware
Design},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {371--375},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_34},
doi = {10.1007/11560548\_34},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/MatousekSV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/MonyBA05,
author = {Hari Mony and
Jason Baumgartner and
Adnan Aziz},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Exploiting Constraints in Transformation-Based Verification},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {269--284},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_21},
doi = {10.1007/11560548\_21},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/MonyBA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/Morin-AlloryC05,
author = {Katell Morin{-}Allory and
David Cachera},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Proving Parameterized Systems: The Use of Pseudo-Pipelines in Polyhedral
Logic},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {376--379},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_35},
doi = {10.1007/11560548\_35},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/Morin-AlloryC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/PandavSG05,
author = {Sudhindra Pandav and
Konrad Slind and
Ganesh Gopalakrishnan},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Counterexample Guided Invariant Discovery for Parameterized Cache
Coherence Verification},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {317--331},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_24},
doi = {10.1007/11560548\_24},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/PandavSG05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/ParuthiJW05,
author = {Viresh Paruthi and
Christian Jacobi and
Kai Weber},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Efficient Symbolic Simulation via Dynamic Scheduling, Don't Caring,
and Case Splitting},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {114--128},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_11},
doi = {10.1007/11560548\_11},
timestamp = {Thu, 03 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/ParuthiJW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/PellL05,
author = {Oliver Pell and
Wayne Luk},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Resolving Quartz Overloading},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {380--383},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_36},
doi = {10.1007/11560548\_36},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/PellL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/RiedenLP05,
author = {Thomas In der Rieden and
Dirk Leinenbach and
Wolfgang J. Paul},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Towards the Pervasive Verification of Automotive Systems},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {3--4},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_3},
doi = {10.1007/11560548\_3},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/RiedenLP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/RoordaC05,
author = {Jan{-}Willem Roorda and
Koen Claessen},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {A New SAT-Based Algorithm for Symbolic Trajectory Evaluation},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {238--253},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_19},
doi = {10.1007/11560548\_19},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/RoordaC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/SafarES05,
author = {Mona Safar and
M. Watheq El{-}Kharashi and
Ashraf Salem},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {{FPGA} Based Accelerator for 3-SAT Conflict Analysis in {SAT} Solvers},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {384--387},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_37},
doi = {10.1007/11560548\_37},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/SafarES05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/SahooJIDE05,
author = {Debashis Sahoo and
Jawahar Jain and
Subramanian K. Iyer and
David L. Dill and
E. Allen Emerson},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Predictive Reachability Using a Sample-Based Approach},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {388--392},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_38},
doi = {10.1007/11560548\_38},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/SahooJIDE05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/ShenQL05,
author = {ShengYu Shen and
Ying Qin and
Sikun Li},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Minimizing Counterexample of {ACTL} Property},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {393--397},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_39},
doi = {10.1007/11560548\_39},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/ShenQL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/StaberJB05,
author = {Stefan Staber and
Barbara Jobstmann and
Roderick Bloem},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Finding and Fixing Faults},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {35--49},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_6},
doi = {10.1007/11560548\_6},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/charme/StaberJB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/TsowJ05,
author = {Alex Tsow and
Steven D. Johnson},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Data Refinement for Synchronous System Specification and Construction},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {398--401},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_40},
doi = {10.1007/11560548\_40},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/TsowJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/Velev05,
author = {Miroslav N. Velev},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Automatic Formal Verification of Liveness for Pipelined Processors
with Multicycle Functional Units},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {97--113},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_10},
doi = {10.1007/11560548\_10},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/Velev05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/WardS05,
author = {David Ward and
Fabio Somenzi},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Automatic Generation of Hints for Symbolic Traversal},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {207--221},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_17},
doi = {10.1007/11560548\_17},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/WardS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/WeiGC05,
author = {Ou Wei and
Arie Gurfinkel and
Marsha Chechik},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Identification and Counter Abstraction for Full Virtual Symmetry},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {285--300},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_22},
doi = {10.1007/11560548\_22},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/charme/WeiGC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/Young05,
author = {William D. Young},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Introducing Abstractions via Rewriting},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {402--405},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_41},
doi = {10.1007/11560548\_41},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/Young05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/Zarpas05,
author = {Emmanuel Zarpas},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {A Case Study: Formal Verification of Processor Critical Properties},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {406--409},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_42},
doi = {10.1007/11560548\_42},
timestamp = {Tue, 26 Jun 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/Zarpas05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/charme/ZhangPH05,
author = {Liang Zhang and
Mukul R. Prasad and
Michael S. Hsiao},
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Interleaved Invariant Checking with Dynamic Abstraction},
booktitle = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
pages = {81--96},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548\_9},
doi = {10.1007/11560548\_9},
timestamp = {Thu, 02 Aug 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/ZhangPH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/charme/2005,
editor = {Dominique Borrione and
Wolfgang J. Paul},
title = {Correct Hardware Design and Verification Methods, 13th {IFIP} {WG}
10.5 Advanced Research Working Conference, {CHARME} 2005, Saarbr{\"{u}}cken,
Germany, October 3-6, 2005, Proceedings},
series = {Lecture Notes in Computer Science},
volume = {3725},
publisher = {Springer},
year = {2005},
url = {https://doi.org/10.1007/11560548},
doi = {10.1007/11560548},
isbn = {3-540-29105-9},
timestamp = {Tue, 14 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/charme/2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
retrieved on 2024-05-04 21:37 CEST from data curated by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
