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@inproceedings{DBLP:conf/fpga/AhmedLW10,
  author       = {Usman Ahmed and
                  Guy G. Lemieux and
                  Steven J. E. Wilton},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {The impact of interconnect architecture on via-programmed structured
                  ASICs (VPSAs)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {263--272},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723157},
  doi          = {10.1145/1723112.1723157},
  timestamp    = {Tue, 06 Nov 2018 16:58:23 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/AhmedLW10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/AndersonR10,
  author       = {Jason Helge Anderson and
                  Chirag Ravishankar},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {{FPGA} power reduction by guarded evaluation},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {157--166},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723141},
  doi          = {10.1145/1723112.1723141},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/AndersonR10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BhattachryaBM10,
  author       = {Rahul Bhattacharya and
                  Santosh Biswas and
                  Siddhartha Mukhopadhyay},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {{FPGA} based chip emulation system for test development and verification
                  of analog and mixed signal circuits (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {284},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723165},
  doi          = {10.1145/1723112.1723165},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/BhattachryaBM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BianLCZ10,
  author       = {Huimin Bian and
                  Andrew C. Ling and
                  Alexander Choong and
                  Jianwen Zhu},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Towards scalable placement for FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {147--156},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723140},
  doi          = {10.1145/1723112.1723140},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/BianLCZ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/BruggeK10,
  author       = {Mike Brugge and
                  Mohammed A. S. Khalid},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Design and evaluation of a parameterizable NoC router for FPGAs (abstract
                  only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {292},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723188},
  doi          = {10.1145/1723112.1723188},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/BruggeK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChandrasekaranSM10,
  author       = {Sunita Chandrasekaran and
                  Shilpa Shanbagh and
                  Douglas L. Maskell},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {A dependency graph based methodology for parallelizing {HLL} applications
                  on {FPGA} (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {286},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723171},
  doi          = {10.1145/1723112.1723171},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ChandrasekaranSM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChenPF10,
  author       = {Zhimin Chen and
                  Richard Neil Pittman and
                  Alessandro Forin},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Combining multicore and reconfigurable instruction set extensions},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {33--36},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723119},
  doi          = {10.1145/1723112.1723119},
  timestamp    = {Thu, 05 May 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/ChenPF10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChenPPCAPLWHWM10,
  author       = {Chen Chen and
                  Roozbeh Parsa and
                  Nishant Patil and
                  Soogine Chong and
                  Kerem Akarvardar and
                  J. Provine and
                  David Lewis and
                  Jeff Watt and
                  Roger T. Howe and
                  H.{-}S. Philip Wong and
                  Subhasish Mitra},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Efficient FPGAs using nanoelectromechanical relays},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {273--282},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723158},
  doi          = {10.1145/1723112.1723158},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ChenPPCAPLWHWM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ChenSCLFNB10,
  author       = {Doris Chen and
                  Deshanand P. Singh and
                  Jeffrey Chromczak and
                  David M. Lewis and
                  Ryan Fung and
                  David Neto and
                  Vaughn Betz},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {A comprehensive approach to modeling, characterizing and optimizing
                  for metastability in FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {167--176},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723142},
  doi          = {10.1145/1723112.1723142},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ChenSCLFNB10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CongGJLMYZ10,
  author       = {Jason Cong and
                  Karthik Gururaj and
                  Wei Jiang and
                  Bin Liu and
                  Kirill Minkovich and
                  Bo Yuan and
                  Yi Zou},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Accelerating Monte Carlo based {SSTA} using {FPGA}},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {111--114},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723132},
  doi          = {10.1145/1723112.1723132},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/CongGJLMYZ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/CongM10,
  author       = {Jason Cong and
                  Kirill Minkovich},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {LUT-based {FPGA} technology mapping for reliability (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {288},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723177},
  doi          = {10.1145/1723112.1723177},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/CongM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DaiNZ10,
  author       = {Zefu Dai and
                  Nick Ni and
                  Jianwen Zhu},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {A 1 cycle-per-byte {XML} parsing accelerator},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {199--208},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723148},
  doi          = {10.1145/1723112.1723148},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/DaiNZ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DaiVSPPTPMKA10,
  author       = {Donglai Dai and
                  Aniruddha S. Vaidya and
                  Roy Saharoy and
                  Seungjoon Park and
                  Dongkook Park and
                  Hariharan L. Thantry and
                  Ralf Plate and
                  Elmar Maas and
                  Akhilesh Kumar and
                  Mani Azimi},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {FPGA-based prototyping of a 2D {MESH} / {TORUS} on-chip interconnect
                  (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {293},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723191},
  doi          = {10.1145/1723112.1723191},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/DaiVSPPTPMKA10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DaigneaultD10,
  author       = {Marc{-}Andr{\'{e}} Daigneault and
                  Jean{-}Pierre David},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Towards 5ps resolution {TDC} on a dynamically reconfigurable {FPGA}
                  (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {283},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723161},
  doi          = {10.1145/1723112.1723161},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/DaigneaultD10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/DuttonK10,
  author       = {Marcus Dutton and
                  David C. Keezer},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {An architecture for graphics processing in an {FPGA} (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {283},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723162},
  doi          = {10.1145/1723112.1723162},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/DuttonK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/FarisiBDS10,
  author       = {Brahim Al Farisi and
                  Karel Bruneel and
                  Harald Devos and
                  Dirk Stroobandt},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Automatic tool flow for shift-register-LUT reconfiguration: making
                  run-time reconfiguration fast and easy (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {287},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723175},
  doi          = {10.1145/1723112.1723175},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/FarisiBDS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/FosterH10,
  author       = {David L. Foster and
                  Darrin M. Hanna},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Maximizing area-constrained partial fault tolerance in reconfigurable
                  logic},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {259--262},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723155},
  doi          = {10.1145/1723112.1723155},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/FosterH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/FrigoRBWWCRK10,
  author       = {Jan R. Frigo and
                  Eric Y. Raby and
                  Sean M. Brennan and
                  Christophe Wolinski and
                  Charles Wagner and
                  Fran{\c{c}}ois Charot and
                  Edward Rosten and
                  Vinod Kulathumani},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Energy efficient sensor node implementations},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {37--40},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723120},
  doi          = {10.1145/1723112.1723120},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/FrigoRBWWCRK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GharehbaghiAF10,
  author       = {Amir Masoud Gharehbaghi and
                  Bijan Alizadeh and
                  Masahiro Fujita},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Aggressive overclocking support using a novel timing error recovery
                  technique on FPGAs (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {288},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723178},
  doi          = {10.1145/1723112.1723178},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/GharehbaghiAF10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GoehringerHBB10,
  author       = {Diana G{\"{o}}hringer and
                  Michael H{\"{u}}bner and
                  Michael Benz and
                  J{\"{u}}rgen Becker},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {A semi-automatic toolchain for reconfigurable multiprocessor systems-on-chip:
                  architecture development and application partitioning (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {286},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723170},
  doi          = {10.1145/1723112.1723170},
  timestamp    = {Wed, 28 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/GoehringerHBB10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/GuptaC10,
  author       = {Dharmendra P. Gupta and
                  Paul Chow},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Acceleration of an analytical approach to collateralized debt obligation
                  pricing},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {103--106},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723130},
  doi          = {10.1145/1723112.1723130},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/GuptaC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HamidL10,
  author       = {Y. Hamid and
                  Martin Langhammer},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Multiplier architectures for {FPGA} double precision functions (abstract
                  only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {287},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723174},
  doi          = {10.1145/1723112.1723174},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/HamidL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HuangLPZLTC10,
  author       = {Kan Huang and
                  Junlin Lu and
                  Jiufeng Pang and
                  Yansong Zheng and
                  Hao Li and
                  Dong Tong and
                  Xu Cheng},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {{FPGA} prototyping of an amba-based windows-compatible SoC},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {13--22},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723117},
  doi          = {10.1145/1723112.1723117},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/HuangLPZLTC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/HuangV10,
  author       = {Chen Huang and
                  Frank Vahid},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Server-side coprocessor updating for mobile devices with FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {125--134},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723135},
  doi          = {10.1145/1723112.1723135},
  timestamp    = {Mon, 07 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/HuangV10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/JacobBC10,
  author       = {Arpith C. Jacob and
                  Jeremy D. Buhler and
                  Roger D. Chamberlain},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Design space exploration of throughput-optimized arrays from recurrence
                  abstractions (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {286},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723172},
  doi          = {10.1145/1723112.1723172},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/JacobBC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/JamiesonK10,
  author       = {Peter A. Jamieson and
                  Kenneth B. Kent},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Odin {II:} an open-source verilog {HDL} synthesis tool for {FPGA}
                  cad flows (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {288},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723176},
  doi          = {10.1145/1723112.1723176},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/JamiesonK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/JinPF10,
  author       = {Zhanpeng Jin and
                  Richard Neil Pittman and
                  Alessandro Forin},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Reconfigurable custom floating-point instructions (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {287},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723173},
  doi          = {10.1145/1723112.1723173},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/JinPF10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/JohnsonW10,
  author       = {Jonathan M. Johnson and
                  Michael J. Wirthlin},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Voter insertion algorithms for {FPGA} designs using triple modular
                  redundancy},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {249--258},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723154},
  doi          = {10.1145/1723112.1723154},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/JohnsonW10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/KimR10,
  author       = {Sunwoo Kim and
                  Won Woo Ro},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {{FPGA} implementation of highly parallelized decoder logic for network
                  coding (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {284},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723163},
  doi          = {10.1145/1723112.1723163},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/KimR10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LaForestS10,
  author       = {Charles Eric LaForest and
                  J. Gregory Steffan},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Efficient multi-ported memories for FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {41--50},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723122},
  doi          = {10.1145/1723112.1723122},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LaForestS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LamoureuxMS10,
  author       = {Julien Lamoureux and
                  Scott Miller and
                  Mihai Sima},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Fine-grained vs. coarse-grained shift-and-add arithmetic in FPGAs
                  (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {290},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723183},
  doi          = {10.1145/1723112.1723183},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LamoureuxMS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LeYP10,
  author       = {Hoang Le and
                  Yi{-}Hua E. Yang and
                  Viktor K. Prasanna},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Memory efficient string matching: a modular approach on FPGAs (abstract
                  only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {285},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723167},
  doi          = {10.1145/1723112.1723167},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LeYP10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LeeS10,
  author       = {Jason Lee and
                  Lesley Shannon},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Predicting the performance of application-specific NoCs implemented
                  on FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {23--32},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723118},
  doi          = {10.1145/1723112.1723118},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LeeS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LeemWJH10,
  author       = {Larkhoon Leem and
                  James A. Weaver and
                  Metha Jeeradit and
                  James S. Harris Jr.},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Nano-magnetic non-volatile {CMOS} circuits for nano-scale FPGAs (abstract
                  only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {291},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723186},
  doi          = {10.1145/1723112.1723186},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LeemWJH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LinLW10,
  author       = {Mingjie Lin and
                  Ilia A. Lebedev and
                  John Wawrzynek},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {High-throughput bayesian computing machine with reconfigurable hardware},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {73--82},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723127},
  doi          = {10.1145/1723112.1723127},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LinLW10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LinM10,
  author       = {Mingjie Lin and
                  Yaling Ma},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Scalable architecture for programmable quantum gate array (abstract
                  only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {290},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723182},
  doi          = {10.1145/1723112.1723182},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LinM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiuPF10,
  author       = {Shaoshan Liu and
                  Richard Neil Pittman and
                  Alessandro Forin},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Energy reduction with run-time partial reconfiguration (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {292},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723189},
  doi          = {10.1145/1723112.1723189},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LiuPF10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LiuPF10a,
  author       = {Shaoshan Liu and
                  Richard Neil Pittman and
                  Alessandro Forin},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Minimizing partial reconfiguration overhead with fully streaming {DMA}
                  engines and intelligent {ICAP} controller (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {292},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723190},
  doi          = {10.1145/1723112.1723190},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/LiuPF10a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/LucasDC10,
  author       = {Gregory Lucas and
                  Chen Dong and
                  Deming Chen},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Variation-aware placement for FPGAs with multi-cycle statistical timing
                  analysis},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {177--180},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723143},
  doi          = {10.1145/1723112.1723143},
  timestamp    = {Mon, 27 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/LucasDC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MahdavikhahMSN10,
  author       = {Behzad Mahdavikhah and
                  Ramin Mafi and
                  Shahin Sirouspour and
                  Nicola Nicolici},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Haptic rendering of deformable objects using a multiple {FPGA} parallel
                  computing architecture},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {189--198},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723147},
  doi          = {10.1145/1723112.1723147},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/MahdavikhahMSN10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/MishchenkoBJ10,
  author       = {Alan Mishchenko and
                  Robert K. Brayton and
                  Stephen Jang},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Global delay optimization using structural choices},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {181--184},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723144},
  doi          = {10.1145/1723112.1723144},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/MishchenkoBJ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/NiamatPR10,
  author       = {Mohammed Y. Niamat and
                  Sowmya Panuganti and
                  Tejas Raviraj},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Modeling and simulation of nano quantum FPGAs (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {291},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723185},
  doi          = {10.1145/1723112.1723185},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/NiamatPR10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/PanZ10,
  author       = {Yangyang Pan and
                  Tong Zhang},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {DRAM-based {FPGA} enabled by three-dimensional (3d) memory stacking
                  (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {290},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723184},
  doi          = {10.1145/1723112.1723184},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/PanZ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ParvezMM10,
  author       = {Husain Parvez and
                  Zied Marrakchi and
                  Habib Mehrez},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Heterogeneous-ASIF: an application specific inflexible {FPGA} using
                  heterogeneous logic blocks (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {290},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723181},
  doi          = {10.1145/1723112.1723181},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ParvezMM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/RupnowAFC10,
  author       = {Kyle Rupnow and
                  Jacob Adriaens and
                  Wenyin Fu and
                  Katherine Compton},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Accurately evaluating application performance in simulated hybrid
                  multi-tasking systems},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {135--144},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723136},
  doi          = {10.1145/1723112.1723136},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/RupnowAFC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SchelleCSWZCPMOHSBSW10,
  author       = {Graham Schelle and
                  Jamison D. Collins and
                  Ethan Schuchman and
                  Perry H. Wang and
                  Xiang Zou and
                  Gautham N. Chinya and
                  Ralf Plate and
                  Thorsten Mattner and
                  Franz Olbrich and
                  Per Hammarlund and
                  Ronak Singhal and
                  Jim Brayton and
                  Sebastian Steibl and
                  Hong Wang},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Intel nehalem processor core made {FPGA} synthesizable},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {3--12},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723116},
  doi          = {10.1145/1723112.1723116},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SchelleCSWZCPMOHSBSW10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SchneiderDLMS10,
  author       = {Skyler Schneider and
                  Daniel Y. Deng and
                  Daniel Lo and
                  Greg Malysa and
                  G. Edward Suh},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Implementing dynamic information flow tracking on microprocessors
                  with integrated {FPGA} fabric (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {285},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723168},
  doi          = {10.1145/1723112.1723168},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/SchneiderDLMS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ShanWYWXY10,
  author       = {Yi Shan and
                  Bo Wang and
                  Jing Yan and
                  Yu Wang and
                  Ningyi Xu and
                  Huazhong Yang},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {{FPMR:} MapReduce framework on {FPGA}},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {93--102},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723129},
  doi          = {10.1145/1723112.1723129},
  timestamp    = {Tue, 23 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/ShanWYWXY10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SiegelW10,
  author       = {Shepard Siegel and
                  Michael J. Wirthlin},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {{FPGA-2010} pre-conference workshop on open-source for {FPGA}},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {1},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723114},
  doi          = {10.1145/1723112.1723114},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SiegelW10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SimsaS10,
  author       = {Jir{\'{\i}} Simsa and
                  Satnam Singh},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Designing hardware with dynamic memory abstraction},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {69--72},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723125},
  doi          = {10.1145/1723112.1723125},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SimsaS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/SrinathC10,
  author       = {Shreesha Srinath and
                  Katherine Compton},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Automatic generation of high-performance multipliers for FPGAs with
                  asymmetric multiplier blocks},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {51--58},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723123},
  doi          = {10.1145/1723112.1723123},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/SrinathC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/StevensCFMS10,
  author       = {Kristian Stevens and
                  Henry Chen and
                  Terry Filiba and
                  Peter L. McMahon and
                  Yun S. Song},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Application of a reconfigurable computing cluster to ultra high throughput
                  genome resequencing (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {284},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723164},
  doi          = {10.1145/1723112.1723164},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/StevensCFMS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/StottWSC10,
  author       = {Edward A. Stott and
                  Justin S. J. Wong and
                  N. Pete Sedcole and
                  Peter Y. K. Cheung},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Degradation in FPGAs: measurement and modelling},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {229--238},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723152},
  doi          = {10.1145/1723112.1723152},
  timestamp    = {Wed, 03 Apr 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/StottWSC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TakataM10,
  author       = {Taiga Takata and
                  Yusuke Matsunaga},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {A heuristic algorithm for LUT-based {FPGA} technology mapping using
                  the lower bound for {DAG} covering problem (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {289},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723179},
  doi          = {10.1145/1723112.1723179},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/TakataM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TheodoropoulosKG10,
  author       = {Dimitris Theodoropoulos and
                  Georgi Kuzmanov and
                  Georgi Gaydadjiev},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {A 3d-audio reconfigurable processor},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {107--110},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723131},
  doi          = {10.1145/1723112.1723131},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/TheodoropoulosKG10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/TsoiL10,
  author       = {Kuen Hung Tsoi and
                  Wayne Luk},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Axel: a heterogeneous cluster with FPGAs and GPUs},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {115--124},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723134},
  doi          = {10.1145/1723112.1723134},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/TsoiL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/UnnikrishnanVLDCGT10,
  author       = {Deepak Unnikrishnan and
                  Ramakrishna Vadlamani and
                  Yong Liao and
                  Abhishek Dwaraki and
                  J{\'{e}}r{\'{e}}mie Crenne and
                  Lixin Gao and
                  Russell Tessier},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Scalable network virtualization using FPGAs},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {219--228},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723150},
  doi          = {10.1145/1723112.1723150},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/UnnikrishnanVLDCGT10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/VissersVKBMC10,
  author       = {Kees A. Vissers and
                  Devada Varma and
                  Vinod Kathail and
                  Jeff Bier and
                  Don MacMillen and
                  Joseph R. Cavallaro},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Programming high performance signal processing systems in high level
                  languages},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {145},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723138},
  doi          = {10.1145/1723112.1723138},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/VissersVKBMC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WangGCTH10,
  author       = {Huandong Wang and
                  Xiang Gao and
                  Yunji Chen and
                  Dan Tang and
                  Weiwu Hu},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {A multi-FPGA based platform for emulating a 100m-transistor-scale
                  processor with high-speed peripherals (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {283},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723160},
  doi          = {10.1145/1723112.1723160},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/WangGCTH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/WangPKL10,
  author       = {Hao Wang and
                  Shi Pu and
                  Gabriel Knezek and
                  Jyh{-}Charn Liu},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {A modular {NFA} architecture for regular expression matching},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {209--218},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723149},
  doi          = {10.1145/1723112.1723149},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/WangPKL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YanXCGWLH10,
  author       = {Jing Yan and
                  Ningyi Xu and
                  Xiongfei Cai and
                  Rui Gao and
                  Yu Wang and
                  Rong Luo and
                  Feng{-}Hsiung Hsu},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {LambdaRank acceleration for relevance ranking in web search engines
                  (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {285},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723166},
  doi          = {10.1145/1723112.1723166},
  timestamp    = {Tue, 23 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/YanXCGWLH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YangP10,
  author       = {Yi{-}Hua E. Yang and
                  Viktor K. Prasanna},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {High throughput and large capacity pipelined dynamic search tree on
                  {FPGA}},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {83--92},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723128},
  doi          = {10.1145/1723112.1723128},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/YangP10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/YasudaTIKANF10,
  author       = {Shinichi Yasuda and
                  Tetsufumi Tanamoto and
                  Kazutaka Ikegami and
                  Atsuhiro Kinoshita and
                  Keiko Abe and
                  Hirotaka Nishino and
                  Shinobu Fujita},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {High-performance {FPGA} based on novel {DSS-MOSFET} and non-volatile
                  configuration memory (abstract only)},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {291},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723187},
  doi          = {10.1145/1723112.1723187},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/YasudaTIKANF10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhangHWHT10,
  author       = {Chun Zhang and
                  Yu Hu and
                  Lingli Wang and
                  Lei He and
                  Jiarong Tong},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Building a faster boolean matcher using bloom filter},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {185--188},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723145},
  doi          = {10.1145/1723112.1723145},
  timestamp    = {Wed, 30 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/fpga/ZhangHWHT10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZhangZZTLCC10,
  author       = {Jiyu Zhang and
                  Zhiru Zhang and
                  Sheng Zhou and
                  Mingxing Tan and
                  Xianhua Liu and
                  Xu Cheng and
                  Jason Cong},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Bit-level optimization for high-level synthesis and FPGA-based acceleration},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {59--68},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723124},
  doi          = {10.1145/1723112.1723124},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ZhangZZTLCC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/fpga/ZickH10,
  author       = {Kenneth M. Zick and
                  John P. Hayes},
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {On-line sensing for healthier {FPGA} systems},
  booktitle    = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  pages        = {239--248},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112.1723153},
  doi          = {10.1145/1723112.1723153},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/ZickH10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/fpga/2010,
  editor       = {Peter Y. K. Cheung and
                  John Wawrzynek},
  title        = {Proceedings of the {ACM/SIGDA} 18th International Symposium on Field
                  Programmable Gate Arrays, {FPGA} 2010, Monterey, California, USA,
                  February 21-23, 2010},
  publisher    = {{ACM}},
  year         = {2010},
  url          = {https://doi.org/10.1145/1723112},
  doi          = {10.1145/1723112},
  isbn         = {978-1-60558-911-4},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/fpga/2010.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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