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@inproceedings{DBLP:conf/glvlsi/AgostiniPBRGS06,
author = {Luciano Volcan Agostini and
Roger Endrigo Carvalho Porto and
Sergio Bampi and
Leandro Rosa and
Jos{\'{e}} Lu{\'{\i}}s G{\"{u}}ntzel and
Ivan Saraiva Silva},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {High throughput architecture for {H.264/AVC} forward transforms block},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {320--323},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127982},
doi = {10.1145/1127908.1127982},
timestamp = {Wed, 16 Aug 2023 21:16:32 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AgostiniPBRGS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BaneresCK06,
author = {David Ba{\~{n}}eres and
Jordi Cortadella and
Michael Kishinevsky},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Dominator-based partitioning for delay optimization},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {67--72},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127927},
doi = {10.1145/1127908.1127927},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BaneresCK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BastaniZ06,
author = {Ali Bastani and
Charles A. Zukowski},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Monotonic static {CMOS} tradeoffs in sub-100nm technologies},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {278--283},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127973},
doi = {10.1145/1127908.1127973},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BastaniZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BhattiDD06,
author = {Rashed Zafar Bhatti and
Monty Denneau and
Jeff Draper},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {2 Gbps SerDes design based on {IBM} Cu-11 (130nm) standard cell technology},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {198--203},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127956},
doi = {10.1145/1127908.1127956},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BhattiDD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BonnyH06,
author = {Talal Bonny and
J{\"{o}}rg Henkel},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Using Lin-Kernighan algorithm for look-up table compression to improve
code density},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {259--265},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127969},
doi = {10.1145/1127908.1127969},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BonnyH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BuiS06,
author = {Hung Tien Bui and
Yvon Savaria},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {High speed differential pulse-width control loop based on frequency-to-voltage
converters},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {53--56},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127923},
doi = {10.1145/1127908.1127923},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BuiS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CampbellK06,
author = {Scott J. Campbell and
Sunil P. Khatri},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Resource and delay efficient matrix multiplication using newer {FPGA}
devices},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {308--311},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127979},
doi = {10.1145/1127908.1127979},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/CampbellK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChandraRL06,
author = {Sathish Chandra and
Francesco Regazzoni and
Marcello Lajolo},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Hardware/software partitioning of operating systems: a behavioral
synthesis approach},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {324--329},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127983},
doi = {10.1145/1127908.1127983},
timestamp = {Tue, 31 Mar 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChandraRL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenL06,
author = {Jun{-}Da Chen and
Zhi{-}Ming Lin},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A low-power and high-linear double-balanced switching mixer},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {131--134},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127941},
doi = {10.1145/1127908.1127941},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenLX06,
author = {Chuen{-}Song Chen and
Jien{-}Chung Lo and
Tian Xia},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {An indirect current sensing technique for {IDDQ} and {IDDT} tests},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {235--240},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127964},
doi = {10.1145/1127908.1127964},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenLX06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChengC06,
author = {Wei{-}Chung Cheng and
Chain{-}Fu Chao},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Perception-guided power minimization for color sequential displays},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {290--295},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127975},
doi = {10.1145/1127908.1127975},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChengC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChingY06,
author = {Royce L. S. Ching and
Evangeline F. Y. Young},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Shuttle mask floorplanning with modified alpha-restricted grid},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {85--90},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127930},
doi = {10.1145/1127908.1127930},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChingY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CoskunRLM06,
author = {Ayse K. Coskun and
Tajana Simunic Rosing and
Yusuf Leblebici and
Giovanni De Micheli},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A simulation methodology for reliability analysis in multi-core SoCs},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {95--99},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127933},
doi = {10.1145/1127908.1127933},
timestamp = {Tue, 23 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CoskunRLM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DaiYC06,
author = {Yongmei Dai and
Zhiyuan Yan and
Ning Chen},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Parallel turbo-sum-product decoder architecture for quasi-cyclic {LDPC}
codes},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {312--315},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127980},
doi = {10.1145/1127908.1127980},
timestamp = {Wed, 15 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DaiYC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DamecharlaVCB06,
author = {Hima B. Damecharla and
Kamal K. Varma and
Joan Carletta and
Amy E. Bell},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {{FPGA} implementation of a parallel {EBCOT} tier-1 encoder that preserves
coding efficiency},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {266--271},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127970},
doi = {10.1145/1127908.1127970},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DamecharlaVCB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/El-NozahiM06,
author = {Mohamed El{-}Nozahi and
Yehia Massoud},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {An integrated circuit/behavioral simulation framework for continuous-time
sigma-delta ADCs},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {353--356},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127989},
doi = {10.1145/1127908.1127989},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/El-NozahiM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FatemiAPAT06,
author = {Hanif Fatemi and
Soroush Abbaspour and
Massoud Pedram and
Amir H. Ajami and
Emre Tuncer},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {{SACI:} statistical static timing analysis of coupled interconnects},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {241--246},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127965},
doi = {10.1145/1127908.1127965},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/FatemiAPAT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FuYA06,
author = {Bo Fu and
Qiaoyan Yu and
Paul Ampadu},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Energy-delay minimization in nanoscale domino logic},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {316--319},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127981},
doi = {10.1145/1127908.1127981},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/FuYA06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FummiPLP06,
author = {Franco Fummi and
Giovanni Perbellini and
Mirko Loghi and
Massimo Poncino},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {ISS-centric modular {HW/SW} co-simulation},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {31--36},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127918},
doi = {10.1145/1127908.1127918},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/FummiPLP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GargSGJGK06,
author = {Rajesh Garg and
Mario S{\'{a}}nchez and
Kanupriya Gulati and
Nikhil Jayakumar and
Anshul Gupta and
Sunil P. Khatri},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A design flow to optimize circuit delay by using standard cells and
PLAs},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {217--222},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127960},
doi = {10.1145/1127908.1127960},
timestamp = {Thu, 20 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GargSGJGK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GrosseKD06,
author = {Daniel Gro{\ss}e and
Ulrich K{\"{u}}hne and
Rolf Drechsler},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {{HW/SW} co-verification of embedded systems using bounded model checking},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {43--48},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127920},
doi = {10.1145/1127908.1127920},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GrosseKD06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuangV06,
author = {Renqiu Huang and
Ranga Vemuri},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Transformation synthesis for data intensive applications to FPGAs},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {349--352},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127988},
doi = {10.1145/1127908.1127988},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HuangV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/IyengarJABDFGSTW06,
author = {Vikram Iyengar and
Mark Johnson and
Theo Anemikos and
Bob Bassett and
Mike Degregorio and
Rudy Farmer and
Gary Grise and
Phil Stevens and
Mark Taylor and
Frank Woytowich},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Performance verification of high-performance ASICs using at-speed
structural test},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {247--252},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127966},
doi = {10.1145/1127908.1127966},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/IyengarJABDFGSTW06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JajooSM06,
author = {Abhishek Jajoo and
Michael Sperling and
Tamal Mukherjee},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Synthesis of a wideband low noise amplifier},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {57--62},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127924},
doi = {10.1145/1127908.1127924},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JajooSM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KahngLX06,
author = {Andrew B. Kahng and
Bao Liu and
Xu Xu},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Statistical gate delay calculation with crosstalk alignment consideration},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {223--228},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127961},
doi = {10.1145/1127908.1127961},
timestamp = {Thu, 21 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KahngLX06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KalathasVP06,
author = {Marios Kalathas and
Dimitrios Voudouris and
George K. Papakonstantinou},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A heuristic algorithm to minimize ESOPs for multiple-output incompletely
specified functions},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {357--361},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127990},
doi = {10.1145/1127908.1127990},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KalathasVP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KangP06,
author = {Chang Woo Kang and
Massoud Pedram},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Low-power clustering with minimum logic replication for coarse-grained,
antifuse based FPGAs},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {79--84},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127929},
doi = {10.1145/1127908.1127929},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KangP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KimK06,
author = {Young{-}Jun Kim and
Taewhan Kim},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {{HW/SW} partitioning techniques for multi-mode multi-task embedded
applications},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {25--30},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127917},
doi = {10.1145/1127908.1127917},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KimK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KimLH06,
author = {Hosung (Leo) Kim and
John Lillis and
Milos Hrkic},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Techniques for improved placement-coupled logic replication},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {211--216},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127959},
doi = {10.1145/1127908.1127959},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KimLH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KimO06,
author = {Joonsoo Kim and
Michael Orshansky},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Towards formal probabilistic power-performance design space exploration},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {229--234},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127962},
doi = {10.1145/1127908.1127962},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KimO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KooM06,
author = {Heon{-}Mo Koo and
Prabhat Mishra},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Test generation using SAT-based bounded model checking for validation
of pipelined processors},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {362--365},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127991},
doi = {10.1145/1127908.1127991},
timestamp = {Mon, 18 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KooM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KoolivandSFZJ06,
author = {Yarallah Koolivand and
Omid Shoaei and
Ali Fotowat{-}Ahmady and
Ali Zahabi and
Parviz Jabedar Maralani},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Nonlinearity Analysis in {ISD} {CMOS} LNA's Using Volterra Series},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {135--139},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127942},
doi = {10.1145/1127908.1127942},
timestamp = {Thu, 22 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KoolivandSFZJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KuOMI06,
author = {Ja Chun Ku and
Serkan Ozdemir and
Gokhan Memik and
Yehea I. Ismail},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Power density minimization for highly-associative caches in embedded
processors},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {100--104},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127934},
doi = {10.1145/1127908.1127934},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KuOMI06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KumarK06,
author = {Ranjith Kumar and
Volkan Kursun},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A design methodology for temperature variation insensitive low power
circuits},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {410--415},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1128002},
doi = {10.1145/1127908.1128002},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KumarK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LawYC06,
author = {Jill H. Y. Law and
Evangeline F. Y. Young and
Royce L. S. Ching},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Block alignment in 3D floorplan using layered {TCG}},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {376--380},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127994},
doi = {10.1145/1127908.1127994},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LawYC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiLY06,
author = {Zhiyuan Li and
Fengchang Lai and
Mingyan Yu},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Low-noise high-precision operational amplifier using vertical {NPN}
transistor in {CMOS} technology},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {123--126},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127939},
doi = {10.1145/1127908.1127939},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiLY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiTM06,
author = {Lun Li and
Mitchell A. Thornton and
David W. Matula},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A digit serial algorithm for the integer power operation},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {302--307},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127978},
doi = {10.1145/1127908.1127978},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiTM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiY06,
author = {Minghai Li and
Fei Yuan},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A 0.13\emph{\({}_{\mbox{{\(\mathrm{\mu}\)}m}}\)} {CMOS} 10 Gb/s current-mode
class {AB} serial link transmitter with low supply voltage sensitivity},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {63--66},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127925},
doi = {10.1145/1127908.1127925},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuC06,
author = {Xiangyuan Liu and
Shuming Chen},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Delay and Power Estimation Models of Low-Swing Interconnects for Design
Planning},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {91--94},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127932},
doi = {10.1145/1127908.1127932},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuK06,
author = {Zhiyu Liu and
Volkan Kursun},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Leakage current starved domino logic},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {428--433},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1128005},
doi = {10.1145/1127908.1128005},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuSM06,
author = {Jiangjiang Liu and
Krishnan Sundaresan and
Nihar R. Mahapatra},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Efficient encoding for address buses with temporal redundancy for
simultaneous area and energy reduction},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {111--114},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127936},
doi = {10.1145/1127908.1127936},
timestamp = {Tue, 10 May 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuSM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuZJ06,
author = {Zhonghai Lu and
Mingchen Zhong and
Axel Jantsch},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Evaluation of on-chip networks using deflection routing},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {296--301},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127977},
doi = {10.1145/1127908.1127977},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LuZJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Luo06,
author = {Zuying Luo},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {General transistor-level methodology on {VLSI} low-power design},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {115--118},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127937},
doi = {10.1145/1127908.1127937},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Luo06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MajidzadehS06,
author = {Vahid Majidzadeh and
Omid Shoaei},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A power optimized design methodology for low-distortion sigma-delta-pipeline
ADCs},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {284--289},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127974},
doi = {10.1145/1127908.1127974},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MajidzadehS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ManiSO06,
author = {Murari Mani and
Mahesh Sharma and
Michael Orshansky},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Application of fast {SOCP} based statistical sizing in the microprocessor
design flow},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {372--375},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127993},
doi = {10.1145/1127908.1127993},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ManiSO06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NajeebGK06,
author = {K. Najeeb and
Vishal Gupta and
V. Kamakoti and
Madhu Mutyam},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Delay and peak power minimization for on-chip buses using temporal
redundancy},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {119--122},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127938},
doi = {10.1145/1127908.1127938},
timestamp = {Thu, 10 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NajeebGK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NazarianIP06,
author = {Shahin Nazarian and
Ali Iranli and
Massoud Pedram},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Crosstalk analysis in nanometer technologies},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {253--258},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127967},
doi = {10.1145/1127908.1127967},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/NazarianIP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NepalBMPZ06,
author = {Kundan Nepal and
R. Iris Bahar and
Joseph L. Mundy and
William R. Patterson and
Alexander Zaslavsky},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Optimizing noise-immune nanoscale circuits using principles of Markov
random fields},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {149--152},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127945},
doi = {10.1145/1127908.1127945},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/NepalBMPZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NguyenBC06,
author = {Hung D. Nguyen and
Benjamin J. Blalock and
Suheng Chen},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A SiGe BiCMOS linear regulator with wideband, high power supply rejection},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {144--148},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127944},
doi = {10.1145/1127908.1127944},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/NguyenBC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OliverCM06,
author = {Lara D. Oliver and
Krishnendu Chakrabarty and
Hisham Z. Massoud},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {An evaluation of the impact of gate oxide tunneling on dual-\emph{V\({}_{\mbox{t}}\)}-based
leakage reduction techniques},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {105--110},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127935},
doi = {10.1145/1127908.1127935},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/OliverCM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OzturkKSK06,
author = {Ozcan Ozturk and
Mahmut T. Kandemir and
Seung Woo Son and
Mustafa Karak{\"{o}}y},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Selective code/data migration for reducing communication energy in
embedded MpSoC architectures},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {386--391},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127997},
doi = {10.1145/1127908.1127997},
timestamp = {Wed, 20 Mar 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/OzturkKSK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OzturkKT06,
author = {Ozcan Ozturk and
Mahmut T. Kandemir and
Suleyman Tosun},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {An {ILP} based approach to address code generation for digital signal
processors},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {37--42},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127919},
doi = {10.1145/1127908.1127919},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/OzturkKT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PageKC06,
author = {Dan Page and
Jamil Kawa and
Charles C. Chiang},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {{DFM:} swimming upstream},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {1},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127909},
doi = {10.1145/1127908.1127909},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PageKC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PanditMP06,
author = {Soumya Pandit and
Chittaranjan A. Mandal and
Amit Patra},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A formal approach for high level synthesis of linear analog systems},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {345--348},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127987},
doi = {10.1145/1127908.1127987},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PanditMP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Parkhurst06,
author = {Jeff Parkhurst},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {From single core to multi-core to many core: are we ready for a new
exponential?},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {210},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127910},
doi = {10.1145/1127908.1127910},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Parkhurst06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PatelBMP06,
author = {Kimish Patel and
Luca Benini and
Enrico Macii and
Massimo Poncino},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {STV-Cache: a leakage energy-efficient architecture for data caches},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {404--409},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1128000},
doi = {10.1145/1127908.1128000},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PatelBMP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PaulPB06,
author = {Gopal Paul and
Ajit Pal and
Bhargab B. Bhattacharya},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {On finding the minimum test set of a BDD-based circuit},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {169--172},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127949},
doi = {10.1145/1127908.1127949},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PaulPB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PengM06,
author = {Song Peng and
Rajit Manohar},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Yield enhancement of asynchronous logic circuits through 3-dimensional
integration technology},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {159--164},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127947},
doi = {10.1145/1127908.1127947},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PengM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PopovichFSKS06,
author = {Mikhail Popovich and
Eby G. Friedman and
Michael Sotman and
Avinoam Kolodny and
Radu M. Secareanu},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Maximum effective distance of on-chip decoupling capacitors in power
distribution grids},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {173--179},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127951},
doi = {10.1145/1127908.1127951},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PopovichFSKS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PuttaswamyL06,
author = {Kiran Puttaswamy and
Gabriel H. Loh},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Thermal analysis of a 3D die-stacked high-performance microprocessor},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {19--24},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127915},
doi = {10.1145/1127908.1127915},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PuttaswamyL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PuttaswamyL06a,
author = {Kiran Puttaswamy and
Gabriel H. Loh},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Dynamic instruction schedulers in a 3-dimensional integration technology},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {153--158},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127946},
doi = {10.1145/1127908.1127946},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PuttaswamyL06a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/QiGLLSS06,
author = {Xiaoning Qi and
Alex Gyure and
Yansheng Luo and
Sam C. Lo and
Mahmoud Shahram and
Kishore Singhal},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Measurement and characterization of pattern dependent process variations
of interconnect resistance, capacitance and inductance in nanometer
technologies},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {14--18},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127914},
doi = {10.1145/1127908.1127914},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/QiGLLSS06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RaghebNM06,
author = {Tamer Ragheb and
Arthur Nieuwoudt and
Yehia Massoud},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Efficient modeling of integrated narrow-band low noise amplifiers
for design space exploration},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {187--191},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127953},
doi = {10.1145/1127908.1127953},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RaghebNM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RobertsV06,
author = {William R. Roberts and
Dimitrios Velenis},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Effects of process and environmental variations on timing characteristics
of clocked registers},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {165--168},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127948},
doi = {10.1145/1127908.1127948},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RobertsV06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RoseCGMSBHYT06,
author = {Garrett S. Rose and
Adam C. Cabe and
Nadine Gergel{-}Hackett and
Nabanita Majumdar and
Mircea R. Stan and
John C. Bean and
Lloyd R. Harriott and
Yuxing Yao and
James M. Tour},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Design approaches for hybrid CMOS/molecular memory based on experimental
device data},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {2--7},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127912},
doi = {10.1145/1127908.1127912},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RoseCGMSBHYT06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RosenfeldF06,
author = {Jonathan Rosenfeld and
Eby G. Friedman},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Sensitivity evaluation of global resonant H-tree clock distribution
networks},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {192--197},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127955},
doi = {10.1145/1127908.1127955},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RosenfeldF06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SamsonC06,
author = {Giby Samson and
Lawrence T. Clark},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Circuit architecture for low-power race-free programmable logic arrays},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {416--421},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1128003},
doi = {10.1145/1127908.1128003},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SamsonC06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShenKZ06,
author = {Bo Shen and
Sunil P. Khatri and
Takis Zourntos},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Implementation of {MOSFET} based capacitors for digital applications},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {180--186},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127952},
doi = {10.1145/1127908.1127952},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ShenKZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SotiriadisCZ06,
author = {Paul P. Sotiriadis and
Abdullah Celik and
Zhaonian Zhang},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Rapid intermodulation distortion estimation in fully balanced weakly
nonlinear Gm-C filters using state-space modeling},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {381--385},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127995},
doi = {10.1145/1127908.1127995},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SotiriadisCZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TangK06,
author = {Rui Tang and
Yong{-}Bin Kim},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {{PWAM} signalling scheme for high speed serial link transceiver design},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {49--52},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127922},
doi = {10.1145/1127908.1127922},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TangK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TotaCM06,
author = {Sergio Tota and
Mario R. Casu and
Luca Macchiarulo},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Implementation analysis of NoC: a MPSoC trace-driven approach},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {204--209},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127957},
doi = {10.1145/1127908.1127957},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TotaCM06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TsengP06,
author = {I{-}Lun Tseng and
Adam Postula},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {An efficient algorithm for partitioning parameterized polygons into
rectangles},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {366--371},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127992},
doi = {10.1145/1127908.1127992},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TsengP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiZ06,
author = {Jinwen Xi and
Peixin Zhong},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A Transaction-Level NoC Simulation Platform with Architecture-Level
Dynamic and Leakage Energy Models},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {341--344},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127986},
doi = {10.1145/1127908.1127986},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XiZ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XianL06,
author = {Changjiu Xian and
Yung{-}Hsiang Lu},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Dynamic voltage scaling for multitasking real-time systems with uncertain
execution time},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {392--397},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127998},
doi = {10.1145/1127908.1127998},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XianL06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanDTK06,
author = {Tan Yan and
Qing Dong and
Yasuhiro Takashima and
Yoji Kajitani},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {How does partitioning matter for 3D floorplanning?},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {73--78},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127928},
doi = {10.1145/1127908.1127928},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/YanDTK06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Yuan06,
author = {Fei Yuan},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A new power-area efficient 4-PAM full-clock {CMOS} pre-emphasis transmitter
for 10Gb/s serial links},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {127--130},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127940},
doi = {10.1145/1127908.1127940},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Yuan06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZakiTB06,
author = {Mohamed H. Zaki and
Sofi{\`{e}}ne Tahar and
Guy Bois},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A practical approach for monitoring analog circuits},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {330--335},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127984},
doi = {10.1145/1127908.1127984},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZakiTB06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Zhang06,
author = {Xinmiao Zhang},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Partial parallel factorization in soft-decision Reed-Solomon decoding},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {272--277},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127971},
doi = {10.1145/1127908.1127971},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Zhang06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangJ06,
author = {Rui Zhang and
Niraj K. Jha},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Threshold/majority logic synthesis and concurrent error detection
targeting nanoelectronic implementations},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {8--13},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127913},
doi = {10.1145/1127908.1127913},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangJ06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangJH06,
author = {Xu Zhang and
Xiaohong Jiang and
Susumu Horiguchi},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {A non-orthogonal clock distribution network and its performance evaluation
in presence of process variations and inductive effects},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {336--340},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127985},
doi = {10.1145/1127908.1127985},
timestamp = {Wed, 18 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangJH06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangWY06,
author = {Qingli Zhang and
Jinxiang Wang and
Yizheng Ye},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {An energy-efficient temporal encoding circuit technique for on-chip
high performance buses},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {422--427},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1128004},
doi = {10.1145/1127908.1128004},
timestamp = {Thu, 29 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangWY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhouLY06,
author = {Qianneng Zhou and
Fengchang Lai and
Mingyan Yu},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {On-chip 3.3V-to-1.8V voltage down converter for low-power {VLSI} chips},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {140--143},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127943},
doi = {10.1145/1127908.1127943},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhouLY06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhouP06,
author = {Xiangrong Zhou and
Peter Petrov},
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Low-power cache organization through selective tag translation for
embedded processors with virtual memory support},
booktitle = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
pages = {398--403},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908.1127999},
doi = {10.1145/1127908.1127999},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhouP06.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2006,
editor = {Gang Qu and
Yehea I. Ismail and
Narayanan Vijaykrishnan and
Hai Zhou},
title = {Proceedings of the 16th {ACM} Great Lakes Symposium on {VLSI} 2006,
Philadelphia, PA, USA, April 30 - May 1, 2006},
publisher = {{ACM}},
year = {2006},
url = {https://doi.org/10.1145/1127908},
doi = {10.1145/1127908},
isbn = {1-59593-347-6},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2006.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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