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@inproceedings{DBLP:conf/hpca/0001DWWZLQXLQW19,
author = {Zhe Li and
Caiwen Ding and
Siyue Wang and
Wujie Wen and
Youwei Zhuo and
Chang Liu and
Qinru Qiu and
Wenyao Xu and
Xue Lin and
Xuehai Qian and
Yanzhi Wang},
title = {{E-RNN:} Design Optimization for Efficient Recurrent Neural Networks
in FPGAs},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {69--80},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00028},
doi = {10.1109/HPCA.2019.00028},
timestamp = {Wed, 16 Oct 2019 14:14:50 +0200},
biburl = {https://dblp.org/rec/conf/hpca/0001DWWZLQXLQW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/0048JK19,
author = {Jie Zhang and
Myoungsoo Jung and
Mahmut T. Kandemir},
title = {{FUSE:} Fusing {STT-MRAM} into GPUs to Alleviate Off-Chip Memory Access
Overheads},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {426--439},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00055},
doi = {10.1109/HPCA.2019.00055},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/0048JK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AcunBLP19,
author = {Bilge Acun and
Alper Buyuktosunoglu and
Eun Kyung Lee and
Yoonho Park},
title = {Power Aware Heterogeneous Node Assembly},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {715--727},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00068},
doi = {10.1109/HPCA.2019.00068},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/AcunBLP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AjdariPKKK19,
author = {Mohammadamin Ajdari and
Pyeongsu Park and
Joonsung Kim and
Dongup Kwon and
Jangwoo Kim},
title = {{CIDR:} {A} Cost-Effective In-Line Data Reduction System for Terabit-Per-Second
Scale {SSD} Arrays},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {28--41},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00025},
doi = {10.1109/HPCA.2019.00025},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/AjdariPKKK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AngladaLPA019,
author = {Mart{\'{\i}} Anglada and
Enrique de Lucas and
Joan{-}Manuel Parcerisa and
Juan L. Arag{\'{o}}n and
Antonio Gonz{\'{a}}lez},
title = {Early Visibility Resolution for Removing Ineffectual Computations
in the Graphics Pipeline},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {635--646},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00015},
doi = {10.1109/HPCA.2019.00015},
timestamp = {Thu, 11 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/AngladaLPA019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AngladaLPAM019,
author = {Mart{\'{\i}} Anglada and
Enrique de Lucas and
Joan{-}Manuel Parcerisa and
Juan L. Arag{\'{o}}n and
Pedro Marcuello and
Antonio Gonz{\'{a}}lez},
title = {Rendering Elimination: Early Discard of Redundant Tiles in the Graphics
Pipeline},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {623--634},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00014},
doi = {10.1109/HPCA.2019.00014},
timestamp = {Thu, 11 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/AngladaLPAM019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AroraS0AMTT19,
author = {Manish Arora and
Matt Skach and
Wei Huang and
Xudong An and
Jason Mars and
Lingjia Tang and
Dean M. Tullsen},
title = {Understanding the Impact of Socket Density in Density Optimized Servers},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {687--700},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00066},
doi = {10.1109/HPCA.2019.00066},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/AroraS0AMTT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ArunkumarBNW19,
author = {Akhil Arunkumar and
Evgeny Bolotin and
David W. Nellans and
Carole{-}Jean Wu},
title = {Understanding the Future of Energy Efficiency in Multi-Module GPUs},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {519--532},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00063},
doi = {10.1109/HPCA.2019.00063},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/ArunkumarBNW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/AziziMazreahC19,
author = {Arash AziziMazreah and
Lizhong Chen},
title = {Shortcut Mining: Exploiting Cross-Layer Shortcut Reuse in {DCNN} Accelerators},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {94--105},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00030},
doi = {10.1109/HPCA.2019.00030},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/AziziMazreahC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/BakhshalipourSL19,
author = {Mohammad Bakhshalipour and
Mehran Shakerinava and
Pejman Lotfi{-}Kamran and
Hamid Sarbazi{-}Azad},
title = {Bingo Spatial Data Prefetcher},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {399--411},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00053},
doi = {10.1109/HPCA.2019.00053},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/BakhshalipourSL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/BasakLHOXZJ019,
author = {Abanti Basak and
Shuangchen Li and
Xing Hu and
Sang Min Oh and
Xinfeng Xie and
Li Zhao and
Xiaowei Jiang and
Yuan Xie},
title = {Analysis and Optimization of the Memory Hierarchy for Graph Processing
Workloads},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {373--386},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00051},
doi = {10.1109/HPCA.2019.00051},
timestamp = {Tue, 10 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/BasakLHOXZJ019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChandramoorthyS19,
author = {Nandhini Chandramoorthy and
Karthik Swaminathan and
Martin Cochet and
Arun Paidimarri and
Schuyler Eldridge and
Rajiv V. Joshi and
Matthew M. Ziegler and
Alper Buyuktosunoglu and
Pradip Bose},
title = {Resilient Low Voltage Accelerators for High Energy Efficiency},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {147--158},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00034},
doi = {10.1109/HPCA.2019.00034},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/ChandramoorthyS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ChouB019,
author = {Chih{-}Hsun Chou and
Laxmi N. Bhuyan and
Daniel Wong},
title = {{\(\mu\)}DPM: Dynamic Power Management for the Microsecond Era},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {120--132},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00032},
doi = {10.1109/HPCA.2019.00032},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/ChouB019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/DublishNT19,
author = {Saumay Dublish and
Vijay Nagarajan and
Nigel P. Topham},
title = {Poise: Balancing Thread-Level Parallelism and Memory System Performance
in GPUs Using Machine Learning},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {492--505},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00061},
doi = {10.1109/HPCA.2019.00061},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/DublishNT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/FuRRSSKAVNLSVSA19,
author = {Xiang Fu and
Leon Riesebos and
M. A. Rol and
Jeroen van Straten and
J. van Someren and
Nader Khammassi and
Imran Ashraf and
R. F. L. Vermeulen and
V. Newsum and
K. K. L. Loh and
J. C. de Sterke and
W. J. Vlothuizen and
R. N. Schouten and
Carmen G. Almud{\'{e}}ver and
Leonardo DiCarlo and
Koen Bertels},
title = {eQASM: An Executable Quantum Instruction Set Architecture},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {224--237},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00040},
doi = {10.1109/HPCA.2019.00040},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/FuRRSSKAVNLSVSA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/FuchsW19,
author = {Adi Fuchs and
David Wentzlaff},
title = {The Accelerator Wall: Limits of Chip Specialization},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {1--14},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00023},
doi = {10.1109/HPCA.2019.00023},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/FuchsW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/GanapathyKBRS19,
author = {Shrikanth Ganapathy and
John Kalamatianos and
Bradford M. Beckmann and
Steven Raasch and
Lukasz G. Szafaryn},
title = {Killi: Runtime Fault Classification to Deploy Low Voltage Caches without
{MBIST}},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {304--316},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00046},
doi = {10.1109/HPCA.2019.00046},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/GanapathyKBRS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/GanesanMJ19,
author = {Karthik Ganesan and
Joshua San Miguel and
Natalie D. Enright Jerger},
title = {The What's Next Intermittent Computing Architecture},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {211--223},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00039},
doi = {10.1109/HPCA.2019.00039},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/GanesanMJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Gratz19,
author = {Paul Gratz},
title = {The Best of {IEEE} Computer Architecture Letters in 2018},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {491},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00060},
doi = {10.1109/HPCA.2019.00060},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/Gratz19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HillR19,
author = {Mark D. Hill and
Vijay Janapa Reddi},
title = {Gables: {A} Roofline Model for Mobile SoCs},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {317--330},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00047},
doi = {10.1109/HPCA.2019.00047},
timestamp = {Mon, 08 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/HillR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HuangPMKBY019,
author = {Jiayi Huang and
Ramprakash Reddy Puli and
Pritam Majumder and
Sungkeun Kim and
Rahul Boyapati and
Ki Hwan Yum and
Eun Jung Kim},
title = {Active-Routing: Compute on the Way for Near-Data Processing},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {674--686},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00018},
doi = {10.1109/HPCA.2019.00018},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/HuangPMKBY019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/HurkatM19,
author = {Skand Hurkat and
Jos{\'{e}} F. Mart{\'{\i}}nez},
title = {{VIP:} {A} Versatile Inference Processor},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {345--358},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00049},
doi = {10.1109/HPCA.2019.00049},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/HurkatM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KhatamifardWDKK19,
author = {S. Karen Khatamifard and
Longfei Wang and
Amitabh Das and
Sel{\c{c}}uk K{\"{o}}se and
Ulya R. Karpuzcu},
title = {{POWERT} Channels: {A} Novel Class of Covert CommunicationExploiting
Power Management Vulnerabilities},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {291--303},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00045},
doi = {10.1109/HPCA.2019.00045},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/KhatamifardWDKK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KimPHOM19,
author = {Jeremie S. Kim and
Minesh Patel and
Hasan Hassan and
Lois Orosa and
Onur Mutlu},
title = {D-RaNGe: Using Commodity {DRAM} Devices to Generate True Random Numbers
with Low Latency and High Throughput},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {582--595},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00011},
doi = {10.1109/HPCA.2019.00011},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KimPHOM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KimSCK19,
author = {Hyeonuk Kim and
Jaehyeong Sim and
Yeongjae Choi and
Lee{-}Sup Kim},
title = {NAND-Net: Minimizing Computational Complexity of In-Memory Processing
for Binary Neural Networks},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {661--673},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00017},
doi = {10.1109/HPCA.2019.00017},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/KimSCK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KokolisST19,
author = {Apostolos Kokolis and
Dimitrios Skarlatos and
Josep Torrellas},
title = {PageSeer: Using Page Walks to Trigger Page Swaps in Hybrid Memory
Systems},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {596--608},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00012},
doi = {10.1109/HPCA.2019.00012},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/KokolisST19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KondguliH19,
author = {Sushant Kondguli and
Michael C. Huang},
title = {{R3-DLA} (Reduce, Reuse, Recycle): {A} More Efficient Approach to
Decoupled Look-Ahead Architectures},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {533--544},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00064},
doi = {10.1109/HPCA.2019.00064},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/KondguliH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Kulkarni0D19,
author = {Neeraj Kulkarni and
Feng Qi and
Christina Delimitrou},
title = {Pliant: Leveraging Approximation to Improve Datacenter Resource Efficiency},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {159--171},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00035},
doi = {10.1109/HPCA.2019.00035},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/Kulkarni0D19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/KumarAB19,
author = {Rakesh Kumar and
Mehdi Alipour and
David Black{-}Schaffer},
title = {Freeway: Maximizing {MLP} for Slice-Out-of-Order Execution},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {558--569},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00009},
doi = {10.1109/HPCA.2019.00009},
timestamp = {Sun, 07 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/KumarAB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LiLRASHGM19,
author = {Yang Li and
Charles R. Lefurgy and
Karthick Rajamani and
Malcolm S. Allen{-}Ware and
Guillermo J. Silva and
Daniel D. Heimsoth and
Saugata Ghose and
Onur Mutlu},
title = {A Scalable Priority-Aware Approach to Managing Data Center Server
Power},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {701--714},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00067},
doi = {10.1109/HPCA.2019.00067},
timestamp = {Mon, 03 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/LiLRASHGM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/LiZH0M19,
author = {Peinan Li and
Lutan Zhao and
Rui Hou and
Lixin Zhang and
Dan Meng},
title = {Conditional Speculation: An Effective Approach to Safeguard Out-of-Order
Execution Against Spectre Attacks},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {264--276},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00043},
doi = {10.1109/HPCA.2019.00043},
timestamp = {Fri, 12 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/LiZH0M19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/MargaritovGGG19,
author = {Artemiy Margaritov and
Siddharth Gupta and
Rekai Gonz{\'{a}}lez{-}Alberquilla and
Boris Grot},
title = {Stretch: Balancing QoS and Throughput for Colocated Server Workloads
on {SMT} Cores},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {15--27},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00024},
doi = {10.1109/HPCA.2019.00024},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/MargaritovGGG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/MirhosseiniSW19,
author = {Amirhossein Mirhosseini and
Akshitha Sriraman and
Thomas F. Wenisch},
title = {Enhancing Server Efficiency in the Face of Killer Microseconds},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {185--198},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00037},
doi = {10.1109/HPCA.2019.00037},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/MirhosseiniSW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/OgleariYQMZ19,
author = {Matheus Ogleari and
Ye Yu and
Chen Qian and
Ethan L. Miller and
Jishen Zhao},
title = {String Figure: {A} Scalable and Elastic Memory Network Architecture},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {647--660},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00016},
doi = {10.1109/HPCA.2019.00016},
timestamp = {Tue, 17 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/OgleariYQMZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PalPTGI019,
author = {Saptadeep Pal and
Daniel Petrisko and
Matthew Tomei and
Puneet Gupta and
Subramanian S. Iyer and
Rakesh Kumar},
title = {Architecting Waferscale Processors - {A} {GPU} Case Study},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {250--263},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00042},
doi = {10.1109/HPCA.2019.00042},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/PalPTGI019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PapadimitriouCG19,
author = {George Papadimitriou and
Athanasios Chatzidimitriou and
Dimitris Gizopoulos},
title = {Adaptive Voltage/Frequency Scaling and Core Allocation for Balanced
Energy and Performance on Multicore CPUs},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {133--146},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00033},
doi = {10.1109/HPCA.2019.00033},
timestamp = {Thu, 21 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/PapadimitriouCG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/PeraisSYMC19,
author = {Arthur Perais and
Rami Sheikh and
Luke Yen and
Michael McIlvaine and
Robert D. Clancy},
title = {Elastic Instruction Fetching},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {478--490},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00059},
doi = {10.1109/HPCA.2019.00059},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/PeraisSYMC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RaviL19,
author = {Gokul Subramanian Ravi and
Mikko H. Lipasti},
title = {Recycling Data Slack in Out-of-Order Cores},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {545--557},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00065},
doi = {10.1109/HPCA.2019.00065},
timestamp = {Sun, 17 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/RaviL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/RoyT0VV19,
author = {Sujoy Sinha Roy and
Furkan Turan and
Kimmo J{\"{a}}rvinen and
Frederik Vercauteren and
Ingrid Verbauwhede},
title = {FPGA-Based High-Performance Parallel Architecture for Homomorphic
Computing on Encrypted Data},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {387--398},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00052},
doi = {10.1109/HPCA.2019.00052},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/RoyT0VV19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SantosLOLR19,
author = {Fernando Fernandes dos Santos and
Caio B. Lunardi and
Daniel Oliveira and
Fabiano Libano and
Paolo Rech},
title = {Reliability Evaluation of Mixed-Precision Architectures},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {238--249},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00041},
doi = {10.1109/HPCA.2019.00041},
timestamp = {Wed, 01 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/SantosLOLR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SheikhH19,
author = {Rami Sheikh and
Derek Hower},
title = {Efficient Load Value Prediction Using Multiple Predictors and Filters},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {454--465},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00057},
doi = {10.1109/HPCA.2019.00057},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/SheikhH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ShullCGT19,
author = {Thomas Shull and
Jiho Choi and
Mar{\'{\i}}a Jes{\'{u}}s Garzar{\'{a}}n and
Josep Torrellas},
title = {NoMap: Speeding-Up JavaScript Using Hardware Transactional Memory},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {412--425},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00054},
doi = {10.1109/HPCA.2019.00054},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/ShullCGT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/SongMZQLC19,
author = {Linghao Song and
Jiachen Mao and
Youwei Zhuo and
Xuehai Qian and
Hai Li and
Yiran Chen},
title = {HyPar: Towards Hybrid Parallelism for Deep Learning Accelerator Array},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {56--68},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00027},
doi = {10.1109/HPCA.2019.00027},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/SongMZQLC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/TurakhiaGBD19,
author = {Yatish Turakhia and
Sneha D. Goenka and
Gill Bejerano and
William J. Dally},
title = {Darwin-WGA: {A} Co-processor Provides Increased Sensitivity in Whole
Genome Alignments with High Speedup},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {359--372},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00050},
doi = {10.1109/HPCA.2019.00050},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/TurakhiaGBD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/VenkatBT19,
author = {Ashish Venkat and
Harsha Basavaraj and
Dean M. Tullsen},
title = {Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single
{ISA}},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {42--55},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00026},
doi = {10.1109/HPCA.2019.00026},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/VenkatBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/VougioukasNSDAM19,
author = {Ilias Vougioukas and
Nikos Nikoleris and
Andreas Sandberg and
Stephan Diestelhorst and
Bashir M. Al{-}Hashimi and
Geoff V. Merrett},
title = {{BRB:} Mitigating Branch Predictor Side-Channels},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {466--477},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00058},
doi = {10.1109/HPCA.2019.00058},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/VougioukasNSDAM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Wang0C19,
author = {Qingsen Wang and
Xu Liu and
Milind Chabbi},
title = {Featherlight Reuse-Distance Measurement},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {440--453},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00056},
doi = {10.1109/HPCA.2019.00056},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/Wang0C19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Wang0KQ19,
author = {Xiebing Wang and
Kai Huang and
Alois C. Knoll and
Xuehai Qian},
title = {A Hybrid Framework for Fast and Accurate {GPU} Performance Estimation
through Source-Level Analysis and Trace-Based Simulation},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {506--518},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00062},
doi = {10.1109/HPCA.2019.00062},
timestamp = {Wed, 19 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/Wang0KQ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Wang0Z19,
author = {Shuo Wang and
Yun Liang and
Wei Zhang},
title = {Poly: Efficient Heterogeneous System and Application Management for
Interactive Applications},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {199--210},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00038},
doi = {10.1109/HPCA.2019.00038},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/Wang0Z19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WangYAID19,
author = {Xiaowei Wang and
Jiecao Yu and
Charles Augustine and
Ravi R. Iyer and
Reetuparna Das},
title = {Bit Prudent In-Cache Acceleration of Deep Convolutional Neural Networks},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {81--93},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00029},
doi = {10.1109/HPCA.2019.00029},
timestamp = {Mon, 15 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/WangYAID19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WuBCCCDHIJJLLLQ19,
author = {Carole{-}Jean Wu and
David Brooks and
Kevin Chen and
Douglas Chen and
Sy Choudhury and
Marat Dukhan and
Kim M. Hazelwood and
Eldad Isaac and
Yangqing Jia and
Bill Jia and
Tommer Leyvand and
Hao Lu and
Yang Lu and
Lin Qiao and
Brandon Reagen and
Joe Spisak and
Fei Sun and
Andrew Tulloch and
Peter Vajda and
Xiaodong Wang and
Yanghan Wang and
Bram Wasti and
Yiming Wu and
Ran Xian and
Sungjoo Yoo and
Peizhao Zhang},
title = {Machine Learning at Facebook: Understanding Inference at the Edge},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {331--344},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00048},
doi = {10.1109/HPCA.2019.00048},
timestamp = {Wed, 15 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/WuBCCCDHIJJLLLQ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/WuBNHKLLMSAPJ19,
author = {Lisa Wu and
David Bruns{-}Smith and
Frank A. Nothaft and
Qijing Huang and
Sagar Karandikar and
Johnny Le and
Andrew Lin and
Howard Mao and
Brendan Sweeney and
Krste Asanovic and
David A. Patterson and
Anthony D. Joseph},
title = {{FPGA} Accelerated {INDEL} Realignment in the Cloud},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {277--290},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00044},
doi = {10.1109/HPCA.2019.00044},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/WuBNHKLLMSAPJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/XieZLFS19,
author = {Chenhao Xie and
Xingyao Zhang and
Ang Li and
Xin Fu and
Shuaiwen Song},
title = {{PIM-VR:} Erasing Motion Anomalies In Highly-Interactive Virtual Reality
World with Customized Memory Cube},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {609--622},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00013},
doi = {10.1109/HPCA.2019.00013},
timestamp = {Sun, 18 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/XieZLFS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/YoungKQ19,
author = {Vinson Young and
Sanjay Kariyappa and
Moinuddin K. Qureshi},
title = {Enabling Transparent Memory-Compression for Commodity Memory Systems},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {570--581},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00010},
doi = {10.1109/HPCA.2019.00010},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/YoungKQ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/Zhu0CGRE19,
author = {Haishan Zhu and
David Lo and
Liqun Cheng and
Rama Govindaraju and
Parthasarathy Ranganathan and
Mattan Erez},
title = {Kelp: QoS for Accelerated Machine Learning Systems},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {172--184},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00036},
doi = {10.1109/HPCA.2019.00036},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/hpca/Zhu0CGRE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/hpca/ZuRLR19,
author = {Yazhou Zu and
Daniel Richins and
Charles Lefurgy and
Vijay Janapa Reddi},
title = {Fine-Tuning the Active Timing Margin {(ATM)} Control Loop for Maximizing
Multi-core Efficiency on an {IBM} {POWER} Server},
booktitle = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
pages = {106--119},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/HPCA.2019.00031},
doi = {10.1109/HPCA.2019.00031},
timestamp = {Tue, 02 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/ZuRLR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/hpca/2019,
title = {25th {IEEE} International Symposium on High Performance Computer Architecture,
{HPCA} 2019, Washington, DC, USA, February 16-20, 2019},
publisher = {{IEEE}},
year = {2019},
url = {https://ieeexplore.ieee.org/xpl/conhome/8666628/proceeding},
isbn = {978-1-7281-1444-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/hpca/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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