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@inproceedings{DBLP:conf/iccd/AggarwalL94,
author = {Aditya A. Aggarwal and
David M. Lewis},
title = {Routing Architectures for Hierarchical Field Programmable Gate Arrays},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {475--478},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331954},
doi = {10.1109/ICCD.1994.331954},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AggarwalL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Agrawal94,
author = {Prathima Agrawal},
title = {Emerging Techologies for Electronic Design and Test},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {18},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331844},
doi = {10.1109/ICCD.1994.331844},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Agrawal94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Al-AsaadVF94,
author = {Hussain Al{-}Asaad and
Mankuan Michael Vai and
James Feldman},
title = {Distributed Reconfiguration of Fault Tolerant {VLSI} Mulipipeline
Arrays with Constant Interstage Path Lengths},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {75--78},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331858},
doi = {10.1109/ICCD.1994.331858},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Al-AsaadVF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AlbaharnaCC94,
author = {Osama T. Albaharna and
Peter Y. K. Cheung and
Thomas J. Clarke},
title = {Area {\&} Time Limitations of FPGA-based Virtual Hardware},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {184--189},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331884},
doi = {10.1109/ICCD.1994.331884},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AlbaharnaCC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AlzahraniC94,
author = {Fahad M. Alzahrani and
Tom Chen},
title = {On-Chip {TEC-QED} {ECC} for Ultra-Large, Single-Chip Memory Systems},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {132--137},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331872},
doi = {10.1109/ICCD.1994.331872},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AlzahraniC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AngelSA94,
author = {Edwin de Angel and
Earl E. Swartzlander Jr. and
Jacob A. Abraham},
title = {A New Asynchronous Multiplier Using Enable/Disable {CMOS} Differential
Logic},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {302--305},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331911},
doi = {10.1109/ICCD.1994.331911},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AngelSA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AntoniazziBFS94,
author = {Stefano Antoniazzi and
Alessandro Balboni and
William Fornaciari and
Donatella Sciuto},
title = {{HW/SW} Codesign for Embedded Telecom Systems},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {278--281},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331904},
doi = {10.1109/ICCD.1994.331904},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AntoniazziBFS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ArchambaudF94,
author = {Denis Archambaud and
Pascal Faudemay},
title = {An Arbitration Tree Adapted to Object Oriented Associative Memories},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {306--310},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331912},
doi = {10.1109/ICCD.1994.331912},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ArchambaudF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ArmsteadCHM94,
author = {M. Armstead and
Michael Cogswell and
S. Halverson and
T. Musta},
title = {PowerPC Visual Simulator: Peeking Under the Hood of the PowerPC Engine},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {413--418},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331939},
doi = {10.1109/ICCD.1994.331939},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ArmsteadCHM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/AzizSSB94,
author = {Adnan Aziz and
Vigyan Singhal and
Gitanjali Swamy and
Robert K. Brayton},
title = {Minimizing Interacting Finite State Machines: {A} Compositional Approach
to Language to Containment},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {255--261},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331900},
doi = {10.1109/ICCD.1994.331900},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/AzizSSB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BaegR94,
author = {Sanghyeon Baeg and
William A. Rogers},
title = {A New Test Generation Methodology Using Selective Clocking for the
Clock Line Controlled Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {354--358},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331925},
doi = {10.1109/ICCD.1994.331925},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BaegR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BanerjeeRCP94,
author = {Savita Banerjee and
Rabindra K. Roy and
Srimat T. Chakradhar and
Dhiraj K. Pradhan},
title = {Initialization Isuues in the Synthesis of Asynchronous Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {447--452},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331947},
doi = {10.1109/ICCD.1994.331947},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BanerjeeRCP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BeckerD94,
author = {Bernd Becker and
Rolf Drechsler},
title = {{OFDD} Based Minimization of Fixed Polarity Reed-Muller Expressions
Using Hybrid Genetic Algorithms},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {106--110},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331866},
doi = {10.1109/ICCD.1994.331866},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BeckerD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BhatiaJ94,
author = {Sandeep Bhatia and
Niraj K. Jha},
title = {Behavioral Synthesis for Hierarchical Testability of Controller/Data
Path Circuits with Conditional Branches},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {91--96},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331862},
doi = {10.1109/ICCD.1994.331862},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BhatiaJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BorkenhagenHIL94,
author = {John M. Borkenhagen and
Glen H. Handlogten and
John D. Irish and
Sheldon B. Levenstein},
title = {AS/400\({}^{\mbox{TM}}\) 64-bit PowerPC\({}^{\mbox{TM}}\)-Compatible
Processor Implementaiton},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {192--196},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331886},
doi = {10.1109/ICCD.1994.331886},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BorkenhagenHIL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/BrandDGD94,
author = {Daniel Brand and
Robert F. Damiano and
Lukas P. P. P. van Ginneken and
Anthony D. Drumm},
title = {In the Driver's Seat of BooleDozer},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {518--521},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331965},
doi = {10.1109/ICCD.1994.331965},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/BrandDGD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/CabodiCQ94,
author = {Gianpiero Cabodi and
Paolo Camurati and
Stefano Quer},
title = {Efficient State Space Pruning in Symbolic Backward Traversal},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {230--235},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331895},
doi = {10.1109/ICCD.1994.331895},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/CabodiCQ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Carter94,
author = {William S. Carter},
title = {The Future of Programmable Logic and Its Impact on Digital System
Design},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {10--16},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331842},
doi = {10.1109/ICCD.1994.331842},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Carter94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChaP94,
author = {Hungse Cha and
Janak H. Patel},
title = {Latch Design for Transient Pulse Tolerance},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {385--388},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331932},
doi = {10.1109/ICCD.1994.331932},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChaP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChandraIJMNR94,
author = {Ashok K. Chandra and
Vijay S. Iyengar and
R. V. Jawalekar and
Michael P. Mullen and
Indira Nair and
Barry K. Rosen},
title = {Architectural Verification of Processors Using Symbolic Instruction
Graphs},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {454--459},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331949},
doi = {10.1109/ICCD.1994.331949},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChandraIJMNR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChenW94,
author = {Yao{-}Ping Chen and
D. F. Wong},
title = {On Retiming for {FPGA} Logic Module Minimization},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {394--397},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331934},
doi = {10.1109/ICCD.1994.331934},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChenW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChoHMPS94,
author = {Hyunwoo Cho and
Gary D. Hachtel and
Enrico Macii and
Massimo Poncino and
Fabio Somenzi},
title = {A Structural Approach to State Space Decomposition for Approximate
Reachability Analysis},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {236--239},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331896},
doi = {10.1109/ICCD.1994.331896},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChoHMPS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChoiLK94,
author = {Kiyoung Choi and
KiJong Lee and
Jun{-}Woo Kang},
title = {A Self-Timed Divider Using {RSD} Number System},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {504--507},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331961},
doi = {10.1109/ICCD.1994.331961},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChoiLK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ChuG94,
author = {Pong P. Chu and
Ramana Gottipati},
title = {Write Buffer Design for On-Chip Cache},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {311--316},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331913},
doi = {10.1109/ICCD.1994.331913},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ChuG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/CoveyMS94,
author = {Kevin Covey and
Sandra Murdock and
Thomas R. Shiple},
title = {Two-phase Logic Design by Hardware Flowcharts},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {368--380},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331930},
doi = {10.1109/ICCD.1994.331930},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/CoveyMS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/DalkilicP94,
author = {Mehmet Emin Dalkili{\c{c}} and
Vijay Pitchumani},
title = {A Multi-Schedule Approach to High-Level Synthesis},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {572--575},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331979},
doi = {10.1109/ICCD.1994.331979},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/DalkilicP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/DuttaW94,
author = {Santanu Dutta and
Wayne H. Wolf},
title = {Asymptotic Limits of Video Signal Processing Architectures},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {622--625},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331991},
doi = {10.1109/ICCD.1994.331991},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/DuttaW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/El-ZeinHC94,
author = {Ali El{-}Zein and
Monjurul Haque and
Salim Chowdhury},
title = {Simulating Uniform Lossy Lines by the Time-Domain Modal Analysis},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {567--570},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331977},
doi = {10.1109/ICCD.1994.331977},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/El-ZeinHC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/FurberDGPTW94,
author = {Stephen B. Furber and
Paul Day and
Jim D. Garside and
N. C. Paver and
Steve Temple and
John V. Woods},
title = {The Design and Evaluation of an Asynchronous Microprocessor},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {217--220},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331891},
doi = {10.1109/ICCD.1994.331891},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/FurberDGPTW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GarciaR94,
author = {Michael J. Garcia and
Brian K. Reynolds},
title = {Single Chip {PCI} Bridge and Memory Controller for PowerPC\({}^{\mbox{TM}}\)
Microprocessors},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {409--412},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331938},
doi = {10.1109/ICCD.1994.331938},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GarciaR94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GargSGLM94,
author = {Atul Garg and
T.{-}L. Sham and
Hans J. Greub and
James Loy and
Jack F. McDonald},
title = {Thermal Design of an Advanced Multichip Module for a {RISC} Processor},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {608--611},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331987},
doi = {10.1109/ICCD.1994.331987},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/GargSGLM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GeeS94,
author = {Jeffrey D. Gee and
Alan Jay Smith},
title = {Analysis of Multiprocessor Memory Refernce Behavior},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {53--59},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331853},
doi = {10.1109/ICCD.1994.331853},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GeeS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GenoeCM94,
author = {Mark Genoe and
Luc J. M. Claesen and
Hugo De Man},
title = {A Parallel Method for Functional Verification of Medium and High Throughput
{DSP} Synthesis},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {460--463},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331950},
doi = {10.1109/ICCD.1994.331950},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GenoeCM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GlasS94,
author = {Jack P. F. Glas and
S{\'{a}}ndor E. Skolnik},
title = {Fourier Transform based {DS/FH} Spread Spectrum Receiver},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {420--423},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331941},
doi = {10.1109/ICCD.1994.331941},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GlasS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GoodbyOC94,
author = {Laurence Goodby and
Alex Orailoglu and
Paul M. Chau},
title = {Microarchitectural Synthesis of Performance-Constrained, Low-Power
{VLSI} Designs},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {323--326},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331916},
doi = {10.1109/ICCD.1994.331916},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GoodbyOC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GopalakrishnanKB94,
author = {Ganesh Gopalakrishnan and
Prabhakar Kudva and
Erik Brunvand},
title = {Peephole Optimization of Asynchronous Macromodule Networks},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {442--446},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331946},
doi = {10.1109/ICCD.1994.331946},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GopalakrishnanKB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GruverPAHB94,
author = {Mike Gruver and
Nghia Phan and
Tony Aipperspach and
Scott Hilker and
Jerry Bartley},
title = {{AS/400} PowerPC\({}^{\mbox{TM}}\) Compatible Semi-Custom Technology},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {197--202},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331887},
doi = {10.1109/ICCD.1994.331887},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GruverPAHB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GuanTA94,
author = {Z. Guan and
P. Thomson and
A. E. A. Almaini},
title = {A Parallel {CMOS} 2's Complement Multiplier Based on 5: 3 Counter},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {298--301},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331910},
doi = {10.1109/ICCD.1994.331910},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GuanTA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GuptaF94,
author = {Aarti Gupta and
Allan L. Fisher},
title = {Tradeoffs in Canonical Sequential Function Representations},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {111--116},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331867},
doi = {10.1109/ICCD.1994.331867},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/GuptaF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/GuptaKP94,
author = {Rohini Gupta and
Seok{-}Yoon Kim and
Lawrence T. Pillage},
title = {Domain Characterization of Transmission Line Models for Efficient
Simulation},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {558--562},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331975},
doi = {10.1109/ICCD.1994.331975},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/GuptaKP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HaKRNHHKC94,
author = {Sangho Ha and
Junghwan Kim and
Eunha Rho and
Yoonhee Nah and
Sangyong Han and
Daejoon Hwang and
Heunghwan Kim and
Seung Ho Cho},
title = {A Massively Parallel Multithreaded Architecture: {DAVRID}},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {70--74},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331857},
doi = {10.1109/ICCD.1994.331857},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HaKRNHHKC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HannonOS94,
author = {E. L. Hannon and
F. P. O'Connell and
L. J. Shieh},
title = {{POWER2} Architecture and Performance},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {336--339},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331920},
doi = {10.1109/ICCD.1994.331920},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HannonOS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HaqM94,
author = {Faisal Haq and
Samiha Mourad},
title = {Optimal Logic Blocks for FPGAs, using Factorial Design Techniques},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {470--474},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331953},
doi = {10.1109/ICCD.1994.331953},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HaqM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HarounS94,
author = {Baher Haroun and
Behzard Sajjadi},
title = {Optimal Datapath Synthesis of Partitioned Signal Processing Algorithm
for Multiple FPGAs},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {587--589},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331982},
doi = {10.1109/ICCD.1994.331982},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HarounS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HarrisO94,
author = {Ian G. Harris and
Alex Orailoglu},
title = {{SYNCBIST:} SYNthesis for Concurrent Built-In-Self-Testability},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {101--104},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331864},
doi = {10.1109/ICCD.1994.331864},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HarrisO94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HauckBE94,
author = {Scott Hauck and
Gaetano Borriello and
Carl Ebeling},
title = {Mesh Routing Topologies for Multi-FPGA Systems},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {170--177},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331882},
doi = {10.1109/ICCD.1994.331882},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HauckBE94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HeydariTX94,
author = {Mohammad Hossain Heydari and
Ioannis G. Tollis and
Chunliang Xia},
title = {Improved Techniques for {MCM} Layer Assignment},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {604--607},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331986},
doi = {10.1109/ICCD.1994.331986},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HeydariTX94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HogstedtO94,
author = {Karin H{\"{o}}gstedt and
Alex Orailoglu},
title = {Integrating Binding Constraints in the Synthesis of Area-Efficient
Self-Recovering Microarchitectures},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {331--334},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331918},
doi = {10.1109/ICCD.1994.331918},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HogstedtO94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HossainZA94,
author = {Razak Hossain and
Menghui Zheng and
Alexander Albicki},
title = {Reducing Power Dissipation in Serially Connected {MOSFET} Circuits
via Transistor Reordering},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {614--617},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331989},
doi = {10.1109/ICCD.1994.331989},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HossainZA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HudliHH94,
author = {Raghu V. Hudli and
Curtis L. Hoskins and
Anand V. Hudli},
title = {Software Metrics for Object-Oriented Designs},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {492--495},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331958},
doi = {10.1109/ICCD.1994.331958},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HudliHH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/HundalO94,
author = {Rupinder Hundal and
Vojin G. Oklobdzija},
title = {Determination of Optimal Sizes for a First and Second Level {SRAM-DRAM}
On-Chip Cache Combination},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {60--64},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331854},
doi = {10.1109/ICCD.1994.331854},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/HundalO94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KagarisT94,
author = {Dimitrios Kagaris and
Spyros Tragoudas},
title = {A Class of Good Characteristics Polynomials for {LFSR} Test Pattern
Generators},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {292--295},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331908},
doi = {10.1109/ICCD.1994.331908},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KagarisT94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KaminAD94,
author = {Ray A. Kamin III and
George B. Adams III and
Pradeep K. Dubey},
title = {Dynamic List-Scheduling with Finite Resources},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {140--144},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331874},
doi = {10.1109/ICCD.1994.331874},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KaminAD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KangLU94,
author = {Sungho Kang and
Wai{-}On Law and
Bill Underwood},
title = {Path-Delay Fault Simulation for a Standard Scan Design Methodology},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {359--362},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331926},
doi = {10.1109/ICCD.1994.331926},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KangLU94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KeM94,
author = {Wuudiann Ke and
Premachandran R. Menon},
title = {Delay-Verifiability of Combinational Circuits Based on Primitive Faults},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {86--90},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331861},
doi = {10.1109/ICCD.1994.331861},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KeM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KellyI94,
author = {Jason L. Kelly and
Peter A. Ivey},
title = {Defect Tolerant {SRAM} Based FPGAs},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {479--482},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331955},
doi = {10.1109/ICCD.1994.331955},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KellyI94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KozuchW94,
author = {Michael Kozuch and
Andrew Wolfe},
title = {Compression of Embedded System Programs},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {270--277},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331903},
doi = {10.1109/ICCD.1994.331903},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KozuchW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KudvaGBA94,
author = {Prabhakar Kudva and
Ganesh Gopalakrishnan and
Erik Brunvand and
Venkatesh Akella},
title = {Performance Analysis and Optimization of Asynchronous Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {221--224},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331892},
doi = {10.1109/ICCD.1994.331892},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KudvaGBA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KuehlmannG94,
author = {Andreas Kuehlmann and
Lukas P. P. P. van Ginneken},
title = {Grammar-Based Optimization of Synthesis Scenarios},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {20--25},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331846},
doi = {10.1109/ICCD.1994.331846},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KuehlmannG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/KumarE94,
author = {Dileep Kumar and
Bob Erickson},
title = {{ASOP:} Arithmetic Sum-of-Products Generator},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {522--526},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331966},
doi = {10.1109/ICCD.1994.331966},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/KumarE94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Kundu94,
author = {Sandip Kundu},
title = {Multifault Testable Circuits Based on Binary Parity Diagrams},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {363--366},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331927},
doi = {10.1109/ICCD.1994.331927},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Kundu94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LaiPP94,
author = {Yung{-}Te Lai and
Kuo{-}Rueih Ricky Pan and
Massoud Pedram},
title = {{FPGA} Synthesis Using Function Decomposition},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {30--35},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331848},
doi = {10.1109/ICCD.1994.331848},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LaiPP94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LeeGS94,
author = {Trevor Wing Sang Lee and
Mark R. Greenstreet and
Carl{-}Johan H. Seger},
title = {Automatic Verification of Refinement},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {225--229},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331894},
doi = {10.1109/ICCD.1994.331894},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LeeGS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LejmiKW94,
author = {Samir Lejmi and
Bozena Kaminska and
Edouard Wagneur},
title = {Retiming for the Global Optimization of Synchronous Sequential Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {398--403},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331935},
doi = {10.1109/ICCD.1994.331935},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LejmiKW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LiljaA94,
author = {David J. Lilja and
Shanthi Ambalavanan},
title = {A Superassociative Tagged Cache Coherence Directory},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {42--45},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331851},
doi = {10.1109/ICCD.1994.331851},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LiljaA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LinYY94,
author = {Horng{-}Dar Lin and
Ran{-}Hong Yan and
Douglas Yu},
title = {Improving {CMOS} Speed at Low Supply Voltages},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {618--621},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331990},
doi = {10.1109/ICCD.1994.331990},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LinYY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LindkvistA94,
author = {Hans Lindkvist and
Per Andersson},
title = {Techniques for Fast CMOS-based Conditional Sum Adders},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {626--635},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331992},
doi = {10.1109/ICCD.1994.331992},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LindkvistA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Liu94,
author = {Lishing Liu},
title = {Issues in Multi-Level Cache Designs},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {46--52},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331852},
doi = {10.1109/ICCD.1994.331852},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Liu94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LiuCW94,
author = {Hong Liu and
Fung{-}Yuel Chang and
Omar Wing},
title = {Transient Analysis of {VLSI} Interconnects with Arbitrary Initial
Distributions and Nonlinear Terminations},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {563--566},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331976},
doi = {10.1109/ICCD.1994.331976},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LiuCW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LlopisRB94,
author = {Rafael Peset Llopis and
Llu{\'{\i}}s Ribas and
Jordi Carrabina},
title = {Short Destabilizing Paths in Timing Verification},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {160--163},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331879},
doi = {10.1109/ICCD.1994.331879},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LlopisRB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LoyGKM94,
author = {James Loy and
Atul Garg and
Mukkai S. Krishnamoorthy and
John F. McDonald},
title = {Differential Routing of MCMs - {CIF:} The Ideal Bifurcation Medium},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {599--603},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331985},
doi = {10.1109/ICCD.1994.331985},
timestamp = {Sat, 02 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LoyGKM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/LuSD94,
author = {Aiguo Lu and
Jonathan Saul and
Erik L. Dagless},
title = {Architecture Oriented Logic Optimization for Lookup Table Based FPGAs},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {26--29},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331847},
doi = {10.1109/ICCD.1994.331847},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/LuSD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MainsMGD94,
author = {Robert E. Mains and
Thomas A. Mosher and
Lukas P. P. P. van Ginneken and
Robert F. Damiano},
title = {Timing Verification and Optimization for the PowerPC\({}^{\mbox{TM}}\)
Processor Family},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {390--393},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331929},
doi = {10.1109/ICCD.1994.331929},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MainsMGD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Majumdar94,
author = {Amitava Majumdar},
title = {WRAPTure: {A} Tool for Evaluation and Optimization of Weights for
Weighted Random Pattern Testing},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {288--291},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331907},
doi = {10.1109/ICCD.1994.331907},
timestamp = {Thu, 18 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/Majumdar94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MatsuoKTKSYSH94,
author = {Masahito Matsuo and
Hiroyuki Kondo and
Yukari Takata and
Souichi Kobayashi and
Mitsugu Satoh and
Toyohiko Yoshida and
Yuichi Saitoh and
Jun{-}ichi Hinata},
title = {A 32-bit Superscalar Microprocessor with 64-Bit Processing and High
Bandwidth {DRAM} Interface},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {203--210},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331888},
doi = {10.1109/ICCD.1994.331888},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MatsuoKTKSYSH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MayrhauserMWO94,
author = {Anneliese von Mayrhauser and
Richard T. Mraz and
Jeff Walls and
Pete Ocken},
title = {Domain Based Testing: Increasing Test Case Reuse},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {484--491},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331957},
doi = {10.1109/ICCD.1994.331957},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MayrhauserMWO94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MontalvoG94,
author = {Luis A. Montalvo and
Alain Guyot},
title = {Combinational Digit-Set Converters for Hybrid Radix-4 Arithmetic},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {498--503},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331960},
doi = {10.1109/ICCD.1994.331960},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MontalvoG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/MoriokaKMNI94,
author = {M. Morioka and
K. Kurosawa and
S. Miura and
T. Nakamikawa and
S. Ishikawa},
title = {Design and Evaluation of the High Performance Multi-Processor Server},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {66--69},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331856},
doi = {10.1109/ICCD.1994.331856},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/MoriokaKMNI94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/NagiCA94,
author = {Naveena Nagi and
Abhijit Chatterjee and
Jacob A. Abraham},
title = {A Signature Analyzer for Analog and Mixed-signal Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {284--287},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331906},
doi = {10.1109/ICCD.1994.331906},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/NagiCA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/NguyenTDTV94,
author = {Huy Nam Nguyen and
J. P. Tual and
L. Ducousso and
Michel Thill and
P. Vallet},
title = {The Structured Logic {CAD} Suite Used on the {DPS7000} System},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {464--467},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331951},
doi = {10.1109/ICCD.1994.331951},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/NguyenTDTV94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/NowickC94,
author = {Steven M. Nowick and
Bill Coates},
title = {{UCLOCK:} Automated Design of High-Peformance Unclocked State Machines},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {434--441},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331945},
doi = {10.1109/ICCD.1994.331945},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/NowickC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/OhY94,
author = {Choong Gun Oh and
Hee Yong Youn},
title = {Fault Tolerant Processor Arrays for Nonlinear Shortest Path Problem},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {79--83},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331859},
doi = {10.1109/ICCD.1994.331859},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/OhY94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/OhtaNYTM94,
author = {Naohisa Ohta and
Hiroshi Nakada and
Kazuhisa Yamada and
Akihiro Tsutsui and
Toshiaki Miyazaki},
title = {{PROTEUS:} Programmable Hardware for Telecommunication Systems},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {178--183},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331883},
doi = {10.1109/ICCD.1994.331883},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/OhtaNYTM94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/PickerBF94,
author = {Dan Picker and
Michael B. Bendak and
Ronald D. Fellman},
title = {A {VLSI} Priority Packet Queue with Overwrite and Inheritance},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {551--555},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331973},
doi = {10.1109/ICCD.1994.331973},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/PickerBF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Piestrak94,
author = {Stanislaw J. Piestrak},
title = {Design of {TSC} Code-Disjoint Inverter-Free PLA's for Separable Unordered
Codes},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {128--131},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331871},
doi = {10.1109/ICCD.1994.331871},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Piestrak94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Piestrak94a,
author = {Stanislaw J. Piestrak},
title = {Design of High-Speed Residue-to-Binary Number System Converter Based
on Chinese Remainder Theorem},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {508--511},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331962},
doi = {10.1109/ICCD.1994.331962},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Piestrak94a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/PuriG94,
author = {Ruchir Puri and
Jun Gu},
title = {Area Efficient Synthesis of Asynchronous Interface Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {212--216},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331890},
doi = {10.1109/ICCD.1994.331890},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/PuriG94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/QuayleH94,
author = {Michael Quayle and
ChiLai Huang},
title = {Complex Operator Synthesis},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {514--517},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331964},
doi = {10.1109/ICCD.1994.331964},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/QuayleH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RaghunathanJ94,
author = {Anand Raghunathan and
Niraj K. Jha},
title = {Behavioral Synthesis for low Power},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {318--322},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331915},
doi = {10.1109/ICCD.1994.331915},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RaghunathanJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RanganathanV94,
author = {N. Ranganathan and
Satish Venugopal},
title = {A {VLSI} Chip for Template Matching},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {542--545},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331971},
doi = {10.1109/ICCD.1994.331971},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RanganathanV94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RazdanBS94,
author = {Rahul Razdan and
Karl S. Brace and
Michael D. Smith},
title = {{PRISC} Software Acceleration Techniques},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {145--149},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331875},
doi = {10.1109/ICCD.1994.331875},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RazdanBS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/RothLB94,
author = {Charles P. Roth and
Ricky Lewelling and
Timothy B. Brodnax},
title = {The PowerPC\({}^{\mbox{TM}}\) 604 Microprocessor Design Methodology},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {404--408},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331937},
doi = {10.1109/ICCD.1994.331937},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/RothLB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SatoYF94,
author = {Hitomi Sato and
Michihiro Yamazaki and
Masahiro Fujita},
title = {{YEPHCAD} and {FLORA:} Logic Synthesis for Control and Datapath},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {527--530},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331967},
doi = {10.1109/ICCD.1994.331967},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SatoYF94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SentovichB94,
author = {Ellen Sentovich and
Robert K. Brayton},
title = {An Exact Optimization of Two-Level Acyclic Sequential Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {242--249},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331898},
doi = {10.1109/ICCD.1994.331898},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SentovichB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SharmaJ94,
author = {Alok Sharma and
Rajiv Jain},
title = {Register Estimation from Behavioral Specifications},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {576--580},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331980},
doi = {10.1109/ICCD.1994.331980},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SharmaJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SokolovK94,
author = {Sergei Sokolov and
Ramesh Karri},
title = {Allocation and Binding During Fault-Secure Microarchitecture Synthesis},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {327--330},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331917},
doi = {10.1109/ICCD.1994.331917},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SokolovK94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/StewartW94,
author = {Katherine E. Stewart and
Steven W. White},
title = {The Effects of Compiler Options on Application Performance},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {340--343},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331921},
doi = {10.1109/ICCD.1994.331921},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/StewartW94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SunDC94,
author = {Shangzhi Sun and
David Hung{-}Chang Du and
Hsi{-}Chuan Chen},
title = {Efficient Timing Analysis for {CMOS} Circuits Considering Data Dependent
Delays},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {156--159},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331878},
doi = {10.1109/ICCD.1994.331878},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SunDC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SunDHC94,
author = {Shangzhi Sun and
David Hung{-}Chang Du and
Yaun{-}Chung Hsu and
Hsi{-}Chuan Chen},
title = {On Valid Clocking for Combinational Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {381--384},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331931},
doi = {10.1109/ICCD.1994.331931},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SunDHC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SunDL94,
author = {Shangzhi Sun and
David Hung{-}Chang Du and
Duen{-}Ren Liu},
title = {Testability Considerations},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {97--100},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331863},
doi = {10.1109/ICCD.1994.331863},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SunDL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SunadaJBC94,
author = {Glen Sunada and
Jain Jin and
Matt Berzins and
Tom Chen},
title = {{COBRA:} An 1.2 Million Transistor Expandable Column {FFT} Chip},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {546--550},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331972},
doi = {10.1109/ICCD.1994.331972},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SunadaJBC94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/SuryaBA94,
author = {S. Surya and
Pradip Bose and
Jacob A. Abraham},
title = {Architectural Performance Verification: PowerPC\({}^{\mbox{TM}}\)
Processors},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {344--347},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331922},
doi = {10.1109/ICCD.1994.331922},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/SuryaBA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Thoma94,
author = {Peter Thoma},
title = {Future Needs for Automotive Electronics},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {532--539},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331969},
doi = {10.1109/ICCD.1994.331969},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Thoma94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/TongsimaPS94,
author = {Sissades Tongsima and
Nelson L. Passos and
Edwin Hsing{-}Mean Sha},
title = {Communication Sensitive Rotation Scheduling},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {150--153},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331876},
doi = {10.1109/ICCD.1994.331876},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/TongsimaPS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/TunaJB94,
author = {M. Esen Tuna and
Steven D. Johnson and
Robert G. Burger},
title = {Continuations in Hardware-Software Codesign},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {264--269},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331902},
doi = {10.1109/ICCD.1994.331902},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/TunaJB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/WangD94,
author = {Jimmy Shinn{-}Hwa Wang and
Wayne Wei{-}Ming Dai},
title = {Optimal Design of Self-Damped Lossy Transmission Lines for Multichip
Modules},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {594--598},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331984},
doi = {10.1109/ICCD.1994.331984},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/WangD94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/WangWHWL94,
author = {Kuo{-}Hua Wang and
Wen{-}Sing Wang and
TingTing Hwang and
Allen C.{-}H. Wu and
Youn{-}Long Lin},
title = {State Assignment for Power and Area Minimization},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {250--254},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331899},
doi = {10.1109/ICCD.1994.331899},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/WangWHWL94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Weste94,
author = {Neil Weste},
title = {OK, If These {CAD} Tools Are So Great, Why Isn't My Chip Design On
Schedule?},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {2--8},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331840},
doi = {10.1109/ICCD.1994.331840},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Weste94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/Wey94,
author = {Chin{-}Long Wey},
title = {Concurrent Error Detection in High Speed Carry-free Division Using
Alternative Input Data},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {124--127},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331870},
doi = {10.1109/ICCD.1994.331870},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/Wey94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/WilbergCWS94,
author = {J{\"{o}}rg Wilberg and
Raul Camposano and
Ursula Westerholz and
Uwe Steinhausen},
title = {Design of an Embedded Video Compression System - {A} Quantitative
Approach},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {428--431},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331943},
doi = {10.1109/ICCD.1994.331943},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/WilbergCWS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/WilsonGB94,
author = {Thomas Charles Wilson and
Gary William Grewal and
Dilip K. Banerji},
title = {An {ILP} Solution for Simultaneous Scheduling, Allocation, and Binding
in Multiple Block Synthesis},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {581--586},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331981},
doi = {10.1109/ICCD.1994.331981},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/WilsonGB94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/WolberGV94,
author = {R. Wolber and
Uwe Gl{\"{a}}ser and
Heinrich Theodor Vierhaus},
title = {Testability Analysis for Test Generation in Synchronous Sequential
Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {350--353},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331924},
doi = {10.1109/ICCD.1994.331924},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/WolberGV94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/WoodwardLH94,
author = {D. R. Woodward and
D. C. Levy and
R. G. Harley},
title = {An {FPGA} based Configurable {I/O} System for {AC} Drive Controllers},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {424--427},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331942},
doi = {10.1109/ICCD.1994.331942},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/WoodwardLH94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/WuCA94,
author = {Qinghong Wu and
C. Y. Roger Chen and
John M. Acken},
title = {Efficent Boolean Matching Algorithm for Cell Libraries},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {36--39},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331849},
doi = {10.1109/ICCD.1994.331849},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/WuCA94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ZhangS94,
author = {Xuguang Zhang and
Ramalingam Sridhar},
title = {Synchronization of Wave-Pipelined Circuits},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {164--167},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331880},
doi = {10.1109/ICCD.1994.331880},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ZhangS94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iccd/ZhuJ94,
author = {Zheng Zhu and
Steven D. Johnson},
title = {Capturing Synchronization Specifications for Sequential Compositions},
booktitle = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
pages = {117--121},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://doi.org/10.1109/ICCD.1994.331868},
doi = {10.1109/ICCD.1994.331868},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/iccd/ZhuJ94.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/iccd/1994,
title = {Proceedings 1994 {IEEE} International Conference on Computer Design:
{VLSI} in Computer {\&} Processors, {ICCD} '94, Cambridge, MA,
USA, October 10-12, 1994},
publisher = {{IEEE} Computer Society},
year = {1994},
url = {https://ieeexplore.ieee.org/xpl/conhome/1002/proceeding},
isbn = {0-8186-6565-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iccd/1994.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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