Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSearch dblp for Publications
export results for "toc:db/conf/isqed/isqed2005.bht:"
download as .bib file
@inproceedings{DBLP:conf/isqed/AbdollahiFP05,
author = {Afshin Abdollahi and
Farzan Fallah and
Massoud Pedram},
title = {Analysis and Optimization of Static Power Considering Transition Dependency
of Leakage Current in {VLSI} Circuits},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {77--82},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.18},
doi = {10.1109/ISQED.2005.18},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/AbdollahiFP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Al-YamaniM05,
author = {Ahmad A. Al{-}Yamani and
Edward J. McCluskey},
title = {BIST-Guided {ATPG}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {244--249},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.26},
doi = {10.1109/ISQED.2005.26},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Al-YamaniM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/AlamWGTT05,
author = {Syed M. Alam and
Frank L. Wei and
Chee Lip Gan and
Carl V. Thompson and
Donald E. Troxel},
title = {Electromigration Reliability Comparison of Cu and Al Interconnects},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {303--308},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.51},
doi = {10.1109/ISQED.2005.51},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/AlamWGTT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/AmelifardFP05,
author = {Behnam Amelifard and
Farzan Fallah and
Massoud Pedram},
title = {Closing the Gap between Carry Select Adder and Ripple Carry Adder:
{A} New Class Closing the Gap between Carry Select Adder and Ripple
Carry Adder: {A} New Class of Low-Power High-Performance Adders},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {148--152},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.131},
doi = {10.1109/ISQED.2005.131},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/AmelifardFP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/BanCLKHKYK05,
author = {Yong{-}Chan Ban and
Soo{-}Han Choi and
Ki{-}Hung Lee and
Dong{-}Hyun Kim and
Jisuk Hong and
Yoo{-}Hyon Kim and
Moon{-}Hyun Yoo and
Jeong{-}Taek Kong},
title = {A Fast Lithography Verification Framework for Litho-Friendly Layout
Design},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {169--174},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.5},
doi = {10.1109/ISQED.2005.5},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/BanCLKHKYK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/BhattacharyaDOS05,
author = {Subhrajit Bhattacharya and
John A. Darringer and
Daniel L. Ostapko and
Youngsoo Shin},
title = {A Mask Reuse Methodology for Reducing System-on-a-Chip Cost},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {482--487},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.7},
doi = {10.1109/ISQED.2005.7},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/BhattacharyaDOS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/BhuniaMGR05,
author = {Swarup Bhunia and
Hamid Mahmoodi{-}Meimand and
Debjyoti Ghosh and
Kaushik Roy},
title = {Power Reduction in Test-Per-Scan {BIST} with Supply Gating and Efficient
Scan Partitioning},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {453--458},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.96},
doi = {10.1109/ISQED.2005.96},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/BhuniaMGR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/BombieriFP05,
author = {Nicola Bombieri and
Franco Fummi and
Graziano Pravadelli},
title = {Functional Verification of Networked Embedded Systems},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {321--326},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.59},
doi = {10.1109/ISQED.2005.59},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/BombieriFP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Candaele05,
author = {Bernard Candaele},
title = {SoC Engineering Trends as Impacted by New Applications and System
Level Requirements},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {467--467},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.111},
doi = {10.1109/ISQED.2005.111},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Candaele05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/CastagnettiVBMBTR05,
author = {R. Castagnetti and
R. Venkatraman and
Brandon Bartz and
Carl Monzel and
T. Briscoe and
Andres Teene and
S. Ramesh},
title = {A High-Performance {SRAM} Technology With Reduced Chip-Level Routing
Congestion for SoC},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {193--196},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.6},
doi = {10.1109/ISQED.2005.6},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/CastagnettiVBMBTR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ChanZ05,
author = {Henry H. Y. Chan and
Zeljko Zilic},
title = {Modeling Layout Effects for Sensitivity-Based Analog Circuit Optimization},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {390--395},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.80},
doi = {10.1109/ISQED.2005.80},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ChanZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ChandrasekarVV05,
author = {Sreeram Chandrasekar and
Gaurav Kumar Varshney and
V. Visvanathan},
title = {A Comprehensive Methodology for Noise Characterization of {ASIC} Cell
Libraries},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {530--535},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.4},
doi = {10.1109/ISQED.2005.4},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ChandrasekarVV05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Chatterjee05,
author = {Pallab K. Chatterjee},
title = {{IP} Creation and Use What Roadblocks are Ahead or it is Just Clear
and Bumpy Road?},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {7--9},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.68},
doi = {10.1109/ISQED.2005.68},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Chatterjee05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ChenHDMC05,
author = {Song Chen and
Xianlong Hong and
Sheqin Dong and
Yuchun Ma and
Chung{-}Kuan Cheng},
title = {Floorplanning with Consideration of White Space Resource Distribution
for Repeater Planning},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {628--633},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.58},
doi = {10.1109/ISQED.2005.58},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ChenHDMC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ChunJLXY05,
author = {Chun Luo and
Jun Yang and
Longxing Shi and
Xufan Wu and
Yu Zhang},
title = {Domain Strategy and Coverage Metric for Validation},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {40--45},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.46},
doi = {10.1109/ISQED.2005.46},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ChunJLXY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/CoteH05,
author = {Michel C{\^{o}}t{\'{e}} and
Philippe Hurat},
title = {Standard Cell Printability Grading and Hot Spot Detection},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {264--269},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.113},
doi = {10.1109/ISQED.2005.113},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/CoteH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DahanGGPSWBKL05,
author = {Anat Dahan and
Daniel Geist and
Leonid Gluhovsky and
Dmitry Pidan and
Gil Shapir and
Yaron Wolfsthal and
Lyes Benalycherif and
Romain Kamdem and
Younes Lahbib},
title = {Combining System Level Modeling with Assertion Based Verification},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {310--315},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.32},
doi = {10.1109/ISQED.2005.32},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/DahanGGPSWBKL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DattaBBR05,
author = {Animesh Datta and
Swarup Bhunia and
Nilanjan Banerjee and
Kaushik Roy},
title = {A Power-Aware {GALS} Architecture for Real-Time Algorithm-Specific
Tasks},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {358--363},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.12},
doi = {10.1109/ISQED.2005.12},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/DattaBBR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DeodharD05,
author = {Vinita V. Deodhar and
Jeffrey A. Davis},
title = {Voltage Scaling, Wire Sizing and Repeater Insertion Design Rules for
Wave-Pipelined {VLSI} Global Interconnect Circuits},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {592--597},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.128},
doi = {10.1109/ISQED.2005.128},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/DeodharD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DeogunRSBN05,
author = {Harmander Deogun and
Rahul M. Rao and
Dennis Sylvester and
Richard B. Brown and
Kevin J. Nowka},
title = {Dynamically Pulsed {MTCMOS} with Bus Encoding for Total Power and
Crosstalk Minimization},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {88--93},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.49},
doi = {10.1109/ISQED.2005.49},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/DeogunRSBN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DeogunSB05,
author = {Harmander Deogun and
Dennis Sylvester and
David T. Blaauw},
title = {Gate-Level Mitigation Techniques for Neutron-Induced Soft Error Rate},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {175--180},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.61},
doi = {10.1109/ISQED.2005.61},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/DeogunSB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DermentzoglouTA05,
author = {Lampros Dermentzoglou and
Y. Tsiatouhas and
Angela Arapoyanni},
title = {A Built-In Self-Test Scheme for Differential Ring Oscillators},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {448--452},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.2},
doi = {10.1109/ISQED.2005.2},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/DermentzoglouTA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DevganDKH05,
author = {Anirudh Devgan and
Luca Daniel and
Byron Krauter and
Lei He},
title = {Modeling and Design of Chip-Package Interface},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {6},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.78},
doi = {10.1109/ISQED.2005.78},
timestamp = {Wed, 24 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/DevganDKH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/DevganPSKJ05,
author = {Anirudh Devgan and
Ruchir Puri and
Sachin Sapatnaker and
Tanay Karnik and
Rajiv V. Joshi},
title = {Design of sub-90nm Circuits and Design Methodologies},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {3--4},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.45},
doi = {10.1109/ISQED.2005.45},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/DevganPSKJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Dubey05,
author = {Aishwarya Dubey},
title = {{P/G} Pad Placement Optimization: Problem Forumulation for Best {IR}
Drop},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {340--345},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.89},
doi = {10.1109/ISQED.2005.89},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Dubey05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/FriedbergCCWRS05,
author = {Paul Friedberg and
Yu Cao and
Jason Cain and
Ruth Wang and
Jan M. Rabaey and
Costas J. Spanos},
title = {Modeling Within-Die Spatial Correlation Effects for Process-Design
Co-Optimization},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {516--521},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.82},
doi = {10.1109/ISQED.2005.82},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/FriedbergCCWRS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Fujimura05,
author = {Aki Fujimura},
title = {Quality and {EDA}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {463--463},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.100},
doi = {10.1109/ISQED.2005.100},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Fujimura05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GaoYMD05,
author = {Haixia Gao and
Yintang Yang and
Xiaohua Ma and
Gang Dong},
title = {Testing for Resistive Shorts in {FPGA} Interconnects},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {159--163},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.120},
doi = {10.1109/ISQED.2005.120},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/GaoYMD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GaoYMD05a,
author = {Haixia Gao and
Yintang Yang and
Xiaohua Ma and
Gang Dong},
title = {Analysis of the Effect of {LUT} Size on {FPGA} Area and Delay Using
Theoretical Derivations},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {370--374},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.20},
doi = {10.1109/ISQED.2005.20},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/GaoYMD05a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GodaK05,
author = {Ananth Somayaji Goda and
Gautam Kapila},
title = {Design For Degradation : {CAD} Tools for Managing Transistor Degradation
Mechanisms},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {416--420},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.41},
doi = {10.1109/ISQED.2005.41},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/GodaK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GreggC05,
author = {Justin Gregg and
Tom W. Chen},
title = {Optimization of Individual Well Adaptive Body Biasing {(IWABB)} Using
a Multiple Objective Evolutionary Algorithm},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {297--302},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.87},
doi = {10.1109/ISQED.2005.87},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/GreggC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GuntherHNPR05,
author = {Norman G. Gunther and
Emad Hamadeh and
Darrell Niemann and
Iliya Pesic and
Mahmud Rahman},
title = {Modeling Intrinsic Fluctuations in Decananometer {MOS} Modeling Intrinsic
Fluctuations in Decananometer {MOS}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {510--515},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.79},
doi = {10.1109/ISQED.2005.79},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/GuntherHNPR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GuptaKS05,
author = {Puneet Gupta and
Andrew B. Kahng and
Puneet Sharma},
title = {A Practical Transistor-Level Dual Threshold Voltage Assignment Methodology},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {421--426},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.13},
doi = {10.1109/ISQED.2005.13},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/GuptaKS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GuptaKSY05,
author = {Puneet Gupta and
Andrew B. Kahng and
Dennis Sylvester and
Jie Yang},
title = {Performance Driven {OPC} for Mask Cost Reduction},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {270--275},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.93},
doi = {10.1109/ISQED.2005.93},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/GuptaKSY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GuptaR05,
author = {Vishal Gupta and
Gabriel A. Rinc{\'{o}}n{-}Mora},
title = {Predicting and Designing for the Impact of Process Variations and
Mismatch on the Trim Range and Yield of Bandgap References},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {503--508},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.99},
doi = {10.1109/ISQED.2005.99},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/GuptaR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GyureKLTSSWZ05,
author = {Alex Gyure and
Alireza Kasnavi and
Sam C. Lo and
Peivand F. Tehrani and
William Shu and
Mahmoud Shahram and
Joddy W. Wang and
Jindrich Zejda},
title = {Noise Library Characterization for Large Capacity Static Noise Analysis
Tools},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {28--34},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.85},
doi = {10.1109/ISQED.2005.85},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/GyureKLTSSWZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/HanHLL05,
author = {Yinhe Han and
Yu Hu and
Huawei Li and
Xiaowei Li},
title = {Using MUXs Network to Hide Bunches of Scan Chains},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {238--243},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.127},
doi = {10.1109/ISQED.2005.127},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/HanHLL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/HaniotakisTP05,
author = {Themistoklis Haniotakis and
Spyros Tragoudas and
G. Pani},
title = {Reduced Test Application Time Based on Reachability Analysis},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {232--237},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.102},
doi = {10.1109/ISQED.2005.102},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/HaniotakisTP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/HashimotoYO05,
author = {Masanori Hashimoto and
Tomonori Yamamoto and
Hidetoshi Onodera},
title = {Statistical Analysis of Clock Skew Variation in H-Tree Structure},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {402--407},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.114},
doi = {10.1109/ISQED.2005.114},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/HashimotoYO05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/HeXCWDHNH05,
author = {Jin He and
Jane Xi and
Mansun Chan and
Hui Wan and
Mohan V. Dunga and
Babak Heydari and
Ali M. Niknejad and
Chenming Hu},
title = {Charge-Based Core and the Model Architecture of {BSIM5}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {96--101},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.30},
doi = {10.1109/ISQED.2005.30},
timestamp = {Fri, 01 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/HeXCWDHNH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Heydari05,
author = {Payam Heydari},
title = {Design Considerations for Low-Power Ultra Wideband Receivers},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {668--673},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.40},
doi = {10.1109/ISQED.2005.40},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Heydari05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/HongLCYK05,
author = {Young{-}Seok Hong and
Heeseok Lee and
Joon{-}Ho Choi and
Moon{-}Hyun Yoo and
Jeong{-}Taek Kong},
title = {Analysis for Complex Power Distribution Networks Considering Densely
Populated Vias},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {208--212},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.19},
doi = {10.1109/ISQED.2005.19},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/HongLCYK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/HungXVATI05,
author = {Wei{-}Lun Hung and
Yuan Xie and
Narayanan Vijaykrishnan and
Charles Addo{-}Quaye and
Theo Theocharides and
Mary Jane Irwin},
title = {Thermal-Aware Floorplanning Using Genetic Algorithms},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {634--639},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.122},
doi = {10.1109/ISQED.2005.122},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/HungXVATI05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/HuynhNPH05,
author = {J. Huynh and
B. Ngo and
M. Pham and
Lili He},
title = {Design of a 10-bit {TSMC} 0.25um {CMOS} Digital to Analog Converter},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {187--192},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.42},
doi = {10.1109/ISQED.2005.42},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/HuynhNPH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/JahangiriA05,
author = {Jay Jahangiri and
David Abercrombie},
title = {Meeting Nanometer {DPM} Requirements Through {DFT}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {276--282},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.76},
doi = {10.1109/ISQED.2005.76},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/JahangiriA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/JhariaSA05,
author = {Bhavana Jharia and
Sankar Sarkar and
Rajendra Prasad Agarwal},
title = {Analytical Study of Impact Ionization and Subthreshold Current in
Submicron n-MOSFET},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {72--76},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.22},
doi = {10.1109/ISQED.2005.22},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/JhariaSA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/JozwiakB05,
author = {Lech J{\'{o}}zwiak and
Kaustav Banerjee},
title = {Plenary Session 2P},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {461},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.94},
doi = {10.1109/ISQED.2005.94},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/JozwiakB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KalligerosKKN05,
author = {Emmanouil Kalligeros and
D. Kaseridis and
Xrysovalantis Kavousianos and
Dimitris Nikolos},
title = {Reseeding-Based Test Set Embedding with Reduced Test Sequences},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {226--231},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.105},
doi = {10.1109/ISQED.2005.105},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/KalligerosKKN05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KangCR05,
author = {Dongku Kang and
Yiran Chen and
Kaushik Roy},
title = {Power Supply Noise-Aware Scheduling and Allocation for {DSP} Synthesis},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {48--53},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.97},
doi = {10.1109/ISQED.2005.97},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/KangCR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Kaur05,
author = {Jasjeet Kaur},
title = {A Balanced Scorecard for Systemic Quality in Electronic Design Automation:
An Implementation Method for an {EDA} Company},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {118--122},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.1},
doi = {10.1109/ISQED.2005.1},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Kaur05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Keating05,
author = {Michael Keating},
title = {{IP} Quality: {A} Design, Not a Verification Problem},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {220--224},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.69},
doi = {10.1109/ISQED.2005.69},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Keating05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KhalilDBLCR05,
author = {DiaaEldin Khalil and
Mohamed Dessouky and
Vincent Bourguet and
Marie{-}Minerve Lou{\"{e}}rat and
Andreia Cathelin and
Hani F. Ragai},
title = {Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid
Capacitor Arrays},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {143--147},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.54},
doi = {10.1109/ISQED.2005.54},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/KhalilDBLCR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Kibarian05,
author = {John Kibarian},
title = {Enabling True Design for Manufacturability},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {15},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.52},
doi = {10.1109/ISQED.2005.52},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Kibarian05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KimKR05,
author = {Keejong Kim and
Chris H. Kim and
Kaushik Roy},
title = {{TFT-LCD} Application Specific Low Power {SRAM} Using Charge-Recycling
Technique},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {59--64},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.121},
doi = {10.1109/ISQED.2005.121},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/KimKR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KurokawaKIKFKIM05,
author = {Atsushi Kurokawa and
Toshiki Kanamoto and
Tetsuya Ibe and
Akira Kasebe and
Wei Fong Chang and
Tetsuro Kage and
Yasuaki Inoue and
Hiroo Masuda},
title = {Dummy Filling Methods for Reducing Interconnect Capacitance and Number
of Fills},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {586--591},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.47},
doi = {10.1109/ISQED.2005.47},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/KurokawaKIKFKIM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/KurokawaYOKIM05,
author = {Atsushi Kurokawa and
Masaharu Yamamoto and
Nobuto Ono and
Tetsuro Kage and
Yasuaki Inoue and
Hiroo Masuda},
title = {Capacitance and Yield Evaluations Using a 90-nm Process Technology
Based on the Dense Power-Ground Interconnect Architecture},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {153--158},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.29},
doi = {10.1109/ISQED.2005.29},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/KurokawaYOKIM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/LaknaurW05,
author = {Amit Laknaur and
Haibo Wang},
title = {Built-In-Self-Testing Techniques for Programmable Capacitor Arrays},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {434--439},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.28},
doi = {10.1109/ISQED.2005.28},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/LaknaurW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/LeeK05,
author = {Jihyun Lee and
Yong{-}Bin Kim},
title = {{ASLIC:} {A} Low Power {CMOS} Analog Circuit Design Automation},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {470--475},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.23},
doi = {10.1109/ISQED.2005.23},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/LeeK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/LiHQZTGB05,
author = {Xiaojun Li and
Bing Huang and
J. Qin and
X. Zhang and
Michael Talmor and
Z. Gur and
Joseph B. Bernstein},
title = {Deep Submicron {CMOS} Integrated Circuit Reliability Simulation with
{SPICE}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {382--389},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.37},
doi = {10.1109/ISQED.2005.37},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/LiHQZTGB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/LiWB05,
author = {Xiaojun Li and
Joerg D. Walter and
Joseph B. Bernstein},
title = {Simulating and Improving Microelectronic Device Reliability by Scaling
Voltage and Temperature},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {496--502},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.110},
doi = {10.1109/ISQED.2005.110},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/LiWB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/LingS05,
author = {Wei Ling and
Yvon Savaria},
title = {Analysis of Wave-Pipelined Domino Logic Circuit and Clocking Styles
Subject to Parametric Variations},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {688--693},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.21},
doi = {10.1109/ISQED.2005.21},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/LingS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/LiuQT05,
author = {Pu Liu and
Zhenyu Qi and
Sheldon X.{-}D. Tan},
title = {Passive Hierarchical Model Order Reduction and Realization of {RLCM}
Circuits},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {603--608},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.92},
doi = {10.1109/ISQED.2005.92},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/LiuQT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/LundstromWY05,
author = {Mark S. Lundstrom and
Philip Wong and
Kazuo Yano},
title = {Nanoelectronics: Evolution or Revolution?},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {459},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.83},
doi = {10.1109/ISQED.2005.83},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/LundstromWY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/MaHDCC05,
author = {Yuchun Ma and
Xianlong Hong and
Sheqin Dong and
Song Chen and
Chung{-}Kuan Cheng},
title = {Buffer Planning Algorithm Based on Partial Clustered Floorplanning},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {213--219},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.27},
doi = {10.1109/ISQED.2005.27},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/MaHDCC05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/McCaffrey05,
author = {Bill McCaffrey},
title = {Exploring the Challenges in Creating a High-Quality Mainstream Design
Solution for System-in-Package (SiP) Design},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {556--561},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.56},
doi = {10.1109/ISQED.2005.56},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/McCaffrey05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/MichaelNT05,
author = {Maria K. Michael and
Stelios Neophytou and
Spyros Tragoudas},
title = {Functions for Quality Transition Fault Tests},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {327--332},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.60},
doi = {10.1109/ISQED.2005.60},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/MichaelNT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/MukhopadhyayKKLJCR05,
author = {Saibal Mukhopadhyay and
Keunwoo Kim and
Jae{-}Joon Kim and
Shih{-}Hsien Lo and
Rajiv V. Joshi and
Ching{-}Te Chuang and
Kaushik Roy},
title = {Modeling and Analysis of Gate Leakage in Ultra-thin Oxide Sub-50nm
Double Gate Devices and Circuits},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {410--415},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.77},
doi = {10.1109/ISQED.2005.77},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/MukhopadhyayKKLJCR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/MukhopadhyayMR05,
author = {Saibal Mukhopadhyay and
Hamid Mahmoodi{-}Meimand and
Kaushik Roy},
title = {Design of High Performance Sense Amplifier Using Independent Gate
Control in sub-50nm Double-Gate {MOSFET}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {490--495},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.44},
doi = {10.1109/ISQED.2005.44},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/MukhopadhyayMR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/NanuaBO05,
author = {Mini Nanua and
David T. Blaauw and
Chanhee Oh},
title = {Leakage Current Modeling in {PD} {SOI} Circuits},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {113--117},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.74},
doi = {10.1109/ISQED.2005.74},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/NanuaBO05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/NassifL05,
author = {Sani R. Nassif and
Zhuo Li},
title = {A More Effective C\({}_{\mbox{EFF}}\)},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {648--653},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.10},
doi = {10.1109/ISQED.2005.10},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/NassifL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/NazarianPTL05,
author = {Shahin Nazarian and
Massoud Pedram and
Emre Tuncer and
Tao Lin},
title = {Sensitivity-Based Gate Delay Propagation in Static Timing Analysis},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {536--541},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.108},
doi = {10.1109/ISQED.2005.108},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/NazarianPTL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/NgM05,
author = {Aaron N. Ng and
Igor L. Markov},
title = {Toward Quality {EDA} Tools and Tool Flows Through High-Performance
Computing},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {22--27},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.125},
doi = {10.1109/ISQED.2005.125},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/NgM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/PatilYKCHB05,
author = {Dinesh Patil and
Sunghee Yun and
Seung{-}Jean Kim and
Alvin Cheung and
Mark Horowitz and
Stephen P. Boyd},
title = {A New Method for Design of Robust Digital Circuits},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {676--681},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.11},
doi = {10.1109/ISQED.2005.11},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/PatilYKCHB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/PomeranzR05,
author = {Irith Pomeranz and
Sudhakar M. Reddy},
title = {Dynamic Test Compaction for Bridging Faults},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {250--255},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.48},
doi = {10.1109/ISQED.2005.48},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/PomeranzR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/PopovichF05,
author = {Mikhail Popovich and
Eby G. Friedman},
title = {Noise Aware Decoupling Capacitors for Multi-Voltage Power Distribution
Systems},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {334--339},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.84},
doi = {10.1109/ISQED.2005.84},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/PopovichF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/QiLTWCH05,
author = {Zhenyu Qi and
Hang Li and
Sheldon X.{-}D. Tan and
Lifeng Wu and
Yici Cai and
Xianlong Hong},
title = {Fast Decap Allocation Algorithm For Robust On-Chip Power Delivery},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {542--547},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.57},
doi = {10.1109/ISQED.2005.57},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/QiLTWCH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/RahimiD05,
author = {Kambiz Rahimi and
Chris Diorio},
title = {In-Circuit Self-Tuning of Clock Latencies},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {396--401},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.65},
doi = {10.1109/ISQED.2005.65},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/RahimiD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/RaoADNSB05,
author = {Rahul M. Rao and
Kanak Agarwal and
Anirudh Devgan and
Kevin J. Nowka and
Dennis Sylvester and
Richard B. Brown},
title = {Parametric Yield Analysis and Constrained-Based Supply Voltage Optimization},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {284--290},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.90},
doi = {10.1109/ISQED.2005.90},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/RaoADNSB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Riviere-CazauxLF05,
author = {Lionel Riviere{-}Cazaux and
Kevin Lucas and
Jon Fitch},
title = {Integration Of Design For Manufacturability {(DFM)} Practices In Design
Flows},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {102--106},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.66},
doi = {10.1109/ISQED.2005.66},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Riviere-CazauxLF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/RobertsABMF05,
author = {David Roberts and
Todd M. Austin and
David T. Blaauw and
Trevor N. Mudge and
Kriszti{\'{a}}n Flautner},
title = {Error Analysis for the Support of Robust Voltage Scaling},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {65--70},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.53},
doi = {10.1109/ISQED.2005.53},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/RobertsABMF05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/RomaDSPP05,
author = {Carlo Roma and
Pierluigi Daglio and
Guido De Sandre and
Marco Pasotti and
Marco Poles},
title = {How Circuit Analysis and Yield Optimization Can Be Used To Detect
Circuit Limitations Before Silicon Results},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {107--112},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.62},
doi = {10.1109/ISQED.2005.62},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/RomaDSPP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Sawicki05,
author = {Joseph Sawicki},
title = {Shifting Perspective on {DFM}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {19},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.109},
doi = {10.1109/ISQED.2005.109},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Sawicki05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Sekar05,
author = {Deepak C. Sekar},
title = {Clock trees: differential or single ended?},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {548--553},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.31},
doi = {10.1109/ISQED.2005.31},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Sekar05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SemenovSS05,
author = {Oleg Semenov and
Hossein Sarbishaei and
Manoj Sachdev},
title = {Analysis and Design of LVTSCR-based {EOS/ESD} Protection Circuits
for Burn-in Environment},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {427--432},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.17},
doi = {10.1109/ISQED.2005.17},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SemenovSS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SenguptaS05,
author = {Dipanjan Sengupta and
Resve A. Saleh},
title = {Power-Delay Metrics Revisited for 90nm {CMOS} Technology},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {291--296},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.98},
doi = {10.1109/ISQED.2005.98},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SenguptaS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SeoCJ05,
author = {Chung{-}Seok (Andy) Seo and
Abhijit Chatterjee and
Nan M. Jokerst},
title = {This paper presents a cost-effective area-IO {DRAM} {A} {CAD} Tool
and Algorithms},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {567--572},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.123},
doi = {10.1109/ISQED.2005.123},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SeoCJ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ShaoGYCW05,
author = {Muzhou Shao and
Youxin Gao and
Li{-}Pen Yuan and
Hung{-}Ming Chen and
Martin D. F. Wong},
title = {Current Calculation on {VLSI} Signal Interconnects},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {580--585},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.36},
doi = {10.1109/ISQED.2005.36},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ShaoGYCW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ShenZTIT05,
author = {Meigen Shen and
Li{-}Rong Zheng and
Esa Tjukanoff and
Jouni Isoaho and
Hannu Tenhunen},
title = {Concurrent Chip Package Design for Global Clock Distribution Network
Using Standing Wave Approach},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {573--578},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.33},
doi = {10.1109/ISQED.2005.33},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ShenZTIT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ShrimaliVA05,
author = {Arun Shrimali and
Anand Venkitachalam and
Ravi Arora},
title = {Issues and Challenges in Ramp to Production},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {123--127},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.72},
doi = {10.1109/ISQED.2005.72},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ShrimaliVA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Sinha05,
author = {Ashok K. Sinha},
title = {Recent Progress and Remaining Challenges in Pattern Transfer Technologies
for Advanced Chip Designs},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {17},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.101},
doi = {10.1109/ISQED.2005.101},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Sinha05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SivagnanameNNMB05,
author = {Jayakumaran Sivagnaname and
Hung C. Ngo and
Kevin J. Nowka and
Robert K. Montoye and
Richard B. Brown},
title = {Controlled-Load Limited Switch Dynamic Logic Circuit},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {83--87},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.35},
doi = {10.1109/ISQED.2005.35},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SivagnanameNNMB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SokolowskaBK05,
author = {Ewa Sokolowska and
M. Barszcz and
Bozena Kaminska},
title = {{TED} Thermo Electrical Designer: {A} New Physical Design Verification
Tool},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {164--168},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.119},
doi = {10.1109/ISQED.2005.119},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SokolowskaBK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SridharaSB05,
author = {Srinivasa R. Sridhara and
Naresh R. Shanbhag and
Ganesh Balamurugan},
title = {Joint Equalization and Coding for On-Chip Bus Communication},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {642--647},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.73},
doi = {10.1109/ISQED.2005.73},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SridharaSB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SrivastavaQB05,
author = {Navin Srivastava and
Xiaoning Qi and
Kaustav Banerjee},
title = {Impact of On-chip Inductance on Power Distribution Network Design
for Nanometer Scale Integrated Circuits},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {346--351},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.64},
doi = {10.1109/ISQED.2005.64},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SrivastavaQB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/StewartHT05,
author = {Khadija Jirari Stewart and
Themistoklis Haniotakis and
Spyros Tragoudas},
title = {Design and Evaluation of a Security Scheme for Sensor Networks},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {197--201},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.39},
doi = {10.1109/ISQED.2005.39},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/StewartHT05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SunZYY05,
author = {Jiaxing Sun and
Yun Zheng and
Qing Ye and
Tianchun Ye},
title = {Interconnect Delay and Slew Metrics Using the First Three Moments},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {598--602},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.67},
doi = {10.1109/ISQED.2005.67},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SunZYY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/SwaminathanPDS05,
author = {Shivakumar Swaminathan and
Sanjay B. Patel and
James Dieffenderfer and
Joel Silberman},
title = {Reducing Power Consumption during {TLB} Lookups in a PowerPC Embedded
Processor},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {54--58},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.103},
doi = {10.1109/ISQED.2005.103},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/SwaminathanPDS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TalaricoPVW05,
author = {Claudio Talarico and
B. Pillilli and
K. L. Vakati and
Janet M. Wang},
title = {Early Assessment of Leakage Power for System Level Design},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {133--136},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.50},
doi = {10.1109/ISQED.2005.50},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/TalaricoPVW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TangLP05,
author = {C. K. Tang and
Parag K. Lala and
James Patrick Parkerson},
title = {A Technique for Designing Totally Self-Checking Domino Logic Circuits},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {128--132},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.14},
doi = {10.1109/ISQED.2005.14},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/TangLP05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TangZ05,
author = {Qianying Tang and
Jianwen Zhu},
title = {Two-Dimensional Layout Migration by Soft Constraint Satisfaction},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {35--39},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.126},
doi = {10.1109/ISQED.2005.126},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/TangZ05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TeeneDCBR05,
author = {Andres Teene and
Bob Davis and
Ruggero Castagnetti and
Jeff Brown and
S. Ramesh},
title = {Impact of Interconnect Process Variations on Memory Performance and
Design},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {694--699},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.63},
doi = {10.1109/ISQED.2005.63},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/TeeneDCBR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TosunMAKXH05,
author = {Suleyman Tosun and
Nazanin Mansouri and
Ercument Arvas and
Mahmut T. Kandemir and
Yuan Xie and
Wei{-}Lun Hung},
title = {Reliability-Centric Hardware/Software Co-Design},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {375--380},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.104},
doi = {10.1109/ISQED.2005.104},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/TosunMAKXH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TosunOMAKXH05,
author = {Suleyman Tosun and
Ozcan Ozturk and
Nazanin Mansouri and
Ercument Arvas and
Mahmut T. Kandemir and
Yuan Xie and
Wei{-}Lun Hung},
title = {An {ILP} Formulation for Reliability-Oriented High-Level Synthesis},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {364--369},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.15},
doi = {10.1109/ISQED.2005.15},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/TosunOMAKXH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/TsaiM05,
author = {Chung{-}Kuan Tsai and
Malgorzata Marek{-}Sadowska},
title = {An Interconnect Insensitive Linear Time-Varying Driver Model for Static
Timing Analysis},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {654--661},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.16},
doi = {10.1109/ISQED.2005.16},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/TsaiM05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/VenkatramanB05,
author = {Vishak Venkatraman and
Wayne P. Burleson},
title = {Robust Multi-Level Current-Mode On-Chip Interconnect Signaling in
the Presence of Process Variations},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {522--527},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.107},
doi = {10.1109/ISQED.2005.107},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/VenkatramanB05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/VenutoMR05,
author = {Daniela De Venuto and
Grazia Marchione and
Leonardo Reyneri},
title = {A codesign tool to validate and improve an {FPGA} based test strategy
for high resolution audio {ADC}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {440--447},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.3},
doi = {10.1109/ISQED.2005.3},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/VenutoMR05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/WangCKS05,
author = {Xin Wang and
Charles C. Chiang and
Jamil Kawa and
Qing Su},
title = {A Min-Variance Iterative Method for Fast Smart Dummy Feature Density
Assignment in Chemical-Mechanical Polishing},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {258--263},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.8},
doi = {10.1109/ISQED.2005.8},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/WangCKS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/WangD05,
author = {Anru Wang and
Wayne Wei{-}Ming Dai},
title = {Design and Analysis of Area-IO DRAM/Logic Integration with System-in-a-Package(SiP)},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {562--566},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.38},
doi = {10.1109/ISQED.2005.38},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/WangD05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/WellingTW05,
author = {M. Welling and
Spyros Tragoudas and
Haibo Wang},
title = {A Minimum Cut Based Re-Synthesis Approach},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {202--207},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.9},
doi = {10.1109/ISQED.2005.9},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/WellingTW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/WoK05,
author = {Zhaojun Wo and
Israel Koren},
title = {Technology Mapping for Reliability Enhancement in Logic Synthesis},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {137--142},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.118},
doi = {10.1109/ISQED.2005.118},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/WoK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/Wolf05,
author = {Kurt A. Wolf},
title = {{IP} Quality: {A} New Model that Faces Methodology and Management
Challenges},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {465--465},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.70},
doi = {10.1109/ISQED.2005.70},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/Wolf05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/WuL05,
author = {Meng{-}Chiou Wu and
Rung{-}Bin Lin},
title = {Reticle Floorplanning and Wafer Dicing for Multiple Project Wafers},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {610--615},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.106},
doi = {10.1109/ISQED.2005.106},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/WuL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/X05,
title = {Welcome Notes},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.129},
doi = {10.1109/ISQED.2005.129},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/X05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/X05a,
title = {Organizing Committee},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.88},
doi = {10.1109/ISQED.2005.88},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/X05a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/X05b,
title = {Technical Subcommittees},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.117},
doi = {10.1109/ISQED.2005.117},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/X05b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/X05c,
title = {Steering/Advisory Committee},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.115},
doi = {10.1109/ISQED.2005.115},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/X05c.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/X05d,
title = {Conference at a Glance},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.34},
doi = {10.1109/ISQED.2005.34},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/X05d.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/XiangCW05,
author = {Hua Xiang and
Kai{-}Yuan Chao and
Martin D. F. Wong},
title = {Exact Algorithms for Coupling Capacitance Minimization by Adding One
Metal Layer},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {181--186},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.55},
doi = {10.1109/ISQED.2005.55},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/XiangCW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/XiangLW05,
author = {Hua Xiang and
I{-}Min Liu and
Martin D. F. Wong},
title = {Wire Planning with Bounded Over-the-Block Wires},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {622--627},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.130},
doi = {10.1109/ISQED.2005.130},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/XiangLW05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/XuHJY05,
author = {Jingyu Xu and
Xianlong Hong and
Tong Jing and
Yang Yang},
title = {Obstacle-Avoiding Rectilinear Minimum-Delay Steiner Tree Construction
towards IP-Block-Based {SOC} Design},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {616--621},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.86},
doi = {10.1109/ISQED.2005.86},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/XuHJY05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/YanXS05,
author = {Haihua Yan and
Gefu Xu and
Adit D. Singh},
title = {Low Voltage Test in Place of Fast Clock in {DDSI} Delay Test},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {316--320},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.75},
doi = {10.1109/ISQED.2005.75},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/YanXS05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/YuH05,
author = {Hao Yu and
Lei He},
title = {Staggered Twisted-Bundle Interconnect for Crosstalk and Delay Reduction},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {682--687},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.112},
doi = {10.1109/ISQED.2005.112},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/YuH05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ZahabiSK05,
author = {Ali Zahabi and
Omid Shoaei and
Yarallah Koolivand},
title = {Design of a Band-Pass Pseudo-2-Path Switched Capacitor Ladder Filter},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {662--667},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.43},
doi = {10.1109/ISQED.2005.43},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ZahabiSK05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ZhouCCL05,
author = {Yuanzhong (Paul) Zhou and
Duane Connerney and
Ronald Carroll and
Timwah Luk},
title = {Modeling {MOS} Snapback for Circuit-Level {ESD} Simulation Using {BSIM3}
and {VBIC} Models},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {476--481},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.81},
doi = {10.1109/ISQED.2005.81},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ZhouCCL05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ZhuA05,
author = {Qing K. Zhu and
David Ayers},
title = {Power Grid Planning for Microprocessors and {SOCS}},
booktitle = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
pages = {352--356},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://doi.org/10.1109/ISQED.2005.95},
doi = {10.1109/ISQED.2005.95},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isqed/ZhuA05.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/isqed/2005,
title = {6th International Symposium on Quality of Electronic Design {(ISQED}
2005), 21-23 March 2005, San Jose, CA, {USA}},
publisher = {{IEEE} Computer Society},
year = {2005},
url = {https://ieeexplore.ieee.org/xpl/conhome/9684/proceeding},
isbn = {0-7695-2301-3},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/2005.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
retrieved on 2024-04-23 12:19 CEST from data curated by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
