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@inproceedings{DBLP:conf/memsys/0001KSSWW19,
  author       = {Matthias Jung and
                  Kira Kraft and
                  Taha Soliman and
                  Chirag Sudarshan and
                  Christian Weis and
                  Norbert Wehn},
  title        = {Fast validation of {DRAM} protocols with timed petri nets},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {133--147},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357556},
  doi          = {10.1145/3357526.3357556},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/0001KSSWW19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/AgaJI19,
  author       = {Shaizeen Aga and
                  Nuwan Jayasena and
                  Mike Ignatowski},
  title        = {Co-ML: a case for {\textless}u{\textgreater}co{\textless}/u{\textgreater}llaborative
                  {\textless}u{\textgreater}ML{\textless}/u{\textgreater} acceleration
                  using near-data processing},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {506--517},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357532},
  doi          = {10.1145/3357526.3357532},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/AgaJI19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/AhmedS19,
  author       = {Alif Ahmed and
                  Kevin Skadron},
  title        = {Hopscotch: a micro-benchmark suite for memory performance evaluation},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {167--172},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357574},
  doi          = {10.1145/3357526.3357574},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/AhmedS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/AlamPG19,
  author       = {Irina Alam and
                  Saptadeep Pal and
                  Puneet Gupta},
  title        = {Compression with multi-ECC: enhanced error resiliency for magnetic
                  memories},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {85--100},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357533},
  doi          = {10.1145/3357526.3357533},
  timestamp    = {Thu, 28 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/AlamPG19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/AsifuzzamanFRAC19,
  author       = {Kazi Asifuzzaman and
                  Mikel Fern{\'{a}}ndez and
                  Petar Radojkovic and
                  Jaume Abella and
                  Francisco J. Cazorla},
  title        = {{STT-MRAM} for real-time embedded systems: performance and {WCET}
                  implications},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {195--205},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357531},
  doi          = {10.1145/3357526.3357531},
  timestamp    = {Thu, 23 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/AsifuzzamanFRAC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/BackesJ19,
  author       = {Luna Backes and
                  Daniel A. Jim{\'{e}}nez},
  title        = {The impact of cache inclusion policies on cache management techniques},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {428--438},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357547},
  doi          = {10.1145/3357526.3357547},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/BackesJ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ByrneOW19,
  author       = {Daniel Byrne and
                  Nilufer Onder and
                  Zhenlin Wang},
  title        = {Faster slab reassignment in memcached},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {353--362},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357562},
  doi          = {10.1145/3357526.3357562},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/ByrneOW19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ChenLHSS019,
  author       = {Xubin Chen and
                  Yin Li and
                  Jingpeng Hao and
                  Hyunsuk Shin and
                  Michael Suh and
                  Tong Zhang},
  title        = {Simultaneously reducing cost and improving performance of NVM-based
                  block devices via transparent data compression},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {331--341},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357530},
  doi          = {10.1145/3357526.3357530},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/ChenLHSS019.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ChenLJDP19,
  author       = {Dong Chen and
                  Fangzhou Liu and
                  Mingyang Jiao and
                  Chen Ding and
                  Sreepathi Pai},
  title        = {Statistical caching for near memory management},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {411--416},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357557},
  doi          = {10.1145/3357526.3357557},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/ChenLJDP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ChishtiA19,
  author       = {Zeshan Chishti and
                  Berkin Akin},
  title        = {Memory system characterization of deep learning workloads},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {497--505},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357569},
  doi          = {10.1145/3357526.3357569},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/ChishtiA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ChoeMBH19,
  author       = {Jiwon Choe and
                  Tali Moreshet and
                  R. Iris Bahar and
                  Maurice Herlihy},
  title        = {Attacking memory-hard scrypt with near-data-processing},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {33--37},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357570},
  doi          = {10.1145/3357526.3357570},
  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/ChoeMBH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/DuL19,
  author       = {Xiaoming Du and
                  Cong Li},
  title        = {Combining error statistics with failure prediction in memory page
                  offlining},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {127--132},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357527},
  doi          = {10.1145/3357526.3357527},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/DuL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/EfflerKJSKDJ19,
  author       = {T. Chad Effler and
                  Brandon Kammerdiener and
                  Michael R. Jantz and
                  Saikat Sengupta and
                  Prasad A. Kulkarni and
                  Kshitij A. Doshi and
                  Terry R. Jones},
  title        = {Evaluating the effectiveness of program data features for guiding
                  memory management},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {383--395},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357537},
  doi          = {10.1145/3357526.3357537},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/EfflerKJSKDJ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/FotouhiWLY19,
  author       = {Pouya Fotouhi and
                  Sebastian Werner and
                  Jason Lowe{-}Power and
                  S. J. Ben Yoo},
  title        = {Enabling scalable chiplet-based uniform memory architectures with
                  silicon photonics},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {222--334},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357564},
  doi          = {10.1145/3357526.3357564},
  timestamp    = {Thu, 15 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/FotouhiWLY19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/GajariaA19,
  author       = {Dhruv Gajaria and
                  Tosiron Adegbija},
  title        = {{ARC:} DVFS-aware asymmetric-retention {STT-RAM} caches for energy-efficient
                  multicore processors},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {439--450},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357553},
  doi          = {10.1145/3357526.3357553},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/GajariaA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/Greenspan19,
  author       = {Derrick Greenspan},
  title        = {{LLAMA} - automatic memory allocations: an {LLVM} pass and library
                  for automatically determining memory allocations},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {363--372},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357534},
  doi          = {10.1145/3357526.3357534},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/Greenspan19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ImaniGR19,
  author       = {Mohsen Imani and
                  Saransh Gupta and
                  Tajana Rosing},
  title        = {Digital-based processing in-memory: a highly-parallel accelerator
                  for data intensive applications},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {38--40},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357551},
  doi          = {10.1145/3357526.3357551},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/ImaniGR19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/JagasivamaniWSK19,
  author       = {Meenatchi Jagasivamani and
                  Candace Walden and
                  Devesh Singh and
                  Luyi Kang and
                  Shang Li and
                  Mehdi Asnaashari and
                  Sylvain Dubois and
                  Donald Yeung and
                  Bruce L. Jacob},
  title        = {Design for ReRAM-based main-memory architectures},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {342--350},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357561},
  doi          = {10.1145/3357526.3357561},
  timestamp    = {Fri, 13 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/JagasivamaniWSK19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/JiangPHY19,
  author       = {Hongwu Jiang and
                  Xiaochen Peng and
                  Shanshi Huang and
                  Shimeng Yu},
  title        = {{CIMAT:} a transpose SRAM-based compute-in-memory architecture for
                  deep neural network on-chip training},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {490--496},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357552},
  doi          = {10.1145/3357526.3357552},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/JiangPHY19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/KommareddyHHSA19,
  author       = {Vamsee Reddy Kommareddy and
                  Simon David Hammond and
                  Clayton Hughes and
                  Ahmad Samih and
                  Amro Awad},
  title        = {Page migration support for disaggregated non-volatile memories},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {417--427},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357543},
  doi          = {10.1145/3357526.3357543},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/KommareddyHHSA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/LeonGP19,
  author       = {Edgar A. Le{\'{o}}n and
                  Brice Goglin and
                  Andr{\`{e}}s Rubio Proa{\~{n}}o},
  title        = {M{\&}MMs: navigating complex memory spaces with hwloc},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {149--155},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357546},
  doi          = {10.1145/3357526.3357546},
  timestamp    = {Mon, 08 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/LeonGP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/Li0TWLC19,
  author       = {Jie Li and
                  Xi Wang and
                  Antonino Tumeo and
                  Brody Williams and
                  John D. Leidel and
                  Yong Chen},
  title        = {{PIMS:} a lightweight processing-in-memory accelerator for stencil
                  computations},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {41--52},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357550},
  doi          = {10.1145/3357526.3357550},
  timestamp    = {Thu, 07 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/Li0TWLC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/LiJ19,
  author       = {Shang Li and
                  Bruce L. Jacob},
  title        = {Statistical {DRAM} modeling},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {521--530},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357576},
  doi          = {10.1145/3357526.3357576},
  timestamp    = {Fri, 13 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/LiJ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/LiVRJ19,
  author       = {Shang Li and
                  Rommel S{\'{a}}nchez Verdejo and
                  Petar Radojkovic and
                  Bruce L. Jacob},
  title        = {Rethinking cycle accurate {DRAM} simulation},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {184--191},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357539},
  doi          = {10.1145/3357526.3357539},
  timestamp    = {Fri, 13 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/LiVRJ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/NesterenkoLYZZ19,
  author       = {Brandon Nesterenko and
                  Xiao Liu and
                  Qing Yi and
                  Jishen Zhao and
                  Jiange Zhang},
  title        = {Transitioning scientific applications to using non-volatile memory
                  for resilience},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {114--125},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357563},
  doi          = {10.1145/3357526.3357563},
  timestamp    = {Wed, 15 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/NesterenkoLYZZ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/NguyenYLTH19,
  author       = {Hoang Anh Du Nguyen and
                  Jintao Yu and
                  Muath Abu Lebdeh and
                  Mottaqiallah Taouil and
                  Said Hamdioui},
  title        = {A computation-in-memory accelerator based on resistive devices},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {19--32},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357554},
  doi          = {10.1145/3357526.3357554},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/NguyenYLTH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/OhAKDM19,
  author       = {Byoungchan Oh and
                  Nilmini Abeyratne and
                  Nam Sung Kim and
                  Ronald G. Dreslinski and
                  Trevor N. Mudge},
  title        = {{SMART:} {STT-MRAM} architecture for smart activation and sensing},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {316--330},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357529},
  doi          = {10.1145/3357526.3357529},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/OhAKDM19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/OlsonKJDJ19,
  author       = {Matthew Ben Olson and
                  Brandon Kammerdiener and
                  Michael R. Jantz and
                  Kshitij A. Doshi and
                  Terry R. Jones},
  title        = {Portable application guidance for complex memory systems},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {156--166},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357575},
  doi          = {10.1145/3357526.3357575},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/OlsonKJDJ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ParaskevasALG19,
  author       = {Kyriakos Paraskevas and
                  Andrew Attwood and
                  Mikel Luj{\'{a}}n and
                  John Goodacre},
  title        = {Scaling the capacity of memory systems; evolution and key approaches},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {235--249},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357555},
  doi          = {10.1145/3357526.3357555},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/ParaskevasALG19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/PatilILM019,
  author       = {Onkar Patil and
                  Latchesar Ionkov and
                  Jason Lee and
                  Frank Mueller and
                  Michael Lang},
  title        = {Performance characterization of a {DRAM-NVM} hybrid memory architecture
                  for {HPC} applications using intel optane {DC} persistent memory modules},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {288--303},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357541},
  doi          = {10.1145/3357526.3357541},
  timestamp    = {Tue, 23 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/PatilILM019.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/PengGG19,
  author       = {Ivy Bo Peng and
                  Maya B. Gokhale and
                  Eric W. Green},
  title        = {System evaluation of the Intel optane byte-addressable {NVM}},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {304--315},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357568},
  doi          = {10.1145/3357526.3357568},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/PengGG19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/PengKSYRHKSY19,
  author       = {Xiaochen Peng and
                  Minkyu Kim and
                  Xiaoyu Sun and
                  Shihui Yin and
                  Titash Rakshit and
                  Ryan M. Hatcher and
                  Jorge A. Kittl and
                  Jae{-}sun Seo and
                  Shimeng Yu},
  title        = {Inference engine benchmarking across technological platforms from
                  {CMOS} to {RRAM}},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {471--479},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357566},
  doi          = {10.1145/3357526.3357566},
  timestamp    = {Wed, 26 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/PengKSYRHKSY19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/PoseyBHM19,
  author       = {Randy Posey and
                  Randall Burnett and
                  Quentin Herr and
                  Donald Miller},
  title        = {Demonstration of superconducting memory with passive transmission
                  line-based reads},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {531--533},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357577},
  doi          = {10.1145/3357526.3357577},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/PoseyBHM19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/RafiqueZ19,
  author       = {Muhammad M. Rafique and
                  Zhichun Zhu},
  title        = {{FAPS-3D:} feedback-directed adaptive page management scheme for 3D-stacked
                  {DRAM}},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {373--382},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357540},
  doi          = {10.1145/3357526.3357540},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/RafiqueZ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/RheindtFLNWH19,
  author       = {Sven Rheindt and
                  Andreas Fried and
                  Oliver Lenke and
                  Lars Nolte and
                  Thomas Wild and
                  Andreas Herkersdorf},
  title        = {{NEMESYS:} near-memory graph copy enhanced system-software},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {3--18},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357545},
  doi          = {10.1145/3357526.3357545},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/RheindtFLNWH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/RodriguesGV19,
  author       = {Arun Rodrigues and
                  Maya B. Gokhale and
                  Gwendolyn Voskuilen},
  title        = {Towards a scatter-gather architecture: hardware and software issues},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {261--271},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357571},
  doi          = {10.1145/3357526.3357571},
  timestamp    = {Mon, 20 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/RodriguesGV19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/SarafM19,
  author       = {Puneet Saraf and
                  Madhu Mutyam},
  title        = {Endurance enhancement of write-optimized {STT-RAM} caches},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {101--113},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357538},
  doi          = {10.1145/3357526.3357538},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/SarafM19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/SarmaJPKKD19,
  author       = {Anup Sarma and
                  Huaipan Jiang and
                  Ashutosh Pattnaik and
                  Jagadish Kotra and
                  Mahmut Taylan Kandemir and
                  Chita R. Das},
  title        = {{CASH:} compiler assisted hardware design for improving {DRAM} energy
                  efficiency in {CNN} inference},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {396--407},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357536},
  doi          = {10.1145/3357526.3357536},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/SarmaJPKKD19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/SchneidenbachDM19,
  author       = {Lars Schneidenbach and
                  Bruce D'Amora and
                  Claudia Misale and
                  Carlos H. A. Costa and
                  Sara Kokkila Schumacher and
                  Thomas Ward},
  title        = {Data broker: a case for workflow enablement using a key/value approach},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {250--260},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357572},
  doi          = {10.1145/3357526.3357572},
  timestamp    = {Sun, 25 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/SchneidenbachDM19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/SenI19,
  author       = {Satyabrata Sen and
                  Neena Imam},
  title        = {Machine learning based design space exploration for hybrid main-memory
                  design},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {480--489},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357544},
  doi          = {10.1145/3357526.3357544},
  timestamp    = {Fri, 27 Dec 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/SenI19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ShangLSSY19,
  author       = {Xiaojing Shang and
                  Ming Ling and
                  Shan Shen and
                  Tianxiang Shao and
                  Jun Yang},
  title        = {{RRS} cache: a low voltage cache based on timing speculation {SRAM}
                  with a reuse-aware cacheline remapping mechanism},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {451--458},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357535},
  doi          = {10.1145/3357526.3357535},
  timestamp    = {Thu, 09 Jan 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/ShangLSSY19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/SrivastavaLBKP19,
  author       = {Ajitesh Srivastava and
                  Angelos Lazaris and
                  Benjamin Brooks and
                  Rajgopal Kannan and
                  Viktor K. Prasanna},
  title        = {Predicting memory accesses: the road to compact ML-driven prefetcher},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {461--470},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357549},
  doi          = {10.1145/3357526.3357549},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/SrivastavaLBKP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/VenkateshSMG19,
  author       = {Ranjan Sarpangala Venkatesh and
                  Till Smejkal and
                  Dejan S. Milojicic and
                  Ada Gavrilovska},
  title        = {Fast in-memory {CRIU} for docker containers},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {53--65},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357542},
  doi          = {10.1145/3357526.3357542},
  timestamp    = {Sun, 17 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/VenkateshSMG19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/WaddingtonKDRAT19,
  author       = {Daniel G. Waddington and
                  Mark Kunitomi and
                  Clem Dickey and
                  Samyukta Rao and
                  Amir Abboud and
                  Jantz Tran},
  title        = {Evaluation of intel 3D-xpoint {NVDIMM} technology for memory-intensive
                  genomic workloads},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {277--287},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357528},
  doi          = {10.1145/3357526.3357528},
  timestamp    = {Mon, 23 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/memsys/WaddingtonKDRAT19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/WernerFXFYMV19,
  author       = {Sebastian Werner and
                  Pouya Fotouhi and
                  Xian Xiao and
                  Marjan Fariborz and
                  S. J. Ben Yoo and
                  George Michelogiannakis and
                  Dilip P. Vasudevan},
  title        = {3D photonics as enabling technology for deep 3D {DRAM} stacking},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {206--221},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357559},
  doi          = {10.1145/3357526.3357559},
  timestamp    = {Thu, 15 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/WernerFXFYMV19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/YeLF19,
  author       = {Louis Ye and
                  Mieszko Lis and
                  Alexandra Fedorova},
  title        = {A unifying abstraction for data structure splicing},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {173--183},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357548},
  doi          = {10.1145/3357526.3357548},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/YeLF19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/memsys/ZivanovicEMBCRA19,
  author       = {Darko Zivanovic and
                  Pouya Esmaili{-}Dokht and
                  Sergi Mor{\'{e}} and
                  Javier Bartolome and
                  Paul M. Carpenter and
                  Petar Radojkovic and
                  Eduard Ayguad{\'{e}}},
  title        = {{DRAM} errors in the field: a statistical approach},
  booktitle    = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  pages        = {69--84},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526.3357558},
  doi          = {10.1145/3357526.3357558},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/ZivanovicEMBCRA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@proceedings{DBLP:conf/memsys/2019,
  title        = {Proceedings of the International Symposium on Memory Systems, {MEMSYS}
                  2019, Washington, DC, USA, September 30 - October 03, 2019},
  publisher    = {{ACM}},
  year         = {2019},
  url          = {https://doi.org/10.1145/3357526},
  doi          = {10.1145/3357526},
  isbn         = {978-1-4503-7206-0},
  timestamp    = {Thu, 07 Nov 2019 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/memsys/2019.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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