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@inproceedings{DBLP:conf/patmos/0001MZWW16, author = {Matthias Jung and Deepak M. Mathew and {\'{E}}der F. Zulian and Christian Weis and Norbert Wehn}, title = {A new bank sensitive DRAMPower model for efficient design space exploration}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {283--288}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833700}, doi = {10.1109/PATMOS.2016.7833700}, timestamp = {Sun, 25 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/0001MZWW16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/0001P16, author = {Teng Xu and Miodrag Potkonjak}, title = {Pipelining for dual supply voltages}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {9--16}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833419}, doi = {10.1109/PATMOS.2016.7833419}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/0001P16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/AbdulfattahTY16, author = {Ahmad N. Abdulfattah and Charalampos C. Tsimenidis and Alex Yakovlev}, title = {Subthreshold-based m-sequence code generator for ultra low-power body sensor nodes}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {189--195}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833686}, doi = {10.1109/PATMOS.2016.7833686}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/AbdulfattahTY16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/AghababaK16, author = {Hossein Aghababa and Mohammadreza Kolahdouz}, title = {A novel leakage power reduction technique for nano-scaled {CMOS} digital integrated circuits}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {268--274}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833698}, doi = {10.1109/PATMOS.2016.7833698}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/AghababaK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/AghababaKF16, author = {Hossein Aghababa and Mohammadreza Kolahdouz and Behjat Forouzandeh}, title = {Analysis of stress effects on timing of nano-scaled {CMOS} digital integrated circuits}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {120--127}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833675}, doi = {10.1109/PATMOS.2016.7833675}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/AghababaKF16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/AmesZOTM16, author = {Stephanie O. Ames and Vinicius Zanandrea and Ingrid F. V. Oliveira and Samuel P. Toledo and Cristina Meinhardt}, title = {Investigating {PVT} variability effects on full adders}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {155--161}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833681}, doi = {10.1109/PATMOS.2016.7833681}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/AmesZOTM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/AvedilloN16, author = {Maria J. Avedillo and Juan N{\'{u}}{\~{n}}ez}, title = {Impact of pipeline in the power performance of tunnel transistor circuits}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {256--261}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833696}, doi = {10.1109/PATMOS.2016.7833696}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/AvedilloN16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/BenmoussaSDTB16, author = {Yahia Benmoussa and Eric Senn and Nicolas Derouineau and Nicolas Tizon and Jalil Boukhobza}, title = {Green metadata based adaptive {DVFS} for energy efficient video decoding}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {235--242}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833693}, doi = {10.1109/PATMOS.2016.7833693}, timestamp = {Fri, 02 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/BenmoussaSDTB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/DollfusNTNBS16, author = {Philippe Dollfus and V. Hung Nguyen and V. Truong Tran and M. Chung Nguyen and Arnaud Bournel and Jerome Saint{-}Martin}, title = {Thermoelectric effects in graphene and graphene-based nanostructures using atomistic simulation}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {38--43}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833423}, doi = {10.1109/PATMOS.2016.7833423}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/DollfusNTNBS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/GolanbariKT16, author = {Mohammad Saber Golanbari and Saman Kiamehr and Mehdi Baradaran Tahoori}, title = {Hold-time violation analysis and fixing in near-threshold region}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {50--55}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833425}, doi = {10.1109/PATMOS.2016.7833425}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/GolanbariKT16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/GuoP16, author = {Jia Guo and Miodrag Potkonjak}, title = {Coarse-grained learning-based dynamic voltage frequency scaling for video decoding}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {84--91}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833430}, doi = {10.1109/PATMOS.2016.7833430}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/GuoP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/GuoXSP16, author = {Jia Guo and Teng Xu and Theano Stavrinos and Miodrag Potkonjak}, title = {Enabling environmentally-powered indoor sensor networks with dynamic routing and operation}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {213--220}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833690}, doi = {10.1109/PATMOS.2016.7833690}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/GuoXSP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/HaririanO16, author = {Parham Haririan and Alberto Garc{\'{\i}}a Ortiz}, title = {Run-time schedulability check of real-time tasks for energy efficiency}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {114--119}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833674}, doi = {10.1109/PATMOS.2016.7833674}, timestamp = {Fri, 02 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/HaririanO16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/HillebrandSHEPP16, author = {Theodor Hillebrand and Timur Schafer and Nico Hellwege and Marco Erstling and Dagmar Peters{-}Drolshagen and Steffen Paul}, title = {Design and verification of analog {CMOS} circuits using the gm/ID-method with age-dependent degradation effects}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {136--141}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833678}, doi = {10.1109/PATMOS.2016.7833678}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/HillebrandSHEPP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/HofmannD16, author = {Klaus Hofmann and Tu Darmstadt}, title = {The long way to power efficient, high performance DRAMs}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {289--290}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833701}, doi = {10.1109/PATMOS.2016.7833701}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/HofmannD16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/KaplanYMG16, author = {Roman Kaplan and Leonid Yavits and Amir Morad and Ran Ginosar}, title = {Deduplication in resistive content addressable memory based solid state drive}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {100--106}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833432}, doi = {10.1109/PATMOS.2016.7833432}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/KaplanYMG16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/LarcherPPVP16, author = {Luca Larcher and Francesco Maria Puglisi and Andrea Padovani and Luca Vandelli and Paolo Pavan}, title = {Multiscale modeling of electron-ion interactions for engineering novel electronic devices and materials}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {128--132}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833676}, doi = {10.1109/PATMOS.2016.7833676}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/LarcherPPVP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/LarcherPPVP16a, author = {Luca Larcher and Francesco Maria Puglisi and Andrea Padovani and Luca Vandelli and Paolo Pavan}, title = {Multiscale modeling of electron-ion interactions for engineering novel electronic devices and materials}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {296--300}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833703}, doi = {10.1109/PATMOS.2016.7833703}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/LarcherPPVP16a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/LeiteBJF16, author = {Thiago Ferreira de Paiva Leite and Rodrigo Possamai Bastos and Rodrigo Iga Jadue and Laurent Fesquet}, title = {Comparison of low-voltage scaling in synchronous and asynchronous {FD-SOI} circuits}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {229--234}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833692}, doi = {10.1109/PATMOS.2016.7833692}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/LeiteBJF16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/LiangZANT16, author = {Jie Liang and Liuyang Zhang and Nadine Az{\'{e}}mard{-}Crestani and Pascal Nouet and Aida Todri{-}Sanial}, title = {Physical description and analysis of doped carbon nanotube interconnects}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {250--255}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833695}, doi = {10.1109/PATMOS.2016.7833695}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/LiangZANT16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/Macko16, author = {Dominik Macko}, title = {{PMHLS} 2.0: An automated optimization of power management during high-level synthesis}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {205--212}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833689}, doi = {10.1109/PATMOS.2016.7833689}, timestamp = {Sun, 25 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/Macko16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/MichalskaABBM16, author = {Malgorzata Michalska and J. J. Ahmad and Endri Bezati and Simone Casale Brunet and Marco Mattavelli}, title = {Performance estimation of program partitions on multi-core platforms}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {1--8}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833418}, doi = {10.1109/PATMOS.2016.7833418}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/MichalskaABBM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/MrazekV16, author = {Vojtech Mrazek and Zdenek Vas{\'{\i}}cek}, title = {Automatic design of arbitrary-size approximate sorting networks with error guarantee}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {221--228}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833691}, doi = {10.1109/PATMOS.2016.7833691}, timestamp = {Mon, 16 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/MrazekV16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/MyersPSYG16, author = {James Myers and Pranay Prabhat and Anand Savanth and Sheng Yang and Rohan Gaddh}, title = {Design challenges for near and sub-threshold operation: {A} case study with an {ARM} Cortex-M0+ based {WSN} subsystem}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {56--63}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833426}, doi = {10.1109/PATMOS.2016.7833426}, timestamp = {Mon, 03 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/MyersPSYG16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/NajafiBNO16, author = {Amir Najafi and Lennart Bamberg and Ardalan Najafi and Alberto Garc{\'{\i}}a Ortiz}, title = {Energy modeling of coupled interconnects including intrinsic misalignment effects}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {262--267}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833697}, doi = {10.1109/PATMOS.2016.7833697}, timestamp = {Fri, 05 Nov 2021 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/NajafiBNO16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/NasiriCSMV16, author = {Nasibeh Nasiri and Philip Colangelo and Oren Segal and Martin Margala and Wim Vanderbauwhede}, title = {Document classification systems in heterogeneous computing environments}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {291--295}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833702}, doi = {10.1109/PATMOS.2016.7833702}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/NasiriCSMV16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/Noulis16, author = {Thomas Noulis}, title = {{CMOS} process transient noise simulation analysis and benchmarking}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {70--75}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833428}, doi = {10.1109/PATMOS.2016.7833428}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/Noulis16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/PeneauBGRBSTS16, author = {Pierre{-}Yves Peneau and Rabab Bouziane and Abdoulaye Gamati{\'{e}} and Erven Rohou and Florent Bruguier and Gilles Sassatelli and Lionel Torres and Sophiane Senni}, title = {Loop optimization in presence of {STT-MRAM} caches: {A} study of performance-energy tradeoffs}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {162--169}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833682}, doi = {10.1109/PATMOS.2016.7833682}, timestamp = {Fri, 09 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/PeneauBGRBSTS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/PouyanAHR16, author = {Peyman Pouyan and Esteve Amat and Said Hamdioui and Antonio Rubio}, title = {{RRAM} variability and its mitigation schemes}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {141--146}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833679}, doi = {10.1109/PATMOS.2016.7833679}, timestamp = {Tue, 11 Jul 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/PouyanAHR16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/PsychouGN16, author = {Georgia Psychou and Tobias Gemmeke and Tobias G. Noll}, title = {A framework for analyzing the propagation of hardware-induced errors in non-recursive {LTI} blocks with finite wordlength effects}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {147--154}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833680}, doi = {10.1109/PATMOS.2016.7833680}, timestamp = {Thu, 15 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/PsychouGN16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/RaghavBK16, author = {Himadri Singh Raghav and Vivian A. Bartlett and Izzet Kale}, title = {Energy efficiency of 2-step charging power-clock for adiabatic logic}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {176--182}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833684}, doi = {10.1109/PATMOS.2016.7833684}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/RaghavBK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/RailisTXS16, author = {Konstantinos Railis and Vasileios Tsoutsouras and Sotirios Xydis and Dimitrios Soudris}, title = {Energy profile analysis of Zynq-7000 programmable SoC for embedded medical processing: Study on {ECG} arrhythmia detection}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {275--282}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833699}, doi = {10.1109/PATMOS.2016.7833699}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/RailisTXS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/RamleeZ16, author = {Radi Husin Bin Ramlee and Mark Zwolinski}, title = {Using Iddt current degradation to monitor ageing in {CMOS} circuits}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {200--204}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833688}, doi = {10.1109/PATMOS.2016.7833688}, timestamp = {Sun, 02 Jun 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/RamleeZ16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/RohaniEK16, author = {Alireza Rohani and Hassan Ebrahimi and Hans G. Kerkhoff}, title = {A software framework to calculate local temperatures in {CMOS} processors}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {183--188}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833685}, doi = {10.1109/PATMOS.2016.7833685}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/RohaniEK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/SadiWA16, author = {Toufik Sadi and Liping Wang and Asen Asenov}, title = {Multi-scale electrothermal simulation and modelling of resistive random access memory devices}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {33--37}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833422}, doi = {10.1109/PATMOS.2016.7833422}, timestamp = {Sat, 19 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/SadiWA16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/ShiomiIO16, author = {Jun Shiomi and Tohru Ishihara and Hidetoshi Onodera}, title = {Fully digital on-chip memory using minimum height standard cells for near-threshold voltage computing}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {44--49}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833424}, doi = {10.1109/PATMOS.2016.7833424}, timestamp = {Sat, 16 Sep 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/ShiomiIO16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/StamelakosXPS16, author = {Ioannis S. Stamelakos and Sotirios Xydis and Gianluca Palermo and Cristina Silvano}, title = {Throughput balancing for energy efficient near-threshold manycores}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {64--69}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833427}, doi = {10.1109/PATMOS.2016.7833427}, timestamp = {Fri, 02 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/StamelakosXPS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/TajammulJHE16, author = {Muhammad Adeel Tajammul and Syed M. A. H. Jafri and Ahmed Hemani and Peeter Ellervee}, title = {TransMem: {A} memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {92--99}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833431}, doi = {10.1109/PATMOS.2016.7833431}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/TajammulJHE16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/Tena-SanchezAN16, author = {Erica Tena{-}S{\'{a}}nchez and Antonio J. Acosta and Juan N{\'{u}}{\~{n}}ez}, title = {Secure cryptographic hardware implementation issues for high-performance applications}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {76--83}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833429}, doi = {10.1109/PATMOS.2016.7833429}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/Tena-SanchezAN16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/Todri-Sanial16, author = {Aida Todri{-}Sanial}, title = {Investigation of electrical and thermal properties of carbon nanotube interconnects}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {25--32}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833421}, doi = {10.1109/PATMOS.2016.7833421}, timestamp = {Fri, 30 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/Todri-Sanial16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/TonfatFR16, author = {Jorge L. Tonfat and Guilherme Flach and Ricardo Reis}, title = {Leakage current analysis in static {CMOS} logic gates for a transistor network design approach}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {107--113}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833673}, doi = {10.1109/PATMOS.2016.7833673}, timestamp = {Tue, 22 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/TonfatFR16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/VeiranoNS16, author = {Francisco Veirano and Lirida A. B. Naviner and Fernando Silveira}, title = {Pushing minimum energy limits by optimal asymmetrical back plane biasing in 28 nm {UTBB} {FD-SOI}}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {243--249}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833694}, doi = {10.1109/PATMOS.2016.7833694}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/VeiranoNS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/VolzH16, author = {Sebastian Volz and Haoxue Han}, title = {Optimized few layer graphene for heat spreading}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {133--135}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833677}, doi = {10.1109/PATMOS.2016.7833677}, timestamp = {Fri, 30 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/VolzH16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/VolzH16a, author = {Sebastian Volz and Haoxue Han}, title = {Optimized few layer graphene for heat spreading}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {301--303}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833704}, doi = {10.1109/PATMOS.2016.7833704}, timestamp = {Fri, 30 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/VolzH16a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/WalkerDHBMA16, author = {Matthew J. Walker and Stephan Diestelhorst and Andreas Hansson and Domenico Balsamo and Geoff V. Merrett and Bashir M. Al{-}Hashimi}, title = {Thermally-aware composite run-time {CPU} power models}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {17--24}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833420}, doi = {10.1109/PATMOS.2016.7833420}, timestamp = {Thu, 04 Jan 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/patmos/WalkerDHBMA16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/YangABJ16, author = {Xiaohan Yang and Adedotun Adeyemo and Anu Bala and Abusaleh M. Jabir}, title = {Novel memristive logic architectures}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {196--199}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833687}, doi = {10.1109/PATMOS.2016.7833687}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/YangABJ16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/patmos/Zheng0P16, author = {Jason Xin Zheng and Teng Xu and Miodrag Potkonjak}, title = {Securing embedded systems and their IPs with digital reconfigurable PUFs}, booktitle = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, pages = {169--176}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/PATMOS.2016.7833683}, doi = {10.1109/PATMOS.2016.7833683}, timestamp = {Fri, 26 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/Zheng0P16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/patmos/2016, title = {26th International Workshop on Power and Timing Modeling, Optimization and Simulation, {PATMOS} 2016, Bremen, Germany, September 21-23, 2016}, publisher = {{IEEE}}, year = {2016}, url = {https://ieeexplore.ieee.org/xpl/conhome/7813533/proceeding}, isbn = {978-1-5090-0733-2}, timestamp = {Wed, 16 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/patmos/2016.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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