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@inproceedings{DBLP:conf/vlsi/0002K16, author = {Yuan He and Masaaki Kondo}, title = {Opportunistic circuit-switching for energy efficient on-chip networks}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753550}, doi = {10.1109/VLSI-SOC.2016.7753550}, timestamp = {Mon, 05 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/0002K16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/AbbasT16, author = {Syed Mohsin Abbas and Chi{-}Ying Tsui}, title = {Low-latency approximate matrix inversion for high-throughput linear pre-coders in massive {MIMO}}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--5}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753561}, doi = {10.1109/VLSI-SOC.2016.7753561}, timestamp = {Thu, 15 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/AbbasT16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/AdeltKMBKS16, author = {Peer Adelt and Bastian Koppelmann and Wolfgang M{\"{u}}ller and Markus Becker and Bernd Kleinjohann and Christoph Scheytt}, title = {Fast dynamic fault injection for virtual microcontroller platforms}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753545}, doi = {10.1109/VLSI-SOC.2016.7753545}, timestamp = {Mon, 26 Jun 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/AdeltKMBKS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/AgarwalK16, author = {Sukarn Agarwal and Hemangee K. Kapoor}, title = {Restricting writes for energy-efficient hybrid cache in multi-core architectures}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753551}, doi = {10.1109/VLSI-SOC.2016.7753551}, timestamp = {Mon, 15 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/AgarwalK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/AmagasakiNTIS16, author = {Motoki Amagasaki and Yuji Nakamura and Takuya Teraoka and Masahiro Iida and Toshinori Sueyoshi}, title = {A novel soft error tolerant {FPGA} architecture}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753574}, doi = {10.1109/VLSI-SOC.2016.7753574}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/AmagasakiNTIS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/AmraniDK16, author = {Elad Amrani and Avishay Drori and Shahar Kvatinsky}, title = {Logic design with unipolar memristors}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--5}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753564}, doi = {10.1109/VLSI-SOC.2016.7753564}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/AmraniDK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/BanerjeeMB16, author = {Sabyasachee Banerjee and Subhashis Majumder and Bhargab B. Bhattacharya}, title = {Power-aware test optimization for core-based 3D-SOCs under TSV-constraints}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753537}, doi = {10.1109/VLSI-SOC.2016.7753537}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/BanerjeeMB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/BernardiBNGV16, author = {Paolo Bernardi and Alberto Bosio and Giorgio Di Natale and Andrea Guerriero and Federico Venini}, title = {Faster-than-at-speed execution of functional programs: An experimental analysis}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753581}, doi = {10.1109/VLSI-SOC.2016.7753581}, timestamp = {Sun, 25 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/BernardiBNGV16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/BernardiniES16, author = {Alessandro Bernardini and Wolfgang Ecker and Ulf Schlichtmann}, title = {Efficient handling of the fault space in functional safety analysis utilizing formal methods}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--7}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753546}, doi = {10.1109/VLSI-SOC.2016.7753546}, timestamp = {Mon, 16 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/BernardiniES16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/BernasconiCFT16, author = {Anna Bernasconi and Valentina Ciriani and Luca Frontini and Gabriella Trucco}, title = {Synthesis on switching lattices of Dimension-reducible Boolean functions}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753577}, doi = {10.1109/VLSI-SOC.2016.7753577}, timestamp = {Sat, 23 Sep 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/BernasconiCFT16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/BhattacharjeeMC16, author = {Debjyoti Bhattacharjee and Farhad Merchant and Anupam Chattopadhyay}, title = {Enabling in-memory computation of binary {BLAS} using ReRAM crossbar arrays}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753568}, doi = {10.1109/VLSI-SOC.2016.7753568}, timestamp = {Thu, 15 Jun 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/BhattacharjeeMC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/ChakrabortyK16, author = {Shounak Chakraborty and Hemangee K. Kapoor}, title = {Static energy reduction by performance linked dynamic cache resizing}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753549}, doi = {10.1109/VLSI-SOC.2016.7753549}, timestamp = {Wed, 30 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/ChakrabortyK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/ChenMP16, author = {Yukai Chen and Enrico Macii and Massimo Poncino}, title = {Frequency domain characterization of batteries for the design of energy storage subsystems}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753548}, doi = {10.1109/VLSI-SOC.2016.7753548}, timestamp = {Mon, 16 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/ChenMP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/DuS16, author = {Boyang Du and Luca Sterpone}, title = {An FPGA-based testing platform for the validation of automotive powertrain {ECU}}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--7}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753553}, doi = {10.1109/VLSI-SOC.2016.7753553}, timestamp = {Wed, 25 Sep 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/DuS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/EckerS16, author = {Wolfgang Ecker and Johannes Schreiner}, title = {Introducing Model-of-Things (MoT) and Model-of-Design (MoD) for simpler and more efficient hardware generators}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753576}, doi = {10.1109/VLSI-SOC.2016.7753576}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/EckerS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/FrenkelLB16, author = {Charlotte Frenkel and Jean{-}Didier Legat and David Bol}, title = {Comparative analysis of redundancy schemes for soft-error detection in low-cost space applications}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753573}, doi = {10.1109/VLSI-SOC.2016.7753573}, timestamp = {Mon, 15 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/FrenkelLB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/GundlaC16, author = {Abhiram Reddy Gundla and Tom Chen}, title = {An efficient multi channel, 425{\(\mathrm{\mu}\)}W {QPSK} transmitter with tuning for process variation in the Medical Implantable Communications Service {(MICS)} band of 402-405MHz}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--5}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753540}, doi = {10.1109/VLSI-SOC.2016.7753540}, timestamp = {Mon, 02 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/GundlaC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/HashemiNN16, author = {Seyedeh Hanieh Hashemi and Reza Namazian and Zainalabedin Navabi}, title = {Optimistic clock adjustment for preventing Better-than-worst-case violations}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753571}, doi = {10.1109/VLSI-SOC.2016.7753571}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/HashemiNN16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/HemmatKAP16, author = {Maede Hemmat and Mehdi Kamal and Ali Afzali{-}Kusha and Massoud Pedram}, title = {Hybrid {TFET-MOSFET} circuits: An approach to design reliable ultra-low power circuits in the presence of process variation}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753578}, doi = {10.1109/VLSI-SOC.2016.7753578}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/HemmatKAP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/HoangPDP16, author = {Van{-}Phuc Hoang and Thi{-}Thanh{-}Dung Phan and Van{-}Lan Dao and Cong{-}Kha Pham}, title = {A compact, ultra-low power {AES-CCM} {IP} core for wireless body area networks}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--4}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753566}, doi = {10.1109/VLSI-SOC.2016.7753566}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/HoangPDP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/JayakrishnanCK16, author = {Mini Jayakrishnan and Alan Chang and Tae{-}Hyoung Kim}, title = {Power and area efficient clock stretching and critical path reshaping for error resilience}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753570}, doi = {10.1109/VLSI-SOC.2016.7753570}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/JayakrishnanCK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/KimCLR16, author = {Jaehyun Kim and Kiyoung Choi and Sang{-}Heon Lee and Soojung Ryu}, title = {Dynamic clock synchronization scheme between voltage domains in multi-core architecture}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753536}, doi = {10.1109/VLSI-SOC.2016.7753536}, timestamp = {Thu, 30 Mar 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/KimCLR16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/KoserKS16, author = {Erol Koser and Sebastian Krosche and Walter Stechele}, title = {Integrated Soft Error Resilience and Self-Test}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753569}, doi = {10.1109/VLSI-SOC.2016.7753569}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/KoserKS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/KrafczykRF16, author = {Niklas Krafczyk and Heinz Riener and G{\"{o}}rschwin Fey}, title = {{WCET} overapproximation for software in the context of a Cyber-Physical System}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753559}, doi = {10.1109/VLSI-SOC.2016.7753559}, timestamp = {Fri, 30 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/KrafczykRF16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/LarimiKAM16, author = {Seyed Saber Nabavi Larimi and Mehdi Kamal and Ali Afzali{-}Kusha and Hamid Mahmoodi}, title = {Power and energy reduction of racetrack-based caches by exploiting shared shift operations}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753563}, doi = {10.1109/VLSI-SOC.2016.7753563}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/LarimiKAM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/LiHC16, author = {Yanzhe Li and Kai Huang and Luc Claesen}, title = {SoC oriented real-time high-quality stereo vision system}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753558}, doi = {10.1109/VLSI-SOC.2016.7753558}, timestamp = {Wed, 01 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/LiHC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/LiMGSN16, author = {Xueqing Li and Kaisheng Ma and Sumitha George and John Sampson and Vijaykrishnan Narayanan}, title = {Enabling Internet-of-Things: Opportunities brought by emerging devices, circuits, and architectures}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753542}, doi = {10.1109/VLSI-SOC.2016.7753542}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/LiMGSN16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/LinSK16, author = {Minghao Lin and Heming Sun and Shinji Kimura}, title = {Power-efficient and slew-aware three dimensional gated clock tree synthesis}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753535}, doi = {10.1109/VLSI-SOC.2016.7753535}, timestamp = {Fri, 30 Nov 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/LinSK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/ManoranjanSGS16, author = {Jotham Vaddaboina Manoranjan and Solomon Surya Tej Mano Sajjan and Vivek B. Gujari and Kenneth S. Stevens}, title = {Design of a multi-style and multi-frequency {FPGA}}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753538}, doi = {10.1109/VLSI-SOC.2016.7753538}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/ManoranjanSGS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/MuzaffarSE16, author = {Shahzad Muzaffar and Numan Saeed and Ibrahim M. Elfadel}, title = {Automatic protocol configuration in single-channel low-power dynamic signaling for IoT devices}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753560}, doi = {10.1109/VLSI-SOC.2016.7753560}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/MuzaffarSE16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/NakadaHNUHS16, author = {Takashi Nakada and Tomoki Hatanaka and Hiroshi Nakamura and Hiroshi Ueki and Masanori Hayashikoshi and Toru Shimizu}, title = {An adaptive energy-efficient task scheduling under execution time variation based on statistical analysis}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--7}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753565}, doi = {10.1109/VLSI-SOC.2016.7753565}, timestamp = {Fri, 22 Mar 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/NakadaHNUHS16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/NasserianPM16, author = {Mahshid Nasserian and Ali Peiravi and Farshad Moradi}, title = {A 1.62 {\(\mathrm{\mu}\)}W 8-channel ultra-high input impedance {EEG} amplifier for dry and non-contact biopotential recording applications}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753539}, doi = {10.1109/VLSI-SOC.2016.7753539}, timestamp = {Sat, 05 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/NasserianPM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/NocuaVB0C16, author = {Alejandro Nocua and Arnaud Virazel and Alberto Bosio and Patrick Girard and Cyril Chevalier}, title = {A Hybrid Power Estimation Technique to improve {IP} power models quality}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753582}, doi = {10.1109/VLSI-SOC.2016.7753582}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/NocuaVB0C16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/ObrebskiKZZ16, author = {Dariusz Obrebski and Cezary Kolacinski and Michal Zbiec and Przemyslaw Zagrajek}, title = {The multi-channel small signal readout system for THz spectroscopy and imaging applications}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753562}, doi = {10.1109/VLSI-SOC.2016.7753562}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/ObrebskiKZZ16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/PelusoCMA16, author = {Valentino Peluso and Andrea Calimera and Enrico Macii and Massimo Alioto}, title = {Ultra-Fine Grain Vdd-Hopping for energy-efficient Multi-Processor SoCs}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753580}, doi = {10.1109/VLSI-SOC.2016.7753580}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/PelusoCMA16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/PiccolboniP16, author = {Luca Piccolboni and Graziano Pravadelli}, title = {Stimuli generation through invariant mining for black-box verification}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753557}, doi = {10.1109/VLSI-SOC.2016.7753557}, timestamp = {Fri, 27 Dec 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/PiccolboniP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/PlassanPMRSB16, author = {Guillaume Plassan and Hans{-}J{\"{o}}rg Peter and Katell Morin{-}Allory and Fahim Rahim and Shaker Sarwary and Dominique Borrione}, title = {Conclusively verifying clock-domain crossings in very large hardware designs}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753555}, doi = {10.1109/VLSI-SOC.2016.7753555}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/PlassanPMRSB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/RaikOHC16, author = {Jaan Raik and Ian O'Connor and Thomas Hollstein and Krishnendu Chakrabarty}, title = {Foreword}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753411}, doi = {10.1109/VLSI-SOC.2016.7753411}, timestamp = {Mon, 03 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/RaikOHC16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/RathSEE16, author = {Alexander W. Rath and Sebastian Simon and Volkan Esen and Wolfgang Ecker}, title = {Automatically comparing analog behavior using Earth Mover's Distance}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--8}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753556}, doi = {10.1109/VLSI-SOC.2016.7753556}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/RathSEE16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/SuWLCL16, author = {Fang Su and Zhibo Wang and Jinyang Li and Meng{-}Fan Chang and Yongpan Liu}, title = {Design of nonvolatile processors and applications}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753543}, doi = {10.1109/VLSI-SOC.2016.7753543}, timestamp = {Mon, 27 Mar 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/SuWLCL16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/TabacaruCEKN16, author = {Bogdan{-}Andrei Tabacaru and Moomen Chaari and Wolfgang Ecker and Thomas Kruse and Cristiano Novello}, title = {Speeding up safety verification by fault abstraction and simulation to transaction level}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753547}, doi = {10.1109/VLSI-SOC.2016.7753547}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/TabacaruCEKN16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/TenaceCMP16, author = {Valerio Tenace and Andrea Calimera and Enrico Macii and Massimo Poncino}, title = {Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753575}, doi = {10.1109/VLSI-SOC.2016.7753575}, timestamp = {Thu, 14 Oct 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/TenaceCMP16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/TohidiMHM16, author = {Mohammad Tohidi and Jens Kargaard Madsen and Martijn J. R. Heck and Farshad Moradi}, title = {A low-power analog front-end neural acquisition design for seizure detection}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753541}, doi = {10.1109/VLSI-SOC.2016.7753541}, timestamp = {Sat, 05 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/TohidiMHM16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/TraiolaBMB16, author = {Marcello Traiola and Mario Barbareschi and Antonino Mazzeo and Alberto Bosio}, title = {XbarGen: {A} memristor based boolean logic synthesis tool}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753567}, doi = {10.1109/VLSI-SOC.2016.7753567}, timestamp = {Sat, 05 Sep 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/TraiolaBMB16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/WuJ16, author = {Lei Wu and Ching{-}Chuen Jong}, title = {A {VLSI} architecture for real-time gradient guided image filtering}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753554}, doi = {10.1109/VLSI-SOC.2016.7753554}, timestamp = {Mon, 15 Jun 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/WuJ16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/YasunagaYY16, author = {Moritoshi Yasunaga and Naoki Yokoshima and Ikuo Yoshihara}, title = {A passive equalizer and its design methodology for global interconnects in VLSIs}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753552}, doi = {10.1109/VLSI-SOC.2016.7753552}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/YasunagaYY16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/ZambranoK16, author = {Andreina Zambrano and Hans G. Kerkhoff}, title = {Online digital compensation Method for {AMR} sensors}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753579}, doi = {10.1109/VLSI-SOC.2016.7753579}, timestamp = {Wed, 24 May 2017 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/ZambranoK16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/ZhaoKAZ16, author = {Yi Zhao and S. Saqib Khursheed and Bashir M. Al{-}Hashimi and Zhiwen Zhao}, title = {Co-optimization of fault tolerance, wirelength and temperature mitigation in TSV-based 3D ICs}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753572}, doi = {10.1109/VLSI-SOC.2016.7753572}, timestamp = {Fri, 02 Aug 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/ZhaoKAZ16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/vlsi/ZhaoQXHX16, author = {Mengying Zhao and Keni Qiu and Yuan Xie and Jingtong Hu and Chun Jason Xue}, title = {Redesigning software and systems for non-volatile processors on self-powered devices}, booktitle = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, pages = {1--6}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/VLSI-SoC.2016.7753544}, doi = {10.1109/VLSI-SOC.2016.7753544}, timestamp = {Sat, 20 Jan 2018 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/vlsi/ZhaoQXHX16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/vlsi/2016soc, title = {2016 {IFIP/IEEE} International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016}, publisher = {{IEEE}}, year = {2016}, url = {https://ieeexplore.ieee.org/xpl/conhome/7744451/proceeding}, isbn = {978-1-5090-3561-8}, timestamp = {Wed, 16 Oct 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/vlsi/2016soc.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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