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@inproceedings{DBLP:conf/vts/AlampallyVSPA11,
author = {Srinivasulu Alampally and
R. T. Venkatesh and
Priyadharshini Shanmugasundaram and
Rubin A. Parekhji and
Vishwani D. Agrawal},
title = {An efficient test data reduction technique through dynamic pattern
mixing across multiple fault models},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {285--290},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783735},
doi = {10.1109/VTS.2011.5783735},
timestamp = {Wed, 16 Oct 2019 14:14:54 +0200},
biburl = {https://dblp.org/rec/conf/vts/AlampallyVSPA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AlawadhiS11,
author = {Nader Alawadhi and
Ozgur Sinanoglu},
title = {Revival of partial scan: Test cube analysis driven conversion of flip-flops},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {260--265},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783731},
doi = {10.1109/VTS.2011.5783731},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AlawadhiS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/AlvesSDBN11,
author = {Nuno Alves and
Yiwen Shi and
Jennifer Dworak and
R. Iris Bahar and
Kundan Nepal},
title = {Enhancing online error detection through area-efficient multi-site
implications},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {241--246},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783728},
doi = {10.1109/VTS.2011.5783728},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/AlvesSDBN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BanerjeeSDC11,
author = {Aritra Banerjee and
Shreyas Sen and
Shyam Kumar Devarakond and
Abhijit Chatterjee},
title = {Automatic test stimulus generation for accurate diagnosis of {RF}
systems using transient response signatures},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {58--63},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783755},
doi = {10.1109/VTS.2011.5783755},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/BanerjeeSDC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BasuM11,
author = {Kanad Basu and
Prabhat Mishra},
title = {Efficient trace data compression using statically selected dictionary},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {14--19},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783748},
doi = {10.1109/VTS.2011.5783748},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/BasuM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Bhavsar11,
author = {Dilip K. Bhavsar},
title = {Harmony Widget for X-free scan testing},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {225--228},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783725},
doi = {10.1109/VTS.2011.5783725},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Bhavsar11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChandrasekarBS11,
author = {Kameshwar Chandrasekar and
Surendra Bommu and
Sanjay Sengupta},
title = {Low Coverage Analysis using dynamic un-testability debug in {ATPG}},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {291--296},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783736},
doi = {10.1109/VTS.2011.5783736},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChandrasekarBS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ChoS11,
author = {Kyoung Youn Cho and
Rajagopalan Srinivasan},
title = {A scan cell architecture for inter-clock at-speed delay testing},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {213--218},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783723},
doi = {10.1109/VTS.2011.5783723},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ChoS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/DattaT11,
author = {Rudrajit Datta and
Nur A. Touba},
title = {Designing a fast and adaptive error correction scheme for increasing
the lifetime of phase change memories},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {134--139},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783773},
doi = {10.1109/VTS.2011.5783773},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/DattaT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GangadharT11,
author = {Sreenivas Gangadhar and
Spyros Tragoudas},
title = {An analytical method for estimating {SET} propagation},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {197--202},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783783},
doi = {10.1109/VTS.2011.5783783},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/GangadharT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GargM11,
author = {Siddharth Garg and
Diana Marculescu},
title = {Special session 4A: New topics parametric yield and reliability of
3D integrated circuits: New challenges and solutions},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {99},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783764},
doi = {10.1109/VTS.2011.5783764},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GargM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Gattiker11,
author = {Anne Gattiker},
title = {Invited paper: Yin and Yang of embedded sensors for post-scaling-era},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {324--327},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783743},
doi = {10.1109/VTS.2011.5783743},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Gattiker11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GhermanEAB11,
author = {Valentin Gherman and
Samuel Evain and
Fabrice Auzanneau and
Yannick Bonhomme},
title = {Programmable extended {SEC-DED} codes for memory errors},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {140--145},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783774},
doi = {10.1109/VTS.2011.5783774},
timestamp = {Fri, 02 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/GhermanEAB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GuilhemsangHVGG11,
author = {Julien Guilhemsang and
Olivier H{\'{e}}ron and
Nicolas Ventroux and
Olivier Goncalves and
Alain Giulieri},
title = {Impact of the application activity on intermittent faults in embedded
systems},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {191--196},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783782},
doi = {10.1109/VTS.2011.5783782},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/GuilhemsangHVGG11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/GuinC11,
author = {Ujjwal Guin and
Chen{-}Huan Chiang},
title = {Design for Bit Error Rate estimation of high speed serial links},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {278--283},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783734},
doi = {10.1109/VTS.2011.5783734},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/GuinC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HashidaAN11,
author = {Takushi Hashida and
Yuuki Araga and
Makoto Nagata},
title = {A diagnosis testbench of analog {IP} cores against on-chip environmental
disturbances},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {70--75},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783757},
doi = {10.1109/VTS.2011.5783757},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/HashidaAN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/HuangLCKCW11,
author = {Yu{-}Jen Huang and
Jin{-}Fu Li and
Ji{-}Jan Chen and
Ding{-}Ming Kwai and
Yung{-}Fa Chou and
Cheng{-}Wen Wu},
title = {A built-in self-test scheme for the post-bond test of TSVs in 3D ICs},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {20--25},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783749},
doi = {10.1109/VTS.2011.5783749},
timestamp = {Tue, 17 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/HuangLCKCW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JangGNA11,
author = {Eun Jung Jang and
Anne E. Gattiker and
Sani R. Nassif and
Jacob A. Abraham},
title = {Efficient and product-representative timing model validation},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {90--95},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783761},
doi = {10.1109/VTS.2011.5783761},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/JangGNA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/JiangWWW11,
author = {Zhongwei Jiang and
Zheng Wang and
Jing Wang and
D. M. H. Walker},
title = {Levelized low cost delay test compaction considering IR-drop induced
power supply noise},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {52--57},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783754},
doi = {10.1109/VTS.2011.5783754},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/JiangWWW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/KimR11,
author = {Kee Sup Kim and
Rob Roy},
title = {Apprentice - {VTS} edition: Season 4},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {113},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783767},
doi = {10.1109/VTS.2011.5783767},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/KimR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Laisne11,
author = {Mike Laisne},
title = {Advanced methods for leveraging new test standards},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {97},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783758},
doi = {10.1109/VTS.2011.5783758},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Laisne11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LeePGR11,
author = {Dongsoo Lee and
Sang Phill Park and
Ashish Goel and
Kaushik Roy},
title = {Memory-based embedded digital {ATE}},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {266--271},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783732},
doi = {10.1109/VTS.2011.5783732},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/LeePGR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LiHX11,
author = {Jia Li and
Yu Huang and
Dong Xiang},
title = {Prediction of compression bound and optimization of compression architecture
for linear decompression-based schemes},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {297--302},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783737},
doi = {10.1109/VTS.2011.5783737},
timestamp = {Mon, 15 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/LiHX11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/LinLH11,
author = {W.{-}A. Lin and
C.{-}C. Lee and
J.{-}L. Huang},
title = {Sigma-delta modulation based wafer-level testing for {TFT-LCD} source
driver ICs},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {315--320},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783740},
doi = {10.1109/VTS.2011.5783740},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/LinLH11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MaAT11,
author = {Junxia Ma and
Nisar Ahmed and
Mohammad Tehranipoor},
title = {Low-cost diagnostic pattern generation and evaluation procedures for
noise-related failures},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {309--314},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783739},
doi = {10.1109/VTS.2011.5783739},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/MaAT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MajumdarSPSDC11,
author = {Amitava Majumdar and
Arani Sinha and
Nehal Patel and
Ramamurthy Setty and
Yan Dong and
Shu{-}Hsuan Chou},
title = {A Novel mechanism for speed characterization during delay test},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {116--121},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783770},
doi = {10.1109/VTS.2011.5783770},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/MajumdarSPSDC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ManiatakosMKF11,
author = {Michail Maniatakos and
Yiorgos Makris and
Prabhakar Kudva and
Bruce M. Fleischer},
title = {Exponent monitoring for low-cost concurrent error detection in {FPU}
control logic},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {235--240},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783727},
doi = {10.1109/VTS.2011.5783727},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ManiatakosMKF11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MartinsSVCSTT11,
author = {Celestino V. Martins and
Jorge Semi{\~{a}}o and
Julio C{\'{e}}sar V{\'{a}}zquez and
V{\'{\i}}ctor H. Champac and
Marcelino B. Santos and
Isabel C. Teixeira and
Jo{\~{a}}o Paulo Teixeira},
title = {Adaptive Error-Prediction Flip-flop for performance failure prediction
with aging sensors},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {203--208},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783784},
doi = {10.1109/VTS.2011.5783784},
timestamp = {Fri, 30 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/MartinsSVCSTT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/MorenoCR11,
author = {Jes{\'{u}}s Moreno and
V{\'{\i}}ctor H. Champac and
Michel Renovell},
title = {A new methodology for realistic open defect detection probability
evaluation under process variations},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {184--189},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783781},
doi = {10.1109/VTS.2011.5783781},
timestamp = {Thu, 10 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/MorenoCR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/NarayananMPSS11,
author = {Prakash Narayanan and
Rajesh Mittal and
Sumanth Poddutur and
Vivek Singhal and
Puneet Sabbarwal},
title = {Modified flip-flop architecture to reduce hold buffers and peak power
during scan shift operation},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {154--159},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783776},
doi = {10.1109/VTS.2011.5783776},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/NarayananMPSS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/NatarajanS11,
author = {Suriyaprakash Natarajan and
Arani Sinha},
title = {The buck stops with wafer test: Dream or reality?},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {111},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783763},
doi = {10.1109/VTS.2011.5783763},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/NatarajanS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/NeishaburiZ11,
author = {Mohammad Hossein Neishaburi and
Zeljko Zilic},
title = {A distributed AXI-based platform for post-silicon validation},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {8--13},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783747},
doi = {10.1109/VTS.2011.5783747},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/NeishaburiZ11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Okawara11,
author = {Hideo Okawara},
title = {Practical signal processing at mixed signal test venues - Trend removal,
noise reduction, wideband signal capturing -},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {322},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783741},
doi = {10.1109/VTS.2011.5783741},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Okawara11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PanthL11,
author = {Shreepad Panth and
Sung Kyu Lim},
title = {Scan chain and power delivery network synthesis for pre-bond test
of 3D ICs},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {26--31},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783750},
doi = {10.1109/VTS.2011.5783750},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/PanthL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PeiLL11,
author = {Songwei Pei and
Huawei Li and
Xiaowei Li},
title = {A unified test architecture for on-line and off-line delay fault detections},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {272--277},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783733},
doi = {10.1109/VTS.2011.5783733},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/PeiLL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/PengBSWT11,
author = {Ke Peng and
Fang Bao and
Geoff Shofner and
LeRoy Winemberg and
Mohammad Tehranipoor},
title = {Case Study: Efficient {SDD} test generation for very large integrated
circuits},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {78--83},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783759},
doi = {10.1109/VTS.2011.5783759},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/PengBSWT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Pomeranz11,
author = {Irith Pomeranz},
title = {Static test compaction for delay fault test sets consisting of broadside
and skewed-load tests},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {84--89},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783760},
doi = {10.1109/VTS.2011.5783760},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Pomeranz11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Pomeranz11a,
author = {Irith Pomeranz},
title = {On clustering of undetectable transition faults in standard-scan circuits},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {128--133},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783772},
doi = {10.1109/VTS.2011.5783772},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Pomeranz11a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/RajendranJSK11,
author = {Jeyavijayan Rajendran and
Vinayaka Jyothi and
Ozgur Sinanoglu and
Ramesh Karri},
title = {Design and analysis of ring oscillator based Design-for-Trust technique},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {105--110},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783766},
doi = {10.1109/VTS.2011.5783766},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/RajendranJSK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/RosenfeldK11,
author = {Kurt Rosenfeld and
Ramesh Karri},
title = {Security-aware SoC test access mechanisms},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {100--104},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783765},
doi = {10.1109/VTS.2011.5783765},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/RosenfeldK11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SaeedS11,
author = {Samah Mohamed Saeed and
Ozgur Sinanoglu},
title = {Expedited response compaction for scan power reduction},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {40--45},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783752},
doi = {10.1109/VTS.2011.5783752},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SaeedS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SanghaniYNL11,
author = {Amit Sanghani and
Bo Yang and
Karthikeyan Natarajan and
Chunsheng Liu},
title = {Design and implementation of a time-division multiplexing scan architecture
using serializer and deserializer in {GPU} chips},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {219--224},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783724},
doi = {10.1109/VTS.2011.5783724},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/SanghaniYNL11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Sato11,
author = {Yasuo Sato},
title = {Special session: Multifaceted approaches for field reliability},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {96},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783762},
doi = {10.1109/VTS.2011.5783762},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Sato11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SethuramAA11,
author = {Rajamani Sethuram and
Karim Arabi and
Mohamed H. Abu{-}Rahma},
title = {Leakage power profiling and leakage power reduction using {DFT} hardware},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {46--51},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783753},
doi = {10.1109/VTS.2011.5783753},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/SethuramAA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Shaikh11,
author = {Saghir Shaikh},
title = {Test and characterization of high-speed circuits},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {38},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783745},
doi = {10.1109/VTS.2011.5783745},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Shaikh11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ShanmugasundaramA11,
author = {Priyadharshini Shanmugasundaram and
Vishwani D. Agrawal},
title = {Dynamic scan clock control for test time reduction maintaining peak
power limit},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {248--253},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783729},
doi = {10.1109/VTS.2011.5783729},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ShanmugasundaramA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ShihCWLS11,
author = {Hsiu{-}Chuan Shih and
Ching{-}Yi Chen and
Cheng{-}Wen Wu and
Chih{-}He Lin and
Shyh{-}Shyuan Sheu},
title = {Training-based forming process for {RRAM} yield improvement},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {146--151},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783775},
doi = {10.1109/VTS.2011.5783775},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ShihCWLS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SindiaAS11,
author = {Suraj Sindia and
Vishwani D. Agrawal and
Virendra Singh},
title = {Non-linear analog circuit test and diagnosis under process variation
using V-Transform coefficients},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {64--69},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783756},
doi = {10.1109/VTS.2011.5783756},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/SindiaAS11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Singh11,
author = {Eshan Singh},
title = {Exploiting rotational symmetries for improved stacked yields in {W2W}
3D-SICs},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {32--37},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783751},
doi = {10.1109/VTS.2011.5783751},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Singh11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SinhaN11,
author = {Arani Sinha and
Suriyaprakash Natarajan},
title = {The bang for the buck with resiliency: Yield or field?},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {152},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783769},
doi = {10.1109/VTS.2011.5783769},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/SinhaN11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SumikawaDWWA11,
author = {Nik Sumikawa and
Dragoljub Gagi Drmanac and
Li{-}C. Wang and
LeRoy Winemberg and
Magdy S. Abadir},
title = {Understanding customer returns from a test perspective},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {2--7},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783746},
doi = {10.1109/VTS.2011.5783746},
timestamp = {Thu, 15 Jun 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/SumikawaDWWA11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TakahashiM11,
author = {Yasuhiro Takahashi and
Akinori Maeda},
title = {Multi Domain Test: Novel test strategy to reduce the Cost of Test},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {303--308},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783738},
doi = {10.1109/VTS.2011.5783738},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/TakahashiM11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/TamB11,
author = {Wing Chiu Tam and
Ronald D. Blanton},
title = {{SLIDER:} {A} fast and accurate defect simulation framework},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {172--177},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783779},
doi = {10.1109/VTS.2011.5783779},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/TamB11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Vasudevan11,
author = {Shobha Vasudevan},
title = {Coverage closure in SoC verification: Are we chasing a mirage?},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {211},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783786},
doi = {10.1109/VTS.2011.5783786},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Vasudevan11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Wang11,
author = {Seongmoon Wang},
title = {An efficient method to screen resistive opens under presence of process
variation},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {122--127},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783771},
doi = {10.1109/VTS.2011.5783771},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Wang11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WangRSLR11,
author = {Baosheng Wang and
Jayalakshmi Rajaraman and
Kanwaldeep Sobti and
Derrick Losli and
Jeff Rearick},
title = {Structural tests of slave clock gating in low-power flip-flop},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {254--259},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783730},
doi = {10.1109/VTS.2011.5783730},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/WangRSLR11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WenEMYKKGT11,
author = {Xiaoqing Wen and
Kazunari Enokimoto and
Kohei Miyase and
Yuta Yamato and
Michael A. Kochte and
Seiji Kajihara and
Patrick Girard and
Mohammad Tehranipoor},
title = {Power-aware test generation with guaranteed launch safety for at-speed
scan testing},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {166--171},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783778},
doi = {10.1109/VTS.2011.5783778},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/WenEMYKKGT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WenTKBMW11,
author = {Xiaoqing Wen and
Mohammad Tehranipoor and
Rohit Kapur and
Anand Bhat and
Amitava Majumdar and
LeRoy Winemberg},
title = {Special session 5B: Panel How much toggle activity should we be testing
with?},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {114},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783768},
doi = {10.1109/VTS.2011.5783768},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/WenTKBMW11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Wheeldon11,
author = {Jeffrey F. Wheeldon},
title = {Calibrated high-efficiency testing and modelling methodologies for
concentrated multi-junction solar cells},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {209},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783785},
doi = {10.1109/VTS.2011.5783785},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Wheeldon11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/WinembergT11,
author = {LeRoy Winemberg and
Mohammad Tehranipoor},
title = {Special session: Hot topic: Smart silicon},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {323},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783742},
doi = {10.1109/VTS.2011.5783742},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/WinembergT11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/Wu11,
author = {Cheng{-}Wen Wu},
title = {Special session: Hot topic design and test of 3D and emerging memories},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {328},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783744},
doi = {10.1109/VTS.2011.5783744},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/Wu11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/YilmazMO11,
author = {Ender Yilmaz and
Anne Meixner and
Sule Ozev},
title = {An industrial case study of analog fault modeling},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {178--183},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783780},
doi = {10.1109/VTS.2011.5783780},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/YilmazMO11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZhangRGBP11,
author = {Zhen Zhang and
Dimitri Refauvelet and
Alain Greiner and
Mounir Benabdenbi and
Fran{\c{c}}ois P{\^{e}}cheux},
title = {Localization of damaged resources in NoC based shared-memory MP2SOC,
using a Distributed Cooperative Configuration Infrastructure},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {229--234},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783726},
doi = {10.1109/VTS.2011.5783726},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ZhangRGBP11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/ZhaoTC11,
author = {Wei Zhao and
Mohammad Tehranipoor and
Sreejit Chakravarty},
title = {Power-safe test application using an effective gating approach considering
current limits},
booktitle = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
pages = {160--165},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://doi.org/10.1109/VTS.2011.5783777},
doi = {10.1109/VTS.2011.5783777},
timestamp = {Thu, 25 May 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/ZhaoTC11.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vts/2011,
title = {29th {IEEE} {VLSI} Test Symposium, {VTS} 2011, May 1-5, 2011, Dana
Point, California, {USA}},
publisher = {{IEEE} Computer Society},
year = {2011},
url = {https://ieeexplore.ieee.org/xpl/conhome/5772241/proceeding},
isbn = {978-1-61284-657-6},
timestamp = {Wed, 16 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/2011.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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