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@article{DBLP:journals/tcad/Abdel-MalekH91,
author = {Hany L. Abdel{-}Malek and
Abdel{-}Karim S. O. Hassan},
title = {The ellipsoidal technique for design centering and region approximation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {1006--1014},
year = {1991},
url = {https://doi.org/10.1109/43.85738},
doi = {10.1109/43.85738},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Abdel-MalekH91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AccianiCD91,
author = {Giuseppe Acciani and
D. Congedo and
Bruno Dilecce},
title = {Improving the computational efficiency of the tree relaxation method
for an iterative solution of linear circuit equations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {668--670},
year = {1991},
url = {https://doi.org/10.1109/43.79503},
doi = {10.1109/43.79503},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AccianiCD91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Adler91,
author = {Dan Adler},
title = {Switch-level simulation using dynamic graph algorithms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {346--355},
year = {1991},
url = {https://doi.org/10.1109/43.67788},
doi = {10.1109/43.67788},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Adler91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AkiyamaS91,
author = {Keiho Akiyama and
Kewal K. Saluja},
title = {A method of reducing aliasing in a built-in self-test environment},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {548--553},
year = {1991},
url = {https://doi.org/10.1109/43.75640},
doi = {10.1109/43.75640},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AkiyamaS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AllegrettoNB91,
author = {Walter Allegretto and
Arokia Nathan and
Henry Baltes},
title = {Numerical analysis of magnetic-field-sensitive bipolar devices},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {501--511},
year = {1991},
url = {https://doi.org/10.1109/43.75633},
doi = {10.1109/43.75633},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AllegrettoNB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Andersson91,
author = {Per Andersson},
title = {Design representation in Movie},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {335--345},
year = {1991},
url = {https://doi.org/10.1109/43.67787},
doi = {10.1109/43.67787},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Andersson91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AsharDN91,
author = {Pranav Ashar and
Srinivas Devadas and
A. Richard Newton},
title = {Optimum and heuristic algorithms for an approach to finite state machine
decomposition},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {296--310},
year = {1991},
url = {https://doi.org/10.1109/43.67784},
doi = {10.1109/43.67784},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AsharDN91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/AsharDN91a,
author = {Pranav Ashar and
Srinivas Devadas and
A. Richard Newton},
title = {Irredundant interacting sequential machines via optimal logic synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {311--325},
year = {1991},
url = {https://doi.org/10.1109/43.67785},
doi = {10.1109/43.67785},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/AsharDN91a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BachDME91,
author = {Karl H. Bach and
Heinz K. Dirks and
Bernd Meinerzhagen and
Walter L. Engl},
title = {A new nonlinear relaxation scheme for solving semiconductor device
equations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1175--1186},
year = {1991},
url = {https://doi.org/10.1109/43.85764},
doi = {10.1109/43.85764},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BachDME91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BartlettBR91,
author = {Karen A. Bartlett and
Gaetano Borriello and
Sitaram Raju},
title = {Timing optimization of multiphase sequential logic},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {51--62},
year = {1991},
url = {https://doi.org/10.1109/43.62791},
doi = {10.1109/43.62791},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BartlettBR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BelkhaleB91,
author = {Krishna P. Belkhale and
Prithviraj Banerjee},
title = {Parallel algorithms for {VLSI} circuit extraction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {604--618},
year = {1991},
url = {https://doi.org/10.1109/43.79498},
doi = {10.1109/43.79498},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BelkhaleB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Bergamaschi91,
author = {Reinaldo A. Bergamaschi},
title = {{SKOL:} a system for logic synthesis and technology mapping},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1342--1355},
year = {1991},
url = {https://doi.org/10.1109/43.97614},
doi = {10.1109/43.97614},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Bergamaschi91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Berman91,
author = {C. Leonard Berman},
title = {Circuit width, register allocation, and ordered binary decision diagrams},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {1059--1066},
year = {1991},
url = {https://doi.org/10.1109/43.85742},
doi = {10.1109/43.85742},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Berman91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BermanT91,
author = {C. Leonard Berman and
Louise Trevillyan},
title = {Global flow optimization in automatic logic design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {557--564},
year = {1991},
url = {https://doi.org/10.1109/43.79493},
doi = {10.1109/43.79493},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BermanT91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BoningHW91,
author = {Duane S. Boning and
Michael L. Heytens and
Alexander S. Wong},
title = {The intertool profile interchange format: an object-oriented approach
[semiconductor technology {CAD/CAM]}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1150--1156},
year = {1991},
url = {https://doi.org/10.1109/43.85761},
doi = {10.1109/43.85761},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BoningHW91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BoothroydTS91,
author = {A. R. Boothroyd and
Stan W. Tarasewicz and
Cezary Slaby},
title = {MISNAN-a physically based continuous {MOSFET} model for {CAD} applications},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1512--1529},
year = {1991},
url = {https://doi.org/10.1109/43.103501},
doi = {10.1109/43.103501},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BoothroydTS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BowerSW91,
author = {Wayne Bower and
Carl Seaquist and
Wayne H. Wolf},
title = {A framework for industrial layout generators},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {596--603},
year = {1991},
url = {https://doi.org/10.1109/43.79497},
doi = {10.1109/43.79497},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BowerSW91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Bryant91,
author = {Randal E. Bryant},
title = {Formal verification of memory circuits by switch-level simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {94--102},
year = {1991},
url = {https://doi.org/10.1109/43.62795},
doi = {10.1109/43.62795},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Bryant91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/BurglerCF91,
author = {Josef F. Burgler and
William M. Coughran Jr. and
Wolfgang Fichtner},
title = {An adaptive grid refinement strategy for the drift-diffusion equations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1251--1258},
year = {1991},
url = {https://doi.org/10.1109/43.88921},
doi = {10.1109/43.88921},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/BurglerCF91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CaiW91,
author = {Yang Cai and
Martin D. F. Wong},
title = {Optimal channel pin assignment},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1413--1424},
year = {1991},
url = {https://doi.org/10.1109/43.97620},
doi = {10.1109/43.97620},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CaiW91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CaiW91a,
author = {Yang Cai and
Martin D. F. Wong},
title = {Channel/switchbox definition for {VLSI} building-block layout},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1485--1493},
year = {1991},
url = {https://doi.org/10.1109/43.103498},
doi = {10.1109/43.103498},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CaiW91a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CaissoCR91,
author = {Jean Paul Caisso and
Eduard Cerny and
Nicholas C. Rumin},
title = {A recursive technique for computing delays in series-parallel {MOS}
transistor circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {589--595},
year = {1991},
url = {https://doi.org/10.1109/43.79496},
doi = {10.1109/43.79496},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CaissoCR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Camposano91,
author = {Raul Camposano},
title = {Path-based scheduling for synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {85--93},
year = {1991},
url = {https://doi.org/10.1109/43.62794},
doi = {10.1109/43.62794},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Camposano91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CarlsonCS91,
author = {Bradley S. Carlson and
C. Y. Roger Chen and
Uminder Singh},
title = {Optimal cell generation for dual independent layout styles},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {770--782},
year = {1991},
url = {https://doi.org/10.1109/43.137506},
doi = {10.1109/43.137506},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CarlsonCS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Caruso91,
author = {Giuseppe Caruso},
title = {Near optimal factorization of Boolean functions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {1072--1078},
year = {1991},
url = {https://doi.org/10.1109/43.85744},
doi = {10.1109/43.85744},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Caruso91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CasinoviS91,
author = {Giorgio Casinovi and
Alberto L. Sangiovanni{-}Vincentelli},
title = {A macromodeling algorithm for analog circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {150--160},
year = {1991},
url = {https://doi.org/10.1109/43.68402},
doi = {10.1109/43.68402},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CasinoviS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChakravartyHR91,
author = {Sreejit Chakravarty and
Xin He and
S. S. Ravi},
title = {Minimum area layout of series-parallel transistor networks is NP-hard},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {943--949},
year = {1991},
url = {https://doi.org/10.1109/43.87604},
doi = {10.1109/43.87604},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChakravartyHR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Chan91,
author = {Pak K. Chan},
title = {Comments on 'Asymptotic waveform evaluation for timing analysis'},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {1078--1079},
year = {1991},
url = {https://doi.org/10.1109/43.85745},
doi = {10.1109/43.85745},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Chan91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChanVGLV91,
author = {John H. Chan and
Andrei Vladimirescu and
Xiao{-}Chun Gao and
Peter Liebmann and
John Valainis},
title = {Nonlinear transformer model for circuit simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {476--482},
year = {1991},
url = {https://doi.org/10.1109/43.75630},
doi = {10.1109/43.75630},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChanVGLV91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChaudharyR91,
author = {Kamal Chaudhary and
Peter Robinson},
title = {Channel routing by sorting},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {754--760},
year = {1991},
url = {https://doi.org/10.1109/43.137504},
doi = {10.1109/43.137504},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChaudharyR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenK91,
author = {H. Y. Chen and
Sung{-}Mo Kang},
title = {A new circuit optimization technique for high performance {CMOS} circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {670--677},
year = {1991},
url = {https://doi.org/10.1109/43.79504},
doi = {10.1109/43.79504},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChenK91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenLS91,
author = {Jwu E. Chen and
Chung{-}Len Lee and
Wen{-}Zen Shen},
title = {Single-fault fault-collapsing analysis in sequential logic circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1559--1568},
year = {1991},
url = {https://doi.org/10.1109/43.103505},
doi = {10.1109/43.103505},
timestamp = {Tue, 07 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/ChenLS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChenM91,
author = {C. Y. Roger Chen and
Michael Z. Moricz},
title = {A delay distribution methodology for the optimal systolic synthesis
of linear recurrence algorithms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {685--697},
year = {1991},
url = {https://doi.org/10.1109/43.137498},
doi = {10.1109/43.137498},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChenM91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChengW91,
author = {Chung{-}Kuan Cheng and
Yen{-}Chuen A. Wei},
title = {An improved two-way partitioning algorithm with stable performance
{[VLSI]}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1502--1511},
year = {1991},
url = {https://doi.org/10.1109/43.103500},
doi = {10.1109/43.103500},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChengW91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ChouC91,
author = {Tai{-}Yu Chou and
Zoltan J. Cendes},
title = {Tangential vector finite elements for semiconductor device simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1193--1200},
year = {1991},
url = {https://doi.org/10.1109/43.85766},
doi = {10.1109/43.85766},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ChouC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CiampoliniPB91,
author = {Paolo Ciampolini and
Anna Pierantoni and
Giorgio Baccarani},
title = {Efficient 3-D simulation of complex structures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1141--1149},
year = {1991},
url = {https://doi.org/10.1109/43.85760},
doi = {10.1109/43.85760},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CiampoliniPB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CicianiI91,
author = {Bruno Ciciani and
Giuseppe Iazeolla},
title = {A Markov chain-based yield formula for {VLSI} fault-tolerant chips},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {252--259},
year = {1991},
url = {https://doi.org/10.1109/43.68412},
doi = {10.1109/43.68412},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CicianiI91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CohoonHMR91,
author = {James P. Cohoon and
Shailesh U. Hegde and
Worthy N. Martin and
Dana S. Richards},
title = {Distributed genetic algorithms for the floorplan design problem},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {483--492},
year = {1991},
url = {https://doi.org/10.1109/43.75631},
doi = {10.1109/43.75631},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CohoonHMR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Cong91,
author = {Jason Cong},
title = {Pin assignment with global routing for general cell designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1401--1412},
year = {1991},
url = {https://doi.org/10.1109/43.97619},
doi = {10.1109/43.97619},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Cong91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CongL91,
author = {Jason Cong and
C. L. Liu},
title = {On the k-layer planar subset and topological via minimization problems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {972--981},
year = {1991},
url = {https://doi.org/10.1109/43.85735},
doi = {10.1109/43.85735},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CongL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ContiHF91,
author = {Paolo Conti and
Nancy Hitschfeld{-}Kahler and
Wolfgang Fichtner},
title = {Omega-an octree-based mixed element grid allocator for the simulation
of complex 3-D device structures},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1231--1241},
year = {1991},
url = {https://doi.org/10.1109/43.88919},
doi = {10.1109/43.88919},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ContiHF91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CostaCCB91,
author = {Raffaele Costa and
Francesco Curatelli and
Daniele D. Caviglia and
Giacomo M. Bisio},
title = {Symbolic generation of constrained random logic cells},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {220--231},
year = {1991},
url = {https://doi.org/10.1109/43.68408},
doi = {10.1109/43.68408},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CostaCCB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CoughranPS91,
author = {William M. Coughran Jr. and
Mark R. Pinto and
R. Kent Smith},
title = {Adaptive grid generation for {VSLI} device simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1259--1275},
year = {1991},
url = {https://doi.org/10.1109/43.88922},
doi = {10.1109/43.88922},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CoughranPS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/CoxBHYE91,
author = {Paul F. Cox and
Richard Burch and
Dale E. Hocevar and
Ping Yang and
Berton D. Epler},
title = {Direct circuit simulation algorithms for parallel processing {[VLSI]}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {714--725},
year = {1991},
url = {https://doi.org/10.1109/43.137500},
doi = {10.1109/43.137500},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/CoxBHYE91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DaniellD91,
author = {James Daniell and
Stephen W. Director},
title = {An object oriented approach to {CAD} tool control {[VLSI]}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {698--713},
year = {1991},
url = {https://doi.org/10.1109/43.137499},
doi = {10.1109/43.137499},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DaniellD91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Devadas91,
author = {Srinivas Devadas},
title = {Optimizing interacting finite state machines using sequential don't
cares},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1473--1484},
year = {1991},
url = {https://doi.org/10.1109/43.103497},
doi = {10.1109/43.103497},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Devadas91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DevadasK91,
author = {Srinivas Devadas and
Kurt Keutzer},
title = {A unified approach to the synthesis of fully testable sequential machines},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {39--50},
year = {1991},
url = {https://doi.org/10.1109/43.62790},
doi = {10.1109/43.62790},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DevadasK91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DevadasN91,
author = {Srinivas Devadas and
A. Richard Newton},
title = {Exact algorithms for output encoding, state assignment, and four-level
Boolean minimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {13--27},
year = {1991},
url = {https://doi.org/10.1109/43.62788},
doi = {10.1109/43.62788},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DevadasN91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DiamantarasJ91,
author = {Konstantinos I. Diamantaras and
Niraj K. Jha},
title = {A new transition count method for testing of logic circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {407--410},
year = {1991},
url = {https://doi.org/10.1109/43.67794},
doi = {10.1109/43.67794},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DiamantarasJ91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DiazKL91,
author = {Carlos H. D{\'{\i}}az and
Sung{-}Mo Kang and
Yusuf Leblebici},
title = {An accurate analytical delay model for BiCMOS driver circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {577--588},
year = {1991},
url = {https://doi.org/10.1109/43.79495},
doi = {10.1109/43.79495},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DiazKL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Drusinsky-Yoresh91,
author = {Doron Drusinsky{-}Yoresh},
title = {A state assignment procedure for single-block implementation of state
charts},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1569--1576},
year = {1991},
url = {https://doi.org/10.1109/43.103506},
doi = {10.1109/43.103506},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Drusinsky-Yoresh91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Drusinsky-Yoresh91a,
author = {Doron Drusinsky{-}Yoresh},
title = {Decision problems for interacting finite state machines},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1576--1579},
year = {1991},
url = {https://doi.org/10.1109/43.103507},
doi = {10.1109/43.103507},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Drusinsky-Yoresh91a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/DuHLN91,
author = {Xuejun Du and
Gary D. Hachtel and
Bill Lin and
A. Richard Newton},
title = {{MUSE:} a multilevel symbolic encoding algorithm for state assignment},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {28--38},
year = {1991},
url = {https://doi.org/10.1109/43.62789},
doi = {10.1109/43.62789},
timestamp = {Mon, 01 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/DuHLN91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ErweT91,
author = {Reinhard Erwe and
Norio Tanabe},
title = {Efficient simulation of {MOS} circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {541--544},
year = {1991},
url = {https://doi.org/10.1109/43.75638},
doi = {10.1109/43.75638},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ErweT91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FairGJKRRS91,
author = {Richard B. Fair and
Carl L. Gardner and
Michael J. Johnson and
Stephen W. Kenkel and
Donald J. Rose and
J. E. Rose and
Ravi Subrahmanyan},
title = {Two-dimensional process simulation using verified phenomenological
models},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {643--651},
year = {1991},
url = {https://doi.org/10.1109/43.79501},
doi = {10.1109/43.79501},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FairGJKRRS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FatemiJO91,
author = {Emad Fatemi and
Joseph W. Jerome and
Stanley J. Osher},
title = {Solution of the hydrodynamic device model using high-order nonoscillatory
shock capturing algorithms},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {232--244},
year = {1991},
url = {https://doi.org/10.1109/43.68410},
doi = {10.1109/43.68410},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FatemiJO91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FavalliODR91,
author = {Michele Favalli and
Piero Olivo and
Maurizio Damiani and
Bruno Ricc{\`{o}}},
title = {Fault simulation of unconventional faults in {CMOS} circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {677--682},
year = {1991},
url = {https://doi.org/10.1109/43.79505},
doi = {10.1109/43.79505},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FavalliODR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FavalliOR91,
author = {Michele Favalli and
Piero Olivo and
Bruno Ricc{\`{o}}},
title = {A novel critical path heuristic for fast fault grading},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {544--548},
year = {1991},
url = {https://doi.org/10.1109/43.75639},
doi = {10.1109/43.75639},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FavalliOR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FeldmannNDR91,
author = {Peter Feldmann and
Tuyen V. Nguyen and
Stephen W. Director and
Ronald A. Rohrer},
title = {Sensitivity computation in piecewise approximate circuit simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {171--183},
year = {1991},
url = {https://doi.org/10.1109/43.68404},
doi = {10.1109/43.68404},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FeldmannNDR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/FuchsFS91,
author = {Karl Fuchs and
Franz Fink and
Michael H. Schulz},
title = {{DYNAMITE:} an efficient automatic test pattern generation system
for path delay faults},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1323--1335},
year = {1991},
url = {https://doi.org/10.1109/43.88928},
doi = {10.1109/43.88928},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/FuchsFS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GaiM91,
author = {Silvano Gai and
Pier Luca Montessoro},
title = {The fault dropping problem in concurrent event-driven simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {968--971},
year = {1991},
url = {https://doi.org/10.1109/43.85734},
doi = {10.1109/43.85734},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GaiM91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GardnerLR91,
author = {Carl L. Gardner and
Paul J. Lanzkron and
Donald J. Rose},
title = {A parallel block iterative method for the hydrodynamic device model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1187--1192},
year = {1991},
url = {https://doi.org/10.1109/43.85765},
doi = {10.1109/43.85765},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GardnerLR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GhoshDN91,
author = {Abhijit Ghosh and
Srinivas Devadas and
A. Richard Newton},
title = {Test generation and verification for highly sequential circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {652--667},
year = {1991},
url = {https://doi.org/10.1109/43.79502},
doi = {10.1109/43.79502},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GhoshDN91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GildenblatH91,
author = {Gennady Gildenblat and
Cheng{-}Liang Huang},
title = {N-channel {MOSFET} model for the 60-300-K temperature range},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {512--518},
year = {1991},
url = {https://doi.org/10.1109/43.75634},
doi = {10.1109/43.75634},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GildenblatH91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GoughJWH91,
author = {Paul A. Gough and
Martin K. Johnson and
Philip Walker and
Henk Hermans},
title = {An integrated device design environment for semiconductors},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {808--821},
year = {1991},
url = {https://doi.org/10.1109/43.137509},
doi = {10.1109/43.137509},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GoughJWH91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GuerrieriTGN91,
author = {Roberto Guerrieri and
Karim H. Tadros and
John K. Gamelin and
Andrew R. Neureuther},
title = {Massively parallel algorithms for scattering in optical lithography},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1091--1100},
year = {1991},
url = {https://doi.org/10.1109/43.85755},
doi = {10.1109/43.85755},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GuerrieriTGN91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GuggenbuhlMS91,
author = {Walter Guggenb{\"{u}}hl and
Guy Morbach and
Michael Schaller},
title = {Simulation lossless symmetrical three conductor systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {904--910},
year = {1991},
url = {https://doi.org/10.1109/43.87600},
doi = {10.1109/43.87600},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GuggenbuhlMS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HeC91,
author = {Yie He and
Guoxiang Cao},
title = {A generalized Scharfetter-Gummel method to eliminate crosswind effects
[semiconduction device modeling]},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1579--1582},
year = {1991},
url = {https://doi.org/10.1109/43.103508},
doi = {10.1109/43.103508},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HeC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HeiserPWF91,
author = {Gernot Heiser and
Claude Pommerell and
J{\"{u}}rgen Weis and
Wolfgang Fichtner},
title = {Three-dimensional numerical semiconductor device simulation: algorithms,
architectures, results},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1218--1230},
year = {1991},
url = {https://doi.org/10.1109/43.88918},
doi = {10.1109/43.88918},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HeiserPWF91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HeistermanL91,
author = {J{\"{o}}rg Heistermann and
Thomas Lengauer},
title = {The efficient solution of integer programs for hierarchical global
routing},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {748--753},
year = {1991},
url = {https://doi.org/10.1109/43.137503},
doi = {10.1109/43.137503},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HeistermanL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HiraiTISEHN91,
author = {Yoshihiko Hirai and
Sadafumi Tomida and
Kazushi Ikeda and
Masaru Sasago and
Masayuki Endo and
Sigeru Hayama and
Noboru Nomura},
title = {Three-dimensional resist process simulator {PEACE} (photo and electron
beam lithography analyzing computer engineering system)},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {802--807},
year = {1991},
url = {https://doi.org/10.1109/43.137508},
doi = {10.1109/43.137508},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HiraiTISEHN91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HoIZ91,
author = {Tai{-}Tsung Ho and
S. Sitharama Iyengar and
Si{-}Qing Zheng},
title = {A general greedy channel routing algorithm},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {204--211},
year = {1991},
url = {https://doi.org/10.1109/43.68407},
doi = {10.1109/43.68407},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HoIZ91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HorioFKY91,
author = {Kazushige Horio and
Yasuji Fuseya and
Hiroyuki Kusuki and
Hisayoshi Yanai},
title = {Simplified simulations of GaAs MESFET's with semi-insulating substrate
compensated by deep levels},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1295--1302},
year = {1991},
url = {https://doi.org/10.1109/43.88925},
doi = {10.1109/43.88925},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HorioFKY91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HsiehHLH91,
author = {Yung{-}Ching Hsieh and
Chi{-}Yi Hwang and
Youn{-}Long Lin and
Yu{-}Chin Hsu},
title = {LiB: a {CMOS} cell compiler},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {994--1005},
year = {1991},
url = {https://doi.org/10.1109/43.85737},
doi = {10.1109/43.85737},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HsiehHLH91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HwangLH91,
author = {Cheng{-}Tsung Hwang and
Jiahn{-}Humg Lee and
Yu{-}Chin Hsu},
title = {A formal approach to the scheduling problem in high level synthesis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {464--475},
year = {1991},
url = {https://doi.org/10.1109/43.75629},
doi = {10.1109/43.75629},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HwangLH91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/HwangN91,
author = {Seung Ho Hwang and
A. Richard Newton},
title = {An efficient verifier for finite state machines},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {326--334},
year = {1991},
url = {https://doi.org/10.1109/43.67786},
doi = {10.1109/43.67786},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/HwangN91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/IvanovSADGW91,
author = {Andr{\'{e}} Ivanov and
Corot W. Starke and
Vinod K. Agarwal and
Wilfried Daehn and
Matthias Gruetzner and
Tom W. Williams},
title = {Iterative algorithms for computing aliasing probabilities},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {260--265},
year = {1991},
url = {https://doi.org/10.1109/43.68413},
doi = {10.1109/43.68413},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/IvanovSADGW91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Jha91,
author = {Niraj K. Jha},
title = {Totally self-checking checker designs for Bose-Lin, Bose, and Blaum
codes},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {136--143},
year = {1991},
url = {https://doi.org/10.1109/43.62799},
doi = {10.1109/43.62799},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Jha91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JinPM91,
author = {Gyo{-}Young Jin and
Young{-}June Park and
Hong{-}Shick Min},
title = {Mixed particle Monte Carlo method for deep submicron semiconductor
device simulator},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1534--1541},
year = {1991},
url = {https://doi.org/10.1109/43.103503},
doi = {10.1109/43.103503},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JinPM91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Jones91,
author = {Larry G. Jones},
title = {Fast batch incremental netlist compilation hierarchical schematics},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {922--931},
year = {1991},
url = {https://doi.org/10.1109/43.87602},
doi = {10.1109/43.87602},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Jones91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/JuRS91,
author = {Yun{-}Cheng Ju and
Vasant B. Rao and
Resve A. Saleh},
title = {Consistency checking and optimization of macromodels},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {957--967},
year = {1991},
url = {https://doi.org/10.1109/43.85733},
doi = {10.1109/43.85733},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/JuRS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KeutzerMS91,
author = {Kurt Keutzer and
Sharad Malik and
Alexander Saldanha},
title = {Is redundancy necessary to reduce delay?},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {427--435},
year = {1991},
url = {https://doi.org/10.1109/43.75626},
doi = {10.1109/43.75626},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KeutzerMS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KimD91,
author = {Bo{-}Gwan Kim and
Donald L. Dietmeyer},
title = {Multilevel logic synthesis of symmetric switching functions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {436--446},
year = {1991},
url = {https://doi.org/10.1109/43.75627},
doi = {10.1109/43.75627},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KimD91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KleinhansSJA91,
author = {J{\"{u}}rgen M. Kleinhans and
Georg Sigl and
Frank M. Johannes and
Kurt Antreich},
title = {{GORDIAN:} {VLSI} placement by quadratic programming and slicing optimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {356--365},
year = {1991},
url = {https://doi.org/10.1109/43.67789},
doi = {10.1109/43.67789},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KleinhansSJA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KlingB91,
author = {Ralph{-}Michael Kling and
Prithviraj Banerjee},
title = {Empirical and theoretical studies of the simulated evolution method
applied to standard cell placement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1303--1315},
year = {1991},
url = {https://doi.org/10.1109/43.88926},
doi = {10.1109/43.88926},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KlingB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KnappP91,
author = {David W. Knapp and
Alice C. Parker},
title = {The {ADAM} design planning engine},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {829--846},
year = {1991},
url = {https://doi.org/10.1109/43.87595},
doi = {10.1109/43.87595},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KnappP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Kovacs-VajnaR91,
author = {Zsolt Mikl{\'{o}}s Kov{\'{a}}cs{-}Vajna and
Massimo Rudan},
title = {Boundary fitted coordinated generation for device analysis on composite
and complicated geometries},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1242--1250},
year = {1991},
url = {https://doi.org/10.1109/43.88920},
doi = {10.1109/43.88920},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Kovacs-VajnaR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KravitzBR91,
author = {Saul A. Kravitz and
Randal E. Bryant and
Rob A. Rutenbar},
title = {Massively parallel switch-level simulation: a feasibility study},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {871--894},
year = {1991},
url = {https://doi.org/10.1109/43.87598},
doi = {10.1109/43.87598},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/KravitzBR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Kruger91,
author = {Gerd Kr{\"{u}}ger},
title = {A tool for hierarchical test generation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {519--524},
year = {1991},
url = {https://doi.org/10.1109/43.75635},
doi = {10.1109/43.75635},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Kruger91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KunduRJ91,
author = {Sandip Kundu and
Sudhakar M. Reddy and
Niraj K. Jha},
title = {Design of robustly testable combinational logic circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {1036--1048},
year = {1991},
url = {https://doi.org/10.1109/43.85740},
doi = {10.1109/43.85740},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KunduRJ91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/KurshanM91,
author = {Robert P. Kurshan and
Kenneth L. McMillan},
title = {Analysis of digital circuits through symbolic reduction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1356--1371},
year = {1991},
url = {https://doi.org/10.1109/43.97615},
doi = {10.1109/43.97615},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/KurshanM91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LagneseT91,
author = {Elizabeth D. Lagnese and
Donald E. Thomas},
title = {Architectural partitioning for system level synthesis of integrated
circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {847--860},
year = {1991},
url = {https://doi.org/10.1109/43.87596},
doi = {10.1109/43.87596},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LagneseT91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Law91,
author = {Mark E. Law},
title = {Parameters for point-defect diffusion and recombination},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1125--1131},
year = {1991},
url = {https://doi.org/10.1109/43.85758},
doi = {10.1109/43.85758},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Law91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Lewis91,
author = {David M. Lewis},
title = {A hierarchical compiled code event-driven logic simulator},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {726--737},
year = {1991},
url = {https://doi.org/10.1109/43.137501},
doi = {10.1109/43.137501},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Lewis91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LiaoS91,
author = {Kuo{-}Feng Liao and
Majid Sarrafzadeh},
title = {Boundary single-layer routing with movable terminals},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1382--1391},
year = {1991},
url = {https://doi.org/10.1109/43.97617},
doi = {10.1109/43.97617},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LiaoS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LigthartS91,
author = {Michiel M. Ligthart and
Rudi J. Stans},
title = {A fault model for PLAs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {265--270},
year = {1991},
url = {https://doi.org/10.1109/43.68414},
doi = {10.1109/43.68414},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LigthartS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LinPHL91,
author = {Min{-}Siang Lin and
Hourng{-}Wern Perng and
Chi{-}Yi Hwang and
Youn{-}Long Lin},
title = {Channel density reduction by routing over the cells},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {1067--1071},
year = {1991},
url = {https://doi.org/10.1109/43.85743},
doi = {10.1109/43.85743},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LinPHL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LowD91,
author = {K. K. Low and
Stephen W. Director},
title = {A new methodology for the design centering of {IC} fabrication processes},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {895--903},
year = {1991},
url = {https://doi.org/10.1109/43.87599},
doi = {10.1109/43.87599},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LowD91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/LukD91,
author = {Wing K. Luk and
Alvar A. Dean},
title = {Multistack optimization for data-path chip layout},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {116--129},
year = {1991},
url = {https://doi.org/10.1109/43.62797},
doi = {10.1109/43.62797},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/LukD91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MacInnes91,
author = {Craig MacInnes},
title = {The use of small pivot perturbation in circuit analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1441--1446},
year = {1991},
url = {https://doi.org/10.1109/43.97623},
doi = {10.1109/43.97623},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MacInnes91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MalikBNS91,
author = {Abdul A. Malik and
Robert K. Brayton and
A. Richard Newton and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Reduced offsets for minimization of binary-valued functions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {413--426},
year = {1991},
url = {https://doi.org/10.1109/43.75625},
doi = {10.1109/43.75625},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MalikBNS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MalikSBS91,
author = {Sharad Malik and
Ellen M. Sentovich and
Robert K. Brayton and
Alberto L. Sangiovanni{-}Vincentelli},
title = {Retiming and resynthesis: optimizing sequential networks with combinational
techniques},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {74--84},
year = {1991},
url = {https://doi.org/10.1109/43.62793},
doi = {10.1109/43.62793},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MalikSBS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MasudaMISA91,
author = {Hiroo Masuda and
Jun'ichi Mano and
Ryuichi Ikematsu and
Hitoshi Sugihara and
Yukio Aoki},
title = {A submicrometer {MOS} transistor {I-V} model for circuit simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {161--170},
year = {1991},
url = {https://doi.org/10.1109/43.68403},
doi = {10.1109/43.68403},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MasudaMISA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Maurer91,
author = {Peter M. Maurer},
title = {Scheduling blocks of hierarchical compiled simulation of combinational
circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {184--192},
year = {1991},
url = {https://doi.org/10.1109/43.68405},
doi = {10.1109/43.68405},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Maurer91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/MenonLA91,
author = {Premachandran R. Menon and
Ytzhak H. Levendel and
Miron Abramovici},
title = {{SCRIPT:} a critical path tracing algorithm for synchronous sequential
circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {738--747},
year = {1991},
url = {https://doi.org/10.1109/43.137502},
doi = {10.1109/43.137502},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/MenonLA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Micheli91,
author = {Giovanni De Micheli},
title = {Synchronous logic synthesis: algorithms for cycle-time minimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {63--73},
year = {1991},
url = {https://doi.org/10.1109/43.62792},
doi = {10.1109/43.62792},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Micheli91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NaborsW91,
author = {Keith Nabors and
Jacob K. White},
title = {FastCap: a multipole accelerated 3-D capacitance extraction program},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1447--1459},
year = {1991},
url = {https://doi.org/10.1109/43.97624},
doi = {10.1109/43.97624},
timestamp = {Mon, 08 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NaborsW91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NajmHY91,
author = {Farid N. Najm and
Ibrahim N. Hajj and
Ping Yang},
title = {An extension of probabilistic simulation for reliability analysis
of {CMOS} {VLSI} circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1372--1381},
year = {1991},
url = {https://doi.org/10.1109/43.97616},
doi = {10.1109/43.97616},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/NajmHY91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OdanakaHOMU91,
author = {Shinji Odanaka and
Akira Hiroki and
Kikuyo Ohe and
Kaori Moriyama and
Hiroyuki Umimoto},
title = {{SMART-II:} a three-dimensional {CAD} model for submicrometer MOSFET's},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {619--628},
year = {1991},
url = {https://doi.org/10.1109/43.79499},
doi = {10.1109/43.79499},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OdanakaHOMU91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Pangrle91,
author = {Barry M. Pangrle},
title = {On the complexity of connectivity binding},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1460--1465},
year = {1991},
url = {https://doi.org/10.1109/43.97625},
doi = {10.1109/43.97625},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Pangrle91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ParkKH91,
author = {Hong June Park and
Ping Keung Ko and
Chenming Hu},
title = {A charge sheet capacitance model of short channel MOSFETs for {SPICE}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {376--389},
year = {1991},
url = {https://doi.org/10.1109/43.67791},
doi = {10.1109/43.67791},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ParkKH91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ParkKH91a,
author = {Hong June Park and
Ping Keung Ko and
Chenming Hu},
title = {A charge conserving non-quasi-state {(NQS)} {MOSFET} model for {SPICE}
transient analysis},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {629--642},
year = {1991},
url = {https://doi.org/10.1109/43.79500},
doi = {10.1109/43.79500},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ParkKH91a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PatilB91,
author = {Srinivas Patil and
Prithviraj Banerjee},
title = {Performance trade-offs in a parallel test generation/fault simulation
environment},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1542--1558},
year = {1991},
url = {https://doi.org/10.1109/43.103504},
doi = {10.1109/43.103504},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PatilB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/PongB91,
author = {Teng{-}Sin Pong and
Martin A. Brooke},
title = {A parasitics extraction and network reduction algorithm for analog
{VLSI}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {145--149},
year = {1991},
url = {https://doi.org/10.1109/43.68401},
doi = {10.1109/43.68401},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/PongB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/QuadeRS91,
author = {Wolfgang Quade and
Massimo Rudan and
Eckehard Sch{\"{o}}ll},
title = {Hydrodynamic simulation of impact-ionization effects in p-n junctions},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1287--1294},
year = {1991},
url = {https://doi.org/10.1109/43.88924},
doi = {10.1109/43.88924},
timestamp = {Tue, 23 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/QuadeRS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RajskiT91,
author = {Janusz Rajski and
Jerzy Tyszer},
title = {On the diagnostic properties of linear feedback shift registers},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1316--1322},
year = {1991},
url = {https://doi.org/10.1109/43.88927},
doi = {10.1109/43.88927},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RajskiT91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Rollins91,
author = {J. Gregory Rollins},
title = {Numerical simulator for superconducting integrated circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {245--251},
year = {1991},
url = {https://doi.org/10.1109/43.68411},
doi = {10.1109/43.68411},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Rollins91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/RuanVBO91,
author = {Genhong Ruan and
Jir{\'{\i}} Vlach and
James A. Barby and
Ajoy Opal},
title = {Analog functional simulator for multilevel systems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {5},
pages = {565--576},
year = {1991},
url = {https://doi.org/10.1109/43.79494},
doi = {10.1109/43.79494},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/RuanVBO91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SaabR91,
author = {Youssef Saab and
Vasant B. Rao},
title = {Combinatorial optimization by stochastic evolution},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {525--535},
year = {1991},
url = {https://doi.org/10.1109/43.75636},
doi = {10.1109/43.75636},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SaabR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SastryM91,
author = {Sarma Sastry and
Amitava Majumdar},
title = {Test efficiency analysis of random self-test of sequential circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {390--398},
year = {1991},
url = {https://doi.org/10.1109/43.67792},
doi = {10.1109/43.67792},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SastryM91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SastryP91,
author = {Sarma Sastry and
Jen{-}I Pi},
title = {Estimating the minimum of partitioning and floorplanning problems},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {273--282},
year = {1991},
url = {https://doi.org/10.1109/43.68416},
doi = {10.1109/43.68416},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SastryP91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SavirB91,
author = {Jacob Savir and
Paul H. Bardell},
title = {Partitioning of polynomial tasks: test generation, an example},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1465--1468},
year = {1991},
url = {https://doi.org/10.1109/43.97626},
doi = {10.1109/43.97626},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SavirB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SetliffR91,
author = {Dorothy E. Setliff and
Rob A. Rutenbar},
title = {On the feasibility of synthesizing {CAD} software from specifications:
generating maze router tools in {ELF}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {783--801},
year = {1991},
url = {https://doi.org/10.1109/43.137507},
doi = {10.1109/43.137507},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SetliffR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShiraishiSF91,
author = {Yoichi Shiraishi and
Jun'ya Sakemi and
Kazuyuki Fukuda},
title = {Optimality of a feedthrough assignment algorithm in a {CMOS} logic
cell layout},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {982--993},
year = {1991},
url = {https://doi.org/10.1109/43.85736},
doi = {10.1109/43.85736},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShiraishiSF91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ShungJRWSRLATHRB91,
author = {C. Bernard Shung and
Rajeev Jain and
Ken Rimey and
Edward Wang and
Mani B. Srivastava and
Brian C. Richards and
Erik Lettang and
Syed Khalid Azim and
Lars E. Thon and
Paul N. Hilfinger and
Jan M. Rabaey and
Robert W. Brodersen},
title = {An integrated {CAD} system for algorithm-specific {IC} design},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {447--463},
year = {1991},
url = {https://doi.org/10.1109/43.75628},
doi = {10.1109/43.75628},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ShungJRWSRLATHRB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Simpson91,
author = {Mark R. Simpson},
title = {{PRIDE:} an integrated design environment for semiconductor device
simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1163--1174},
year = {1991},
url = {https://doi.org/10.1109/43.85763},
doi = {10.1109/43.85763},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Simpson91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SmithSMF91,
author = {J. H. Smith and
Kenneth M. Steer and
Timothy F. Miller and
Stephen J. Fonash},
title = {Numerical modeling of two-dimensional device structures using Brandt's
multilevel acceleration scheme: application to Poisson's equation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {822--824},
year = {1991},
url = {https://doi.org/10.1109/43.137510},
doi = {10.1109/43.137510},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SmithSMF91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SmyTB91,
author = {Tom J. Smy and
R. Niall Tait and
Michael J. Brett},
title = {Ballistic deposition simulation of via metallization using a quasi-three-dimensional
model},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {130--135},
year = {1991},
url = {https://doi.org/10.1109/43.62798},
doi = {10.1109/43.62798},
timestamp = {Mon, 11 Jan 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/SmyTB91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Stapper91,
author = {Charles H. Stapper},
title = {Statistics associated with spatial fault simulation used for evaluating
integrated circuit yield enhancement},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {399--406},
year = {1991},
url = {https://doi.org/10.1109/43.67793},
doi = {10.1109/43.67793},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Stapper91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/StrojwasD91,
author = {Andrzej J. Strojwas and
Stephen W. Director},
title = {An efficient algorithm for parametric fault simulation of monolithic
IC's},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {1049--1058},
year = {1991},
url = {https://doi.org/10.1109/43.85741},
doi = {10.1109/43.85741},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/StrojwasD91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/SutanthavibulSR91,
author = {Suphachai Sutanthavibul and
Eugene Shragowitz and
J. Ben Rosen},
title = {An analytical approach to floorplan design and optimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {6},
pages = {761--769},
year = {1991},
url = {https://doi.org/10.1109/43.137505},
doi = {10.1109/43.137505},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/SutanthavibulSR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TaiDL91,
author = {Shen{-}Chuan Tai and
M. W. Du and
Richard C. T. Lee},
title = {A transformational approach to synthesizing combinational circuits},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {286--295},
year = {1991},
url = {https://doi.org/10.1109/43.67783},
doi = {10.1109/43.67783},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TaiDL91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TakachJ91,
author = {Andres R. Takach and
Niraj K. Jha},
title = {Easily testable gate-level and {DCVS} multipliers},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {932--942},
year = {1991},
url = {https://doi.org/10.1109/43.87603},
doi = {10.1109/43.87603},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TakachJ91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TakefujiLC91,
author = {Yoshiyasu Takefuji and
Kuo Chun Lee and
Yong B. Cho},
title = {Comments on 'O(n\({}^{\mbox{2}}\)) algorithms for graph planarization'},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1582--1583},
year = {1991},
url = {https://doi.org/10.1109/43.103509},
doi = {10.1109/43.103509},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TakefujiLC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TheWC91,
author = {Khe{-}Sing The and
Martin D. F. Wong and
Jason Cong},
title = {A layout modification approach to via minimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {536--541},
year = {1991},
url = {https://doi.org/10.1109/43.75637},
doi = {10.1109/43.75637},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TheWC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Thurgate91,
author = {T. Thurgate},
title = {Segment-based etch algorithm and modeling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1101--1109},
year = {1991},
url = {https://doi.org/10.1109/43.85756},
doi = {10.1109/43.85756},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Thurgate91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TianS91,
author = {Xiaowei Tian and
Andrzej J. Strojwas},
title = {Numerical integral method for diffusion modeling},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1110--1124},
year = {1991},
url = {https://doi.org/10.1109/43.85757},
doi = {10.1109/43.85757},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TianS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TolC91,
author = {Michael J. Van der Tol and
Savvas G. Chamberlain},
title = {Buried-channel {MOSFET} model for {SPICE}},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {8},
pages = {1015--1035},
year = {1991},
url = {https://doi.org/10.1109/43.85739},
doi = {10.1109/43.85739},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TolC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Tollis91,
author = {Ioannis G. Tollis},
title = {A new approach to wiring layouts},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1392--1400},
year = {1991},
url = {https://doi.org/10.1109/43.97618},
doi = {10.1109/43.97618},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Tollis91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TsaiG91,
author = {Yao{-}Tsung Tsai and
Timothy A. Grotjohn},
title = {Small-signal analysis of {MESFET} including the energy conservation
equation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1530--1533},
year = {1991},
url = {https://doi.org/10.1109/43.103502},
doi = {10.1109/43.103502},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TsaiG91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/TuanT91,
author = {Tai{-}Ching Tuan and
Kim{-}Heng Teo},
title = {On river routing with minimum number of jogs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {271--273},
year = {1991},
url = {https://doi.org/10.1109/43.68415},
doi = {10.1109/43.68415},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/TuanT91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Vannelli91,
author = {Anthony Vannelli},
title = {An adaptation of the interior point method for solving the global
routing problem},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {193--203},
year = {1991},
url = {https://doi.org/10.1109/43.68406},
doi = {10.1109/43.68406},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Vannelli91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VanoostendeSM91,
author = {Paul Vanoostende and
Paul Six and
Hugo De Man},
title = {{DARSI:} {RC} data reduction {[VLSI} simulation]},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {4},
pages = {493--500},
year = {1991},
url = {https://doi.org/10.1109/43.75632},
doi = {10.1109/43.75632},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VanoostendeSM91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VenturiSBQJR91,
author = {Franco Venturi and
Enrico Sangiorgi and
Rossella Brunetti and
Wolfgang Quade and
Carlo Jacoboni and
Bruno Ricc{\`{o}}},
title = {Monte Carlo simulations of high energy electrons and holes in Si-n-MOSFET's},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {10},
pages = {1276--1286},
year = {1991},
url = {https://doi.org/10.1109/43.88923},
doi = {10.1109/43.88923},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VenturiSBQJR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VijayanT91,
author = {Gopalakrishnan Vijayan and
Ren{-}Song Tsay},
title = {A new method for floor planning using topological constraint reduction},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {12},
pages = {1494--1501},
year = {1991},
url = {https://doi.org/10.1109/43.103499},
doi = {10.1109/43.103499},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VijayanT91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VisweswariahR91,
author = {Chandramouli Visweswariah and
Ronald A. Rohrer},
title = {Piecewise approximate circuit simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {861--870},
year = {1991},
url = {https://doi.org/10.1109/43.87597},
doi = {10.1109/43.87597},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VisweswariahR91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/VlachBVTS91,
author = {Jir{\'{\i}} Vlach and
James A. Barby and
Anthony Vannelli and
T. Talkhan and
C.{-}J. Richard Shi},
title = {Group delay as an estimate of delay in logic},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {949--953},
year = {1991},
url = {https://doi.org/10.1109/43.87605},
doi = {10.1109/43.87605},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/VlachBVTS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WebberTGTS91,
author = {Donald M. Webber and
Eric Tomacruz and
Roberto Guerrieri and
Toru Toyabe and
Alberto L. Sangiovanni{-}Vincentelli},
title = {A massively parallel algorithm for three-dimensional device simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1201--1209},
year = {1991},
url = {https://doi.org/10.1109/43.85767},
doi = {10.1109/43.85767},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WebberTGTS91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WeiC91,
author = {Yen{-}Chuen A. Wei and
Chung{-}Kuan Cheng},
title = {Ratio cut partitioning for hierarchical designs},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {7},
pages = {911--921},
year = {1991},
url = {https://doi.org/10.1109/43.87601},
doi = {10.1109/43.87601},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WeiC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WongG91,
author = {Martin D. F. Wong and
Mohankumar Guruswamy},
title = {Channel ordering for {VLSI} layout with rectilinear modules},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1425--1431},
year = {1991},
url = {https://doi.org/10.1109/43.97621},
doi = {10.1109/43.97621},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WongG91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WongN91,
author = {Alexander S. Wong and
Andrew R. Neureuther},
title = {The intertool profile interchange format: a technology {CAD} environment
approach [semiconductor technology]},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1157--1162},
year = {1991},
url = {https://doi.org/10.1109/43.85762},
doi = {10.1109/43.85762},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WongN91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/WuCD91,
author = {Ke{-}Chih Wu and
Goodwin R. Chin and
Robert W. Dutton},
title = {A {STRIDE} towards practical 3-D device simulation-numerical and visualization
considerations},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {9},
pages = {1132--1140},
year = {1991},
url = {https://doi.org/10.1109/43.85759},
doi = {10.1109/43.85759},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/WuCD91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YangC91,
author = {Seiyang Yang and
Maciej J. Ciesielski},
title = {Optimum and suboptimum algorithms for input encoding and its relationship
to logic minimization},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {4--12},
year = {1991},
url = {https://doi.org/10.1109/43.62787},
doi = {10.1109/43.62787},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YangC91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YanilmazE91,
author = {Mehmet Yanilmaz and
Virgil Eveleigh},
title = {Numerical device modeling for electronic circuit simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {3},
pages = {366--375},
year = {1991},
url = {https://doi.org/10.1109/43.67790},
doi = {10.1109/43.67790},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YanilmazE91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/Yoeli91,
author = {Uzi Yoeli},
title = {A robust channel router},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {2},
pages = {212--219},
year = {1991},
url = {https://doi.org/10.1109/43.68409},
doi = {10.1109/43.68409},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/Yoeli91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/YoungTWTA91,
author = {Dennis L. Young and
Jim Teplik and
Harrison D. Weed and
Neil T. Tracht and
Antonio R. Alvarez},
title = {Application of statistical design and response surface methods to
computer-aided {VLSI} device design {II.} Desirability functions and
Taguchi methods},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {1},
pages = {103--115},
year = {1991},
url = {https://doi.org/10.1109/43.62796},
doi = {10.1109/43.62796},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/YoungTWTA91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/ZhaoZTX91,
author = {Zhong{-}Yi Zhao and
Qi{-}Ming Zhang and
Gen{-}Lin Tan and
J. M. (Jimmy) Xu},
title = {A new preconditioner for {CGS} iteration in solving large sparse nonsymmetric
linear equations in semiconductor device simulation},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {10},
number = {11},
pages = {1432--1440},
year = {1991},
url = {https://doi.org/10.1109/43.97622},
doi = {10.1109/43.97622},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/ZhaoZTX91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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