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@article{DBLP:journals/tcad/Allan00,
  author    = {Gerard A. Allan},
  title     = {Yield prediction by sampling {IC} layout},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {359--371},
  year      = {2000}
}
@article{DBLP:journals/tcad/AlpertCKM00,
  author    = {Charles J. Alpert and
               Andrew E. Caldwell and
               Andrew B. Kahng and
               Igor L. Markov},
  title     = {Hypergraph partitioning with fixed vertices {[VLSI} {CAD]}},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {2},
  pages     = {267--272},
  year      = {2000}
}
@article{DBLP:journals/tcad/AzizBBS00,
  author    = {Adnan Aziz and
               Felice Balarin and
               Robert K. Brayton and
               Alberto L. Sangiovanni{-}Vincentelli},
  title     = {Sequential synthesis using {S1S}},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1149--1162},
  year      = {2000}
}
@article{DBLP:journals/tcad/BachtoldSLL00,
  author    = {Martin B{\"{a}}chtold and
               Mirko Spasojevic and
               Christian Lage and
               Per B. Ljung},
  title     = {A system for full-chip and critical net parasitic extraction for {ULSI}
               interconnects using a fast 3-D field solver},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {325--338},
  year      = {2000}
}
@article{DBLP:journals/tcad/BalasaL00,
  author    = {Florin Balasa and
               Koen Lampaert},
  title     = {Symmetry within the sequence-pair representation in the context ofplacement
               for analog design},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {7},
  pages     = {721--731},
  year      = {2000}
}
@article{DBLP:journals/tcad/BelluominiM00,
  author    = {Wendy Belluomini and
               Chris J. Myers},
  title     = {Timed state space exploration using POSETs},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {501--520},
  year      = {2000}
}
@article{DBLP:journals/tcad/BeniniMMPS00,
  author    = {Luca Benini and
               Giovanni De Micheli and
               Enrico Macii and
               Massimo Poncino and
               Riccardo Scarsi},
  title     = {A multilevel engine for fast power simulation of realistic inputstreams},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {4},
  pages     = {459--472},
  year      = {2000}
}
@article{DBLP:journals/tcad/BeniniMPS00,
  author    = {Luca Benini and
               Alberto Macii and
               Massimo Poncino and
               Riccardo Scarsi},
  title     = {Architectures and synthesis algorithms for power-efficient businterfaces},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {969--980},
  year      = {2000}
}
@article{DBLP:journals/tcad/BermanKVWZ00,
  author    = {Piotr Berman and
               Andrew B. Kahng and
               Devendra Vidhani and
               Huijuan Wang and
               Alexander Zelikovsky},
  title     = {Optimal phase conflict removal for layout of dark field alternatingphase
               shifting masks},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {2},
  pages     = {175--187},
  year      = {2000}
}
@article{DBLP:journals/tcad/BreuerSS00,
  author    = {Melvin A. Breuer and
               Majid Sarrafzadeh and
               Fabio Somenzi},
  title     = {Fundamental {CAD} algorithms},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1449--1475},
  year      = {2000}
}
@article{DBLP:journals/tcad/BriaireK00,
  author    = {J. Briaire and
               K. S. Krisch},
  title     = {Principles of substrate crosstalk generation in {CMOS} circuits},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {6},
  pages     = {645--653},
  year      = {2000}
}
@article{DBLP:journals/tcad/ButlerDSY00,
  author    = {Jon T. Butler and
               Gerhard W. Dueck and
               Vlad P. Shmerko and
               Svetlana N. Yanushkevich},
  title     = {Comments on "Sympathy: fast exact minimization of fixedpolarity Reed-Muller
               expansion for symmetric functions"},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1386--1388},
  year      = {2000}
}
@article{DBLP:journals/tcad/CabodiCQ00,
  author    = {Gianpiero Cabodi and
               Paolo Camurati and
               Stefano Quer},
  title     = {Improving symbolic reachability analysis by means of activityprofiles},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {1065--1075},
  year      = {2000}
}
@article{DBLP:journals/tcad/CaldwellKM00,
  author    = {Andrew E. Caldwell and
               Andrew B. Kahng and
               Igor L. Markov},
  title     = {Optimal partitioners and end-case placers for standard-cell layout},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1304--1313},
  year      = {2000}
}
@article{DBLP:journals/tcad/CamposanoP00,
  author    = {Raul Camposano and
               Massoud Pedram},
  title     = {Electronic design automation at the turn of the century: accomplishments
               and vision of the future},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1401--1403},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChakrabartiDDB00,
  author    = {Susanta Chakrabarti and
               Sandip Das and
               Debesh Kumar Das and
               Bhargab B. Bhattacharya},
  title     = {Synthesis of symmetric functions for path-delay fault testability},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {1076--1081},
  year      = {2000}
}
@article{DBLP:journals/tcad/Chakrabarty00,
  author    = {Krishnendu Chakrabarty},
  title     = {Test scheduling for core-based systems using mixed-integer linearprogramming},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1163--1174},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChakravartyZ00,
  author    = {Sreejit Chakravarty and
               Sujit T. Zachariah},
  title     = {{STBM:} a fast algorithm to simulate I\({}_{\mbox{DDQ}}\) tests forleakage
               faults},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {568--576},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChanSEM00,
  author    = {Pak K. Chan and
               Martine D. F. Schlag and
               Carl Ebeling and
               Larry McMurchie},
  title     = {Distributed-memory parallel routing for field-programmable gatearrays},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {8},
  pages     = {850--862},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChangJC00,
  author    = {Shih{-}Chieh Chang and
               Wen{-}Ben Jone and
               Shi{-}Sen Chang},
  title     = {{TAIR:} testability analysis by implication reasoning},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {152--160},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChangP00,
  author    = {Jui{-}Ming Chang and
               Massoud Pedram},
  title     = {Codex-dp: co-design of communicating systems using dynamicprogramming},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {7},
  pages     = {732--744},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChangfanHT00,
  author    = {Chieh Changfan and
               Yu{-}Chin Hsu and
               Fur{-}Shing Tsai},
  title     = {Timing optimization on routed designs with incremental placementand
               routing characterization},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {2},
  pages     = {188--196},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChantrapornchaiSH00,
  author    = {Chantana Chantrapornchai and
               Edwin Hsing{-}Mean Sha and
               Xiaobo Sharon Hu},
  title     = {Efficient design exploration based on module utility selection},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {19--29},
  year      = {2000}
}
@article{DBLP:journals/tcad/Charbon00,
  author    = {Edoardo Charbon},
  title     = {Guest Editorial},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {6},
  pages     = {633--634},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChenHP00,
  author    = {Wei Chen and
               Cheng{-}Ta Hsieh and
               Massoud Pedram},
  title     = {Simultaneous gate sizing and placement},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {2},
  pages     = {206--214},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChenLRK00,
  author    = {Danqing Chen and
               Erhong Li and
               Elyse Rosenbaum and
               Sung{-}Mo Kang},
  title     = {Interconnect thermal modeling for accurate simulation of circuittiming
               and reliability},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {2},
  pages     = {197--205},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChenRC00,
  author    = {Zhanping Chen and
               Kaushik Roy and
               Edwin K. P. Chong},
  title     = {Estimation of power dissipation using a novel power macromodelingtechnique},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1363--1369},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChenSCI00,
  author    = {H. M. Chen and
               G. S. Samudra and
               D. S. H. Chan and
               Yaacob Ibrahim},
  title     = {Global optimization for digital {MOS} circuits performance},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {161--164},
  year      = {2000}
}
@article{DBLP:journals/tcad/ChengK00,
  author    = {Yi{-}Kan Cheng and
               Sung{-}Mo Kang},
  title     = {A temperature-aware simulation environment for reliable {ULSI} chipdesign},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1211--1220},
  year      = {2000}
}
@article{DBLP:journals/tcad/Cho00,
  author    = {Jun Dong Cho},
  title     = {Wiring space and length estimation in two-dimensional arrays},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {612--615},
  year      = {2000}
}
@article{DBLP:journals/tcad/CocchiniP00,
  author    = {Pasquale Cocchini and
               Massoud Pedram},
  title     = {Fanout optimization using bipolar LT-trees},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {339--349},
  year      = {2000}
}
@article{DBLP:journals/tcad/CongFK00,
  author    = {Jason Cong and
               Jie Fang and
               Kei{-}Yong Khoo},
  title     = {Via design rule consideration in multilayer maze routing algorithms},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {2},
  pages     = {215--223},
  year      = {2000}
}
@article{DBLP:journals/tcad/CongX00,
  author    = {Jason Cong and
               Songjie Xu},
  title     = {Performance-driven technology mapping for heterogeneous FPGAs},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1268--1281},
  year      = {2000}
}
@article{DBLP:journals/tcad/DarringerDHKLMRRSTT00,
  author    = {John A. Darringer and
               Evan E. Davidson and
               David J. Hathaway and
               Bernd Koenemann and
               Mark A. Lavin and
               Joseph K. Morrell and
               Khalid Rahmat and
               Wolfgang Roesner and
               Erich C. Schanzenbach and
               Gustavo E. T{\'{e}}llez and
               Louise Trevillyan},
  title     = {{EDA} in {IBM:} past, present, and future},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1476--1497},
  year      = {2000}
}
@article{DBLP:journals/tcad/DasguptaDC00,
  author    = {Pallab Dasgupta and
               Jatindra Kumar Deka and
               Partha Pratim Chakrabarti},
  title     = {Model checking on timed-event structures},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {601--611},
  year      = {2000}
}
@article{DBLP:journals/tcad/DongO00,
  author    = {Jennifer Y. Dong and
               Ajoy Opal},
  title     = {Time-domain thermal noise simulation of switched capacitor circuitsand
               delta-sigma modulators},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {4},
  pages     = {473--481},
  year      = {2000}
}
@article{DBLP:journals/tcad/DrechslerDG00,
  author    = {Rolf Drechsler and
               Nicole Drechsler and
               Wolfgang G{\"{u}}nther},
  title     = {Fast exact minimization of BDD's},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {384--389},
  year      = {2000}
}
@article{DBLP:journals/tcad/DuttD00,
  author    = {Shantanu Dutt and
               Wenyong Deng},
  title     = {Probability-based approaches to {VLSI} circuit partitioning},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {534--549},
  year      = {2000}
}
@article{DBLP:journals/tcad/DuttonS00,
  author    = {Robert W. Dutton and
               Andrzej J. Strojwas},
  title     = {Perspectives on technology and technology-driven {CAD}},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1544--1560},
  year      = {2000}
}
@article{DBLP:journals/tcad/Eijk00,
  author    = {C. A. J. van Eijk},
  title     = {Sequential equivalence checking based on structural similarities},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {7},
  pages     = {814--819},
  year      = {2000}
}
@article{DBLP:journals/tcad/FerrandiFMPS00,
  author    = {Fabrizio Ferrandi and
               Franco Fummi and
               Enrico Macii and
               Massimo Poncino and
               Donatella Sciuto},
  title     = {Symbolic optimization of interacting controllers based onredundancy
               identification and removal},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {7},
  pages     = {760--772},
  year      = {2000}
}
@article{DBLP:journals/tcad/FilesP00,
  author    = {Craig M. Files and
               Marek A. Perkowski},
  title     = {New multivalued functional decomposition algorithms based on MDDs},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {1081--1086},
  year      = {2000}
}
@article{DBLP:journals/tcad/FujiyoshiM00,
  author    = {Kunihiro Fujiyoshi and
               Hiroshi Murata},
  title     = {Arbitrary convex and concave rectilinear block packing usingsequence-pair},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {2},
  pages     = {224--233},
  year      = {2000}
}
@article{DBLP:journals/tcad/GhoshDJ00,
  author    = {Indradeep Ghosh and
               Sujit Dey and
               Niraj K. Jha},
  title     = {A fast and low-cost testing technique for core-based system-chips},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {8},
  pages     = {863--877},
  year      = {2000}
}
@article{DBLP:journals/tcad/GhoshJB00,
  author    = {Indradeep Ghosh and
               Niraj K. Jha and
               Sudipta Bhawmik},
  title     = {A {BIST} scheme for {RTL} circuits based on symbolic testabilityanalysis},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {111--128},
  year      = {2000}
}
@article{DBLP:journals/tcad/GoldbergCVBS00,
  author    = {Evguenii I. Goldberg and
               Luca P. Carloni and
               Tiziano Villa and
               Robert K. Brayton and
               Alberto L. Sangiovanni{-}Vincentelli},
  title     = {Negative thinking in branch-and-bound: the case of unate covering},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {281--294},
  year      = {2000}
}
@article{DBLP:journals/tcad/GunupudiNA00,
  author    = {Pavan K. Gunupudi and
               Michel S. Nakhla and
               Ramachandra Achar},
  title     = {Simulation of high-speed distributed interconnects using Krylov-space
               techniques},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {7},
  pages     = {799--808},
  year      = {2000}
}
@article{DBLP:journals/tcad/GuptaN00,
  author    = {Subodh Gupta and
               Farid N. Najm},
  title     = {Analytical models for {RTL} power estimation of combinational andsequential
               circuits},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {7},
  pages     = {808--814},
  year      = {2000}
}
@article{DBLP:journals/tcad/HamzaogluP00,
  author    = {Ilker Hamzaoglu and
               Janak H. Patel},
  title     = {Test set compaction algorithms for combinational circuits},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {8},
  pages     = {957--963},
  year      = {2000}
}
@article{DBLP:journals/tcad/HasanSAP00,
  author    = {Mahbub Hasan and
               Huan{-}Hsiang Patrick Shen and
               David R. Allee and
               Michael J. Pennell},
  title     = {A behavioral model of a 1.8-V flash {A/D} converter based on deviceparameters},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {69--82},
  year      = {2000}
}
@article{DBLP:journals/tcad/HayashiY00,
  author    = {Sachio Hayashi and
               Masaaki Yamada},
  title     = {EMI-noise analysis under {ASIC} design environment},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1337--1346},
  year      = {2000}
}
@article{DBLP:journals/tcad/HelvigRZ00,
  author    = {Christopher S. Helvig and
               Gabriel Robins and
               Alexander Zelikovsky},
  title     = {New approximation algorithms for routing with multiport terminals},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1118--1128},
  year      = {2000}
}
@article{DBLP:journals/tcad/HongBBM00,
  author    = {Youpyo Hong and
               Peter A. Beerel and
               Jerry R. Burch and
               Kenneth L. McMillan},
  title     = {Sibling-substitution-based {BDD} minimization using don't cares},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {44--55},
  year      = {2000}
}
@article{DBLP:journals/tcad/HossingerLS00,
  author    = {Andreas H{\"{o}}ssinger and
               Erasmus Langer and
               Siegfried Selberherr},
  title     = {Parallelization of a Monte Carlo ion implantation simulator},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {560--567},
  year      = {2000}
}
@article{DBLP:journals/tcad/HsiehLC00,
  author    = {Hong{-}Yean Hsieh and
               Wentai Liu and
               Ralph K. Cavin III},
  title     = {Integrated parametric timing optimization of digital systems},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {4},
  pages     = {482--489},
  year      = {2000}
}
@article{DBLP:journals/tcad/HuS00,
  author    = {Jiang Hu and
               Sachin S. Sapatnekar},
  title     = {Algorithms for non-Hanan-based optimization for {VLSI} interconnectunder
               a higher-order {AWE} model},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {4},
  pages     = {446--458},
  year      = {2000}
}
@article{DBLP:journals/tcad/HulgaardA00,
  author    = {Henrik Hulgaard and
               Tod Amon},
  title     = {Symbolic timing analysis of asynchronous systems},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1093--1104},
  year      = {2000}
}
@article{DBLP:journals/tcad/HurJL00,
  author    = {Sung{-}Woo Hur and
               Ashok Jagannathan and
               John Lillis},
  title     = {Timing-driven maze routing},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {2},
  pages     = {234--241},
  year      = {2000}
}
@article{DBLP:journals/tcad/IsmailFN00,
  author    = {Yehea I. Ismail and
               Eby G. Friedman and
               Jos{\'{e}} Luis Neves},
  title     = {Equivalent Elmore delay for {RLC} trees},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {83--97},
  year      = {2000}
}
@article{DBLP:journals/tcad/Jess00,
  author    = {Jochen A. G. Jess},
  title     = {Designing electronic engines with electronic engines: 40 years ofbootstrapping
               of a technology upon itself},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1404--1427},
  year      = {2000}
}
@article{DBLP:journals/tcad/JiangCJ00,
  author    = {Iris Hui{-}Ru Jiang and
               Yao{-}Wen Chang and
               Jing{-}Yang Jou},
  title     = {Crosstalk-driven interconnect optimization by simultaneous gate andwire
               sizing},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {999--1010},
  year      = {2000}
}
@article{DBLP:journals/tcad/JiangV00,
  author    = {Wanli Jiang and
               Bapiraju Vinnakota},
  title     = {{IC} test using the energy consumption ratio},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {129--141},
  year      = {2000}
}
@article{DBLP:journals/tcad/KarnRKRSSP00,
  author    = {T. Karn and
               Shishpal Rawat and
               Desmond Kirkpatrick and
               Rabindra K. Roy and
               Greg Spirakis and
               Naveed A. Sherwani and
               Craig Peterson},
  title     = {{EDA} challenges facing future microprocessor design},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1498--1506},
  year      = {2000}
}
@article{DBLP:journals/tcad/KasamsettyKS00,
  author    = {Kishore Kasamsetty and
               Mahesh Ketkar and
               Sachin S. Sapatnekar},
  title     = {A new class of convex functions for delay modeling and itsapplication
               to the transistor sizing problem {[CMOS} gates]},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {7},
  pages     = {779--788},
  year      = {2000}
}
@article{DBLP:journals/tcad/KeutzerNRS00,
  author    = {Kurt Keutzer and
               A. Richard Newton and
               Jan M. Rabaey and
               Alberto L. Sangiovanni{-}Vincentelli},
  title     = {System-level design: orthogonalization of concerns andplatform-based
               design},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1523--1543},
  year      = {2000}
}
@article{DBLP:journals/tcad/KimU00,
  author    = {Taewhan Kim and
               Junhyung Um},
  title     = {A practical approach to the synthesis of arithmetic circuits usingcarry-save-adders},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {615--624},
  year      = {2000}
}
@article{DBLP:journals/tcad/KimZ00,
  author    = {Haksu Kim and
               Dian Zhou},
  title     = {Efficient implementation of a planar clock routing with thetreatment
               of obstacles},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1220--1225},
  year      = {2000}
}
@article{DBLP:journals/tcad/KosikFHPS00,
  author    = {Robert Kosik and
               Peter Fleischmann and
               Bernhard Haindl and
               Paola Pietra and
               Siegfried Selberherr},
  title     = {On the interplay between meshing and discretization inthree-dimensional
               diffusion simulation},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1233--1240},
  year      = {2000}
}
@article{DBLP:journals/tcad/KoyamaUAKT00,
  author    = {Akio Koyama and
               Makio Uchida and
               Tatsuhiro Aida and
               Jun'ya Kudo and
               Masatoshi Tsuge},
  title     = {Switching well noise modeling and minimization strategy for digitalcircuits
               with a controllable threshold voltage scheme},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {6},
  pages     = {654--670},
  year      = {2000}
}
@article{DBLP:journals/tcad/KundertCJLMS00,
  author    = {Kenneth S. Kundert and
               Henry Chang and
               Dan Jefferies and
               Gilles Lamant and
               Enrico Malavasi and
               Fred Sendig},
  title     = {Design of mixed-signal systems-on-a-chip},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1561--1571},
  year      = {2000}
}
@article{DBLP:journals/tcad/LakshminarayanaRJ00,
  author    = {Ganesh Lakshminarayana and
               Anand Raghunathan and
               Niraj K. Jha},
  title     = {Incorporating speculative execution into scheduling ofcontrol-flow-intensive
               designs},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {308--324},
  year      = {2000}
}
@article{DBLP:journals/tcad/Lin00,
  author    = {Ming{-}Bo Lin},
  title     = {On the design of fast large fan-in {CMOS} multiplexers},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {8},
  pages     = {963--967},
  year      = {2000}
}
@article{DBLP:journals/tcad/LinJ00,
  author    = {Hen{-}Ming Lin and
               Jing{-}Yang Jou},
  title     = {On computing the minimum feedback vertex set of a directed graph bycontraction
               operations},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {295--307},
  year      = {2000}
}
@article{DBLP:journals/tcad/LinSW00,
  author    = {Bin{-}Hong Lin and
               Shao{-}Hui Shieh and
               Cheng{-}Wen Wu},
  title     = {A fast signature computation algorithm for {LFSR} and {MISR}},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {1031--1040},
  year      = {2000}
}
@article{DBLP:journals/tcad/LinW00,
  author    = {Kun{-}Jin Lin and
               Cheng{-}Wen Wu},
  title     = {Testing content-addressable memories using functional fault modelsand
               march-like algorithms},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {577--588},
  year      = {2000}
}
@article{DBLP:journals/tcad/LiuHML00,
  author    = {Tong Liu and
               Wei{-}Kang Huang and
               Fred J. Meyer and
               Fabrizio Lombardi},
  title     = {Testing and testable designs for one-time programmable FPGAs},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1370--1375},
  year      = {2000}
}
@article{DBLP:journals/tcad/MacMillenCHW00,
  author    = {Don MacMillen and
               Raul Camposano and
               Dwight D. Hill and
               Thomas W. Williams},
  title     = {An industrial view of electronic design automation},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1428--1448},
  year      = {2000}
}
@article{DBLP:journals/tcad/MandoiuVG00,
  author    = {Ion I. Mandoiu and
               Vijay V. Vazirani and
               Joseph L. Ganley},
  title     = {A new heuristic for rectilinear Steiner trees},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1129--1139},
  year      = {2000}
}
@article{DBLP:journals/tcad/MasoumiES00,
  author    = {Nasser Masoumi and
               Mohamed I. Elmasry and
               Safieddin Safavi{-}Naeini},
  title     = {Fast and efficient parametric modeling of contact-to-substratecoupling},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1282--1292},
  year      = {2000}
}
@article{DBLP:journals/tcad/MeinelST00,
  author    = {Christoph Meinel and
               Fabio Somenzi and
               Thorsten Theobald},
  title     = {Linear sifting of decision diagrams and its application insynthesis},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {521--533},
  year      = {2000}
}
@article{DBLP:journals/tcad/MrugalskiRT00,
  author    = {Grzegorz Mrugalski and
               Janusz Rajski and
               Jerzy Tyszer},
  title     = {Cellular automata-based test pattern generators with phase shifters},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {8},
  pages     = {878--893},
  year      = {2000}
}
@article{DBLP:journals/tcad/MukherjeeCR00,
  author    = {Tamal Mukherjee and
               L. Richard Carley and
               Rob A. Rutenbar},
  title     = {Efficient handling of operating range and manufacturing linevariations
               in analog cell synthesis},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {8},
  pages     = {825--839},
  year      = {2000}
}
@article{DBLP:journals/tcad/MukherjeeFRW00,
  author    = {Tamal Mukherjee and
               Gary K. Fedder and
               Deepak Ramaswamy and
               Jacob K. White},
  title     = {Emerging simulation approaches for micromachined devices},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {12},
  pages     = {1572--1589},
  year      = {2000}
}
@article{DBLP:journals/tcad/NagataNMI00,
  author    = {Makoto Nagata and
               Jin Nagai and
               Takashi Morie and
               Atsushi Iwata},
  title     = {Measurements and analyses of substrate noise waveform inmixed-signal
               {IC} environment},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {6},
  pages     = {671--678},
  year      = {2000}
}
@article{DBLP:journals/tcad/NguyenDNW00,
  author    = {Tuyen V. Nguyen and
               Anirudh Devgan and
               Ognen J. Nastov and
               David W. Winston},
  title     = {Transient sensitivity computation in controlled explicit piecewiselinear
               simulation},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {98--110},
  year      = {2000}
}
@article{DBLP:journals/tcad/NicoliciABW00,
  author    = {Nicola Nicolici and
               Bashir M. Al{-}Hashimi and
               Andrew D. Brown and
               Alan Christopher Williams},
  title     = {{BIST} hardware synthesis for {RTL} data paths based on testcompatibility
               classes},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1375--1385},
  year      = {2000}
}
@article{DBLP:journals/tcad/NikolaidisKK00,
  author    = {Spiridon Nikolaidis and
               E. Karaolis and
               Efstathios D. Kyriakis{-}Bitzaros},
  title     = {Estimation of signal transition activity in {FIR} filters implementedby
               a {MAC} architecture},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {164--169},
  year      = {2000}
}
@article{DBLP:journals/tcad/NoseS00,
  author    = {Koichi Nose and
               Takayasu Sakurai},
  title     = {Analysis and future trend of short-circuit power},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {1023--1030},
  year      = {2000}
}
@article{DBLP:journals/tcad/OConnorK00,
  author    = {Ian O'Connor and
               Andreas Kaiser},
  title     = {Automated synthesis of current-memory cells},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {4},
  pages     = {413--424},
  year      = {2000}
}
@article{DBLP:journals/tcad/Oh00,
  author    = {Kyung Suk Oh},
  title     = {Accurate transient simulation of transmission lines with the skineffect},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {389--396},
  year      = {2000}
}
@article{DBLP:journals/tcad/PacelliML00,
  author    = {Andrea Pacelli and
               Marco Mastrapasqua and
               Serge Luryi},
  title     = {Generation of equivalent circuits from physics-based devicesimulation},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1241--1250},
  year      = {2000}
}
@article{DBLP:journals/tcad/ParkDD00,
  author    = {Seungjoon Park and
               Satyaki Das and
               David L. Dill},
  title     = {Automatic checking of aggregation abstractions through stateenumeration},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1202--1210},
  year      = {2000}
}
@article{DBLP:journals/tcad/PaulCP00,
  author    = {Debjyoti Paul and
               Mitrajit Chatterjee and
               Dhiraj K. Pradhan},
  title     = {{VERILAT:} verification using logic augmentation and transformations},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {1041--1051},
  year      = {2000}
}
@article{DBLP:journals/tcad/PhelpsKRCH00,
  author    = {Rodney Phelps and
               Michael Krasnicki and
               Rob A. Rutenbar and
               L. Richard Carley and
               James R. Hellums},
  title     = {Anaconda: simulation-based synthesis of analog circuits viastochastic
               pattern search},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {6},
  pages     = {703--717},
  year      = {2000}
}
@article{DBLP:journals/tcad/PistoriusLM00,
  author    = {Joachim Pistorius and
               Edm{\'{e}}e Legai and
               Michel Minoux},
  title     = {PartGen: a generator of very large circuits to benchmark thepartitioning
               of FPGAs},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1314--1321},
  year      = {2000}
}
@article{DBLP:journals/tcad/PomeranzR00,
  author    = {Irith Pomeranz and
               Sudhakar M. Reddy},
  title     = {On n-detection test sets and variable n-detection test sets fortransition
               faults},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {372--383},
  year      = {2000}
}
@article{DBLP:journals/tcad/PomeranzR00a,
  author    = {Irith Pomeranz and
               Sudhakar M. Reddy},
  title     = {A diagnostic test generation procedure based on test elimination byvector
               omission for synchronous sequential circuits},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {589--600},
  year      = {2000}
}
@article{DBLP:journals/tcad/PomeranzR00b,
  author    = {Irith Pomeranz and
               Sudhakar M. Reddy},
  title     = {On synchronizable circuits and their synchronizing sequences},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {1086--1092},
  year      = {2000}
}
@article{DBLP:journals/tcad/PotkonjakR00,
  author    = {Miodrag Potkonjak and
               Jan M. Rabaey},
  title     = {Maximally and arbitrarily fast implementation of linear andfeedback
               linear computations},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {30--43},
  year      = {2000}
}
@article{DBLP:journals/tcad/RaghunathanRL00,
  author    = {Vijay Raghunathan and
               Srivaths Ravi and
               Ganesh Lakshminarayana},
  title     = {Integrating variable-latency components into high-level synthesis},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1105--1117},
  year      = {2000}
}
@article{DBLP:journals/tcad/RajskiTT00,
  author    = {Janusz Rajski and
               Nagesh Tamarapalli and
               Jerzy Tyszer},
  title     = {Automated synthesis of phase shifters for built-in self-testapplications},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {10},
  pages     = {1175--1188},
  year      = {2000}
}
@article{DBLP:journals/tcad/RaviLJ00,
  author    = {Srivaths Ravi and
               Ganesh Lakshminarayana and
               Niraj K. Jha},
  title     = {{TAO-BIST:} {A} framework for testability analysis and optimization
               forbuilt-in self-test of {RTL} circuits},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {8},
  pages     = {894--906},
  year      = {2000}
}
@article{DBLP:journals/tcad/SalehHRO00,
  author    = {Resve A. Saleh and
               Syed Zakir Hussain and
               Steffen Rochel and
               David Overhauser},
  title     = {Clock skew verification in the presence of IR-drop in the powerdistribution
               network},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {6},
  pages     = {635--644},
  year      = {2000}
}
@article{DBLP:journals/tcad/Sapatnekar00,
  author    = {Sachin S. Sapatnekar},
  title     = {A timing model incorporating the effect of crosstalk on delay andits
               application to optimal channel routing},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {550--559},
  year      = {2000}
}
@article{DBLP:journals/tcad/SaxenaL00,
  author    = {Prashant Saxena and
               C. L. Liu},
  title     = {A postprocessing algorithm for crosstalk-driven wire perturbation},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {6},
  pages     = {691--702},
  year      = {2000}
}
@article{DBLP:journals/tcad/ScheinbergP00,
  author    = {Norman Scheinberg and
               Aleksey Pinkhasov},
  title     = {A computer simulation model for simulating distortion in FETresistors},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {981--989},
  year      = {2000}
}
@article{DBLP:journals/tcad/ShenJ00,
  author    = {Zhao{-}Xuan Shen and
               Ching Chuen Jong},
  title     = {Functional area lower bound and upper bound on multicomponentselection
               for interval scheduling},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {7},
  pages     = {745--759},
  year      = {2000}
}
@article{DBLP:journals/tcad/ShepardT00,
  author    = {Kenneth L. Shepard and
               Zhong Tian},
  title     = {Return-limited inductances: a practical approach to on-chipinductance
               extraction},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {4},
  pages     = {425--436},
  year      = {2000}
}
@article{DBLP:journals/tcad/ShiT00,
  author    = {C.{-}J. Richard Shi and
               Sheldon X.{-}D. Tan},
  title     = {Canonical symbolic analysis of large analog circuits withdeterminant
               decision diagrams},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {1},
  pages     = {1--18},
  year      = {2000}
}
@article{DBLP:journals/tcad/SivaramanS00,
  author    = {Mukund Sivaraman and
               Andrzej J. Strojwas},
  title     = {Primitive path delay faults: identification and their use in timinganalysis},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {11},
  pages     = {1347--1362},
  year      = {2000}
}
@article{DBLP:journals/tcad/SongTZW00,
  author    = {Xiaoyu Song and
               Qian{-}Yu Tang and
               Dian Zhou and
               Yuke Wang},
  title     = {Wire space estimation and routability analysis},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {5},
  pages     = {624--628},
  year      = {2000}
}
@article{DBLP:journals/tcad/StenzRRJ00,
  author    = {Guenter Stenz and
               Bernhard M. Riess and
               Bernhard Rohfleisch and
               Frank M. Johannes},
  title     = {Performance optimization by interacting netlist transformations andplacement},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {3},
  pages     = {350--358},
  year      = {2000}
}
@article{DBLP:journals/tcad/StrehlT00,
  author    = {Karsten Strehl and
               Lothar Thiele},
  title     = {Interval diagrams for efficient symbolic verification of processnetworks},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {8},
  pages     = {939--956},
  year      = {2000}
}
@article{DBLP:journals/tcad/StroobandtVC00,
  author    = {Dirk Stroobandt and
               Peter Verplaetse and
               Jan M. Van Campenhout},
  title     = {Generating synthetic benchmark circuits for evaluating {CAD} tools},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {9},
  pages     = {1011--1022},
  year      = {2000}
}
@article{DBLP:journals/tcad/SuC00,
  author    = {Chauchin Su and
               Yue{-}Tsang Chen},
  title     = {Intrinsic response extraction for the removal of the parasiticeffects
               in analog test buses},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {4},
  pages     = {437--445},
  year      = {2000}
}
@article{DBLP:journals/tcad/SylvesterK00,
  author    = {Dennis Sylvester and
               Kurt Keutzer},
  title     = {A global wiring paradigm for deep submicron design},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {2},
  pages     = {242--252},
  year      = {2000}
}
@article{DBLP:journals/tcad/TafertshoferGA00,
  author    = {Paul Tafertshofer and
               Andreas Ganz and
               Kurt Antreich},
  title     = {IGRAINE-an Implication GRaph-bAsed engINE for fast implication, justification,
               and propagation},
  journal   = {{IEEE} Trans. on {CAD} of Integrated Circuits and Systems},
  volume    = {19},
  number    = {8},
  pages     = {907--927},
  year      = {2000}
}
@article{DBLP:journals/tcad/TanS00,
  author    = {Sheldon X.{-}D. Tan and
               C.{-}J. Richard Shi},
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@article{DBLP:journals/tcad/TarafdarL00,
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@article{DBLP:journals/tcad/TsaiCB00,
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@article{DBLP:journals/tcad/TsaiK00,
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@article{DBLP:journals/tcad/WakabayashiO00,
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