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@inproceedings{DBLP:conf/memsys/0001MSDWW18, author = {Matthias Jung and Sally A. McKee and Chirag Sudarshan and Christoph Dropmann and Christian Weis and Norbert Wehn}, editor = {Bruce L. Jacob}, title = {Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {377--386}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240322}, doi = {10.1145/3240302.3240322}, timestamp = {Sun, 25 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/0001MSDWW18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/AkinCPHA18, author = {Berkin Akin and Chiachen Chou and Jongsoo Park and Christopher J. Hughes and Rajat Agarwal}, editor = {Bruce L. Jacob}, title = {Dynamic fine-grained sparse memory accesses}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {85--97}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240416}, doi = {10.1145/3240302.3240416}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/AkinCPHA18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/AlameldeenA18, author = {Alaa R. Alameldeen and Rajat Agarwal}, editor = {Bruce L. Jacob}, title = {Opportunistic compression for direct-mapped {DRAM} caches}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {129--136}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240429}, doi = {10.1145/3240302.3240429}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/AlameldeenA18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/AndersonGGAB18, author = {Erik F. Anderson and Jorge Gonz{\'{a}}lez and Alexander Gazman and Rodolfo Azevedo and Keren Bergman}, editor = {Bruce L. Jacob}, title = {Optically connected and reconfigurable {GPU} architecture for optimized peer-to-peer access}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {257--258}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240418}, doi = {10.1145/3240302.3240418}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/AndersonGGAB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/ArafaBCSE18, author = {Yehia Arafa and Abdel{-}Hameed A. Badawy and Gopinath Chennupati and Nandakishore Santhi and Stephan J. Eidenbenz}, editor = {Bruce L. Jacob}, title = {{PPT-GPU:} performance prediction toolkit for GPUs identifying the impact of caches: extended abstract}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {301--302}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3270315}, doi = {10.1145/3240302.3270315}, timestamp = {Sun, 25 Oct 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/ArafaBCSE18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/BrownWRINSB18, author = {Dane Brown and T. Owens Walker and Ryan N. Rakvic and Robert W. Ives and Hau T. Ngo and James Shey and Justin A. Blanco}, editor = {Bruce L. Jacob}, title = {Towards detection of modified firmware on solid state drives via side channel analysis}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {315--320}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3285860}, doi = {10.1145/3240302.3285860}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/BrownWRINSB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/BrunieJCB18, author = {Hugo Brunie and Julien Jaeger and Patrick Carribault and Denis Barthou}, editor = {Bruce L. Jacob}, title = {Profile-guided scope-based data allocation method}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {169--182}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240313}, doi = {10.1145/3240302.3240313}, timestamp = {Sun, 06 Aug 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/BrunieJCB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/BurnettCLHVHH18, author = {Randall Burnett and Ryan Clarke and Timothy Lee and Harold Hearne and Jacob Vogel and Quentin Herr and Anna Herr}, editor = {Bruce L. Jacob}, title = {Demonstration of superconducting memory for an {RQL} {CPU}}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {321--323}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3270313}, doi = {10.1145/3240302.3270313}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/BurnettCLHVHH18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/ButkoCDFS18, author = {Anastasiia Butko and Albert Chen and David Donofrio and Farzad Fatollahi{-}Fard and John Shalf}, editor = {Bruce L. Jacob}, title = {Open2C: open-source generator for exploration of coherent cache memory subsystems}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {311--317}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3270314}, doi = {10.1145/3240302.3270314}, timestamp = {Fri, 09 Apr 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/ButkoCDFS18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/DuL18, author = {Xiaoming Du and Cong Li}, editor = {Bruce L. Jacob}, title = {Memory failure prediction using online learning}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {38--49}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240309}, doi = {10.1145/3240302.3240309}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/DuL18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/EdwardsV18, author = {James Alexander Edwards and Uzi Vishkin}, editor = {Bruce L. Jacob}, title = {Linking parallel algorithmic thinking to many-core memory systems and speedups for boosted decision trees}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {161--168}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240321}, doi = {10.1145/3240302.3240321}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/EdwardsV18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/Francis-MezgerW18, author = {Pascal Francis{-}Mezger and Vincent M. Weaver}, editor = {Bruce L. Jacob}, title = {A raspberry pi operating system for exploring advanced memory system concepts}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {354--364}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240311}, doi = {10.1145/3240302.3240311}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/Francis-MezgerW18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/GangulySMF18, author = {Antara Ganguly and Virendra Singh and Rajeev Muralidhar and Masahiro Fujita}, editor = {Bruce L. Jacob}, title = {Memory-system requirements for convolutional neural networks}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {291--197}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240427}, doi = {10.1145/3240302.3240427}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/GangulySMF18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/GilesDV18, author = {Ellis Giles and Kshitij A. Doshi and Peter J. Varman}, editor = {Bruce L. Jacob}, title = {Hardware transactional persistent memory}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {190--205}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240305}, doi = {10.1145/3240302.3240305}, timestamp = {Sun, 29 Aug 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/GilesDV18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/HuBSLWW18, author = {Jingyuan Hu and Xiaokuang Bai and Sai Sha and Yingwei Luo and Xiaolin Wang and Zhenlin Wang}, editor = {Bruce L. Jacob}, title = {{HUB:} hugepage ballooning in kernel-based virtual machines}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {31--37}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240420}, doi = {10.1145/3240302.3240420}, timestamp = {Fri, 14 Aug 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/HuBSLWW18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/JagasivamaniWSK18, author = {Meenatchi Jagasivamani and Candace Walden and Devesh Singh and Luyi Kang and Shang Li and Mehdi Asnaashari and Sylvain Dubois and Bruce L. Jacob and Donald Yeung}, editor = {Bruce L. Jacob}, title = {Memory-systems challenges in realizing monolithic computers}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {98--104}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240426}, doi = {10.1145/3240302.3240426}, timestamp = {Fri, 13 Nov 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/JagasivamaniWSK18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/JokarZC18, author = {Mohammad Reza Jokar and Lunkai Zhang and Frederic T. Chong}, editor = {Bruce L. Jacob}, title = {Cooperative {NV-NUMA:} prolonging non-volatile memory lifetime through bandwidth sharing}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {67--78}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240308}, doi = {10.1145/3240302.3240308}, timestamp = {Sat, 09 Apr 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/JokarZC18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/KraftMS0WWL18, author = {Kira Kraft and Deepak M. Mathew and Chirag Sudarshan and Matthias Jung and Christian Weis and Norbert Wehn and Florian Longnos}, editor = {Bruce L. Jacob}, title = {Efficient coding scheme for {DDR4} memory subsystems}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {148--157}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240424}, doi = {10.1145/3240302.3240424}, timestamp = {Sun, 25 Jul 2021 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/KraftMS0WWL18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/Leidel18, author = {John D. Leidel}, editor = {Bruce L. Jacob}, title = {Stake: a coupled simulation environment for {RISC-V} memory experiments}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {365--376}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240307}, doi = {10.1145/3240302.3240307}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/Leidel18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/LeonH18, author = {Edgar A. Le{\'{o}}n and Matthieu Hautreux}, editor = {Bruce L. Jacob}, title = {Achieving transparency mapping parallel applications: a memory hierarchy affair}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {185--189}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240316}, doi = {10.1145/3240302.3240316}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/LeonH18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/LiDLWX18, author = {Gushu Li and Guohao Dai and Shuangchen Li and Yu Wang and Yuan Xie}, editor = {Bruce L. Jacob}, title = {GraphIA: an in-situ accelerator for large-scale graph processing}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {79--84}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240312}, doi = {10.1145/3240302.3240312}, timestamp = {Wed, 22 May 2019 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/LiDLWX18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/LiRJ18, author = {Shang Li and Dhiraj Reddy and Bruce L. Jacob}, editor = {Bruce L. Jacob}, title = {A performance {\&} power comparison of modern high-speed {DRAM} architectures}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {341--353}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240315}, doi = {10.1145/3240302.3240315}, timestamp = {Fri, 13 Nov 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/LiRJ18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/LieskeBF18, author = {Tobias Lieske and Mehrdad Biglari and Dietmar Fey}, editor = {Bruce L. Jacob}, title = {Multi-level memristive voltage divider: programming scheme trade-offs}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {259--268}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240430}, doi = {10.1145/3240302.3240430}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/LieskeBF18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/LloydG18, author = {G. Scott Lloyd and Maya B. Gokhale}, editor = {Bruce L. Jacob}, title = {Design space exploration of near memory accelerators}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {218--220}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240428}, doi = {10.1145/3240302.3240428}, timestamp = {Mon, 20 Apr 2020 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/LloydG18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/LuoCLLDS18, author = {Hao Luo and Guoyang Chen and Fangzhou Liu and Pengcheng Li and Chen Ding and Xipeng Shen}, editor = {Bruce L. Jacob}, title = {Footprint modeling of cache associativity and granularity}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {232--242}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240419}, doi = {10.1145/3240302.3240419}, timestamp = {Tue, 21 Mar 2023 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/LuoCLLDS18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/MakraniSDRH18, author = {Hosein Mohammadi Makrani and Hossein Sayadi and Sai Manoj Pudukotai Dinakarrao and Setareh Rafatirad and Houman Homayoun}, editor = {Bruce L. Jacob}, title = {A comprehensive memory analysis of data intensive workloads on server class architecture}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {19--30}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240320}, doi = {10.1145/3240302.3240320}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/MakraniSDRH18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/MiucinF18, author = {Svetozar Miucin and Alexandra Fedorova}, editor = {Bruce L. Jacob}, title = {Data-driven spatial locality}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {243--253}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240417}, doi = {10.1145/3240302.3240417}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/MiucinF18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/OhKALDM18, author = {Byoungchan Oh and Nam Sung Kim and Jeongseob Ahn and Bingchao Li and Ronald G. Dreslinski and Trevor N. Mudge}, editor = {Bruce L. Jacob}, title = {A load balancing technique for memory channels}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {55--66}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240306}, doi = {10.1145/3240302.3240306}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/OhKALDM18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/SrikanthSSCW18, author = {Sriseshan Srikanth and Lavanya Subramanian and Sreenivas Subramoney and Thomas M. Conte and Hong Wang}, editor = {Bruce L. Jacob}, title = {Tackling memory access latency through {DRAM} row management}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {137--147}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240314}, doi = {10.1145/3240302.3240314}, timestamp = {Tue, 06 Aug 2024 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/SrikanthSSCW18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/UstiugovDPSBFP18, author = {Dmitrii Ustiugov and Alexandros Daglis and Javier Picorel and Mark Sutherland and Edouard Bugnion and Babak Falsafi and Dionisios N. Pnevmatikatos}, editor = {Bruce L. Jacob}, title = {Design guidelines for high-performance {SCM} hierarchies}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {3--16}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240310}, doi = {10.1145/3240302.3240310}, timestamp = {Wed, 07 Dec 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/UstiugovDPSBFP18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/VerdejoARRAJ18, author = {Rommel S{\'{a}}nchez Verdejo and Kazi Asifuzzaman and Milan Radulovic and Petar Radojkovic and Eduard Ayguad{\'{e}} and Bruce L. Jacob}, editor = {Bruce L. Jacob}, title = {Main memory latency simulation: the missing link}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {107--116}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240317}, doi = {10.1145/3240302.3240317}, timestamp = {Fri, 13 Nov 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/VerdejoARRAJ18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/WangD18, author = {William Wang and Stephan Diestelhorst}, editor = {Bruce L. Jacob}, title = {Quantify the performance overheads of {PMDK}}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {50--52}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240423}, doi = {10.1145/3240302.3240423}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/WangD18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/WareBGHHJLMWWHB18, author = {Frederick A. Ware and Javier Bueno and Liji Gopalakrishnan and Brent Haukness and Chris Haywood and Toni Juan and Eric Linstadt and Sally A. McKee and Steven C. Woo and Kenneth L. Wright and Craig Hampel and Gary Bronner}, editor = {Bruce L. Jacob}, title = {Architecting a hardware-managed hybrid {DIMM} optimized for cost/performance}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {327--340}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240303}, doi = {10.1145/3240302.3240303}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/WareBGHHJLMWWHB18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/WernerFPY18, author = {Sebastian Werner and Pouya Fotouhi and Roberto Proietti and S. J. Ben Yoo}, editor = {Bruce L. Jacob}, title = {AWGR-based optical processor-to-memory communication for low-latency, low-energy vault accesses}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {269--278}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240318}, doi = {10.1145/3240302.3240318}, timestamp = {Thu, 15 Feb 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/WernerFPY18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/X18, editor = {Bruce L. Jacob}, title = {High-level synthesis for irregular applications: enabling temporally multithreaded accelerators}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {183--184}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240421}, doi = {10.1145/3240302.3240421}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/X18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/YanJ18, author = {Chao Yan and Russ Joseph}, editor = {Bruce L. Jacob}, title = {Cocoa: synergistic cache compression and error correction in capacity sensitive last level caches}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {117--128}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240304}, doi = {10.1145/3240302.3240304}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/YanJ18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/YangZS18, author = {Zhiyuan Yang and Michael Zuzak and Ankur Srivastava}, editor = {Bruce L. Jacob}, title = {HMCTherm: a cycle-accurate {HMC} simulator integrated with detailed power and thermal simulation}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {209--117}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240319}, doi = {10.1145/3240302.3240319}, timestamp = {Thu, 17 Nov 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/YangZS18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/ZhangYLGD18, author = {Zhizhou Zhang and Chencheng Ye and Rahman Lavaee and Ning Gu and Chen Ding}, editor = {Bruce L. Jacob}, title = {Fine-grained data usage analysis by access sampling: seeing the data that is not there}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {221--231}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240425}, doi = {10.1145/3240302.3240425}, timestamp = {Sat, 30 Sep 2023 01:00:00 +0200}, biburl = {https://dblp.org/rec/conf/memsys/ZhangYLGD18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@inproceedings{DBLP:conf/memsys/ZhaoZ18, author = {Hengyu Zhao and Jishen Zhao}, editor = {Bruce L. Jacob}, title = {Leveraging {MLC} {STT-RAM} for energy-efficient {CNN} training}, booktitle = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, pages = {279--290}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302.3240422}, doi = {10.1145/3240302.3240422}, timestamp = {Sat, 05 Jan 2019 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/ZhaoZ18.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/memsys/2018, editor = {Bruce L. Jacob}, title = {Proceedings of the International Symposium on Memory Systems, {MEMSYS} 2018, Old Town Alexandria, VA, USA, October 01-04, 2018}, publisher = {{ACM}}, year = {2018}, url = {https://doi.org/10.1145/3240302}, doi = {10.1145/3240302}, isbn = {978-1-4503-6475-1}, timestamp = {Fri, 13 Nov 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/conf/memsys/2018.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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