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@inproceedings{DBLP:conf/vlsid/AdhikariDGP12,
author = {Sumit Adhikari and
Markus Damm and
Christoph Grimm and
Fran{\c{c}}ois P{\^{e}}cheux},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T1:} Design of Mixed-Signal Systems using SystemC {AMS}
Extensions},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {11--12},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.28},
doi = {10.1109/VLSID.2012.28},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AdhikariDGP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AgarwalK12,
author = {Tarun Kumar Agarwal and
Mamidala Jagadesh Kumar},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Modeling of Partially Depleted {SOI} DEMOSFETs with a Sub-circuit
Utilizing the HiSIM-HV Compact Model},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {406--411},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.105},
doi = {10.1109/VLSID.2012.105},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AgarwalK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AggarwalK12,
author = {Supriya Aggarwal and
Kavita Khare},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Hardware Efficient Architecture for Generating Sine/Cosine Waves},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {57--61},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.46},
doi = {10.1109/VLSID.2012.46},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AggarwalK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Agrawal12,
author = {Vishwani D. Agrawal},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Keynote Talk: {A} History of the {VLSI} Design Conference},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {1--2},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.23},
doi = {10.1109/VLSID.2012.23},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Agrawal12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Ahuja12,
author = {Jaswinder S. Ahuja},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Keynote Talk: Semiconductor Industry: Best of Times, Worst of Times,
and Nowhere Else {I} Would Rather Be!},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {3--4},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.24},
doi = {10.1109/VLSID.2012.24},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Ahuja12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ArrawatiaDKBK12,
author = {Mahima Arrawatia and
Varish Diddi and
Harsha Kochar and
Maryam Shojaei Baghini and
Girish Kumar},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {An Integrated {CMOS} {RF} Energy Harvester with Differential Microstrip
Antenna and On-Chip Charger},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {209--214},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.72},
doi = {10.1109/VLSID.2012.72},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ArrawatiaDKBK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/AtienzaS12,
author = {David Atienza and
Arvind Sridhar},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T7A:} New Modeling Methodologies for Thermal Analysis of
3D ICs and Advanced Cooling Technologies of the Future},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {25--26},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.34},
doi = {10.1109/VLSID.2012.34},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/AtienzaS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BBB12,
author = {B. Kameswara Rao and
Muralidhar Reddy B. and
Ravi Kishore B.},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T8B:} Wireless System Design and Systems Engineering Challenges},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {29--30},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.37},
doi = {10.1109/VLSID.2012.37},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BBB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BanerjeeG12,
author = {Somnath Banerjee and
Tushar Gupta},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Efficient Online {RTL} Debugging Methodology for Logic Emulation Systems},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {298--303},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.87},
doi = {10.1109/VLSID.2012.87},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BanerjeeG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BanerjeeSDC12,
author = {Debashis Banerjee and
Shreyas Sen and
Shyam Kumar Devarakond and
Abhijit Chatterjee},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Power Aware Post-Manufacture Tuning of {MIMO} Receiver Systems},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {143--148},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.61},
doi = {10.1109/VLSID.2012.61},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BanerjeeSDC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/BordoloiSNCEP12,
author = {Unmesh D. Bordoloi and
Bharath Suri and
Swaroop Nunna and
Samarjit Chakraborty and
Petru Eles and
Zebo Peng},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Customizing Instruction Set Extensible Reconfigurable Processors Using
GPUs},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {418--423},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.107},
doi = {10.1109/VLSID.2012.107},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/BordoloiSNCEP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChablozH12,
author = {Jean{-}Michel Chabloz and
Ahmed Hemani},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Low-Latency No-Handshake {GALS} Interfaces for Fast-Receiver Links},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {191--196},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.69},
doi = {10.1109/VLSID.2012.69},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChablozH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Chakrabarti12,
author = {Pinaki Chakrabarti},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Clock Tree Skew Minimization with Structured Routing},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {233--237},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.76},
doi = {10.1109/VLSID.2012.76},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Chakrabarti12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Chakraborty12,
author = {Samarjit Chakraborty},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Keynote Talk: Challenges in Automotive Cyber-physical Systems Design},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {9--10},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.27},
doi = {10.1109/VLSID.2012.27},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Chakraborty12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChattarajD12,
author = {Nilanjan Chattaraj and
Anindya Sundar Dhar},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Random Access Analog Memory {(RA2M)} for Video Signal Application},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {39--44},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.43},
doi = {10.1109/VLSID.2012.43},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChattarajD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ChaudhuriMJ12,
author = {Sourindra Chaudhuri and
Prateek Mishra and
Niraj K. Jha},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Accurate Leakage Estimation for FinFET Standard Cells Using the Response
Surface Methodology},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {238--244},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.77},
doi = {10.1109/VLSID.2012.77},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ChaudhuriMJ12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DamM12,
author = {Samiran Dam and
Pradip Mandal},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Iterative Performance Model Upgradation in Geometric Programming Based
Analog Circuit Sizing for Improved Design Accuracy},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {376--381},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.100},
doi = {10.1109/VLSID.2012.100},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DamM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DamodaranAAVGGHCBBTBRMPMOTGOMFRNWHPS12,
author = {Raguram Damodaran and
Timothy Anderson and
Sanjive Agarwala and
Rama Venkatasubramanian and
Michael Gill and
Dhileep Gopalakrishnan and
Anthony M. Hill and
Abhijeet Chachad and
Dheera Balasubramanian and
Naveen Bhoria and
Jonathan Tran and
Duc Bui and
Mujibur Rahman and
Shriram Moharil and
Matthew Pierson and
Steven Mullinnix and
Hung Ong and
David Thompson and
Krishna Gurram and
Oluleye Olorode and
Nuruddin Mahmood and
Jose Flores and
Arjun Rajagopal and
Soujanya Narnur and
Daniel Wu and
Alan Hales and
Kyle Peavy and
Robert Sussman},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A 1.25GHz 0.8W C66x {DSP} Core in 40nm {CMOS}},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {286--291},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.85},
doi = {10.1109/VLSID.2012.85},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DamodaranAAVGGHCBBTBRMPMOTGOMFRNWHPS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DattaRSR12,
author = {Kamalika Datta and
Gaurav Rathi and
Indranil Sengupta and
Hafizur Rahaman},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Synthesis of Reversible Circuits Using Heuristic Search Method},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {328--333},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.92},
doi = {10.1109/VLSID.2012.92},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DattaRSR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/DuttSGM12,
author = {Nikil D. Dutt and
Mani B. Srivastava and
Rajesh Gupta and
Subhasish Mitra},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T6:} Variability-resistant Software and Hardware for Nano-Scale
Computing},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {22--24},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.33},
doi = {10.1109/VLSID.2012.33},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/DuttSGM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GarimellaSF12,
author = {Annajirao Garimella and
Punith R. Surkanti and
Paul M. Furth},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Embedded Tutorial {ET1:} Pole-Zero Analysis of Low-Dropout {(LDO)}
Regulators: {A} Tutorial Overview},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {31--32},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.38},
doi = {10.1109/VLSID.2012.38},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GarimellaSF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GarimellaSF12a,
author = {Annajirao Garimella and
Punith R. Surkanti and
Paul M. Furth},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Pole-Zero Analysis of Low-Dropout {(LDO)} Regulators: {A} Tutorial
Overview},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {131--136},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.59},
doi = {10.1109/VLSID.2012.59},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GarimellaSF12a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GaritselovMK12,
author = {Oleg Garitselov and
Saraju P. Mohanty and
Elias Kougianos},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Fast-Accurate Non-Polynomial Metamodeling for Nano-CMOS {PLL} Design
Optimization},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {316--321},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.90},
doi = {10.1109/VLSID.2012.90},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GaritselovMK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GhoshDH12,
author = {Amitava Ghosh and
Isha Das and
Achintya Halder},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {An Energy Efficient Oscillator Frequency Calibration Methodology Using
Fraction Phase Computation},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {85--91},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.51},
doi = {10.1109/VLSID.2012.51},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GhoshDH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GhoshPB12,
author = {Anandaroop Ghosh and
Somnath Paul and
Swarup Bhunia},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Energy-Efficient Application Mapping in {FPGA} through Computation
in Embedded Memory Blocks},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {424--429},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.108},
doi = {10.1109/VLSID.2012.108},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/GhoshPB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GoelESRRCS12,
author = {Ankur Goel and
Donald Evans and
Richard Stephani and
Venkateswara Reddy and
Dharmendra Rai and
Veerabadra Chary and
N. Sathisha},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {An Area Efficient Diode and On Transistor Interchangeable Power Gating
Scheme with Trim Options for Low Power SRAMs},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {80--84},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.50},
doi = {10.1109/VLSID.2012.50},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GoelESRRCS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Gupta12,
author = {Rajesh Gupta},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Keynote Talk: The Variability Expeditions: Exploring the Software
Stack for Underdesigned Computing Machines},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {7--8},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.26},
doi = {10.1109/VLSID.2012.26},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Gupta12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/GuptaNB12,
author = {Nitin Gupta and
Tapas Nandy and
Phalguni Bala},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Self-Induced Supply Noise Reduction Technique in {GBPS} Rate Transmitters},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {92--95},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.52},
doi = {10.1109/VLSID.2012.52},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/GuptaNB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Gyselinckx12,
author = {Bert Gyselinckx},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Keynote Talk: {A} Wireless Sensor a Day Keeps the Doctor Away},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {5--6},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.25},
doi = {10.1109/VLSID.2012.25},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Gyselinckx12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HajimiriM12,
author = {Hadi Hajimiri and
Prabhat Mishra},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Intra-Task Dynamic Cache Reconfiguration},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {430--435},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.109},
doi = {10.1109/VLSID.2012.109},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/HajimiriM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HanumoluMF12,
author = {Pavan Kumar Hanumolu and
Un{-}Ku Moon and
Terri S. Fiez},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T5:} Advanced Analog-Mixed Signal System and Circuit Techniques},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {20--21},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.32},
doi = {10.1109/VLSID.2012.32},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HanumoluMF12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HatiB12,
author = {Manas Kumar Hati and
Tarun Kanti Bhattacharyya},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A 55-mW 300MS/s 8-bit {CMOS} Parallel Pipeline {ADC}},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {45--50},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.44},
doi = {10.1109/VLSID.2012.44},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HatiB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Hemmady12,
author = {Shankar Hemmady},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T7B:} Optimally Addressing Verification Constraint Complexity
for Effective Functional Convergence},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {27},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.35},
doi = {10.1109/VLSID.2012.35},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Hemmady12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/HonkoteMT12,
author = {Vinayak Honkote and
Ankit More and
Baris Taskin},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {3-D Parasitic Modeling for Rotary Interconnects},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {137--142},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.60},
doi = {10.1109/VLSID.2012.60},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/HonkoteMT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JainJVNP12,
author = {Arvind Jain and
Maheedhar Jalasutram and
Srinivas Vooka and
Prasun Nair and
Neeraj Pradhan},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {At-speed Testing of Asynchronous Reset De-assertion Faults},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {358--363},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.97},
doi = {10.1109/VLSID.2012.97},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/JainJVNP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/JanrajKWM12,
author = {C. J. Janraj and
T. Venkata Kalyan and
Tripti S. Warrier and
Madhu Mutyam},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Way Sharing Set Associative Cache Architecture},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {251--256},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.79},
doi = {10.1109/VLSID.2012.79},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/JanrajKWM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Joshi12,
author = {Ajay Joshi},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T8A:} Designing Silicon-Photonic Communication Networks
for Manycore Systems},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {28},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.36},
doi = {10.1109/VLSID.2012.36},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Joshi12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KagliwalB12,
author = {Ankit Kagliwal and
Shankar Balachandran},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Set-Cover Heuristics for Two-Level Logic Minimization},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {197--202},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.70},
doi = {10.1109/VLSID.2012.70},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KagliwalB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KapadiaP12,
author = {Nishit Ashok Kapadia and
Sudeep Pasricha},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Power Delivery Network Aware Framework for Synthesis of 3D Networks-on-Chip
with Multiple Voltage Islands},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {262--267},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.81},
doi = {10.1109/VLSID.2012.81},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KapadiaP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Kothamasu12,
author = {Siva Kothamasu},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Embedded Tutorial {ET3:} Packaging Trends, Die Package Co-Design Flow
and Challenges},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {35},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.40},
doi = {10.1109/VLSID.2012.40},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Kothamasu12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KumarC12,
author = {Saravana Kumar and
Shouri Chatterjee},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A 110-dB Dynamic Range, 76-dB Peak {SNR} Companding Continuous-Time
?S Modulator for Audio Applications},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {51--56},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.45},
doi = {10.1109/VLSID.2012.45},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KumarC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/KunduCSK12,
author = {Subhadip Kundu and
Santanu Chattopadhyay and
Indranil Sengupta and
Rohit Kapur},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Diagnosability Metric for Test Set Selection Targeting Better Fault
Detection},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {436--441},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.110},
doi = {10.1109/VLSID.2012.110},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/KunduCSK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LuPRR12,
author = {Chao Lu and
Sang Phill Park and
Vijay Raghunathan and
Kaushik Roy},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Low-Overhead Maximum Power Point Tracking for Micro-Scale Solar Energy
Harvesting Systems},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {215--220},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.73},
doi = {10.1109/VLSID.2012.73},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LuPRR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/LvK12,
author = {Jinpeng Lv and
Priyank Kalla},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Formal Verification of Galois Field Multipliers Using Computer Algebra
Techniques},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {388--393},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.102},
doi = {10.1109/VLSID.2012.102},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/LvK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MajiM12,
author = {Supriyo Maji and
Pradip Mandal},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Fast Equation Free Iterative Approach to Analog Circuit Sizing},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {370--375},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.99},
doi = {10.1109/VLSID.2012.99},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/MajiM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ManoharSVB12,
author = {Sujan K. Manohar and
Vinod K. Somasundar and
Ramakrishnan Venkatasubramanian and
Poras T. Balsara},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Bidirectional Single-Supply Level Shifter with Wide Voltage Range
for Efficient Power Management},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {125--130},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.58},
doi = {10.1109/VLSID.2012.58},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ManoharSVB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ManoharVB12,
author = {Sujan K. Manohar and
Ramakrishnan Venkatasubramanian and
Poras T. Balsara},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Hybrid {NEMS-CMOS} {DC-DC} Converter for Improved Area and Power Efficiency},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {221--226},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.74},
doi = {10.1109/VLSID.2012.74},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ManoharVB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MazumdarMS12,
author = {Bodhisatwa Mazumdar and
Debdeep Mukhopadhyay and
Indranil Sengupta},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Design for Security of Block Cipher S-Boxes to Resist Differential
Power Attacks},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {113--118},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.56},
doi = {10.1109/VLSID.2012.56},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MazumdarMS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MeherSH12,
author = {Deepak Kumar Meher and
Arunkumar Salimath and
Achintya Halder},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {An Ultra-low Power Symbol Detection Methodology and Its Circuit Implementation
for a Wake-up Receiver in Wireless Sensor Nodes},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {274--279},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.83},
doi = {10.1109/VLSID.2012.83},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MeherSH12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MerkelK12,
author = {Cory E. Merkel and
Dhireesha Kudithipudi},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Towards Thermal Profiling in CMOS/Memristor Hybrid {RRAM} Architectures},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {167--172},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.65},
doi = {10.1109/VLSID.2012.65},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MerkelK12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MitraC12,
author = {Sajib Kumar Mitra and
Ahsan Raja Chowdhury},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Minimum Cost Fault Tolerant Adder Circuits in Reversible Logic Synthesis},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {334--339},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.93},
doi = {10.1109/VLSID.2012.93},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MitraC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MoyadeNAG12,
author = {Pawan Kumar Moyade and
Nandakumar Nambath and
Allmin Ansari and
Shalabh Gupta},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Analog Processing Based Equalizer for 40 Gbps Coherent Optical Links
in 90 nm {CMOS}},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {101--106},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.54},
doi = {10.1109/VLSID.2012.54},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MoyadeNAG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/MukherjeeRBSD12,
author = {Ritwik Mukherjee and
Hafizur Rahaman and
Indrajit Banerjee and
Tuhina Samanta and
Parthasarathi Dasgupta},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Heuristic Method for Co-optimization of Pin Assignment and Droplet
Routing in Digital Microfluidic Biochip},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {227--232},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.75},
doi = {10.1109/VLSID.2012.75},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/MukherjeeRBSD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/OkobiahMKG12,
author = {Oghenekarho Okobiah and
Saraju P. Mohanty and
Elias Kougianos and
Oleg Garitselov},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Kriging-Assisted Ultra-Fast Simulated-Annealing Optimization of a
Clamped Bitline Sense Amplifier},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {310--315},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.89},
doi = {10.1109/VLSID.2012.89},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/OkobiahMKG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PalDM12,
author = {Debjit Pal and
Pallab Dasgupta and
Siddhartha Mukhopadhyay},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Library for Passive Online Verification of Analog and Mixed-Signal
Circuits},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {364--369},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.98},
doi = {10.1109/VLSID.2012.98},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PalDM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ParkUA12,
author = {Junyoung Park and
H. Mert Ustun and
Jacob A. Abraham},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Run-time Prediction of the Optimal Performance Point in DVS-based
Dynamic Thermal Management},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {155--160},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.63},
doi = {10.1109/VLSID.2012.63},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ParkUA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Pasricha12,
author = {Sudeep Pasricha},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Framework for {TSV} Serialization-aware Synthesis of Application
Specific 3D Networks-on-Chip},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {268--273},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.82},
doi = {10.1109/VLSID.2012.82},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Pasricha12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PatilGSM12,
author = {Rajesh A. Patil and
Gauri Gupta and
Vineet Sahula and
Atanendu S. Mandal},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Power Aware Hardware Prototyping of Multiclass {SVM} Classifier Through
Reconfiguration},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {62--67},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.47},
doi = {10.1109/VLSID.2012.47},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PatilGSM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PattanamCMJAGP12,
author = {Sathyam K. Pattanam and
P. P. Chakrabarti and
Mahesh Mahendale and
Srikanth Jadcherla and
Seer Akademi and
Vikas Gautham and
Raju Bala Showry Pudota},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Panel Discussion: SoC Realization - {A} Bridge to New Horizons or
a Bridge to Nowhere?},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {38},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.42},
doi = {10.1109/VLSID.2012.42},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PattanamCMJAGP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PrabhuHLG12,
author = {Sarvesh Prabhu and
Michael S. Hsiao and
Loganathan Lingappan and
Vijay Gangaram},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Novel SMT-Based Technique for {LFSR} Reseeding},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {394--399},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.103},
doi = {10.1109/VLSID.2012.103},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PrabhuHLG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/PramodBBABR12,
author = {Pramod Murali and
Navakanta Bhat and
Gaurab Banerjee and
Bharadwaj Amrutur and
K. N. Bhat and
Praveen C. Ramamurthy},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {{CMOS} Gas Sensor Array Platform with Fourier Transform Based Impedance
Spectroscopy},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {173--178},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.66},
doi = {10.1109/VLSID.2012.66},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/PramodBBABR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Raghunathan12,
author = {Vijay Raghunathan},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Embedded Tutorial {ET4:} Advanced Techniques for Programming Networked
Embedded Systems},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {36--37},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.39},
doi = {10.1109/VLSID.2012.39},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Raghunathan12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RaoVS12,
author = {M. Kalyana Kumar Rao and
Shantha Kumari P. V. and
Boopalan Sellappan},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Embedded Tutorial {ET2:} Digital Subscriber Line},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {33--34},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.41},
doi = {10.1109/VLSID.2012.41},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RaoVS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/RoyBCB12,
author = {Anindya Lal Roy and
Anirban Bhattacharya and
Ritesh Ray Chaudhuri and
Tarun Kanti Bhattacharyya},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Analysis of the Pull-In Phenomenon in Microelectromechanical Varactors},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {185--190},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.68},
doi = {10.1109/VLSID.2012.68},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/RoyBCB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SachidPJSSR12,
author = {Angada B. Sachid and
Pallavi Paliwal and
S. Joshi and
Maryam Shojaei Baghini and
Dinesh Sharma and
V. Ramgopal Rao},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Circuit Optimization at 22nm Technology Node},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {322--327},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.91},
doi = {10.1109/VLSID.2012.91},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SachidPJSSR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SahooR12,
author = {S. K. Sahoo and
K. Srinivasa Reddy},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A High Speed {FIR} Filter Architecture Based on Novel Higher Radix
Algorithm},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {68--73},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.48},
doi = {10.1109/VLSID.2012.48},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SahooR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SalihundamKJHYKEVB12,
author = {Praveen Salihundam and
Mohammed Asadullah Khan and
Shailendra Jain and
Yatin Vasant Hoskote and
Satish Yada and
Shasi Kumar and
Vasantha Erraguntla and
Sriram R. Vangal and
Nitin Borkar},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Reconfigurable On-die Traffic Generator in 45nm {CMOS} for a 48
iA-32 Core Network-on-Chip},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {292--297},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.86},
doi = {10.1109/VLSID.2012.86},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SalihundamKJHYKEVB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SarmaLC12,
author = {Deepa N. Sarma and
Gopalakrishnan Lakshminarayanan and
K. V. R. Suryakiran Chavali},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Novel Encoding Scheme for Low Power in Network on Chip Links},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {257--261},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.80},
doi = {10.1109/VLSID.2012.80},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SarmaLC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SauerKCRB12,
author = {Matthias Sauer and
Stefan Kupferschmid and
Alejandro Czutro and
Sudhakar M. Reddy and
Bernd Becker},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Analysis of Reachable Sensitisable Paths in Sequential Circuits with
{SAT} and Craig Interpolation},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {382--387},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.101},
doi = {10.1109/VLSID.2012.101},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SauerKCRB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SaveNP12,
author = {Yogesh Dilip Save and
H. Narayanan and
Sachin B. Patkar},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Two Graph Based Circuit Simulator for PDE-Electrical Analogy},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {400--405},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.104},
doi = {10.1109/VLSID.2012.104},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SaveNP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SenBD12,
author = {Subhajit Sen and
Dan Babitch and
Noshir Dubash},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Compact Temperature Sensor at 1.8{\(\mathrm{\mu}\)}A per Hz Conversion
Rate and 1.1 {\textdegree}C Accuracy for SOCs},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {179--184},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.67},
doi = {10.1109/VLSID.2012.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SenBD12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SenGuptaIL12,
author = {Breeta SenGupta and
Urban Ingelsson and
Erik Larsson},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Test Planning for Core-based 3D Stacked ICs with Through-Silicon Vias},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {442--447},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.111},
doi = {10.1109/VLSID.2012.111},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SenGuptaIL12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShahRV12,
author = {Jimit Shah and
K. S. Raghunandan and
Kuruvilla Varghese},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {{HD} Resolution Intra Prediction Architecture for {H.264} Decoder},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {107--112},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.55},
doi = {10.1109/VLSID.2012.55},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShahRV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ShanmugasundaramA12,
author = {Priyadharshini Shanmugasundaram and
Vishwani D. Agrawal},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Externally Tested Scan Circuit with Built-In Activity Monitor and
Adaptive Test Clock},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {448--453},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.112},
doi = {10.1109/VLSID.2012.112},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ShanmugasundaramA12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Sinanoglu12,
author = {Ozgur Sinanoglu},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Eliminating Performance Penalty of Scan},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {346--351},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.95},
doi = {10.1109/VLSID.2012.95},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Sinanoglu12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SinghG12,
author = {Mohit Singh and
Shalabh Gupta},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Buffer Design and Eye-Diagram Based Characterization of a 20 GS/s
{CMOS} {DAC}},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {96--100},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.53},
doi = {10.1109/VLSID.2012.53},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SinghG12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/SootkaneungS12,
author = {Warin Sootkaneung and
Kewal K. Saluja},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Impact of Body Bias Based Leakage Power Reduction on Soft Error Rate},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {74--79},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.49},
doi = {10.1109/VLSID.2012.49},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/SootkaneungS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Srinivasaiah12,
author = {H. C. Srinivasaiah},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Implications of Halo Implant Shadowing and Backscattering from Mask
Layer Edges on Device Leakage Current in 65nm {SRAM}},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {412--417},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.106},
doi = {10.1109/VLSID.2012.106},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Srinivasaiah12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/Sur-KolayB12,
author = {Susmita Sur{-}Kolay and
Swarup Bhunia},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T4:} Intellectual Property Protection and Security in System-on-Chip
Design},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {18--19},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.31},
doi = {10.1109/VLSID.2012.31},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/Sur-KolayB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/TangPP12,
author = {Liang Tang and
Jorgen Peddersen and
Sri Parameswaran},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Rapid Methodology for Multi-mode Communication Circuit Generation},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {203--208},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.71},
doi = {10.1109/VLSID.2012.71},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/TangPP12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/ThapliyalR12,
author = {Himanshu Thapliyal and
Nagarajan Ranganathan},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T2:} Reversible Logic: Fundamentals and Applications in
Ultra-Low Power, Fault Testing and Emerging Nanotechnologies, and
Challenges in Future},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {13--15},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.29},
doi = {10.1109/VLSID.2012.29},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/ThapliyalR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VenkataramanT12,
author = {Srikanth Venkataraman and
Nagesh Tamarapalli},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Tutorial {T3:} DFM, DFT, Silicon Debug and Diagnosis - The Loop to
Ensure Product Yield},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {16--17},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.30},
doi = {10.1109/VLSID.2012.30},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VenkataramanT12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VermaR12,
author = {Prateek Verma and
Preeti Rao},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Real-time Melodic Accompaniment System for Indian Music Using {TMS320C6713}},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {119--124},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.57},
doi = {10.1109/VLSID.2012.57},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VermaR12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VookaASMV12,
author = {Srinivas Vooka and
Khushboo Agarwal and
Abhijeet Shrivastava and
Pranav Murthy and
Ramakrishnan Venkatraman},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {A Silicon Testing Strategy for Pulse-Width Failures},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {352--357},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.96},
doi = {10.1109/VLSID.2012.96},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VookaASMV12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/VudadhaMNPAVMS12,
author = {Chetan Vudadha and
Goutham Makkena and
M. Venkata Swamy Nayudu and
P. Sai Phaneendra and
Syed Ershad Ahmed and
Sreehari Veeramachaneni and
N. Moorthy Muthukrishnan and
M. B. Srinivas},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Low-Power Self Reconfigurable Multiplexer Based Decoder for Adaptive
Resolution Flash ADCs},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {280--285},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.84},
doi = {10.1109/VLSID.2012.84},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/VudadhaMNPAVMS12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WangNKB12,
author = {Xinmu Wang and
Seetharam Narasimhan and
Aswin Raghav Krishna and
Swarup Bhunia},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {{SCARE:} Side-Channel Analysis Based Reverse Engineering for Post-Silicon
Validation},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {304--309},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.88},
doi = {10.1109/VLSID.2012.88},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/WangNKB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WangPB12,
author = {Lei Wang and
Somnath Paul and
Swarup Bhunia},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Width-Aware Fine-Grained Dynamic Supply Gating: {A} Design Methodology
for Low-Power Datapath and Memory},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {340--345},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.94},
doi = {10.1109/VLSID.2012.94},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/WangPB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WangRM12,
author = {Zhe Wang and
Sanjay Ranka and
Prabhat Mishra},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Temperature-aware Task Partitioning for Real-Time Scheduling in Embedded
Systems},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {161--166},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.64},
doi = {10.1109/VLSID.2012.64},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vlsid/WangRM12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/WellsNCB12,
author = {Joshua W. Wells and
Jayaram Natarajan and
Abhijit Chatterjee and
Irtaza Barlas},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {Real-Time, Content Aware Camera - Algorithm - Hardware Co-Adaptation
for Minimal Power Video Encoding},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {245--250},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.78},
doi = {10.1109/VLSID.2012.78},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/WellsNCB12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsid/YogeC12,
author = {Dhiraj Reddy Nallapa Yoge and
Nitin Chandrachoodan},
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {{GPU} Implementation of a Programmable Turbo Decoder for Software
Defined Radio Applications},
booktitle = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
pages = {149--154},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://doi.org/10.1109/VLSID.2012.62},
doi = {10.1109/VLSID.2012.62},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/YogeC12.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/vlsid/2012,
editor = {Vishwani D. Agrawal and
Srimat T. Chakradhar},
title = {25th International Conference on {VLSI} Design, Hyderabad, India,
January 7-11, 2012},
publisher = {{IEEE} Computer Society},
year = {2012},
url = {https://ieeexplore.ieee.org/xpl/conhome/6167333/proceeding},
isbn = {978-1-4673-0438-2},
timestamp = {Fri, 04 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vlsid/2012.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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