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@article{DBLP:journals/vlsi/BertozziKP07, author = {Davide Bertozzi and Shashi Kumar and Maurizio Palesi}, title = {Networks-on-Chip: Emerging Research Topics and Novel Ideas}, journal = {{VLSI} Design}, volume = {2007}, pages = {26454:1--26454:3}, year = {2007}, url = {https://doi.org/10.1155/2007/26454}, doi = {10.1155/2007/26454}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/BertozziKP07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/BogdanDM07, author = {Paul Bogdan and Tudor Dumitras and Radu Marculescu}, title = {Stochastic Communication: {A} New Paradigm for Fault-Tolerant Networks-on-Chip}, journal = {{VLSI} Design}, volume = {2007}, pages = {95348:1--95348:17}, year = {2007}, url = {https://doi.org/10.1155/2007/95348}, doi = {10.1155/2007/95348}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/BogdanDM07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/DimitrovV07, author = {Dimitar P. Dimitrov and Tania Krumova Vasileva}, title = {Eight-Bit Semiflash {A/D} Converter}, journal = {{VLSI} Design}, volume = {2007}, pages = {80389:1--80389:7}, year = {2007}, url = {https://doi.org/10.1155/2007/80389}, doi = {10.1155/2007/80389}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/DimitrovV07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/DinhG07, author = {Anh Dinh and Jiandong Ge}, title = {A Q-Enhanced 3.6 GHz, Tunable, Sixth-Order Bandpass Filter Using 0.18 {\(\mu\)}m {CMOS}}, journal = {{VLSI} Design}, volume = {2007}, pages = {84650:1--84650:9}, year = {2007}, url = {https://doi.org/10.1155/2007/84650}, doi = {10.1155/2007/84650}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/DinhG07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/DlugoszI07, author = {Rafal Tomasz Dlugosz and Krzysztof Iniewski}, title = {Flexible Architecture of Ultra-Low-Power Current-Mode Interleaved Successive Approximation Analog-to-Digital Converter for Wireless Sensor Networks}, journal = {{VLSI} Design}, volume = {2007}, pages = {45269:1--45269:13}, year = {2007}, url = {https://doi.org/10.1155/2007/45269}, doi = {10.1155/2007/45269}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/DlugoszI07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/GhoneimaIKD07, author = {Maged Ghoneima and Yehea I. Ismail and Muhammad M. Khellah and Vivek De}, title = {Variation-Tolerant and Low-Power Source-Synchronous Multicycle On-Chip Interconnect Scheme}, journal = {{VLSI} Design}, volume = {2007}, pages = {95402:1--95402:12}, year = {2007}, url = {https://doi.org/10.1155/2007/95402}, doi = {10.1155/2007/95402}, timestamp = {Sun, 02 Oct 2022 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/GhoneimaIKD07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/GuzWBCGK07, author = {Zvika Guz and Isask'har Walter and Evgeny Bolotin and Israel Cidon and Ran Ginosar and Avinoam Kolodny}, title = {Network Delays and Link Capacities in Application-Specific Wormhole NoCs}, journal = {{VLSI} Design}, volume = {2007}, pages = {90941:1--90941:15}, year = {2007}, url = {https://doi.org/10.1155/2007/90941}, doi = {10.1155/2007/90941}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/GuzWBCGK07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/HanssonGR07, author = {Andreas Hansson and Kees Goossens and Andrei Radulescu}, title = {Avoiding Message-Dependent Deadlock in Network-Based Systems on Chip}, journal = {{VLSI} Design}, volume = {2007}, pages = {95859:1--95859:10}, year = {2007}, url = {https://doi.org/10.1155/2007/95859}, doi = {10.1155/2007/95859}, timestamp = {Thu, 04 Jan 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsi/HanssonGR07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/HanssonGR07a, author = {Andreas Hansson and Kees Goossens and Andrei Radulescu}, title = {A Unified Approach to Mapping and Routing on a Network-on-Chip for Both Best-Effort and Guaranteed Service Traffic}, journal = {{VLSI} Design}, volume = {2007}, pages = {68432:1--68432:16}, year = {2007}, url = {https://doi.org/10.1155/2007/68432}, doi = {10.1155/2007/68432}, timestamp = {Thu, 04 Jan 2024 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsi/HanssonGR07a.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/LehtonenLP07, author = {Teijo Lehtonen and Pasi Liljeberg and Juha Plosila}, title = {Online Reconfigurable Self-Timed Links for Fault Tolerant NoC}, journal = {{VLSI} Design}, volume = {2007}, pages = {94676:1--94676:13}, year = {2007}, url = {https://doi.org/10.1155/2007/94676}, doi = {10.1155/2007/94676}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/LehtonenLP07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/LuHLY07, author = {Shyue{-}Kung Lu and Yuang{-}Cheng Hsiao and Chia{-}Hsiu Liu and Chun{-}Lin Yang}, title = {Low-Power Built-In Self-Test Techniques for Embedded SRAMs}, journal = {{VLSI} Design}, volume = {2007}, pages = {67019:1--67019:6}, year = {2007}, url = {https://doi.org/10.1155/2007/67019}, doi = {10.1155/2007/67019}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/LuHLY07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/MassasAP07, author = {Pierre Guironnet de Massas and Paul Amblard and Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot}, title = {On {SPARC} {LEON-2} {ISA} Extensions Experiments for {MPEG} Encoding Acceleration}, journal = {{VLSI} Design}, volume = {2007}, pages = {28686:1--28686:10}, year = {2007}, url = {https://doi.org/10.1155/2007/28686}, doi = {10.1155/2007/28686}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/MassasAP07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/MeloniLACBRB07, author = {Paolo Meloni and Igor Loi and Federico Angiolini and Salvatore Carta and Massimo Barbaro and Luigi Raffo and Luca Benini}, title = {Area and Power Modeling for Networks-on-Chip with Layout Awareness}, journal = {{VLSI} Design}, volume = {2007}, pages = {50285:1--50285:12}, year = {2007}, url = {https://doi.org/10.1155/2007/50285}, doi = {10.1155/2007/50285}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsi/MeloniLACBRB07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/MuraliABM07, author = {Srinivasan Murali and David Atienza and Luca Benini and Giovanni De Micheli}, title = {A Method for Routing Packets Across Multiple Paths in NoCs with In-Order Delivery and Fault-Tolerance Gaurantees}, journal = {{VLSI} Design}, volume = {2007}, pages = {37627:1--37627:11}, year = {2007}, url = {https://doi.org/10.1155/2007/37627}, doi = {10.1155/2007/37627}, timestamp = {Fri, 27 Mar 2020 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsi/MuraliABM07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/NigussieLTPI07, author = {Ethiopia Nigussie and Teijo Lehtonen and Sampo Tuuna and Juha Plosila and Jouni Isoaho}, title = {High-Performance Long NoC Link Using Delay-Insensitive Current-Mode Signaling}, journal = {{VLSI} Design}, volume = {2007}, pages = {46514:1--46514:13}, year = {2007}, url = {https://doi.org/10.1155/2007/46514}, doi = {10.1155/2007/46514}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/NigussieLTPI07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/NoulisDS07, author = {Thomas Noulis and Constantinos Deradonis and Stylianos Siskos}, title = {Advanced Readout System {IC} Current Mode Semi-Gaussian Shapers Using CCIIs and OTAs}, journal = {{VLSI} Design}, volume = {2007}, pages = {71684:1--71684:12}, year = {2007}, url = {https://doi.org/10.1155/2007/71684}, doi = {10.1155/2007/71684}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/NoulisDS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/ShenHZS07, author = {Zheng Shen and Hu He and Yanjun Zhang and Yihe Sun}, title = {A Video Specific Instruction Set Architecture for {ASIP} design}, journal = {{VLSI} Design}, volume = {2007}, pages = {58431:1--58431:7}, year = {2007}, url = {https://doi.org/10.1155/2007/58431}, doi = {10.1155/2007/58431}, timestamp = {Wed, 12 Jan 2022 00:00:00 +0100}, biburl = {https://dblp.org/rec/journals/vlsi/ShenHZS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/SypkaZ07, author = {Przemyslaw Sypka and Mariusz Zi{\'{o}}lko}, title = {Robustness of Transmultiplexed Images}, journal = {{VLSI} Design}, volume = {2007}, pages = {59493:1--59493:7}, year = {2007}, url = {https://doi.org/10.1155/2007/59493}, doi = {10.1155/2007/59493}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/SypkaZ07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/WangN07, author = {Xin Wang and Jari Nurmi}, title = {Comparison of a Ring On-Chip Network and a Code-Division Multiple-Access On-Chip Network}, journal = {{VLSI} Design}, volume = {2007}, pages = {18372:1--18372:14}, year = {2007}, url = {https://doi.org/10.1155/2007/18372}, doi = {10.1155/2007/18372}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/WangN07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/XiaoZLS07, author = {Jianhong Xiao and Guang Zhang and Tianwei Li and Jos{\'{e}} Silva{-}Mart{\'{\i}}nez}, title = {Low-Power Fully Integrated {CMOS} {DTV} Tuner Front-End for {ATSC} Terrestrial Broadcasting}, journal = {{VLSI} Design}, volume = {2007}, pages = {71974:1--71974:13}, year = {2007}, url = {https://doi.org/10.1155/2007/71974}, doi = {10.1155/2007/71974}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/XiaoZLS07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@article{DBLP:journals/vlsi/XuRC07, author = {Jingye Xu and Abinash Roy and Masud H. Chowdhury}, title = {Power Consumption and {BER} of Flip-Flop Inserted Global Interconnect}, journal = {{VLSI} Design}, volume = {2007}, pages = {42829:1--42829:8}, year = {2007}, url = {https://doi.org/10.1155/2007/42829}, doi = {10.1155/2007/42829}, timestamp = {Thu, 16 Aug 2018 01:00:00 +0200}, biburl = {https://dblp.org/rec/journals/vlsi/XuRC07.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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