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@inproceedings{DBLP:conf/glvlsi/AarellaYMK24,
author = {Seema G. Aarella and
Venkata Prasanth Yanambaka and
Saraju P. Mohanty and
Elias Kougianos},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Fortified-Edge 4.0: {A} ML-Based Error Correction Framework for Secure
Authentication in Collaborative Edge Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {639--644},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660384},
doi = {10.1145/3649476.3660384},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AarellaYMK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AhmedMK24,
author = {Samir Ahmed and
Shakil Mahmud and
Robert Karam},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Modular Security Evaluation Platform for Physiological Closed-Loop
Control Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {682--687},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660362},
doi = {10.1145/3649476.3660362},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AhmedMK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AhmedRAFRT24,
author = {Bulbul Ahmed and
M. Sazadur Rahman and
Kimia Zamiri Azar and
Farimah Farahmandi and
Fahim Rahman and
Mark M. Tehranipoor},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {SeeMLess: Security Evaluation of Logic Locking using Machine Learning
oriented Estimation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {489--494},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660382},
doi = {10.1145/3649476.3660382},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AhmedRAFRT24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AkyashK24,
author = {Mohammad Akyash and
Hadi Mardani Kamali},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Evolutionary Large Language Models for Hardware Security: {A} Comparative
Survey},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {496--501},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660390},
doi = {10.1145/3649476.3660390},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AkyashK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlamA24,
author = {Shamiul Alam and
Ahmedullah Aziz},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Ultra-Area-Efficient Cryogenic {XNOR} Logic Gate with Superconducting
Heater Cryotron to Advance High-Performance Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {651--656},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660375},
doi = {10.1145/3649476.3660375},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlamA24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlawadI24,
author = {Mohammed Alawad and
Mohammad Munzurul Islam},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Sparsifying Graph Neural Networks with Compressive Sensing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {315--318},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658780},
doi = {10.1145/3649476.3658780},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlawadI24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlawadI24a,
author = {Mohammed Alawad and
Md Ishak},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Probabilistic Bayesian Neural Networks for Efficient Inference},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {724--729},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658740},
doi = {10.1145/3649476.3658740},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlawadI24a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlmawzanCDB24,
author = {Rasheed Almawzan and
Atri Chatterjee and
Aritra Dasgupta and
Swarup Bhunia},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{LISA:} {A} Multi-Layered Iterative Framework for Hardening Obfuscation
with Modular Unit Transformations},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {588--591},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658805},
doi = {10.1145/3649476.3658805},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlmawzanCDB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AravindOL24,
author = {Janani Aravind and
Victor Oyadongha and
Daniel B. Limbrick},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Comprehensive Analysis of Generated Single Event Transients in Most
Common Logic Cells of Skywater's 130-nm Technology},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {333--337},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658779},
doi = {10.1145/3649476.3658779},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AravindOL24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AversaS24,
author = {Alec Aversa and
Ioannis Savidis},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Harnessing Heterogeneity for Targeted Attacks on 3-D ICs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {246--251},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660385},
doi = {10.1145/3649476.3660385},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AversaS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AxelouK0EGS24,
author = {Olympia Axelou and
Kostas Kolomvatsos and
George Floros and
Nestor E. Evmorfopoulos and
Georg I. Georgakos and
George Stamoulis},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {An Electromigration-Aware Wire Sizing Methodology via Particle Swarm
Optimization},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {403--408},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658756},
doi = {10.1145/3649476.3658756},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AxelouK0EGS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AyarANM24,
author = {Alaaddin Goktug Ayar and
Sercan Aygun and
M. Hassan Najafi and
Martin Margala},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Word2HyperVec: From Word Embeddings to Hypervectors for Hyperdimensional
Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {355--356},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658795},
doi = {10.1145/3649476.3658795},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AyarANM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AydinKA24,
author = {Furkan Aydin and
Emre Karabulut and
Aydin Aysu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Extended Abstract: Pre-Silicon Vulnerability Assessment for {AI/ML}
Hardware},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {495},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660388},
doi = {10.1145/3649476.3660388},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AydinKA24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BaiZ024,
author = {Jinyu Bai and
He Zhang and
Wang Kang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {MixMixQ: Quantization with Mixed Bit-Sparsity and Mixed Bit-Width
for {CIM} Accelerators},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {537--540},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658809},
doi = {10.1145/3649476.3658809},
timestamp = {Tue, 25 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BaiZ024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BanerjeeIWPX24,
author = {Jishnu Banerjee and
Sahidul Islam and
Wei Wei and
Chen Pan and
Mimi Xie},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Autotile: Autonomous Task-tiling for Deep Inference on Battery-less
Embedded System},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {323--327},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658798},
doi = {10.1145/3649476.3658798},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BanerjeeIWPX24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BathalapalliYMK24,
author = {Venkata Karthik Vishnu Vardhan Bathalapalli and
Venkata Prasanth Yanambaka and
Saraju P. Mohanty and
Elias Kougianos},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {PUFshield: {A} Hardware-Assisted Approach for Deepfake Mitigation
Through PUF-Based Facial Feature Attestation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {676--681},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660394},
doi = {10.1145/3649476.3660394},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BathalapalliYMK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BazgirGN24,
author = {Omid Bazgir and
Satwik Gali and
Tooraj Nikoubin},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Area-power and Energy Efficient Substitution box (S-box) in Advanced
Encryption Standard {(AES)}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {263--267},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658765},
doi = {10.1145/3649476.3658765},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BazgirGN24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BeaudoinPG24,
author = {Collin Beaudoin and
Koustubh Phalak and
Swaroop Ghosh},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {AltGraph: Redesigning Quantum Circuits Using Generative Graph Models
for Efficient Optimization},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {44--49},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658747},
doi = {10.1145/3649476.3658747},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BeaudoinPG24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BiglariHZM24,
author = {Siamak Biglari and
Ruixiao Huang and
Hui Zhao and
Saraju P. Mohanty},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Designing Reconfigurable Interconnection Network of Heterogeneous
Chiplets Using Kalman Filter},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {663--668},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660389},
doi = {10.1145/3649476.3660389},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BiglariHZM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BuddhanoyKMPR24,
author = {Matchima Buddhanoy and
Kamil Khan and
Aleksandar Milenkovic and
Sudeep Pasricha and
Biswajit Ray},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Improving Block Management in 3D {NAND} Flash SSDs with Sub-Block
First Write Sequencing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {296--300},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658803},
doi = {10.1145/3649476.3658803},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BuddhanoyKMPR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CR24,
author = {Prashanth H. C. and
Madhav Rao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Performance Analysis of {OFA-NAS} ResNet Topologies Across Diverse
Hardware Compute Units},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {604--607},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658811},
doi = {10.1145/3649476.3658811},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChacunARCZ24,
author = {Guillaume Chacun and
Mehdi Akeddar and
Thomas Rieder and
Bruno Da Rocha Carvalho and
Marina Zapater},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {DroneBandit: Multi-armed contextual bandits for collaborative edge-to-cloud
inference in resource-constrained nanodrones},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {98--104},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658720},
doi = {10.1145/3649476.3658720},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChacunARCZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChallagundlaBI24,
author = {Dhandeep Challagundla and
Ignatius Bezzam and
Riadul Islam},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A Resonant Time-Domain Compute-in-Memory (rTD-CiM) ADC-Less Architecture
for {MAC} Operations},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {268--271},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658773},
doi = {10.1145/3649476.3658773},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChallagundlaBI24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChangCCLLCCLLPC24,
author = {Yong{-}Fong Chang and
Yung{-}Chih Chen and
Yu{-}Chen Cheng and
Shu{-}Hong Lin and
Che{-}Hsu Lin and
Chun{-}Yuan Chen and
Yu{-}Hsuan Chen and
Yu{-}Che Lee and
Jia{-}Wei Lin and
Hsun{-}Wei Pao and
Shih{-}Chieh Chang and
Yi{-}Ting Li and
Chun{-}Yao Wang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{IR} drop Prediction Based on Machine Learning and Pattern Reduction},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {516--519},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658775},
doi = {10.1145/3649476.3658775},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChangCCLLCCLLPC24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChatterjeeKG24,
author = {Avimita Chatterjee and
Debarshi Kundu and
Swaroop Ghosh},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Q-Embroidery: {A} Study on Weaving Quantum Error Correction into the
Fabric of Quantum Classifiers},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {119--124},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658750},
doi = {10.1145/3649476.3658750},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChatterjeeKG24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenSMD24,
author = {Ping{-}Xiang Chen and
Dongjoo Seo and
Biswadip Maity and
Nikil D. Dutt},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {KDTree-SOM: Self-organizing Map based Anomaly Detection for Lightweight
Autonomous Embedded Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {700--705},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658708},
doi = {10.1145/3649476.3658708},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenSMD24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChennagouniKC0Y24,
author = {Nishanth Goud Chennagouni and
Mashrafi Alam Kajol and
Diliang Chen and
Dongpeng Xu and
Qiaoyan Yu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Feature-driven Approximate Computing for Wearable Health-Monitoring
Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {712--717},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658719},
doi = {10.1145/3649476.3658719},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChennagouniKC0Y24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DaiLAGY24,
author = {Ruochen Dai and
Zhaoxiang Liu and
Orlando Arias and
Xiaolong Guo and
Tuba Yavuz},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {DTjRTL: {A} Configurable Framework for Automated Hardware Trojan Insertion
at {RTL}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {465--470},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658759},
doi = {10.1145/3649476.3658759},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DaiLAGY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DaiY24,
author = {Ruochen Dai and
Tuba Yavuz},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Detecting Hardware Trojans using Model Guided Symbolic Execution},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {569--573},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658782},
doi = {10.1145/3649476.3658782},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DaiY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DangDA24,
author = {Dharanidhar Dang and
Priyabrata Dash and
Ahmedullah Aziz},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {P-ReTI: Silicon Photonic Accelerator for Greener and Real-Time {AI}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {766--769},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660376},
doi = {10.1145/3649476.3660376},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DangDA24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DarjaniK024,
author = {Armin Darjani and
Nima Kavand and
Akash Kumar},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Flip-Lock: {A} Flip-Flop-Based Logic Locking Technique for Thwarting
ML-based and Algorithmic Structural Attacks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {185--191},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658753},
doi = {10.1145/3649476.3658753},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DarjaniK024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DattaZJS24,
author = {Rajesh Kumar Datta and
Guangwei Zhao and
Dipali Jain and
Kaveh Shamsi},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {On Hardware Trojan Detection using Oracle-Guided Circuit Learning},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {198--203},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658705},
doi = {10.1145/3649476.3658705},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DattaZJS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DerasariV24,
author = {Preet Derasari and
Guru Venkataramani},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{EPIC:} Efficient and Proactive Instruction-level Cyberdefense},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {409--414},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658749},
doi = {10.1145/3649476.3658749},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DerasariV24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DeviKGR24,
author = {Dantu Nandini Devi and
Gandi Ajay Kumar and
Bindu G. Gowda and
Madhav Rao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Integrated MAC-based Systolic Arrays: Design and Performance Evaluation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {292--295},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658797},
doi = {10.1145/3649476.3658797},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DeviKGR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DiWCWSW24,
author = {Zhixiong Di and
Xufeng Wei and
Yiduo Chen and
Shuanglong Wu and
Peihao Sun and
Qiang Wu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A Remote FPGA-based Experimental Teaching System Design Supporting
Single-board Multi-user and Multi-board Single-user Operations in
MOOCs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {742--747},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658762},
doi = {10.1145/3649476.3658762},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DiWCWSW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DominguezBP24,
author = {Ruben Dominguez and
Jos{\'{e}} Baca and
Chen Pan},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{MARS:} MAximizing throughput for MPPT-based self-sustaining LoRa
Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {105--110},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658722},
doi = {10.1145/3649476.3658722},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DominguezBP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DuCLWZ24,
author = {Gaoming Du and
Zhuo Chen and
Zhenmin Li and
Xiaolei Wang and
Duoli Zhang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A Low-Latency Polynomial Multiplier Accelerator for CRYSTALS-Dilithium
Digital Signature},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {258--262},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658794},
doi = {10.1145/3649476.3658794},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DuCLWZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FarheenRCDTF24,
author = {Tasnuva Farheen and
Sourav Roy and
Andrew Cannon and
Jia Di and
Shahin Tajik and
Domenic Forte},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Amnesiac Memory: {A} Self-Destructive Polymorphic Mechanism Against
Cold Boot Data Remanence Attack},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {564--568},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658778},
doi = {10.1145/3649476.3658778},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FarheenRCDTF24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FayyaziNFP24,
author = {Arash Fayyazi and
Mahdi Nazemi and
Arya Fayyazi and
Massoud Pedram},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {NeuroBlend: Towards Low-Power yet Accurate Neural Network-Based Inference
Engine Blending Binary and Fixed-Point Convolutions},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {730--735},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658736},
doi = {10.1145/3649476.3658736},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FayyaziNFP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Fore0S24,
author = {Michael Fore and
Simranjit Singh and
Dimitrios Stamoulis},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {GeckOpt: {LLM} System Efficiency via Intent-Based Tool Selection},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {353--354},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658784},
doi = {10.1145/3649476.3658784},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Fore0S24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GharibAP24,
author = {Mohamed Adel Gharib and
Salma Abdelzaher and
Inna Partin{-}Vaisband},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {An Analytical Model for High-Frequency Through Silicon Vias},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {282--286},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658792},
doi = {10.1145/3649476.3658792},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GharibAP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GovindasamyEG24,
author = {Hariprasadh Govindasamy and
Babak Esfandiari and
Paulo Garcia},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Accelerating Boolean Constraint Propagation for Efficient SAT-Solving
on FPGAs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {305--309},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658808},
doi = {10.1145/3649476.3658808},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GovindasamyEG24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GuoLZJZS24,
author = {Feng Guo and
Jiawei Liu and
Jianwang Zhai and
Jingyu Jia and
Kang Zhao and
Chuan Shi},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{PGAU:} Static {IR} Drop Analysis for Power Grid using Attention U-Net
Architecture and Label Distribution Smoothing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {452--458},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658711},
doi = {10.1145/3649476.3658711},
timestamp = {Fri, 21 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GuoLZJZS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HeMKX24,
author = {Pengzhou He and
Ben Mongirdas and
{\c{C}}etin Kaya Ko{\c{c}} and
Jiafeng Xie},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{LAMP:} Efficient Implementation of Lightweight Accelerator for Polynomial
MultiPlication, From Falcon to {RBLWE-ENC}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {210--215},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658731},
doi = {10.1145/3649476.3658731},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HeMKX24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HsuLMW24,
author = {Fang{-}Yu Hsu and
Tzu{-}Chuan Lin and
Wai{-}Kei Mak and
Ting{-}Chi Wang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A Bounding Box-based Net Partitioning Method for Double-sided Routing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {397--402},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658728},
doi = {10.1145/3649476.3658728},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HsuLMW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuangZHL24,
author = {Junqian Huang and
Yuhan Zhu and
Xing Huang and
Genggeng Liu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Washing Optimization Method Based on Deep Reinforcement Learning for
Fully Programmable Valve Array Biochips},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {529--532},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658801},
doi = {10.1145/3649476.3658801},
timestamp = {Wed, 02 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HuangZHL24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/IyerR24,
author = {Vishnuvardhan Venkatramani Iyer and
Jacob D. Rezac},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Using {EM} Side-Channels Near a Bluetooth Server Implementation to
Monitor Bit-Level Leakages in {BLE} Communication Channels},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {459--464},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658742},
doi = {10.1145/3649476.3658742},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/IyerR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JianCWW24,
author = {Haojie Jian and
Chao Chen and
Zheng Wang and
Pengfei Wu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {PerFT-N: Low-overhead Permanent Fault-Tolerance Mechanism for Neural
Processing Units},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {25--31},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658717},
doi = {10.1145/3649476.3658717},
timestamp = {Tue, 23 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JianCWW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JinLCS24,
author = {Shaoqian Jin and
Yulin Li and
Liwei Chen and
Gang Shi},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {SSFuzz: Generating syntactic and semantic seeds for {RISC-V} processors},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {421--426},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658712},
doi = {10.1145/3649476.3658712},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JinLCS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KahngKT24,
author = {Andrew B. Kahng and
Sayak Kundu and
Shreyas Thumathy},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Scalable Flip-Flop Clustering Using Divide and Conquer For Capacitated
K-Means},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {177--184},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658744},
doi = {10.1145/3649476.3658744},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KahngKT24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KahngPW24,
author = {Andrew B. Kahng and
Bodhisatta Pramanik and
Mingyu Woo},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A Hybrid {ECO} Detailed Placement Flow for Improved Reduction of Dynamic
{IR} Drop},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {390--396},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658727},
doi = {10.1145/3649476.3658727},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KahngPW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KallakuriHM24,
author = {Uttej Kallakuri and
Edward Humes and
Tinoosh Mohsenin},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Resource-Aware Saliency-Guided Differentiable Pruning for Deep Neural
Networks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {694--699},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658699},
doi = {10.1145/3649476.3658699},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KallakuriHM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KambhampatiSR24,
author = {Phani Pavan Kambhampati and
Ajay B. S and
Madhav Rao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Energy Efficient Multi-Modal Stress Detection System with Dynamic
Adaptive Spiking Neurons},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {138--143},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658723},
doi = {10.1145/3649476.3658723},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KambhampatiSR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KariaZK24,
author = {Vedant Karia and
Abdullah M. Zyarah and
Dhireesha Kudithipudi},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {PositCL: Compact Continual Learning with Posit Aware Quantization},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {645--650},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660371},
doi = {10.1145/3649476.3660371},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KariaZK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KarkehabadiHS24,
author = {Ali Karkehabadi and
Houman Homayoun and
Avesta Sasan},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{FFCL:} Forward-Forward Net with Cortical Loops, Training and Inference
on Edge Without Backpropogation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {626--632},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660391},
doi = {10.1145/3649476.3660391},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KarkehabadiHS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KarunakarAPKC24,
author = {Shruthi Karunakar and
Meenakshi Atkade and
Akash Poptani and
Rajshekar Kalayappan and
Sandeep Chandran},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{CASH:} Criticality-Aware Split Hybrid {L1} Data Cache},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {50--56},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658716},
doi = {10.1145/3649476.3658716},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KarunakarAPKC24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KasarapuBRD24,
author = {Sreenitha Kasarapu and
Dipkamal Bhusal and
Nidhi Rastogi and
Sai Manoj Pudukotai Dinakarrao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Comprehensive Analysis of Consistency and Robustness of Machine Learning
Models in Malware Detection},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {477--482},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658725},
doi = {10.1145/3649476.3658725},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KasarapuBRD24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Kim024,
author = {Sunwoong Kim and
Wonhee Cho},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Accelerating Homomorphic Comparison Operations for Thresholding Using
an Asymmetric Input Range and Input Scaling},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {427--432},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658724},
doi = {10.1145/3649476.3658724},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Kim024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KimL024,
author = {Bokyung Kim and
Hai Li and
Yiran Chen},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Processing-in-Memory Designs Based on Emerging Technology for Efficient
Machine Learning Acceleration},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {614--619},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660367},
doi = {10.1145/3649476.3660367},
timestamp = {Fri, 26 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KimL024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KrishnakumarPP24,
author = {Sriharini Krishnakumar and
Yaroslav Popryho and
Inna Partin{-}Vaisband},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {System Architecture Optimization for Vertical Power Delivery},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {351--352},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658774},
doi = {10.1145/3649476.3658774},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KrishnakumarPP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KunduGEWDG24,
author = {Debarshi Kundu and
Archisman Ghosh and
Srinivasan Ekambaram and
Jian Wang and
Nikolay V. Dokholyan and
Swaroop Ghosh},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Application of Quantum Tensor Networks for Protein Classification},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {132--137},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658701},
doi = {10.1145/3649476.3658701},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KunduGEWDG24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KunduKG24,
author = {Satwik Kundu and
Debarshi Kundu and
Swaroop Ghosh},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Evaluating Efficacy of Model Stealing Attacks and Defenses on Quantum
Neural Networks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {556--559},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658806},
doi = {10.1145/3649476.3658806},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KunduKG24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LatibariSHS24,
author = {Banafsheh Saber Latibari and
Soheil Salehi and
Houman Homayoun and
Avesta Sasan},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{IRET:} Incremental Resolution Enhancing Transformer},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {620--625},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660380},
doi = {10.1145/3649476.3660380},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LatibariSHS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LeeLS24,
author = {Seunggyu Lee and
Wonjae Lee and
Youngsoo Shin},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Integrated Netlist Synthesis and In-Memory Mapping for Memristor-Aided
Logic},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {38--43},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658758},
doi = {10.1145/3649476.3658758},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LeeLS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LesniakGH024,
author = {Fabian Lesniak and
Annina Gutermann and
Tanja Harbaum and
J{\"{u}}rgen Becker},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Enhanced Accelerator Design for Efficient {CNN} Processing with Improved
Row-Stationary Dataflow},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {151--157},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658737},
doi = {10.1145/3649476.3658737},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LesniakGH024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiCZH24,
author = {Jingzhou Li and
Huaiyu Chen and
Wenbin Zhang and
Hu He},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{HCRF:} {A} Hardware Checkpoint-based Recovery Framework in light
dual-core lockstep processors},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {338--342},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658781},
doi = {10.1145/3649476.3658781},
timestamp = {Thu, 04 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiCZH24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiFZJCLLF24,
author = {Xinyi Li and
Wenjie Fan and
Heng Zhang and
Jinlun Ji and
Tong Cheng and
Shiping Li and
Li Li and
Yuxiang Fu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{TTNNM:} Thermal- and Traffic-Aware Neural Network Mapping on 3D-NoC-based
Accelerator},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {364--369},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658703},
doi = {10.1145/3649476.3658703},
timestamp = {Fri, 19 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiFZJCLLF24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiaoALT24,
author = {Yuchao Liao and
Tosiron Adegbija and
Roman Lysecky and
Ravi Tandon},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Skip the Benchmark: Generating System-Level High-Level Synthesis Data
using Generative Machine Learning},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {170--176},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658738},
doi = {10.1145/3649476.3658738},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiaoALT24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuCK24,
author = {Siqin Liu and
Saumya Chauhan and
Avinash Karanth},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{SNAC:} Mitigation of Snoop-Based Attacks with Multi-Tier Security
in NoC Architectures},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {560--563},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658769},
doi = {10.1145/3649476.3658769},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuCK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuKK24,
author = {Siqin Liu and
Prakash Chand Kuve and
Avinash Karanth},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{HSCONN:} Hardware-Software Co-Optimization of Self-Attention Neural
Networks for Large Language Models},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {736--741},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658709},
doi = {10.1145/3649476.3658709},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuKK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuLSLHMSW24,
author = {Zixi Liu and
Yibo Lin and
Xiaojing Su and
Xiaohuan Ling and
Xin Hong and
Bojie Ma and
Yajuan Su and
Yayi Wei},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Automated Lithography Resolution Enhancement with Deep Learning Enabled
Layout Modification during Physical Design Stage},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {592--598},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658802},
doi = {10.1145/3649476.3658802},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuLSLHMSW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuTSZYY24,
author = {Changxu Liu and
Danqing Tang and
Jie Song and
Hao Zhou and
Shoumeng Yan and
Fan Yang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{HMNTT:} {A} Highly Efficient {MDC-NTT} Architecture for Privacy-preserving
Applications},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {7--12},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658734},
doi = {10.1145/3649476.3658734},
timestamp = {Mon, 11 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuTSZYY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuWLWY24,
author = {Tianji Liu and
Qijing Wang and
Lixin Liu and
Fangzhou Wang and
Evangeline F. Y. Young},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {On Advanced Methodologies for Microarchitecture Design Space Exploration},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {376--382},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658764},
doi = {10.1145/3649476.3658764},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuWLWY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuCX0024,
author = {Zhaojun Lu and
Qidong Chen and
Peng Xu and
Jiliang Zhang and
Gang Qu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A Cryptographic Hardware Engineering Course based on {FPGA} and Security
Analysis Equipment},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {706--711},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658755},
doi = {10.1145/3649476.3658755},
timestamp = {Thu, 08 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LuCX0024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaderaJ24,
author = {Joseph Madera and
Kyle Juretus},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Boolean Domain Attack on Corrupt and Correct Based Logic Locking Techniques},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {415--420},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658710},
doi = {10.1145/3649476.3658710},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaderaJ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MandalR24,
author = {Suraj Mandal and
Debapriya Basu Roy},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Design of a Lightweight Fast Fourier Transformation for {FALCON} using
Hardware-Software Co-Design},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {228--232},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660370},
doi = {10.1145/3649476.3660370},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MandalR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MangarajMASM24,
author = {Soumyashree Mangaraj and
Jaganath Prasad Mohanty and
Samit Ari and
Ayas Kanta Swain and
Kamalakanta Mahapatra},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{PACAC:} {PYNQ} Accelerated Cardiac Arrhythmia Classifier with secure
transmission- {A} Deep Learning based Approach},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {670--675},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660372},
doi = {10.1145/3649476.3660372},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MangarajMASM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MazonkaMM24,
author = {Oleg Mazonka and
Mohammed Nabeel Thari Moopan and
Michail Maniatakos},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Exploring Generalization of Shoup Modular Multiplier},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {222--227},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660374},
doi = {10.1145/3649476.3660374},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MazonkaMM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MiftahSKB24,
author = {Samit Shahnawaz Miftah and
Amisha Srivastava and
Hyunmin Kim and
Kanad Basu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Assert-O: Context-based Assertion Optimization using LLMs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {233--239},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660378},
doi = {10.1145/3649476.3660378},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MiftahSKB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MitraMK24,
author = {Alakananda Mitra and
Saraju P. Mohanty and
Elias Kougianos},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {ToEFL: {A} Novel Approach for Training on Edge in Smart Agriculture},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {657--662},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660381},
doi = {10.1145/3649476.3660381},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MitraMK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MohammadF24,
author = {Sajeed Mohammad and
Farimah Farahmandi},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {DyFORA: Dynamic Firmware Obfuscation and Remote Attestation using
Hardware Signatures},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {471--476},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658715},
doi = {10.1145/3649476.3658715},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MohammadF24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MonjurY24,
author = {Mohammad Mezanur Rahman Monjur and
Qiaoyan Yu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Advanced Continuous-Time Convolution Framework for Security Assurance
in Wireless Sensor Networks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {319--322},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658785},
doi = {10.1145/3649476.3658785},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MonjurY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MoonR24,
author = {Sabrina Hassan Moon and
Dayane Reis},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {AFeCAM: An Energy Efficient Analog 1FeFET Content Addressable Memory},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {541--545},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658772},
doi = {10.1145/3649476.3658772},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MoonR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NajafiTZSMRA24,
author = {Deniz Najafi and
Sepehr Tabrizchi and
Ranyang Zhou and
Mohammadreza Amel Solouki and
Andrew Marshall and
Arman Roohi and
Shaahin Angizi},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Hybrid Magneto-electric {FET-CMOS} Integrated Memory Design for Instant-on
Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {770--775},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660361},
doi = {10.1145/3649476.3660361},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NajafiTZSMRA24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NandiMR24,
author = {Pratyush Nandi and
Anubhav Mishra and
Madhav Rao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{GOLDS:} Genetic Algorithm-based Optimization of Custom {FPGA} Architecture
Layout Design for Secure Silicon},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {92--97},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658743},
doi = {10.1145/3649476.3658743},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NandiMR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NiCCZI24,
author = {Yang Ni and
William Youngwoo Chung and
Samuel Cho and
Zhuowen Zou and
Mohsen Imani},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Efficient Exploration in Edge-Friendly Hyperdimensional Reinforcement
Learning},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {111--118},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658760},
doi = {10.1145/3649476.3658760},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NiCCZI24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OdomMGK24,
author = {Gaines Odom and
Hardhik Mohanty and
Ujjwal Guin and
Bhaskar Krishnamachari},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Blockchain-Enabled Whitelisting Mechanisms for Enhancing Security
in 3D ICs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {483--488},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660368},
doi = {10.1145/3649476.3660368},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/OdomMGK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OraonMSM24,
author = {Pawan Oraon and
Soumyashree Mangaraj and
Ayas Kanta Swain and
Kamalakanta Mahapatra},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Hardware Accelerated Quantized Hand Written Digit Recognition via
High Level Synthesis},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {688--693},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660369},
doi = {10.1145/3649476.3660369},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/OraonMSM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PariaDB24,
author = {Sudipta Paria and
Aritra Dasgupta and
Swarup Bhunia},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Navigating SoC Security Landscape on LLM-Guided Paths},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {252--257},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660393},
doi = {10.1145/3649476.3660393},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PariaDB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PenmetsaAZFZLH24,
author = {Surya Penmetsa and
Fahad Rahman Amik and
Zhanguang Zhang and
Yingying Fu and
Yingxue Zhang and
Wulong Liu and
Jianye Hao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Generalizable and Relation Sensitive Netlist Representation for Analog
Circuit Design},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {287--291},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658793},
doi = {10.1145/3649476.3658793},
timestamp = {Thu, 27 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PenmetsaAZFZLH24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PetroloMGP24,
author = {Vincenzo Petrolo and
Sourav Medya and
Mariagrazia Graziano and
Debjit Pal},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {DETECTive: Machine Learning-driven Automatic Test Pattern Prediction
for Faults in Digital Circuits},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {32--37},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658696},
doi = {10.1145/3649476.3658696},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PetroloMGP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PratiharCCM24,
author = {Kuheli Pratihar and
Soumi Chatterjee and
Rajat Subhra Chakraborty and
Debdeep Mukhopadhyay},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Breaching the Gap: Modelling SRAM-PUFs via Side-Channel Signatures},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {574--578},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658783},
doi = {10.1145/3649476.3658783},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PratiharCCM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/QayyumKD0D24,
author = {Khushboo Qayyum and
Abhoy Kole and
Kamalika Datta and
Muhammad Hassan and
Rolf Drechsler},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Exploring the Potential of Decision Diagrams for Efficient In-Memory
Design Verification},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {502--506},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658766},
doi = {10.1145/3649476.3658766},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/QayyumKD0D24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/QiF0T024,
author = {Fang Qi and
Xin Fu and
Xu Yuan and
Nian{-}Feng Tzeng and
Lu Peng},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A New Routing Strategy to Improve Success Rates of Quantum Computers},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {546--550},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658790},
doi = {10.1145/3649476.3658790},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/QiF0T024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/QinLWGZ24,
author = {Yunji Qin and
Wenqi Lou and
Chao Wang and
Lei Gong and
Xuehai Zhou},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Enhancing Long Sequence Input Processing in FPGA-Based Transformer
Accelerators through Attention Fusion},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {599--603},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658810},
doi = {10.1145/3649476.3658810},
timestamp = {Fri, 21 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/QinLWGZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RasheediP24,
author = {Rami Rasheedi and
Inna Partin{-}Vaisband},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {An Embedded Multi-Layer Spiral Square Inductor for Integrated Power
Delivery - Physical Design and Analytical Models},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {370--375},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658746},
doi = {10.1145/3649476.3658746},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RasheediP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RaviBCAR24,
author = {Prasanna Ravi and
Shivam Bhasin and
Anupam Chattopadhyay and
Aikata and
Sujoy Sinha Roy},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Backdooring Post-Quantum Cryptography: Kleptographic Attacks on Lattice-based
KEMs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {216--221},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660373},
doi = {10.1145/3649476.3660373},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RaviBCAR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SafariZV24,
author = {Yousef Safari and
Yushu Zhao and
Boris Vaisband},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Co-DTC: Concentric Trench-Based Integrated Capacitors for Advanced
Chiplet-Based Platforms},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {1--6},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658726},
doi = {10.1145/3649476.3658726},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SafariZV24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SaravananD24,
author = {Raghul Saravanan and
Sai Manoj Pudukotai Dinakarrao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {The Fuzz Odyssey: {A} Survey on Hardware Fuzzing Frameworks for Hardware
Design Verification},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {192--197},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658697},
doi = {10.1145/3649476.3658697},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SaravananD24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SaravananD24a,
author = {Raghul Saravanan and
Sai Manoj Pudukotai Dinakarrao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Exploring Coverage Metrics in Hardware Fuzzing: {A} Comprehensive
Analysis},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {240--245},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660386},
doi = {10.1145/3649476.3660386},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SaravananD24a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SathiamoorthyHK24,
author = {Vikash Sathiamoorthy and
Shuo Huai and
Hao Kong and
Di Liu and
Wendy Yong Yi Loy and
Christian Makaya and
Daren Ho and
Ravi Subramaniam and
Qian Lin and
Weichen Liu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {FedTR: Federated Learning Framework with Transfer Learning for Industrial
Visual Inspection},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {310--314},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658768},
doi = {10.1145/3649476.3658768},
timestamp = {Thu, 20 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SathiamoorthyHK24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShawkatHI24,
author = {Mst Shamim Ara Shawkat and
Shante Hicks and
Nahin Irfan},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Review of Neuromorphic Processing for Vision Sensors},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {785--790},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660379},
doi = {10.1145/3649476.3660379},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShawkatHI24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShenYXP0Y24,
author = {Shan Shen and
Dingcheng Yang and
Yuyang Xie and
Chunyan Pei and
Bei Yu and
Wenjian Yu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Deep-Learning-Based Pre-Layout Parasitic Capacitance Prediction on
{SRAM} Designs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {440--445},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658754},
doi = {10.1145/3649476.3658754},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShenYXP0Y24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShengYLJY24,
author = {Yi Sheng and
Junhuan Yang and
Youzuo Lin and
Weiwen Jiang and
Lei Yang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Toward Fair Ultrasound Computing Tomography: Challenges, Solutions
and Outlook},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {748--753},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660387},
doi = {10.1145/3649476.3660387},
timestamp = {Thu, 25 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShengYLJY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShresthaAPS24,
author = {Pratik Shrestha and
Alec Aversa and
Saran Phatharodom and
Ioannis Savidis},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {EDA-schema: {A} Graph Datamodel Schema and Open Dataset for Digital
Design Automation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {69--77},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658718},
doi = {10.1145/3649476.3658718},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShresthaAPS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShuklaBD24,
author = {Sanket Shukla and
Sathwika Bavikadi and
Sai Manoj Pudukotai Dinakarrao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Energy Harvesting-assisted Ultra-Low-Power Processing-in-Memory Accelerator
for {ML} Applications},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {633--638},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660392},
doi = {10.1145/3649476.3660392},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShuklaBD24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SinghV24,
author = {Gian Singh and
Sarma B. K. Vrudhula},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A DRAM-based Near-Memory Architecture for Accelerated and Energy-Efficient
Execution of Transformers},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {57--62},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658732},
doi = {10.1145/3649476.3658732},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SinghV24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SkrommeOB24,
author = {Brian J. Skromme and
Megan A. O'Donnell and
Wendy M. Barnard},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Step-by-Step Tutoring Support for Student Success in Circuit Analysis
Courses},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {347--350},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658787},
doi = {10.1145/3649476.3658787},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SkrommeOB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SnyderCCKSRP24,
author = {Shay Snyder and
Victoria Clerico and
Guojing Cong and
Shruti R. Kulkarni and
Catherine D. Schuman and
Sumedh R. Risbud and
Maryam Parsa},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Transductive Spiking Graph Neural Networks for Loihi},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {608--613},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660366},
doi = {10.1145/3649476.3660366},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SnyderCCKSRP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SnyderRP24,
author = {Shay Snyder and
Sumedh R. Risbud and
Maryam Parsa},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Asynchronous Neuromorphic Optimization in Lava},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {776--778},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660383},
doi = {10.1145/3649476.3660383},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SnyderRP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SunSWK024,
author = {Wendi Sun and
Wenhao Sun and
Yifan Wang and
Yi Kang and
Song Chen},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Communication Minimized Model-Architecture Co-design for Efficient
Convolution Acceleration},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {144--150},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658752},
doi = {10.1145/3649476.3658752},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SunSWK024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TabrizchiTAR24,
author = {Sepehr Tabrizchi and
Nedasadat Taheri and
Shaahin Angizi and
Arman Roohi},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {RACSen: Residue Arithmetic and Chaotic Processing in Sensors to Enhance
{CMOS} Imager Security},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {551--555},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658791},
doi = {10.1145/3649476.3658791},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/TabrizchiTAR24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TaheriAPNS24,
author = {Ebadollah Taheri and
Pooya Aghanoury and
Sudeep Pasricha and
Mahdi Nikdast and
Nader Sehatbakhsh},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{SCRIPT:} {A} Multi-Objective Routing Framework for Securing Chiplet
Systems against Distributed DoS Attacks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {78--85},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658763},
doi = {10.1145/3649476.3658763},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/TaheriAPNS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VasquezLYTP24,
author = {Christopher P. Vasquez and
Travis LeCompte and
Xu Yuan and
Nian{-}Feng Tzeng and
Lu Peng},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Soft Error Resilience Analysis of {LSTM} Networks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {328--332},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658776},
doi = {10.1145/3649476.3658776},
timestamp = {Thu, 27 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/VasquezLYTP24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WanWW24,
author = {Gwok{-}Waa Wan and
Sam{-}Zaak Wong and
Xi Wang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Jailbreaking Pre-trained Large Language Models Towards Hardware Vulnerability
Insertion Ability},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {579--582},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658799},
doi = {10.1145/3649476.3658799},
timestamp = {Tue, 13 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WanWW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Wang0WY24,
author = {Qijing Wang and
Xiaopeng Zhang and
Martin D. F. Wong and
Evangeline F. Y. Young},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {ControLayout: Conditional Diffusion for Style-Controllable and Violation-Fixable
Layout Pattern Generation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {511--515},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658770},
doi = {10.1145/3649476.3658770},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Wang0WY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangFZ24,
author = {Chun Wang and
Yi Fang and
Sihai Zhang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Feature Fusion based Hotspot Detection with R-EfficientNet},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {446--451},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658707},
doi = {10.1145/3649476.3658707},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangFZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangGSHLLMRJSW24,
author = {Yuqin Wang and
Cheng Guo and
Xiaojing Su and
Xin Hong and
Zixi Liu and
Xiaohuan Ling and
Bojie Ma and
Pengyu Ren and
Yujie Jiang and
Yajuan Su and
Yayi Wei},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {An Automatic Insertion Scheme of Extra Via for {DSA-MP} Hybrid Lithography},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {520--524},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658788},
doi = {10.1145/3649476.3658788},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangGSHLLMRJSW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangLWY24,
author = {Qijing Wang and
Jinwei Liu and
Martin D. F. Wong and
Evangeline F. Y. Young},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A Multi-agent Generative Model for Collaborative Global Routing Refinement},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {383--389},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658721},
doi = {10.1145/3649476.3658721},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangLWY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangN024,
author = {Yutong Wang and
Zhaojun Ni and
Siting Liu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Can Stochastic Computing Truly Tolerate Bit Flips?},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {718--723},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658700},
doi = {10.1145/3649476.3658700},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangN024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WitherspoonY24,
author = {Brett Witherspoon and
Aaron R. Young},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Event-Driven Sensing and Embedded Neuromorphic Platforms for Gamma
Radiation Monitoring},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {779--784},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660363},
doi = {10.1145/3649476.3660363},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WitherspoonY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WuZHL24,
author = {Zhenyuan Wu and
Yuhan Zhu and
Xing Huang and
Genggeng Liu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Error Recovery Method Based on Deep Reinforcement Learning for Fully
Programmable Valve Array Biochips},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {533--536},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658807},
doi = {10.1145/3649476.3658807},
timestamp = {Wed, 02 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WuZHL24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WuZLH24,
author = {Yangjie Wu and
Yuhan Zhu and
Genggeng Liu and
Xing Huang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Anomaly Detection Method based on Discrete Particle Swarm Optimization
for Continuous-Flow Microfluidic Biochips},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {507--510},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658767},
doi = {10.1145/3649476.3658767},
timestamp = {Wed, 02 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WuZLH24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Xia024,
author = {Ke Xia and
Sheng Wei},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{DM-TEE:} Trusted Execution Environment for Disaggregated Memory},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {204--209},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658702},
doi = {10.1145/3649476.3658702},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Xia024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiaYFGLZ24,
author = {Dongliang Xia and
Wenxin Yu and
Zhaoqi Fu and
Zejun Gan and
Chengjin Li and
Yupeng Zhang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A P{\&}R Co- Optimization Engine for Reducing Congestion},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {525--528},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658796},
doi = {10.1145/3649476.3658796},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XiaYFGLZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuLPXY24,
author = {Chaolong Xu and
Fangxu Lv and
Zhengbin Pang and
Liquan Xiao and
Zhouhao Yang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{FPGA} Implementation of Sequence Detector for High-Speed {PAM4} Wireline
Transceiver},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {13--18},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658741},
doi = {10.1145/3649476.3658741},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XuLPXY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanDGS0N0W24,
author = {Aibin Yan and
Chen Dong and
Xing Guo and
Jie Song and
Jie Cui and
Tianming Ni and
Patrick Girard and
Xiaoqing Wen},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{IDLD:} Interlocked Dual-Circle Latch Design with Low Cost and Triple-Node-Upset-Recovery
for Aerospace Applications},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {19--24},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658761},
doi = {10.1145/3649476.3658761},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanDGS0N0W24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanambakaSRM24,
author = {Venkata Prasanth Yanambaka and
Ayas Kanta Swain and
Saswat Kumar Ram and
Saraju P. Mohanty},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Security-by-Design For Smart Electronics},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {669},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658748},
doi = {10.1145/3649476.3658748},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanambakaSRM24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangSZWLY24,
author = {Junhuan Yang and
Yi Sheng and
Yuzhou Zhang and
Hanchen Wang and
Youzuo Lin and
Lei Yang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Enhanced {AI} for Science using Diffusion-based Generative {AI} -
{A} Case Study on Ultrasound Computing Tomography},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {754--759},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660360},
doi = {10.1145/3649476.3660360},
timestamp = {Fri, 09 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangSZWLY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangWAJZFCG24,
author = {Yuxin Yang and
Zixu Wang and
Pegah Ahadian and
Abby Jerger and
Jeremy Zucker and
Song Feng and
Feixiong Cheng and
Qiang Guan},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A Deep Multimodal Representation Learning Framework for Accurate Molecular
Properties Prediction},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {760--765},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3660377},
doi = {10.1145/3649476.3660377},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangWAJZFCG24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangZHYMWX24,
author = {Ling Yang and
Zhong Zheng and
Libo Huang and
Run Yan and
Sheng Ma and
Yongwen Wang and
Weixia Xu},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Cost-Effective Value Predictor for {ILP} processors through Design
Space Exploration},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {301--304},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658804},
doi = {10.1145/3649476.3658804},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangZHYMWX24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YarnellHGPGCS0D24,
author = {Richard C. Yarnell and
Mousam Hossain and
Raul Graterol and
Ayush Pindoria and
Sujan Ghimire and
Muhtasim Alam Chowdhury and
Soheil Salehi and
Yu Bai and
Ronald F. DeMara},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Educational Tool-spaces for Convolutional Neural Network {FPGA} Design
Space Exploration Using High-Level Synthesis},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {343--346},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658786},
doi = {10.1145/3649476.3658786},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YarnellHGPGCS0D24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YinDVJ024,
author = {Zihan Yin and
Annewsha Datta and
Shwetha Vijayakumar and
Ajey P. Jacob and
Akhilesh Jaiswal},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A 9 Transistor {SRAM} Featuring Array-level {XOR} Parallelism with
Secure Data Toggling Operation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {277--281},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658789},
doi = {10.1145/3649476.3658789},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YinDVJ024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YuLJ0S024,
author = {Duo Yu and
Ang Li and
Naifeng Jing and
Jianfei Jiang and
Weiguang Sheng and
Qin Wang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{VDA:} {A} Simple but Efficient Virtual-Channel-Based Deadlock Avoidance
Scheme for Scalable Chiplet Networks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {357--363},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658704},
doi = {10.1145/3649476.3658704},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YuLJ0S024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZangLLLY24,
author = {Xinshi Zang and
Wenhao Lin and
Shiju Lin and
Jinwei Liu and
Evangeline F. Y. Young},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {An Open-Source Fast Parallel Routing Approach for Commercial FPGAs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {164--169},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658714},
doi = {10.1145/3649476.3658714},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZangLLLY24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZangLSZYW24,
author = {Xinshi Zang and
Qin Luo and
Zhongwei Shao and
Jifeng Zhang and
Evangeline F. Y. Young and
Martin D. F. Wong},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Dynamic Multi-FPGA Prototyping Platforms with Simultaneous Networking,
Placement and Routing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {433--439},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658713},
doi = {10.1145/3649476.3658713},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZangLSZYW24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangBRCVB24,
author = {Yichao Zhang and
Marco Bertuletti and
Samuel Riedel and
Matheus A. Cavalcante and
Alessandro Vanelli{-}Coralli and
Luca Benini},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {TeraPool-SDR: An 1.89TOPS 1024 RV-Cores 4MiB Shared-L1 Cluster for
Next-Generation Open-Source Software-Defined Radios},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {86--91},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658735},
doi = {10.1145/3649476.3658735},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangBRCVB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangGW0J24,
author = {Wenhui Zhang and
Xinkuang Geng and
Qin Wang and
Jie Han and
Honglan Jiang},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {A Low-Power and High-Accuracy Approximate Adder for Logarithmic Number
System},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {125--131},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658706},
doi = {10.1145/3649476.3658706},
timestamp = {Tue, 13 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangGW0J24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaoC24,
author = {Guocheng Zhao and
Yongxiang Cao},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Highly Efficient Load-Balanced Dataflow for SpGEMMs on Systolic Arrays},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {272--276},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658777},
doi = {10.1145/3649476.3658777},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaoC24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhouDCC024,
author = {Zikang Zhou and
Xuyang Duan and
Kaiqi Chen and
Yaqi Chen and
Jun Han},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {ML-Fusion: Determining Memory Levels for Data Reuse Between {DNN}
Layers},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {63--68},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658698},
doi = {10.1145/3649476.3658698},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhouDCC024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuLYZ24,
author = {Yankun Zhu and
Siting Liu and
Liyu Yang and
Pingqiang Zhou},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {{LDL-SCA:} Linearized Deep Learning Side-Channel Attack Targeting
Multi-tenant FPGAs{\unicode{10033}}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {583--587},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658800},
doi = {10.1145/3649476.3658800},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuLYZ24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Zou0L24,
author = {Sunan Zou and
Jiaxi Zhang and
Guojie Luo},
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Incremental SAT-based Exact Synthesis},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
pages = {158--163},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476.3658739},
doi = {10.1145/3649476.3658739},
timestamp = {Tue, 18 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Zou0L24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2024,
editor = {Inna Partin{-}Vaisband and
Srinivas Katkoori and
Lu Peng and
Boris Vaisband and
Tooraj Nikoubin},
title = {Proceedings of the Great Lakes Symposium on {VLSI} 2024, {GLSVLSI}
2024, Clearwater, FL, USA, June 12-14, 2024},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649476},
doi = {10.1145/3649476},
timestamp = {Tue, 11 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2024.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AarellaMKP23,
author = {Seema G. Aarella and
Saraju P. Mohanty and
Elias Kougianos and
Deepak Puthal},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Fortified-Edge: Secure {PUF} Certificate Authentication Mechanism
for Edge Data Centers in Collaborative Edge Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {249--254},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590249},
doi = {10.1145/3583781.3590249},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AarellaMKP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AdeyemoH23,
author = {Adewale Adeyemo and
Syed Rafay Hasan},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Enhancing the Security of Collaborative Deep Neural Networks: An Examination
of the Effect of Low Pass Filters},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {461--465},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590299},
doi = {10.1145/3583781.3590299},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AdeyemoH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AfifiSNP23,
author = {Salma Afifi and
Febin Sunny and
Mahdi Nikdast and
Sudeep Pasricha},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{TRON:} Transformer Neural Network Acceleration with Non-Coherent
Silicon Photonics},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {15--21},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590259},
doi = {10.1145/3583781.3590259},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AfifiSNP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AghamohammadiR23,
author = {Yeganeh Aghamohammadi and
Amin Rezaei},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {CoLA: Convolutional Neural Network Model for Secure Low Overhead Logic
Locking Assignment},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {339--344},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590219},
doi = {10.1145/3583781.3590219},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AghamohammadiR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlamFR23,
author = {Sk Hasibul Alam and
Adam Z. Foshie and
Garrett S. Rose},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Runtime-Reconfigurable Hardware Encoder for Spiking Neural Networks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {203--206},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590284},
doi = {10.1145/3583781.3590284},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlamFR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlamNTIP23,
author = {Mohsen Riahi Alam and
M. Hassan Najafi and
Nima TaheriNejad and
Mohsen Imani and
Lu Peng},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Stochastic Computing for Reliable Memristive In-Memory Computation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {397--401},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590307},
doi = {10.1145/3583781.3590307},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlamNTIP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlruwaillMK23,
author = {Musharraf N. Alruwaill and
Saraju P. Mohanty and
Elias Kougianos},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {hChain: Blockchain Based Healthcare Data Sharing with Enhanced Security
and Privacy Location-Based-Authentication},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {97--102},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590255},
doi = {10.1145/3583781.3590255},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlruwaillMK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AminEZ23,
author = {Md Hasibul Amin and
Mohammed E. Elbtity and
Ramtin Zand},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {IMAC-Sim: : {A} Circuit-level Simulator For In-Memory Analog Computing
Architectures},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {659--664},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590264},
doi = {10.1145/3583781.3590264},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AminEZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AnikRDGK23,
author = {Md Toufiq Hasan Anik and
Hasin Ishraq Reefat and
Jean{-}Luc Danger and
Sylvain Guilley and
Naghmeh Karimi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Aging-Induced Failure Prognosis via Digital Sensors},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {703--708},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590204},
doi = {10.1145/3583781.3590204},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AnikRDGK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AounMT23,
author = {Alain Aoun and
Mahmoud Masadeh and
Sofi{\`{e}}ne Tahar},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Machine Learning Based Load Value Approximator Guided by the Tightened
Value Locality},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {679--684},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590207},
doi = {10.1145/3583781.3590207},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AounMT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AssoaBRR23,
author = {Adou Sangbone Assoa and
Ashwin Bhat and
Sigang Ryu and
Arijit Raychowdhury},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Scalable Platform for Single-Snapshot Direction Of Arrival {(DOA)}
Estimation in Massive {MIMO} Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {631--637},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590212},
doi = {10.1145/3583781.3590212},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AssoaBRR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AygunNIG23,
author = {Sercan Aygun and
M. Hassan Najafi and
Mohsen Imani and
Ece Olcay G{\"{u}}nes},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Reconvergent Path-aware Simulation of Bit-stream Processing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {225--226},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590323},
doi = {10.1145/3583781.3590323},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AygunNIG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AygunNIG23a,
author = {Sercan Aygun and
M. Hassan Najafi and
Mohsen Imani and
Ece Olcay G{\"{u}}nes},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Bit-Stream Processing with No Bit-Stream: Efficient Software Simulation
of Stochastic Vision Machines},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {273--279},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590217},
doi = {10.1145/3583781.3590217},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AygunNIG23a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BairamkulovM23,
author = {Rassul Bairamkulov and
Giovanni De Micheli},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Compound Logic Gates for Pipeline Depth Minimization in Single Flux
Quantum Integrated Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {421--425},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590287},
doi = {10.1145/3583781.3590287},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BairamkulovM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BathalapalliMKI23,
author = {Venkata K. V. V. Bathalapalli and
Saraju P. Mohanty and
Elias Kougianos and
Vasanth Iyer and
Bibhudutta Rout},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {PUFchain 4.0: Integrating PUF-based {TPM} in Distributed Ledger for
Security-by-Design of IoT},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {231--236},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590206},
doi = {10.1145/3583781.3590206},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BathalapalliMKI23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BhattacharjeeMK23,
author = {Abhiroop Bhattacharjee and
Abhishek Moitra and
Youngeun Kim and
Yeshwanth Venkatesha and
Priyadarshini Panda},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Examining the Role and Limits of Batchnorm Optimization to Mitigate
Diverse Hardware-noise in In-memory Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {619--624},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590241},
doi = {10.1145/3583781.3590241},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BhattacharjeeMK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BhattacharjyaMD23,
author = {Rajat Bhattacharjya and
Biswadip Maity and
Nikil D. Dutt},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Locate: Low-Power Viterbi Decoder Exploration using Approximate Adders},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {409--413},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590314},
doi = {10.1145/3583781.3590314},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BhattacharjyaMD23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChakrabortyDR23,
author = {Nishith N. Chakraborty and
Hritom Das and
Garrett S. Rose},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Mixed-Signal Short-Term Plasticity Implementation for a Current-Controlled
Memristive Synapse},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {179--182},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590283},
doi = {10.1145/3583781.3590283},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChakrabortyDR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChangMCMG23,
author = {Hung{-}Yang Chang and
Seyyed Hasan Mozafari and
James J. Clark and
Brett H. Meyer and
Warren J. Gross},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {High-Throughput Edge Inference for {BERT} Models via Neural Architecture
Search and Pipeline},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {455--459},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590302},
doi = {10.1145/3583781.3590302},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChangMCMG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenFHCZYHF23,
author = {Xinda Chen and
Rongliang Fu and
Junying Huang and
Huawei Cao and
Zhimin Zhang and
Xiaochun Ye and
Tsung{-}Yi Ho and
Dongrui Fan},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {JRouter: {A} Multi-Terminal Hierarchical Length-Matching Router under
Planar Manhattan Routing Model for {RSFQ} Circuits},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {515--520},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590267},
doi = {10.1145/3583781.3590267},
timestamp = {Tue, 22 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenFHCZYHF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenGWDB23,
author = {Dake Chen and
Christine Goins and
Maxwell Waugaman and
Georgios D. Dimou and
Peter A. Beerel},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Island-based Random Dynamic Voltage Scaling vs ML-Enhanced Power Side-Channel
Attacks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {333--338},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590266},
doi = {10.1145/3583781.3590266},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenGWDB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChiuFCW23,
author = {Chun{-}Wei Chiu and
Yun{-}Kai Fang and
Shao{-}Ting Chung and
Ting{-}Chi Wang},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Macro Legalization Approach Considering Minimum Channel Spacing
and Buffer Area Reservation Constraints},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {391--395},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590282},
doi = {10.1145/3583781.3590282},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChiuFCW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Chong23,
author = {Fred Chong},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Closing the Gap between Quantum Algorithms and Machines with Hardware-Software
Co-Design},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {83--84},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3592462},
doi = {10.1145/3583781.3592462},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Chong23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ClarkHT23,
author = {Joseph Clark and
Travis S. Humble and
Himanshu Thapliyal},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{TDAG:} Tree-based Directed Acyclic Graph Partitioning for Quantum
Circuits},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {587--592},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590234},
doi = {10.1145/3583781.3590234},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ClarkHT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CulticeCT23,
author = {Tyler Cultice and
Joseph Clark and
Himanshu Thapliyal},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Lightweight Hierarchical Root-of-Trust Framework for CAN-based 3D
Printing Security},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {215--216},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590324},
doi = {10.1145/3583781.3590324},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CulticeCT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DallOraAFGF23,
author = {Nicola Dall'Ora and
Sadia Azam and
Enrico Fraccaroli and
Renaud Gillon and
Franco Fummi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Verilog-A Implementation of Generic Defect Templates for Analog Fault
Injection},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {477--481},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590317},
doi = {10.1145/3583781.3590317},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DallOraAFGF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DasRFLCR23,
author = {Hritom Das and
Manu Rathore and
Rocco Febbo and
Maximilian Liehr and
Nathaniel C. Cady and
Garrett S. Rose},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{RFAM:} RESET-Failure-Aware-Model for HfO2-based Memristor to Enhance
the Reliability of Neuromorphic Design},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {281--286},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590211},
doi = {10.1145/3583781.3590211},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DasRFLCR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DayoMKV23,
author = {Samuel Dayo and
Ataollah Saeed Monir and
Mousa Karimi and
Boris Vaisband},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Statistical Weight Refresh System for CTT-Based Synaptic Arrays},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {213--214},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590325},
doi = {10.1145/3583781.3590325},
timestamp = {Mon, 05 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DayoMKV23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DerasariGV23,
author = {Preet Derasari and
Kailash Gogineni and
Guru Venkataramani},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{MAYAVI:} {A} Cyber-Deception Hardware for Memory Load-Stores},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {563--568},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590272},
doi = {10.1145/3583781.3590272},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DerasariGV23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ElbtityRAZ23,
author = {Mohammed E. Elbtity and
Brendan Reidy and
Md Hasibul Amin and
Ramtin Zand},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Heterogeneous Integration of In-Memory Analog Computing Architectures
with Tensor Processing Units},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {607--612},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590256},
doi = {10.1145/3583781.3590256},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ElbtityRAZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/EllisGER23,
author = {Zachary J. Ellis and
Anupam Golder and
Addison J. Elliott and
Arijit Raychowdhury},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{RAGA:} Resource-Aware Tree-Splitting for High Performance Knuth-Yao-based
Discrete Gaussian Sampling on FPGAs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {443--447},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590304},
doi = {10.1145/3583781.3590304},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/EllisGER23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FanWL0Y23,
author = {Haishuang Fan and
Jingya Wu and
Wenyan Lu and
Xiaowei Li and
Guihai Yan},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{M2VT:} {A} Multi-Output Encoder Accelerator for Multiple-Way Video
Transcoding},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {69--75},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590270},
doi = {10.1145/3583781.3590270},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FanWL0Y23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GandhiABMTB23,
author = {Upma Gandhi and
Erfan Aghaeekiasaraee and
Ismail S. K. Bustany and
Payam Mousavi and
Matthew E. Taylor and
Laleh Behjat},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {RL-Ripper: : {A} Framework for Global Routing Using Reinforcement
Learning and Smart Net Ripping Techniques},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {197--201},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590312},
doi = {10.1145/3583781.3590312},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GandhiABMTB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GaoXY23,
author = {Zhenyi Gao and
Yuyang Xie and
Wenjian Yu},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Efficient and Effective Digital Waveform Compression for Large-scale
Logic Simulation of Integrated Circuit},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {373--377},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590297},
doi = {10.1145/3583781.3590297},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GaoXY23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GaurHT23,
author = {Bhaskar Gaur and
Travis S. Humble and
Himanshu Thapliyal},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Noise-Resilient and Reduced Depth Approximate Adders for {NISQ} Quantum
Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {427--431},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590315},
doi = {10.1145/3583781.3590315},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GaurHT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GaurMT23,
author = {Bhaskar Gaur and
Edgard Mu{\~{n}}oz{-}Coreas and
Himanshu Thapliyal},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Logarithmic Depth Quantum Carry-Lookahead Modulo (2n - 1) Adder},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {125--130},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590205},
doi = {10.1145/3583781.3590205},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GaurMT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GongMY23,
author = {Mengshi Gong and
Jie Ma and
Wenxin Yu},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {An Efficient and Robust Algorithm for Common Path Pessimism Removal
In Static Timing Analysis},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {369--372},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590286},
doi = {10.1145/3583781.3590286},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GongMY23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GovindankuttyAD23,
author = {Arun Govindankutty and
Shamiul Alam and
Sanjay Das and
Nagadastagiri Challapalle and
Ahmedullah Aziz and
Sumitha George},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Ternary In-Memory Computing with Cryogenic Quantum Anomalous Hall
Effect Memories},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {521--526},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590236},
doi = {10.1145/3583781.3590236},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GovindankuttyAD23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GowdaCR23,
author = {Bindu G. Gowda and
Prashanth H. C. and
Madhav Rao},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{IMAC:} : {A} Pre-Multiplier And Integrated Reduction Based Multiply-And-Accumulate
Unit},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {503--508},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590265},
doi = {10.1145/3583781.3590265},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GowdaCR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GumusKV23,
author = {Okyanus T. Gumus and
Mousa Karimi and
Boris Vaisband},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Digital {LIF} Neuron for CTT-Based Neuromorphic Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {267--272},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590230},
doi = {10.1145/3583781.3590230},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GumusKV23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HanWDLW023,
author = {Ming Han and
Ye Wang and
Jian Dong and
Heng Liu and
Jin Wu and
Gang Qu},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{ATC:} Approximate Temporal Coding for Efficient Implementations of
Spiking Neural Networks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {527--532},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590201},
doi = {10.1145/3583781.3590201},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HanWDLW023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HoferKHKH023,
author = {Julian H{\"{o}}fer and
Fabian Kempf and
Tim Hotfilter and
Fabian Kre{\ss} and
Tanja Harbaum and
J{\"{u}}rgen Becker},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {SiFI-AI: {A} Fast and Flexible {RTL} Fault Simulation Framework Tailored
for {AI} Models and Accelerators},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {287--292},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590226},
doi = {10.1145/3583781.3590226},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HoferKHKH023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Ibrahim23,
author = {Mohamed I. Ibrahim},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Scalable Hybrid CMOS-Diamond Quantum Magnetometers},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {115--116},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590215},
doi = {10.1145/3583781.3590215},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Ibrahim23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/IslamA23,
author = {Mohammad Munzurul Islam and
Mohammed Alawad},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Stochastically Pruning Large Language Models Using Sparsity Regularization
and Compressive Sensing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {63--68},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590232},
doi = {10.1145/3583781.3590232},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/IslamA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/IslamAUHA23,
author = {Md. Mazharul Islam and
Shamiul Alam and
Md Rahatul Islam Udoy and
Md. Shafayat Hossain and
Ahmedullah Aziz},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Cryogenic Artificial Synapse based on Superconducting Memristor},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {143--148},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590203},
doi = {10.1145/3583781.3590203},
timestamp = {Fri, 26 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/IslamAUHA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JainJ23,
author = {Sushil Kumar Jain and
Amit Mahesh Joshi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{OTFT} Based Biosensor for Detection of Breast Cancer Biomarker (C-erbB-2)},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {91--96},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590310},
doi = {10.1145/3583781.3590310},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JainJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Jha23,
author = {Niraj K. Jha},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Smart Healthcare},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {1},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3592463},
doi = {10.1145/3583781.3592463},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Jha23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiYHSY23,
author = {Weiqing Ji and
Hailong Yao and
Tsung{-}Yi Ho and
Ulf Schlichtmann and
Xia Yin},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {GAT-based Concentration Prediction for Random Microfluidic Mixers
with Multiple Input Flow Rates},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {483--488},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590251},
doi = {10.1145/3583781.3590251},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JiYHSY23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiYYHSY23,
author = {Weiqing Ji and
Xingcheng Yao and
Hailong Yao and
Tsung{-}Yi Ho and
Ulf Schlichtmann and
Xia Yin},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{SOAER:} Self-Obstacle Avoiding Escape Routing for Paper-Based Digital
Microfluidic Biochips},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {255--260},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590229},
doi = {10.1145/3583781.3590229},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JiYYHSY23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JonnalagaddaUVA23,
author = {Aditya Anirudh Jonnalagadda and
Anil Kumar Uppugunduru and
Sreehari Veeramachaneni and
Syed Ershad Ahmed},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Design of Energy Efficient Posit Multiplier},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {645--651},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590227},
doi = {10.1145/3583781.3590227},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JonnalagaddaUVA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KaiserDS0YGJBJ23,
author = {Md. Abdullah{-}Al Kaiser and
Gourav Datta and
Sreetama Sarkar and
Souvik Kundu and
Zihan Yin and
Manas Garg and
Ajey P. Jacob and
Peter A. Beerel and
Akhilesh R. Jaiswal},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Technology-Circuit-Algorithm Tri-Design for Processing-in-Pixel-in-Memory
{(P2M)}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {613--618},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590235},
doi = {10.1145/3583781.3590235},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KaiserDS0YGJBJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KaiserTJJ23,
author = {Md. Abdullah{-}Al Kaiser and
Edwin Tieu and
Ajey P. Jacob and
Akhilesh R. Jaiswal},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Context-Switching/Dual-Context {ROM} Augmented {RAM} using Standard
8T {SRAM}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {149--153},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590279},
doi = {10.1145/3583781.3590279},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KaiserTJJ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KimK23,
author = {Hwapyong Kim and
Taewhan Kim},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Placement Legalization Amenable to Mixed-cell-height Standard Cells
Integrating into State-of-the-art Commercial {EDA} Tool},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {321--326},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590278},
doi = {10.1145/3583781.3590278},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KimK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KocharENFA23,
author = {Nakul Kochar and
Lucas Ekiert and
Deniz Najafi and
Deliang Fan and
Shaahin Angizi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Accelerating Low Bit-width Neural Networks at the Edge, {PIM} or {FPGA:}
{A} Comparative Study},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {625--630},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590213},
doi = {10.1145/3583781.3590213},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KocharENFA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KongFWCCLYL23,
author = {Hao Kong and
Haishuang Fan and
Jingya Wu and
Liyun Cheng and
Yan Chen and
Wenyan Lu and
Guihai Yan and
Xiaowei Li},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{KPU-SQL:} Kernel Processing Unit for High-Performance {SQL} Acceleration},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {37--43},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590268},
doi = {10.1145/3583781.3590268},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KongFWCCLYL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KunduVVM023,
author = {Debraj Kundu and
Gadikoyila Satya Vamsi and
Karnati Vivek Veman and
Gurram Mahidhar and
Sudip Roy},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Reinforcement Learning based Module Placement for Enhancing Reliability
of {MEDA} Digital Microfluidic Biochips},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {509--514},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590209},
doi = {10.1145/3583781.3590209},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KunduVVM023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LeCompteQYTN023,
author = {Travis LeCompte and
Fang Qi and
Xu Yuan and
Nian{-}Feng Tzeng and
M. Hassan Najafi and
Lu Peng},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Graph Neural Network Assisted Quantum Compilation for Qubit Allocation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {415--419},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590300},
doi = {10.1145/3583781.3590300},
timestamp = {Mon, 25 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LeCompteQYTN023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Li23,
author = {Minjun Li},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Unaligned Access Optimization with Request-based Mapping Scheme for
Solid-state Drives},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {223--224},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590322},
doi = {10.1145/3583781.3590322},
timestamp = {Mon, 05 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Li23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiYGZ23,
author = {Lingjie Li and
Wenjian Yu and
Genhua Guo and
Zhenya Zhou},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {More Efficient Accuracy-Ensured Waveform Compression for Circuit Simulation
Supporting Asynchronous Waveforms},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {305--311},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590263},
doi = {10.1145/3583781.3590263},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiYGZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiZWZZDLY23,
author = {Yanjun Li and
Chunshan Zu and
Bingqian Wang and
Zhenhua Zhu and
Yaojun Zhang and
Ran Duan and
Bing Li and
Bonan Yan},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {SRAM-Based Processing-In-Memory Design with Kullback-Leibler Divergence-Based
Dynamic Precision Quantization},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {189--192},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590306},
doi = {10.1145/3583781.3590306},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiZWZZDLY23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiangHMW23,
author = {Syuan{-}Han Liang and
Tsu{-}Ling Hsiung and
Wai{-}Kei Mak and
Ting{-}Chi Wang},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Hybrid-Row-Height Design Placement Legalization Considering Cell Variants},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {363--367},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590303},
doi = {10.1145/3583781.3590303},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiangHMW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiaoWL0Y23,
author = {Yunkun Liao and
Jingya Wu and
Wenyan Lu and
Xiaowei Li and
Guihai Yan},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Optimize the {TX} Architecture of {RDMA} {NIC} for Performance Isolation
in the Cloud Environment},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {29--35},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590276},
doi = {10.1145/3583781.3590276},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiaoWL0Y23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LinCYHTFC23,
author = {Jhen{-}Gang Lin and
Yu{-}Guang Chen and
Yun{-}Wei Yang and
Wei{-}Tse Hung and
Cheng{-}Hong Tsai and
De{-}Shiun Fu and
Mango Chia{-}Tso Chao},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{DRC} Violation Prediction with Pre-global-routing Features Through
Convolutional Neural Network},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {313--319},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590216},
doi = {10.1145/3583781.3590216},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LinCYHTFC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LopezSHS23,
author = {Martin Manuel Lopez and
Sicong Shao and
Salim Hariri and
Soheil Salehi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Machine Learning for Intrusion Detection: Stream Classification Guided
by Clustering for Sustainable Security in IoT},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {691--696},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590271},
doi = {10.1145/3583781.3590271},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LopezSHS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LouFLG23,
author = {Jie Lou and
Florian Freye and
Christian Lanius and
Tobias Gemmeke},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Scalable Time-Domain Compute-in-Memory {BNN} Engine with 2.06 {POPS/W}
Energy Efficiency for Edge-AI Devices},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {665--670},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590220},
doi = {10.1145/3583781.3590220},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LouFLG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MishtyS23,
author = {Kaniz Mishty and
Mehdi Sadi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {System and Design Technology Co-optimization of Chiplet-based {AI}
Accelerator with Machine Learning},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {697--702},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590233},
doi = {10.1145/3583781.3590233},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MishtyS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Mittu0023,
author = {Priya Mittu and
Yuntao Liu and
Ankur Srivastava},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {TimingCamouflage+ Decamouflaged},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {575--580},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590238},
doi = {10.1145/3583781.3590238},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Mittu0023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MohammadiSKZ23,
author = {Mohammadreza Mohammadi and
Heath Smith and
Lareb Khan and
Ramtin Zand},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Facial Expression Recognition at the Edge: {CPU} vs {GPU} vs {VPU}
vs {TPU}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {243--248},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590245},
doi = {10.1145/3583781.3590245},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MohammadiSKZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MoiniKHT23,
author = {Shayan Moini and
Dhruv Kansagara and
Daniel E. Holcomb and
Russell Tessier},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Fault Recovery from Multi-Tenant {FPGA} Voltage Attacks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {557--562},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590246},
doi = {10.1145/3583781.3590246},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MoiniKHT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MoitraYP23,
author = {Abhishek Moitra and
Ruokai Yin and
Priyadarshini Panda},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Hardware Accelerators for Spiking Neural Networks for Energy-Efficient
Edge Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {137--138},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590254},
doi = {10.1145/3583781.3590254},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MoitraYP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MojaverL23,
author = {Kaveh (Hassan) Rahbardar Mojaver and
Odile Liboiron{-}Ladouceur},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Multi-Transverse-Mode Silicon Photonics for Quantum Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {551--556},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590274},
doi = {10.1145/3583781.3590274},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MojaverL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MondalNS23,
author = {Debabrata Mondal and
Syed Farah Naz and
Ambika Prasad Shah},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Radiation Hardened and Leakage Power Attack Resilient 12T {SRAM} Cell
for Secure Nuclear Environments},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {227--228},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590321},
doi = {10.1145/3583781.3590321},
timestamp = {Mon, 05 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MondalNS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MorrisAXS23,
author = {Jalil Morris and
Anisul Abedin and
Chuanqi Xu and
Jakub Szefer},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Fingerprinting Quantum Computer Equipment},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {117--123},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590247},
doi = {10.1145/3583781.3590247},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MorrisAXS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MorsaliNKA23,
author = {Mehrdad Morsali and
Mahmoud Nazzal and
Abdallah Khreishah and
Shaahin Angizi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{IMA-GNN:} In-Memory Acceleration of Centralized and Decentralized
Graph Neural Networks at the Edge},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {3--8},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590248},
doi = {10.1145/3583781.3590248},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MorsaliNKA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NandigamaGCR23,
author = {Sai Karthik Nandigama and
Bindu G. Gowda and
Prashanth H. C. and
Madhav Rao},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{EBASA:} Error Balanced Approximate Systolic Array Architecture Design},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {473--476},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590296},
doi = {10.1145/3583781.3590296},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NandigamaGCR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NasahlM23,
author = {Pascal Nasahl and
Stefan Mangard},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{SCRAMBLE-CFI:} Mitigating Fault-Induced Control-Flow Attacks on OpenTitan},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {45--50},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590221},
doi = {10.1145/3583781.3590221},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NasahlM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NathTNPM23,
author = {Rajdeep Kumar Nath and
Jaakko Tervonen and
Johanna N{\"{a}}rv{\"{a}}inen and
Kati Pettersson and
Jani M{\"{a}}ntyj{\"{a}}rvi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Towards Self-Supervised Learning of {ECG} Signal Representation for
the Classification of Acute Stress Types},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {85--90},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590252},
doi = {10.1145/3583781.3590252},
timestamp = {Wed, 18 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NathTNPM23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NazariS23,
author = {Najmeh Nazari and
Mostafa E. Salehi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Inter-Layer Hybrid Quantization Scheme for Hardware Friendly Implementation
of Embedded Deep Neural Networks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {193--196},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590316},
doi = {10.1145/3583781.3590316},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NazariS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NiAIKMI23,
author = {Yang Ni and
Danny Abraham and
Mariam Issa and
Yeseong Kim and
Pietro Mercati and
Mohsen Imani},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Efficient Off-Policy Reinforcement Learning via Brain-Inspired Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {449--453},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590298},
doi = {10.1145/3583781.3590298},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NiAIKMI23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NieCLHQH23,
author = {Chen Nie and
Xianjue Cai and
Chenyang Lv and
Chen Huang and
Weikang Qian and
Zhezhi He},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{XMG-GPPIC:} Efficient and Robust General-Purpose Processing-in-Cache
with XOR-Majority-Graph},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {183--187},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590288},
doi = {10.1145/3583781.3590288},
timestamp = {Mon, 05 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NieCLHQH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NoureddineBTKCF23,
author = {Hadi Noureddine and
Omar Bekdache and
Mohamad Al Tawil and
Rouwaida Kanj and
Ali Chehab and
Mohammed E. Fouda and
Ahmed M. Eltawil},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {High-Density FeFET-based {CAM} Cell Design Via Multi-Dimensional Encoding},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {403--407},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590301},
doi = {10.1145/3583781.3590301},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NoureddineBTKCF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OelundK23,
author = {James Oelund and
Sunwoong Kim},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{ILAFD:} Accuracy-Configurable Floating-Point Divider Using an Approximate
Reciprocal and an Iterative Logarithmic Multiplier},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {639--644},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590262},
doi = {10.1145/3583781.3590262},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/OelundK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Oli-Uz-ZamanKOL23,
author = {Md. Oli{-}Uz{-}Zaman and
Saleh Ahmad Khan and
William Oswald and
Zhiheng Liao and
Jinhui Wang},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Reconfigurable Mapping Algorithm based Stuck-At-Fault Mitigation in
Neuromorphic Computing Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {261--266},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590208},
doi = {10.1145/3583781.3590208},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Oli-Uz-ZamanKOL23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OnimT23,
author = {Md. Saif Hassan Onim and
Himanshu Thapliyal},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{CASD-OA:} Context-Aware Stress Detection for Older Adults with Machine
Learning and Cortisol Biomarker},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {103--108},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590218},
doi = {10.1145/3583781.3590218},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/OnimT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ParsaKA23,
author = {Maryam Parsa and
Khaled N. Khasawneh and
Ihsen Alouani},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Brain-inspired Approach for Malware Detection using Sub-semantic
Hardware Features},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {139--142},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590293},
doi = {10.1145/3583781.3590293},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ParsaKA23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Pasricha23,
author = {Sudeep Pasricha},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Ethics in Computing Education: Challenges and Experience with Embedded
Ethics},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {653--658},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590240},
doi = {10.1145/3583781.3590240},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Pasricha23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PatwariSKJR23,
author = {Nitin D. Patwari and
Anjul Srivastav and
Mayank Kabra and
Prashanth Jonna and
Madhav Rao},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Design and Evaluation of Finite Field Multipliers Using Fast {XNOR}
Cells},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {163--166},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590290},
doi = {10.1145/3583781.3590290},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PatwariSKJR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PeiMLTCTP23,
author = {Zhenlin Pei and
Mahta Mayahinia and
Hsiao{-}Hsuan Liu and
Mehdi B. Tahoori and
Francky Catthoor and
Zsolt Tokei and
Chenyun Pan},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {159--162},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590311},
doi = {10.1145/3583781.3590311},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PeiMLTCTP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PiZLQW23,
author = {Yan Pi and
Hongji Zou and
Tun Li and
Wanxia Qu and
Hai Wan},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{ESFO:} Equality Saturation for {FIRRTL} Optimization},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {581--586},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590239},
doi = {10.1145/3583781.3590239},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PiZLQW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RahmanAFK23,
author = {Mohammad Sazadur Rahman and
Kimia Zamiri Azar and
Farimah Farahmandi and
Hadi Mardani Kamali},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Metrics-to-Methods: Decisive Reverse Engineering Metrics for Resilient
Logic Locking},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {685--690},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590273},
doi = {10.1145/3583781.3590273},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RahmanAFK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RathoreFFTDR23,
author = {Manu Rathore and
Rocco D. Febbo and
Adam Z. Foshie and
Sree Nirmillo Biswash Tushar and
Hritom Das and
Garrett S. Rose},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Reliability Analysis of Memristive Reservoir Computing Architecture},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {131--136},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590210},
doi = {10.1145/3583781.3590210},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RathoreFFTDR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RathoreMS23,
author = {Mallika Rathore and
Peter A. Milder and
Emre Salman},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Precision and Performance-Aware Voltage Scaling in {DNN} Accelerators},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {237--242},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590202},
doi = {10.1145/3583781.3590202},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RathoreMS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SchlaglG23,
author = {Manfred Schl{\"{a}}gl and
Daniel Gro{\ss}e},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{GUI-VP} Kit: {A} {RISC-V} {VP} Meets Linux Graphics - Enabling Interactive
Graphical Application Development},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {599--605},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590253},
doi = {10.1145/3583781.3590253},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SchlaglG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShafieeCPN23,
author = {Amin Shafiee and
Beno{\^{\i}}t Charbonnier and
Sudeep Pasricha and
Mahdi Nikdast},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Design Space Exploration for PCM-based Photonic Memory},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {533--538},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590228},
doi = {10.1145/3583781.3590228},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShafieeCPN23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShahR23,
author = {Shivani Shah and
Nanditha P. Rao},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {MCSim: {A} Multi-Core Cache Simulator Accelerated on a Resource-constrained
{FPGA}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {155--158},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590309},
doi = {10.1145/3583781.3590309},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShahR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShamsiZ23,
author = {Kaveh Shamsi and
Guangwei Zhao},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Enhancing Solver-based Generic Side-Channel Analysis with Machine
Learning},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {345--350},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590237},
doi = {10.1145/3583781.3590237},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShamsiZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SiS23,
author = {Qilin Si and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{PEPA:} Performance Enhancement of Embedded Processors through {HW}
Accelerator Resource Sharing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {23--28},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590277},
doi = {10.1145/3583781.3590277},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SiS23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SiS23a,
author = {Qilin Si and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{ADVICE:} Automatic Design and Optimization of Behavioral Application
Specific Processors},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {327--332},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590214},
doi = {10.1145/3583781.3590214},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SiS23a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SomesulaJK23,
author = {Raaga Sai Somesula and
Rajeev Joshi and
Srinivas Katkoori},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {On Feasibility of Decision Trees for Edge Intelligence in Highly Constrained
Internet-of-Things (IoT)},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {217--218},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590320},
doi = {10.1145/3583781.3590320},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SomesulaJK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SrivastavaLCAB23,
author = {Amisha Srivastava and
Chao Lu and
Navnil Choudhury and
Ayush Arunachalam and
Kanad Basu},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Search Space Reduction for Efficient Quantum Compilation},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {109--114},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590223},
doi = {10.1145/3583781.3590223},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SrivastavaLCAB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SunnyNP23,
author = {Febin Sunny and
Mahdi Nikdast and
Sudeep Pasricha},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Cross-Layer Design for {AI} Acceleration with Non-Coherent Optical
Computing},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {539--544},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590224},
doi = {10.1145/3583781.3590224},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SunnyNP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SutradharBIDG23,
author = {Purab Ranjan Sutradhar and
Sathwika Bavikadi and
Mark A. Indovina and
Sai Manoj Pudukotai Dinakarrao and
Amlan Ganguly},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {FlutPIM: : {A} Look-up Table-based Processing in Memory Architecture
with Floating-point Computation Support for Deep Learning Applications},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {207--211},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590313},
doi = {10.1145/3583781.3590313},
timestamp = {Mon, 25 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SutradharBIDG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TabrizchiGAR23,
author = {Sepehr Tabrizchi and
Rebati Raman Gaire and
Shaahin Angizi and
Arman Roohi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {SenTer: {A} Reconfigurable Processing-in-Sensor Architecture Enabling
Efficient Ternary {MLP}},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {497--502},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590225},
doi = {10.1145/3583781.3590225},
timestamp = {Fri, 28 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/TabrizchiGAR23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Tehranipoor23,
author = {Mark M. Tehranipoor},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Microelectronics Security in {CHIPS} Era},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {229},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3592464},
doi = {10.1145/3583781.3592464},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Tehranipoor23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ThakkarVK23,
author = {Ishan G. Thakkar and
Sairam Sri Vatsavai and
Venkata Sai Praneeth Karempudi},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {High-Speed and Energy-Efficient Non-Binary Computing with Polymorphic
Electro-Optic Circuits and Architectures},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {545--550},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590258},
doi = {10.1145/3583781.3590258},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ThakkarVK23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TranLHHP23,
author = {Thai{-}Ha Tran and
Anh{-}Tien Le and
Trong{-}Thuc Hoang and
Van{-}Phuc Hoang and
Cong{-}Kha Pham},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Dynamic Gold Code-Based Chaotic Clock for Cryptographic Designs to
Counter Power Analysis Attacks},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {439--442},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590295},
doi = {10.1145/3583781.3590295},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/TranLHHP23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/UllahS023,
author = {Salim Ullah and
Siva Satyendra Sahoo and
Akash Kumar},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {CoOAx: Correlation-aware Synthesis of FPGA-based Approximate Operators},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {671--677},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590222},
doi = {10.1145/3583781.3590222},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/UllahS023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangPWF23,
author = {Hanqiu Wang and
Maximillian Kealoha Panoff and
Shuo Wang and
Domenic Forte},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{HT-EMIS:} {A} Deep Learning Tool for Hardware Trojan Detection and
Identification through Runtime {EM} Side-Channels},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {51--56},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590260},
doi = {10.1145/3583781.3590260},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangPWF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangQYHL023,
author = {Kaixuan Wang and
Xinyu Qin and
Zhuoyuan Yang and
Weiliang He and
Yifan Liu and
Jun Han},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{SVP:} Safe and Efficient Speculative Execution Mechanism through
Value Prediction},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {433--437},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590308},
doi = {10.1145/3583781.3590308},
timestamp = {Thu, 28 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangQYHL023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangYTHYF23,
author = {Duo Wang and
Mingyu Yan and
Yihan Teng and
Dengke Han and
Xiaochun Ye and
Dongrui Fan},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A High-accurate Multi-objective Ensemble Exploration Framework for
Design Space of {CPU} Microarchitecture},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {379--383},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590280},
doi = {10.1145/3583781.3590280},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangYTHYF23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuLMZ23,
author = {Hongye Xu and
Dongfang Liu and
Cory E. Merkel and
Michael Zuzak},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Exploiting Logic Locking for a Neural Trojan Attack on Machine Learning
Accelerators},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {351--356},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590242},
doi = {10.1145/3583781.3590242},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XuLMZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuXLYZ23,
author = {Sheng Xu and
Hongyu Xue and
Le Luo and
Liang Yan and
Xingqi Zou},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {DrPIM: An Adaptive and Less-blocking Data Replication Framework for
Processing-in-Memory Architecture},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {385--389},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590294},
doi = {10.1145/3583781.3590294},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XuXLYZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanCXLCHNW23,
author = {Aibin Yan and
Yang Chang and
Jing Xiang and
Hao Luo and
Jie Cui and
Zhengfeng Huang and
Tianming Ni and
Xiaoqing Wen},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Two Highly Reliable and High-Speed {SRAM} Cells for Safety-Critical
Applications},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {293--298},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590261},
doi = {10.1145/3583781.3590261},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanCXLCHNW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanWZ0SN0W23,
author = {Aibin Yan and
Shaojie Wei and
Jinjun Zhang and
Jie Cui and
Jie Song and
Tianming Ni and
Patrick Girard and
Xiaoqing Wen},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Low Area and Low Delay Latch Design with Complete Double-Node-Upset-Recovery
for Aerospace Applications},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {167--171},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590281},
doi = {10.1145/3583781.3590281},
timestamp = {Mon, 05 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanWZ0SN0W23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangHZ23,
author = {Ling Yang and
Libo Huang and
Zhong Zheng},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Confidence Counter Modelling for Value Predictor},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {221--222},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590319},
doi = {10.1145/3583781.3590319},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangHZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YeWXWGY23,
author = {Yuyang Ye and
Zonghui Wang and
Zun Xue and
Ziqi Wang and
Yifei Gao and
Hao Yan},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{FPGNN-ATPG:} An Efficient Fault Parallel Automatic Test Pattern Generator},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {299--304},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590250},
doi = {10.1145/3583781.3590250},
timestamp = {Fri, 19 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/YeWXWGY23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YinWZ23,
author = {Lingxiang Yin and
Jun Wang and
Hao Zheng},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Exploring Architecture, Dataflow, and Sparsity for {GCN} Accelerators:
{A} Holistic Framework},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {489--495},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590243},
doi = {10.1145/3583781.3590243},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YinWZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Yu0YC0XXY23,
author = {Jiangnan Yu and
Fan Yang and
Xiaoling Yi and
Chixiao Chen and
Jun Tao and
Dong Xu and
Xiankui Xiong and
Haitao Yang},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {TPNoC: An Efficient Topology Reconfigurable NoC Generator},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {77--82},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590257},
doi = {10.1145/3583781.3590257},
timestamp = {Wed, 30 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Yu0YC0XXY23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZangCLTSYW23,
author = {Xinshi Zang and
Lei Chen and
Xing Li and
Wilson W. K. Thong and
Weihua Sheng and
Evangeline F. Y. Young and
Martin D. F. Wong},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{CPP:} {A} Multi-Level Circuit Partitioning Predictor for Hardware
Verification Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {357--361},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590289},
doi = {10.1145/3583781.3590289},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZangCLTSYW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZangYW23,
author = {Xinshi Zang and
Evangeline F. Y. Young and
Martin D. F. Wong},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{SPARK:} {A} Scalable Partitioning and Routing Framework for Multi-FPGA
Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {593--598},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590231},
doi = {10.1145/3583781.3590231},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZangYW23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangHTYZY23,
author = {Jing Zhang and
Libo Huang and
Hongbing Tan and
Ling Yang and
Zhong Zheng and
Qianming Yang},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Low-Cost Multiple-Precision Multiplication Unit Design For Deep Learning},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {9--14},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590269},
doi = {10.1145/3583781.3590269},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangHTYZY23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangHTZG23,
author = {Jing Zhang and
Libo Huang and
Hongbing Tan and
Zhong Zheng and
Hui Guo},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {A Scalable BFloat16 Dot-Product Architecture for Deep Learning},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {219--220},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590318},
doi = {10.1145/3583781.3590318},
timestamp = {Sat, 26 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangHTZG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaoGVXSG23,
author = {Xiaotian Zhao and
Yimin Gao and
Vaibhav Verma and
Ruge Xu and
Mircea Stan and
Xinfei Guo},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Design Space Exploration of Layer-Wise Mixed-Precision Quantization
with Tightly Integrated Edge Inference Units},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {467--471},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590292},
doi = {10.1145/3583781.3590292},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaoGVXSG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaoZZ23,
author = {Haoyu Zhao and
Longbing Zhang and
Fuxin Zhang},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {{RBGC:} Repurpose the Buffer of Fixed Graphics Pipeline to Enhance
{GPU} Cache},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {173--177},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590305},
doi = {10.1145/3583781.3590305},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaoZZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhongHG23,
author = {Yadi Zhong and
Joshua Hovanes and
Ujjwal Guin},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {On-Demand Device Authentication using Zero-Knowledge Proofs for Smart
Systems},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {569--574},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590275},
doi = {10.1145/3583781.3590275},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhongHG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuZZ23,
author = {Yankun Zhu and
Jindong Zhou and
Pingqiang Zhou},
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Exploring Remote Power Attacks Targeting Parallel Data Encryption
On Multi-Tenant FPGAs},
booktitle = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
pages = {57--62},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781.3590244},
doi = {10.1145/3583781.3590244},
timestamp = {Thu, 15 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuZZ23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2023,
editor = {Himanshu Thapliyal and
Ronald F. DeMara and
Inna Partin{-}Vaisband and
Srinivas Katkoori},
title = {Proceedings of the Great Lakes Symposium on {VLSI} 2023, {GLSVLSI}
2023, Knoxville, TN, USA, June 5-7, 2023},
publisher = {{ACM}},
year = {2023},
url = {https://doi.org/10.1145/3583781},
doi = {10.1145/3583781},
timestamp = {Mon, 05 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2023.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AbdulgadirKS22,
author = {Abubakr Abdulgadir and
Jens{-}Peter Kaps and
Ahmad Salman},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Enhancing Information Security Courses With a Remotely Accessible
Side-Channel Analysis Setup},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {531--536},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530347},
doi = {10.1145/3526241.3530347},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AbdulgadirKS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AddepalliP22,
author = {Hari Addepalli and
Irith Pomeranz},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Algorithms for the Selection of Applied Tests when a Stored Test Produces
Many Applied Tests},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {345--349},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530359},
doi = {10.1145/3526241.3530359},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AddepalliP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Afsharmazayejani22,
author = {Raheel Afsharmazayejani and
Hossein Sayadi and
Amin Rezaei},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Distributed Logic Encryption: Essential Security Requirements and
Low-Overhead Implementation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {127--131},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530372},
doi = {10.1145/3526241.3530372},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Afsharmazayejani22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlatounV22,
author = {Khitam M. Alatoun and
Ranga Vemuri},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Efficient Method for Timing-based Information Flow Verification in
Hardware Designs},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {159--163},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530363},
doi = {10.1145/3526241.3530363},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlatounV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AminEMZ22,
author = {Md Hasibul Amin and
Mohammed E. Elbtity and
Mohammadreza Mohammadi and
Ramtin Zand},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {MRAM-based Analog Sigmoid Function for In-memory Computing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {319--323},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530376},
doi = {10.1145/3526241.3530376},
timestamp = {Wed, 04 Jan 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AminEMZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AswathyBSK22,
author = {N. S. Aswathy and
Sreesiddesh Bhavanasi and
Arnab Sarkar and
Hemangee K. Kapoor},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {SRS-Mig: Selection and Run-time Scheduling of page Migration for improved
response time in hybrid {PCM-DRAM} memories},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {217--222},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530327},
doi = {10.1145/3526241.3530327},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AswathyBSK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BhatnagarRV22,
author = {Varun Bhatnagar and
Gopal Raut and
Santosh Kumar Vishvakarma},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Loading Effect Free MOS-only Voltage Reference Ladder for {ADC} in
RRAM-crossbar Array},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {199--202},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530354},
doi = {10.1145/3526241.3530354},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BhatnagarRV22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BoddupalliODCR22,
author = {Srivalli Boddupalli and
Richard Owoputi and
Chengwei Duan and
Tashfique Hasnine Choudhury and
Sandip Ray},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Resiliency in Connected Vehicle Applications: Challenges and Approaches
for Security Validation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {475--480},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530832},
doi = {10.1145/3526241.3530832},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BoddupalliODCR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BrunsHGD22,
author = {Niklas Bruns and
Vladimir Herdt and
Daniel Gro{\ss}e and
Rolf Drechsler},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Efficient Cross-Level Processor Verification using Coverage-guided
Fuzzing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {97--103},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530340},
doi = {10.1145/3526241.3530340},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BrunsHGD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CR22,
author = {Prashanth H. C. and
Madhav Rao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Evolutionary Standard Cell Synthesis of Unconventional Designs},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {189--192},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530353},
doi = {10.1145/3526241.3530353},
timestamp = {Mon, 14 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/CR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CRGR22,
author = {Prashanth H. C. and
Soujanya S. R and
Bindu G. Gowda and
Madhav Rao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Design and Evaluation of In-Exact Compressor based Approximate Multipliers},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {431--436},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530320},
doi = {10.1145/3526241.3530320},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CRGR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CalhounOYDA22,
author = {Ashley Calhoun and
Erick Ortega and
Ferhat Yaman and
Anuj Dubey and
Aydin Aysu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Hands-On Teaching of Hardware Security for Machine Learning},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {455--461},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530828},
doi = {10.1145/3526241.3530828},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CalhounOYDA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenL22,
author = {Chien{-}Fu Chen and
Mikko H. Lipasti},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {PrGEMM: {A} Parallel Reduction SpGEMM Accelerator},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {397--401},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530387},
doi = {10.1145/3526241.3530387},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenXZR22,
author = {Lingfeng Chen and
Tian Xia and
Wenzhe Zhao and
Pengju Ren},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{MI2D:} Accelerating Matrix Inversion with 2-Dimensional Tile Manipulations},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {423--429},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530314},
doi = {10.1145/3526241.3530314},
timestamp = {Tue, 21 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenXZR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChoLK22,
author = {Michael Cho and
Keewoo Lee and
Sunwoong Kim},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{HELPSE:} Homomorphic Encryption-based Lightweight Password Strength
Estimation in a Virtual Keyboard System},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {405--410},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530338},
doi = {10.1145/3526241.3530338},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChoLK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChowdhuryVLSM0D22,
author = {Tanmoy Chowdhury and
Ashkan Vakil and
Banafsheh Saber Latibari and
Sayed Aresh Beheshti{-}Shirazi and
Ali Mirzaeian and
Xiaojie Guo and
Sai Manoj P. D. and
Houman Homayoun and
Ioannis Savidis and
Liang Zhao and
Avesta Sasan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{RAPTA:} {A} Hierarchical Representation Learning Solution For Real-Time
Prediction of Path-Based Static Timing Analysis},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {493--500},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530831},
doi = {10.1145/3526241.3530831},
timestamp = {Fri, 08 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChowdhuryVLSM0D22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Cui0WYL22,
author = {Ziying Cui and
Ke Chen and
Bi Wu and
Chenggang Yan and
Weiqiang Liu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Energy-efficient and High-precision Approximate {MAC} with Distributed
Arithmetic Circuits},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {315--318},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530383},
doi = {10.1145/3526241.3530383},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Cui0WYL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DarjaniKRW022,
author = {Armin Darjani and
Nima Kavand and
Shubham Rai and
Mark Wijtvliet and
Akash Kumar},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{ENTANGLE:} An Enhanced Logic-locking Technique for Thwarting {SAT}
and Structural Attacks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {147--151},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530371},
doi = {10.1145/3526241.3530371},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DarjaniKRW022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Dinakarrao22,
author = {Sai Manoj Pudukotai Dinakarrao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 7A: Special Session - 3: Machine Learning-Aided
Computer-Aided Design},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542694},
doi = {10.1145/3542694},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Dinakarrao22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DuttaGKCXR22,
author = {Arpan Dutta and
Saransh Gupta and
Behnam Khaleghi and
Rishikanth Chandrasekaran and
Weihong Xu and
Tajana Rosing},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {HDnn-PIM: Efficient in Memory Design of Hyperdimensional Computing
with Feature Extraction},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {281--286},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530331},
doi = {10.1145/3526241.3530331},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DuttaGKCXR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/EngersC0WC22,
author = {Samuel J. Engers and
Cheng Chu and
Dawen Xu and
Ying Wang and
Fan Chen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{MOCCA:} {A} Process Variation Tolerant Systolic {DNN} Accelerator
using CNFETs in Monolithic 3D},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {379--382},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530380},
doi = {10.1145/3526241.3530380},
timestamp = {Mon, 26 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/EngersC0WC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Fan22,
author = {Deliang Fan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 1B: Emerging Computing and Post-CMOS Technologies},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542683},
doi = {10.1145/3542683},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Fan22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FerdausTR22,
author = {Farah Ferdaus and
Bashir Mohammad Sabquat Bahar Talukder and
Md. Tauhidur Rahman},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Watermarked ReRAM: {A} Technique to Prevent Counterfeit Memory Chips},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {21--26},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530341},
doi = {10.1145/3526241.3530341},
timestamp = {Wed, 15 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/FerdausTR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FoshieRDZPR22,
author = {Adam Z. Foshie and
Charles Rizzo and
Hritom Das and
Chaohui Zheng and
James S. Plank and
Garrett S. Rose},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Benchmark Comparisons of Spike-based Reconfigurable Neuroprocessor
Architectures for Control Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {383--386},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530381},
doi = {10.1145/3526241.3530381},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FoshieRDZPR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FuYAYJYG22,
author = {Weimin Fu and
Honggang Yu and
Orlando Arias and
Kaichen Yang and
Yier Jin and
Tuba Yavuz and
Xiaolong Guo},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Graph Neural Network based Hardware Trojan Detection at Intermediate
Representative for SoC Platforms},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {481--486},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530827},
doi = {10.1145/3526241.3530827},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FuYAYJYG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FuYMC22,
author = {Zhaoqi Fu and
Wenxin Yu and
Jie Ma and
Xin Cheng},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Efficient Maze Routing Algorithm for Fast Global Routing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {169--172},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530360},
doi = {10.1145/3526241.3530360},
timestamp = {Fri, 24 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FuYMC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Gaj22,
author = {Kris Gaj},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 1A: Hardware Security},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542682},
doi = {10.1145/3542682},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Gaj22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Gaj22a,
author = {Kris Gaj},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 2A: Hardware Security},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542684},
doi = {10.1145/3542684},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Gaj22a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Gaj22b,
author = {Kris Gaj},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 5A: Hardware Security},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542690},
doi = {10.1145/3542690},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Gaj22b.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GaryfallouVAMS22,
author = {Dimitrios Garyfallou and
Anastasis Vagenas and
Charalampos Antoniadis and
Yehia Massoud and
George I. Stamoulis},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Leveraging Machine Learning for Gate-level Timing Estimation Using
Current Source Models and Effective Capacitance},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {77--83},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530343},
doi = {10.1145/3526241.3530343},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GaryfallouVAMS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GayariKG22,
author = {Gagan Gayari and
Chandan Karfa and
Prithwijit Guha},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{GAUR:} Genetic Algorithm based Unlocking of Register Transfer Level
Locking},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {123--126},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530362},
doi = {10.1145/3526241.3530362},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GayariKG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Ghosh22,
author = {Swaroop Ghosh},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 5B: {VLSI} Design + {VLSI} Circuits and Power
Aware Design 2},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542691},
doi = {10.1145/3542691},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Ghosh22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GolderBR22,
author = {Anupam Golder and
Ashwin Bhat and
Arijit Raychowdhury},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Exploration into the Explainability of Neural Network Models for Power
Side-Channel Analysis},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {59--64},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530346},
doi = {10.1145/3526241.3530346},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GolderBR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GopaleDLR22,
author = {Manoj Gopale and
Gregory Ditzler and
Roman Lysecky and
Janet Roveda},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Inter-Architecture Portability of Artificial Neural Networks and Side
Channel Attacks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {117--121},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530356},
doi = {10.1145/3526241.3530356},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GopaleDLR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GubbiBSSDRSH22,
author = {Kevin Immanuel Gubbi and
Sayed Aresh Beheshti{-}Shirazi and
Tyler David Sheaves and
Soheil Salehi and
Sai Manoj P. D. and
Setareh Rafatirad and
Avesta Sasan and
Houman Homayoun},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Survey of Machine Learning for Electronic Design Automation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {513--518},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530834},
doi = {10.1145/3526241.3530834},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GubbiBSSDRSH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GuptaKJN22,
author = {Ruchika Gupta and
Vedika J. Kulkarni and
John Jose and
Sukumar Nandi},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Securing On-chip Interconnect against Delay Trojan using Dynamic Adaptive
Caging},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {411--416},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530333},
doi = {10.1145/3526241.3530333},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GuptaKJN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Hasler22,
author = {Jennifer Hasler},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Senior-Level Analog {IC} Design Course built on Open-Source Technologies},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {537--542},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530334},
doi = {10.1145/3526241.3530334},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Hasler22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/He0HS22,
author = {Zhangying He and
Amin Rezaei and
Houman Homayoun and
Hossein Sayadi},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Deep Neural Network and Transfer Learning for Accurate Hardware-Based
Zero-Day Malware Detection},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {27--32},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530326},
doi = {10.1145/3526241.3530326},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/He0HS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HerreraB22,
author = {Mois{\'{e}}s Herrera and
Peter A. Beerel},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Radiation Hardening by Design Techniques for the Mutual Exclusion
Element},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {267--273},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530310},
doi = {10.1145/3526241.3530310},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HerreraB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Hu22,
author = {Jingtong Hu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 3B: {VLSI} for Machine Learning and Artifical
Intelligence 1},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542687},
doi = {10.1145/3542687},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Hu22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Hu22a,
author = {Jingtong Hu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 4B: {VLSI} for Machine Learning and Artifical
Intelligence 2},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542689},
doi = {10.1145/3542689},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Hu22a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuangZGDY022,
author = {Lingyi Huang and
Xiao Zang and
Yu Gong and
Chunhua Deng and
Jingang Yi and
Bo Yuan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{IMG-SMP:} Algorithm and Hardware Co-Design for Real-time Energy-efficient
Neural Motion Planning},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {373--377},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530367},
doi = {10.1145/3526241.3530367},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HuangZGDY022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JoseSNK22,
author = {Sethu Jose and
John Sampson and
Vijaykrishnan Narayanan and
Mahmut Taylan Kandemir},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Scheduling Framework for Decomposable Kernels on Energy Harvesting
IoT Edge Nodes},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {91--96},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530350},
doi = {10.1145/3526241.3530350},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JoseSNK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Kahng22,
author = {Andrew B. Kahng},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {AI/ML, Optimization and {EDA} in the {TILOS} {AI} Research Institute},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {1},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530052},
doi = {10.1145/3526241.3530052},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Kahng22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KasarapuSHSHD22,
author = {Sreenitha Kasarapu and
Sanket Shukla and
Rakibul Hassan and
Avesta Sasan and
Houman Homayoun and
Sai Manoj P. D.},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{CAD-FSL:} Code-Aware Data Generation based Few-Shot Learning for
Efficient Malware Detection},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {507--512},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530825},
doi = {10.1145/3526241.3530825},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KasarapuSHSHD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KhanPK22,
author = {Kamil Khan and
Sudeep Pasricha and
Ryan Gary Kim},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{RACE:} {A} Reinforcement Learning Framework for Improved Adaptive
Control of NoC Channel Buffers},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {205--210},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530335},
doi = {10.1145/3526241.3530335},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KhanPK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KiaeiLS22,
author = {Pantea Kiaei and
Zhenyuan Liu and
Patrick Schaumont},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Leverage the Average: Averaged Sampling in Pre-Silicon Side-Channel
Leakage Assessment},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {3--8},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530337},
doi = {10.1145/3526241.3530337},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KiaeiLS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KiranR22,
author = {Yadu Kiran and
Marc D. Riedel},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Scalable, Deterministic Approach to Stochastic Computing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {45--51},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530344},
doi = {10.1145/3526241.3530344},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KiranR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KlemmerSG22,
author = {Lucas Klemmer and
Manfred Schl{\"{a}}gl and
Daniel Gro{\ss}e},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {RVVRadar: {A} Framework for Supporting the Programmer in Vectorization
for {RISC-V}},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {183--187},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530388},
doi = {10.1145/3526241.3530388},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KlemmerSG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KongKKK22,
author = {Myong Kong and
Daeyeon Kim and
Minhyuk Kweon and
Seokhyeong Kang},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {GAN-Dummy Fill: Timing-aware Dummy Fill Method using {GAN}},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {177--181},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530352},
doi = {10.1145/3526241.3530352},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KongKKK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KumarRPA22,
author = {Gaurav Kumar and
Anjum Riaz and
Yamuna Prasad and
Satyadev Ahlawat},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {On Attacking Locking {SIB} based {IJTAG} Architecture},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {105--109},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530370},
doi = {10.1145/3526241.3530370},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KumarRPA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KunduG22,
author = {Satwik Kundu and
Swaroop Ghosh},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Security Aspects of Quantum Machine Learning: Opportunities, Threats
and Defenses},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {463--468},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530833},
doi = {10.1145/3526241.3530833},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KunduG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KuntharaJSJ22,
author = {Rose George Kunthara and
Rekha K. James and
Simi Zerine Sleeba and
John Jose},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {DAReS: Deflection Aware Rerouting between Subnetworks in Bufferless
On-Chip Networks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {211--216},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530332},
doi = {10.1145/3526241.3530332},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KuntharaJSJ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiHC22,
author = {Wanqian Li and
Yinhe Han and
Xiaoming Chen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Energy-Efficient In-SRAM Accumulation for CMOS-based {CNN} Accelerators},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {293--298},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530319},
doi = {10.1145/3526241.3530319},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiHC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuCS022,
author = {Mengqiang Lu and
Aijiao Cui and
Yan Shao and
Gang Qu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Memristor-based Secure Scan Design against the Scan-based Side-Channel
Attacks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {71--76},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530345},
doi = {10.1145/3526241.3530345},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LuCS022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaYFC22,
author = {Jie Ma and
Wenxin Yu and
Zhaoqi Fu and
Xin Cheng},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Optimal Region-based Mixed-Cell-Height Detailed Placement Considering
Complex Minimum-Implant-Area Constraints},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {173--176},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530389},
doi = {10.1145/3526241.3530389},
timestamp = {Fri, 24 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaYFC22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MahmoudLVCACH22,
author = {Abdulqader Nael Mahmoud and
Nicoleta Cucu Laurenciu and
Frederic Vanderveken and
Florin Ciubotaru and
Christoph Adelmann and
Sorin Cotofana and
Said Hamdioui},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Would Magnonic Circuits Outperform {CMOS} Counterparts?},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {309--313},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530368},
doi = {10.1145/3526241.3530368},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MahmoudLVCACH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Mathew22,
author = {Sanu K. Mathew},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Attack-Resistant Circuit Technologies for sub-5nm Secure Computing
Platforms},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {403},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530053},
doi = {10.1145/3526241.3530053},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Mathew22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Meng0BH22,
author = {Xingyu Meng and
Mahmudul Hasan and
Kanad Basu and
Tamzidul Hoque},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Semi-formal Information Flow Validation for Analyzing Secret Asset
Propagation in {COTS} {IC} Integrated Systems},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {417--422},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530328},
doi = {10.1145/3526241.3530328},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Meng0BH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MishraMSPS22,
author = {Vishesh Mishra and
Sparsh Mittal and
Saurabh Singh and
Divy Pandey and
Rekha Singhal},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{MEGA-MAC:} {A} Merged Accumulation based Approximate {MAC} Unit for
Error Resilient Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {325--328},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530384},
doi = {10.1145/3526241.3530384},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MishraMSPS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Mohanty22,
author = {Saraju P. Mohanty},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 3A: {VLSI} Design + {VLSI} Circuits and Power
Aware Design 1},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542686},
doi = {10.1145/3542686},
timestamp = {Wed, 22 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Mohanty22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MonjurCKY22,
author = {Mohammad Mezanur Rahman Monjur and
Joshua Calzadillas and
Mashrafi Alam Kajol and
Qiaoyan Yu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Hardware Security in Advanced Manufacturing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {469--474},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530829},
doi = {10.1145/3526241.3530829},
timestamp = {Mon, 31 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MonjurCKY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NajibiLAZA22,
author = {Halima Najibi and
Alexandre Levisse and
Giovanni Ansaloni and
Marina Zapater and
David Atienza},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Thermal and Power-Aware Run-time Performance Management of 3D MPSoCs
with Integrated Flow Cell Arrays},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {223--228},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530309},
doi = {10.1145/3526241.3530309},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NajibiLAZA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NathK22,
author = {Arijit Nath and
Hemangee K. Kapoor},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {CoSeP: Compression and Content-based Selection Procedure to Improve
Lifetime of Encrypted Non-Volatile Main Memories},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {393--396},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530375},
doi = {10.1145/3526241.3530375},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NathK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NgoD22,
author = {Kalle Ngo and
Elena Dubrova},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Side-Channel Analysis of the Random Number Generator in {STM32} MCUs},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {15--20},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530324},
doi = {10.1145/3526241.3530324},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NgoD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OdetolaKH22,
author = {Tolulope A. Odetola and
Faiq Khalid and
Syed Rafay Hasan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {LaBaNI: Layer-based Noise Injection Attack on Convolutional Neural
Networks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {143--146},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530385},
doi = {10.1145/3526241.3530385},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/OdetolaKH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OlneyK22,
author = {Brooks Olney and
Robert Karam},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Protecting Deep Neural Network Intellectual Property with Architecture-Agnostic
Input Obfuscation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {111--115},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530386},
doi = {10.1145/3526241.3530386},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/OlneyK22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PanTWZW22,
author = {Kangqiang Pan and
Amr M. S. Tosson and
Ningxuan Wang and
Norman Y. Zhou and
Lan Wei},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Novel 2T2R CR-based {TCAM} Design for High-speed and Energy-efficient
Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {33--38},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530336},
doi = {10.1145/3526241.3530336},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PanTWZW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Pasricha22,
author = {Sudeep Pasricha},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Embedded Systems Education in the 2020s: Challenges, Reflections,
and Future Directions},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {519--524},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530348},
doi = {10.1145/3526241.3530348},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Pasricha22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PieperHD22,
author = {Pascal Pieper and
Vladimir Herdt and
Rolf Drechsler},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Advanced Environment Modeling and Interaction in an Open Source {RISC-V}
Virtual Prototype},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {193--197},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530374},
doi = {10.1145/3526241.3530374},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PieperHD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Pomeranz22,
author = {Irith Pomeranz},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Compaction of Compressed Bounded Transparent-Scan Test Sets},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {339--343},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530358},
doi = {10.1145/3526241.3530358},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Pomeranz22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/QiZCY22,
author = {Zhongdong Qi and
Jingchong Zhang and
Gengjie Chen and
Hailong You},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Effective and Efficient Detailed Routing with Adaptive Rip-up Scheme
and Pin Access Refinement},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {165--168},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530361},
doi = {10.1145/3526241.3530361},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/QiZCY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RashidS22,
author = {M. Imtiaz Rashid and
Benjamin Carrion Schafer},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Fast Parallel High-Level Synthesis Design Space Explorer: Targeting
FPGAs to accelerate {ASIC} Exploration},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {85--90},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530339},
doi = {10.1145/3526241.3530339},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RashidS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RatnaparkhiR22,
author = {Omkar G. Ratnaparkhi and
Madhav Rao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{LEAD:} Logarithmic Exponent Approximate Divider For Image Quantization
Application},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {437--442},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530323},
doi = {10.1145/3526241.3530323},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RatnaparkhiR22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RiosPALA22,
author = {Marco Rios and
Flavio Ponzina and
Giovanni Ansaloni and
Alexandre Levisse and
David Atienza},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Error Resilient In-Memory Computing Architecture for {CNN} Inference
on the Edge},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {249--254},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530351},
doi = {10.1145/3526241.3530351},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RiosPALA22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Roy22,
author = {Kaushik Roy},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {In-Memory Computing based Machine Learning Accelerators: Opportunities
and Challenges},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {203--204},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530051},
doi = {10.1145/3526241.3530051},
timestamp = {Sun, 05 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Roy22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Salman22,
author = {Emre Salman},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 2B: Computer-Aided Design {(CAD)}},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542685},
doi = {10.1145/3542685},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Salman22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Salmani22,
author = {Hassan Salmani},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {The Improved {COTD} Technique for Hardware Trojan Detection in Gate-level
Netlist},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {449--454},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530835},
doi = {10.1145/3526241.3530835},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Salmani22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Salmani22a,
author = {Hassan Salmani},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 6B: Special Session - 2: Application-oriented
Hardware Security Challenges and Solutions},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542693},
doi = {10.1145/3542693},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Salmani22a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SarihiPJB22,
author = {Amin Sarihi and
Ahmad Patooghy and
Peter Jamieson and
Abdel{-}Hameed A. Badawy},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Hardware Trojan Insertion Using Reinforcement Learning},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {139--142},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530379},
doi = {10.1145/3526241.3530379},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SarihiPJB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShafieeBCPN22,
author = {Amin Shafiee and
Sanmitra Banerjee and
Krishnendu Chakrabarty and
Sudeep Pasricha and
Mahdi Nikdast},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {LoCI: An Analysis of the Impact of Optical Loss and Crosstalk Noise
in Integrated Silicon-Photonic Neural Networks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {351--355},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530365},
doi = {10.1145/3526241.3530365},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ShafieeBCPN22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShahhosseiniNNI22,
author = {Sina Shahhosseini and
Yang Ni and
Emad Kasaeyan Naeini and
Mohsen Imani and
Amir M. Rahmani and
Nikil D. Dutt},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Flexible and Personalized Learning for Wearable Health Applications
using HyperDimensional Computing},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {357--360},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530373},
doi = {10.1145/3526241.3530373},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShahhosseiniNNI22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShamsiZ22,
author = {Kaveh Shamsi and
Guangwei Zhao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Oracle-Less Machine-Learning Attack against Lookup-Table-based
Logic Locking},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {133--137},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530377},
doi = {10.1145/3526241.3530377},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShamsiZ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShuklaKHRD22,
author = {Sanket Shukla and
Gaurav Kolhe and
Houman Homayoun and
Setareh Rafatirad and
Sai Manoj P. D.},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {RAFeL - Robust and Data-Aware Federated Learning-inspired Malware
Detection in Internet-of-Things (IoT) Networks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {153--157},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530378},
doi = {10.1145/3526241.3530378},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShuklaKHRD22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Skromme22,
author = {Brian J. Skromme},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 7B: Microelectronic Systems Education},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542695},
doi = {10.1145/3542695},
timestamp = {Tue, 12 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Skromme22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SridharanZF22,
author = {Amitesh Sridharan and
Fan Zhang and
Deliang Fan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {MnM: {A} Fast and Efficient Min/Max Searching in {MRAM}},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {39--44},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530349},
doi = {10.1145/3526241.3530349},
timestamp = {Tue, 29 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SridharanZF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SundaravadivelG22,
author = {Prabha Sundaravadivel and
Prosenjit Kumar Ghosh and
Bikal Suwal},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {IoT-enabled Soft Robotics for Electrical Engineers},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {329--332},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530369},
doi = {10.1145/3526241.3530369},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SundaravadivelG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SunnyNP22,
author = {Febin Sunny and
Mahdi Nikdast and
Sudeep Pasricha},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Silicon Photonic Accelerator for Convolutional Neural Networks with
Heterogeneous Quantization},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {367--371},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530364},
doi = {10.1145/3526241.3530364},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SunnyNP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TanYYF22,
author = {Long Tan and
Mingyu Yan and
Xiaochun Ye and
Dongrui Fan},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {HetGraph: {A} High Performance {CPU-CGRA} Architecture for Matrix-based
Graph Analytics},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {387--391},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530382},
doi = {10.1145/3526241.3530382},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/TanYYF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/UpadhyayATG22,
author = {Suryansh Upadhyay and
Abdullah Ash{-}Saki and
Rasit Onur Topaloglu and
Swaroop Ghosh},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Shuttle-Efficient Qubit Mapper for Trapped-Ion Quantum Computers},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {305--308},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530366},
doi = {10.1145/3526241.3530366},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/UpadhyayATG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VercruysseMBH22,
author = {Alec Vercruysse and
M. Weston Miller and
Joshua Brake and
David M. Harris},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Tutorial-style Single-cycle Fast Fourier Transform Processor},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {525--530},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530329},
doi = {10.1145/3526241.3530329},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/VercruysseMBH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiaoXCWH22,
author = {Hang Xiao and
Haobo Xu and
Xiaoming Chen and
Yujie Wang and
Yinhe Han},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{P3S:} {A} High Accuracy Probabilistic Prediction Processing System
for {CNN} Acceleration},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {237--242},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530322},
doi = {10.1145/3526241.3530322},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XiaoXCWH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiongLSLLWLQ22,
author = {Wei Xiong and
Yanze Li and
Changpeng Sun and
Huanlin Luo and
Jiafeng Liu and
Jian Wang and
Jinmei Lai and
Gang Qu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Effective Test Method for Block RAMs in Heterogeneous FPGAs Based
on a Novel Partial Bitstream Relocation Technique},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {275--280},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530317},
doi = {10.1145/3526241.3530317},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XiongLSLLWLQ22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuGF22,
author = {Tianhong Xu and
Cheng Gongye and
Yunsi Fei},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Protected {ECC} Still Leaks: {A} Novel Differential-Bit Side-channel
Power Attack on {ECDH} and Countermeasures},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {9--14},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530342},
doi = {10.1145/3526241.3530342},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XuGF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanCSZ0H0W22,
author = {Aibin Yan and
Yu Chen and
Shukai Song and
Zijie Zhai and
Jie Cui and
Zhengfeng Huang and
Patrick Girard and
Xiaoqing Wen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Sextuple Cross-Coupled-DICE Based Double-Node-Upset Recoverable and
Low-Delay Flip-Flop for Aerospace Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {333--338},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530355},
doi = {10.1145/3526241.3530355},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanCSZ0H0W22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanHXCZHGW22,
author = {Aibin Yan and
Zhihui He and
Jing Xiang and
Jie Cui and
Yong Zhou and
Zhengfeng Huang and
Patrick Girard and
Xiaoqing Wen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Two 0.8 V, Highly Reliable {RHBD} 10T and 12T {SRAM} Cells for Aerospace
Applications},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {261--266},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530312},
doi = {10.1145/3526241.3530312},
timestamp = {Wed, 22 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanHXCZHGW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanZW0ZN0W22,
author = {Aibin Yan and
Zhen Zhou and
Shaojie Wei and
Jie Cui and
Yong Zhou and
Tianming Ni and
Patrick Girard and
Xiaoqing Wen},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {A Highly Robust, Low Delay and DNU-Recovery Latch Design for Nanoscale
{CMOS} Technology},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {255--260},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530321},
doi = {10.1145/3526241.3530321},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanZW0ZN0W22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Yang0L22,
author = {Jiaqi Yang and
Hao Zheng and
Ahmed Louri},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Adapt-Flow: {A} Flexible {DNN} Accelerator Architecture for Heterogeneous
Dataflow Implementation},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {287--292},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530311},
doi = {10.1145/3526241.3530311},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Yang0L22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangUS22,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Reducing Power Consumption using Approximate Encoding for {CNN} Accelerators
at the Edge},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {229--235},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530315},
doi = {10.1145/3526241.3530315},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangUS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Yu22,
author = {Qiaoyan Yu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 6A: Special Session -1: Machine Learning
and Hardware Attacks},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542692},
doi = {10.1145/3542692},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Yu22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YuW0YL22,
author = {Tianyang Yu and
Bi Wu and
Ke Chen and
Chenggang Yan and
Weiqiang Liu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Data Stream Oriented Fine-grained Sparse {CNN} Accelerator with Efficient
Unstructured Pruning Strategy},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {243--248},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530318},
doi = {10.1145/3526241.3530318},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YuW0YL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZengKY22,
author = {Jun Zeng and
Mingyang Kou and
Hailong Yao},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {KunlunTVM: {A} Compilation Framework for Kunlun Chip Supporting Both
Training and Inference},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {299--304},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530316},
doi = {10.1145/3526241.3530316},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZengKY22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangZDGDF22,
author = {Xiang Zhang and
Ziyue Zhang and
Ruyi Ding and
Cheng Gongye and
Aidong Adam Ding and
Yunsi Fei},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Ran{\textdollar}Net: An Anti-Ransomware Methodology based on Cache
Monitoring and Deep Learning},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {487--492},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530830},
doi = {10.1145/3526241.3530830},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangZDGDF22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaoS22,
author = {Guangwei Zhao and
Kaveh Shamsi},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Graph Neural Network based Netlist Operator Detection under Circuit
Rewriting},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {53--58},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530330},
doi = {10.1145/3526241.3530330},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaoS22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhongG22,
author = {Yadi Zhong and
Ujjwal Guin},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Fault-Injection Based Chosen-Plaintext Attacks on Multicycle {AES}
Implementations},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {443--448},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530826},
doi = {10.1145/3526241.3530826},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhongG22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuLL22,
author = {Shien Zhu and
Shiqing Li and
Weichen Liu},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition
and Subtraction Operations},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {65--70},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530313},
doi = {10.1145/3526241.3530313},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuLL22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuWXYKLP22,
author = {Jingwei Zhu and
Lei Wang and
Xun Xiao and
Zhijie Yang and
Ziyang Kang and
Shiming Li and
LingHui Peng},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {An Event Based Gesture Recognition System Using a Liquid State Machine
Accelerator},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
pages = {361--365},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241.3530357},
doi = {10.1145/3526241.3530357},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuWXYKLP22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Zwolinski22,
author = {Mark Zwolinski},
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {Session details: Session 4A: Testing, Reliability and Fault Tolerance},
booktitle = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3542688},
doi = {10.1145/3542688},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Zwolinski22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2022,
editor = {Ioannis Savidis and
Avesta Sasan and
Himanshu Thapliyal and
Ronald F. DeMara},
title = {{GLSVLSI} '22: Great Lakes Symposium on {VLSI} 2022, Irvine {CA} USA,
June 6 - 8, 2022},
publisher = {{ACM}},
year = {2022},
url = {https://doi.org/10.1145/3526241},
doi = {10.1145/3526241},
isbn = {978-1-4503-9322-5},
timestamp = {Fri, 03 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2022.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0002H21,
author = {Jiliang Zhang and
Junjie Hou},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Unpaired Image-to-Image Translation Network for Semantic-based Face
Adversarial Examples Generation},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {449--454},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461751},
doi = {10.1145/3453688.3461751},
timestamp = {Mon, 04 Jul 2022 14:19:34 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/0002H21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0002O0FN21,
author = {J{\"{u}}rgen Maier and
Daniel {\"{O}}hlinger and
Ulrich Schmid and
Matthias F{\"{u}}gger and
Thomas Nowak},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {A Composable Glitch-Aware Delay Model},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {147--154},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461519},
doi = {10.1145/3453688.3461519},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/0002O0FN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0002SHMH21,
author = {Partha Sarathi Paul and
Maisha Sadia and
Md Razuan Hossain and
Barry J. Muldrey and
Md Sakib Hasan},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Design of a Low-Overhead Random Number Generator Using CMOS-based
Cascaded Chaotic Maps},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {109--114},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461504},
doi = {10.1145/3453688.3461504},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/0002SHMH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/00090P21,
author = {Muhammad Awais and
Hassan Ghasemzadeh Mohammadi and
Marco Platzner},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {\emph{LDAX}: {A} Learning-based Fast Design Space Exploration Framework
for Approximate Circuit Synthesis},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {27--32},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461506},
doi = {10.1145/3453688.3461506},
timestamp = {Tue, 22 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/00090P21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AbdulgadirLFKG21,
author = {Abubakr Abdulgadir and
Sammy Lin and
Farnoud Farahmand and
Jens{-}Peter Kaps and
Kris Gaj},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Side-channel Resistant Implementations of a Novel Lightweight Authenticated
Cipher with Application to Hardware Security},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {229--234},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461761},
doi = {10.1145/3453688.3461761},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AbdulgadirLFKG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlamAGA21,
author = {Shamiul Alam and
Nazmul Amin and
Sumeet Kumar Gupta and
Ahmedullah Aziz},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Monte Carlo Variation Analysis of NCFET-based 6-T {SRAM:} Design Opportunities
and Trade-offs},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {467--472},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461742},
doi = {10.1145/3453688.3461742},
timestamp = {Sun, 06 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlamAGA21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AnandTTS21,
author = {Abhinish Anand and
Winnie Thomas and
Suryakant Toraskar and
Virendra Singh},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Predictive Warp Scheduling for Efficient Execution in {GPGPU}},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {295--300},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461525},
doi = {10.1145/3453688.3461525},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AnandTTS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AngiziRTF21,
author = {Shaahin Angizi and
Arman Roohi and
MohammadReza Taheri and
Deliang Fan},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Processing-in-Memory Acceleration of MAC-based Applications Using
Residue Number System: {A} Comparative Study},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {265--270},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461529},
doi = {10.1145/3453688.3461529},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AngiziRTF21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AramoonQ21,
author = {Omid Aramoon and
Gang Qu},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Provably Accurate Memory Fault Detection Method for Deep Neural Networks},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {443--448},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461750},
doi = {10.1145/3453688.3461750},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AramoonQ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BaharaniSMFT21,
author = {Mohammadreza Baharani and
Ushma Sunil and
Kaustubh Manohar and
Steven Furgurson and
Hamed Tabkhi},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {DeepDive: An Integrative Algorithm/Architecture Co-Design for Deep
Separable Convolutional Neural Networks},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {247--252},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461485},
doi = {10.1145/3453688.3461485},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BaharaniSMFT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BarveSDJ21,
author = {Siddharth Barve and
Sanket Shukla and
Sai Manoj Pudukotai Dinakarrao and
Rashmi Jha},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Adversarial Attack Mitigation Approaches Using RRAM-Neuromorphic Architectures},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {201--206},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461757},
doi = {10.1145/3453688.3461757},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BarveSDJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BasharVKLSNS21,
author = {Mohammad Khairul Bashar and
Jaykumar Vaidya and
R. S. Surya Kanthi and
Chonghan Lee and
Feng Shi and
Vijaykrishnan Narayanan and
Nikhil Shukla},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Ferroelectric-based Accelerators for Computationally Hard Problems},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {485--489},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461745},
doi = {10.1145/3453688.3461745},
timestamp = {Fri, 03 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BasharVKLSNS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Beheshti-Shirazi21,
author = {Sayed Aresh Beheshti{-}Shirazi and
Ashkan Vakil and
Sai Manoj P. D. and
Ioannis Savidis and
Houman Homayoun and
Avesta Sasan},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {A Reinforced Learning Solution for Clock Skew Engineering to Reduce
Peak Current and {IR} Drop},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {181--187},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461754},
doi = {10.1145/3453688.3461754},
timestamp = {Wed, 13 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Beheshti-Shirazi21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BoseT21,
author = {Bobby Bose and
Ishan G. Thakkar},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Characterization and Mitigation of Electromigration Effects in TSV-Based
Power Delivery Network Enabled 3D-Stacked DRAMs},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {101--107},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461503},
doi = {10.1145/3453688.3461503},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BoseT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Channamadhavuni21,
author = {Shravya Channamadhavuni and
Sven Thijssen and
Sumit Kumar Jha and
Rickard Ewetz},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Accelerating {AI} Applications using Analog In-Memory Computing: Challenges
and Opportunities},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {379--384},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461746},
doi = {10.1145/3453688.3461746},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Channamadhavuni21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenCYC21,
author = {Yongliang Chen and
Xiaole Cui and
Wenqiang Ye and
Xiaoxin Cui},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {The Modeling Attack and Security Enhancement of the XbarPUF with Both
Column Swapping and XORing},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {83--88},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461501},
doi = {10.1145/3453688.3461501},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenCYC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenHZ0H21,
author = {Yao Chen and
Cole Hawkins and
Kaiqi Zhang and
Zheng Zhang and
Cong Hao},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {3U-EdgeAI: Ultra-Low Memory Training, Ultra-Low Bitwidth Quantization,
and Ultra-Low Latency Acceleration},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {157--162},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461738},
doi = {10.1145/3453688.3461738},
timestamp = {Tue, 19 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenHZ0H21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenJPCLY21,
author = {Zhiyang Chen and
Weiqing Ji and
Yihao Peng and
Datao Chen and
Mingyu Liu and
Hailong Yao},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Machine Learning Based Acceleration Method for Ordered Escape Routing},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {365--370},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461483},
doi = {10.1145/3453688.3461483},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenJPCLY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenZCZL21,
author = {Hui Chen and
Zihao Zhang and
Peng Chen and
Shien Zhu and
Weichen Liu},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Parallel Multipath Transmission for Burst Traffic Optimization in
Point-to-Point NoCs},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {289--294},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461521},
doi = {10.1145/3453688.3461521},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenZCZL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChowdhuryRCZZSW21,
author = {Zamshed I. Chowdhury and
Salonik Resch and
M. H{\"{u}}srev Cilasun and
Zhengyang Zhao and
Masoud Zabihi and
Sachin S. Sapatnekar and
Jianping Wang and
Ulya R. Karpuzcu},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {CAMeleon: Reconfigurable {B(T)CAM} in Computational {RAM}},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {57--63},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461507},
doi = {10.1145/3453688.3461507},
timestamp = {Mon, 15 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChowdhuryRCZZSW21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChowdhuryS21,
author = {Prattay Chowdhury and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Unlocking Approximations through Selective Source Code Transformations},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {359--364},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461498},
doi = {10.1145/3453688.3461498},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChowdhuryS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChuC0021,
author = {Cheng Chu and
Fan Chen and
Dawen Xu and
Ying Wang},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{RECOIN:} {A} Low-Power Processing-in-ReRAM Architecture for Deformable
Convolution},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {235--240},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461480},
doi = {10.1145/3453688.3461480},
timestamp = {Mon, 26 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChuC0021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DengZK0XYN21,
author = {Shan Deng and
Zijian Zhao and
Santosh Kurinec and
Kai Ni and
Yi Xiao and
Tongguang Yu and
Vijaykrishnan Narayanan},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Overview of Ferroelectric Memory Devices and Reliability Aware Design
Optimization},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {473--478},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461743},
doi = {10.1145/3453688.3461743},
timestamp = {Fri, 13 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DengZK0XYN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DiTLL21,
author = {Zhixiong Di and
Yongming Tang and
Jiahua Lu and
Zhaoyang Lv},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{ASIC} Design Principle Course with Combination of Online-MOOC and
Offline-Inexpensive {FPGA} Board},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {431--436},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461502},
doi = {10.1145/3453688.3461502},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DiTLL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DongLLLLn21,
author = {Chen Dong and
Lingqing Liu and
Ximeng Liu and
Huangda Liu and
Sihuang Lian},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {MEDASec: Logic Encryption Scheme for Micro-electrode-dot-array Biochips
{IP} Protection},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {277--282},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461520},
doi = {10.1145/3453688.3461520},
timestamp = {Mon, 27 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DongLLLLn21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FuHZ21,
author = {Rongliang Fu and
Junying Huang and
Zhimin Zhang},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Equivalence Checking for Superconducting {RSFQ} Logic Circuits},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {51--56},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461486},
doi = {10.1145/3453688.3461486},
timestamp = {Fri, 03 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/FuHZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GaoLWCZ21,
author = {Chengsi Gao and
Bing Li and
Ying Wang and
Weiwei Chen and
Lei Zhang},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Tenet: {A} Neural Network Model Extraction Attack in Multi-core Architecture},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {21--26},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461512},
doi = {10.1145/3453688.3461512},
timestamp = {Sun, 21 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GaoLWCZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GorslineSM21,
author = {Micah Gorsline and
James Smith and
Cory E. Merkel},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {On the Adversarial Robustness of Quantized Neural Networks},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {189--194},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461755},
doi = {10.1145/3453688.3461755},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GorslineSM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GuoZZ021,
author = {Yanan Guo and
Andrew Zigerelli and
Youtao Zhang and
Jun Yang},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {IVcache: Defending Cache Side Channel Attacks via Invisible Accesses},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {403--408},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461481},
doi = {10.1145/3453688.3461481},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GuoZZ021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GuptaADSV021,
author = {Neha Gupta and
Nikhil Agrawal and
Narendra Singh Dhakad and
Ambika Prasad Shah and
Santosh Kumar Vishvakarma and
Patrick Girard},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Voltage Bootstrapped Schmitt Trigger based Radiation Hardened Latch
Design for Reliable Circuits},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {307--312},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461489},
doi = {10.1145/3453688.3461489},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GuptaADSV021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Hernandez-CanoZ21,
author = {Alejandro Hern{\'{a}}ndez{-}Cano and
Cheng Zhuo and
Xunzhao Yin and
Mohsen Imani},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Real-Time and Robust Hyperdimensional Classification},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {397--402},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461749},
doi = {10.1145/3453688.3461749},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Hernandez-CanoZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuangCPMKYYW0D21,
author = {Shaoyi Huang and
Shiyang Chen and
Hongwu Peng and
Daniel Manu and
Zhenglun Kong and
Geng Yuan and
Lei Yang and
Shusen Wang and
Hang Liu and
Caiwen Ding},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{HMC-TRAN:} {A} Tensor-core Inspired Hierarchical Model Compression
for Transformer-based DNNs on {GPU}},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {169--174},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461740},
doi = {10.1145/3453688.3461740},
timestamp = {Tue, 06 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HuangCPMKYYW0D21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiaoZ0WKZWC21,
author = {Bo Jiao and
Haozhe Zhu and
Jinshan Zhang and
Shunli Wang and
Xiaoyang Kang and
Lihua Zhang and
Mingyu Wang and
Chixiao Chen},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Computing Utilization Enhancement for Chiplet-based Homogeneous Processing-in-Memory
Deep Learning Processors},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {241--246},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461499},
doi = {10.1145/3453688.3461499},
timestamp = {Mon, 18 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JiaoZ0WKZWC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JinFDWCZL21,
author = {Zhou Jin and
Tian Feng and
Yiru Duan and
Xiao Wu and
Minghou Cheng and
Zhenya Zhou and
Weifeng Liu},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{PALBBD:} {A} Parallel ArcLength Method Using Bordered Block Diagonal
Form for {DC} Analysis},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {327--332},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461526},
doi = {10.1145/3453688.3461526},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JinFDWCZL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JonesLOKZM21,
author = {Alex K. Jones and
Stephen Longofono and
S{\'{e}}bastien Ollivier and
Donald Kline Jr. and
Jiangwei Zhang and
Rami G. Melhem},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Tuning Memory Fault Tolerance on the Edge},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {421--424},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3462231},
doi = {10.1145/3453688.3462231},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JonesLOKZM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KabirPP21,
author = {M. D. Arafat Kabir and
Dusan Petranovic and
Yarui Peng},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Cross-Boundary Inductive Timing Optimization for 2.5D Chiplet-Package
Co-Design},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {135--140},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461505},
doi = {10.1145/3453688.3461505},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KabirPP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Kammler21,
author = {Vivian Guzman Kammler},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Evolving Trust for High Consequence Microelectronics},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {155},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3462232},
doi = {10.1145/3453688.3462232},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Kammler21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KlemmerG21,
author = {Lucas Klemmer and
Daniel Gro{\ss}e},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{EPEX:} Processor Verification by Equivalent Program Execution},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {33--38},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461497},
doi = {10.1145/3453688.3461497},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KlemmerG21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiP021,
author = {He Li and
Yaru Pang and
Jiliang Zhang},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Security Enhancements for Approximate Machine Learning},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {461--466},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461753},
doi = {10.1145/3453688.3461753},
timestamp = {Thu, 10 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiP021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiWYWTM21,
author = {Hengyi Li and
Zhichen Wang and
Xuebin Yue and
Wenwen Wang and
Hiroyuki Tomiyama and
Lin Meng},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {A Comprehensive Analysis of Low-Impact Computations in Deep Learning
Workloads},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {385--390},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461747},
doi = {10.1145/3453688.3461747},
timestamp = {Fri, 09 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiWYWTM21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuHLPH0D021,
author = {Mingshuo Liu and
Kevin Han and
Shiyi Luo and
Mingze Pan and
Mousam Hossain and
Bo Yuan and
Ronald F. DeMara and
Yu Bai},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {An Efficient Video Prediction Recurrent Network using Focal Loss and
Decomposed Tensor Train for Imbalance Dataset},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {391--396},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461748},
doi = {10.1145/3453688.3461748},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuHLPH0D021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuZWYJ21,
author = {Fangxin Liu and
Wenbo Zhao and
Zongwu Wang and
Tao Yang and
Li Jiang},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{IM3A:} Boosting Deep Neural Network Efficiency via In-Memory Addressing-Assisted
Acceleration},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {253--258},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461491},
doi = {10.1145/3453688.3461491},
timestamp = {Wed, 13 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuZWYJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuZWZZS21,
author = {Shiwei Liu and
Zihao Zhao and
Yanhong Wang and
Qiaosha Zou and
Yiyun Zhang and
Chuanjin Richard Shi},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Systolic-Array Deep-Learning Acceleration Exploring Pattern-Indexed
Coordinate-Assisted Sparsity for Real-Time On-Device Speech Processing},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {353--358},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461530},
doi = {10.1145/3453688.3461530},
timestamp = {Fri, 02 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuZWZZS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaZZ21,
author = {Yu Ma and
Linfeng Zheng and
Pingqiang Zhou},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Tolerating Stuck-at Fault and Variation in Resistive Edge Inference
Engine via Weight Mapping},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {313--318},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461487},
doi = {10.1145/3453688.3461487},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaZZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MannepalliKR21,
author = {Yashaswi Mannepalli and
Viraj Bharadwaj Korede and
Madhav Rao},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Novel Approximate Multiplier Designs for Edge Detection Application},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {371--377},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461482},
doi = {10.1145/3453688.3461482},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MannepalliKR21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ManuHDY21,
author = {Daniel Manu and
Shaoyi Huang and
Caiwen Ding and
Lei Yang},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Co-Exploration of Graph Neural Network and Network-on-Chip Design
Using AutoML},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {175--180},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461741},
doi = {10.1145/3453688.3461741},
timestamp = {Thu, 08 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ManuHDY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MbongueSB21,
author = {Joel Mandebi Mbongue and
Sujan Kumar Saha and
Christophe Bobda},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Domain Isolation in FPGA-Accelerated Cloud and Data Center Applications},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {283--288},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461527},
doi = {10.1145/3453688.3461527},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MbongueSB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MunirGFPN21,
author = {Mustafa Munir and
Aswin Gopikanna and
Arash Fayyazi and
Massoud Pedram and
Shahin Nazarian},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {qMC: {A} Formal Model Checking Verification Framework For Superconducting
Logic},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {259--264},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461522},
doi = {10.1145/3453688.3461522},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MunirGFPN21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NagarkarKRSHD21,
author = {Neha Nagarkar and
Khaled N. Khasawneh and
Setareh Rafatirad and
Avesta Sasan and
Houman Homayoun and
Sai Manoj Pudukotai Dinakarrao},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Energy-Efficient and Adversarially Robust Machine Learning with Selective
Dynamic Band Filtering},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {195--200},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461756},
doi = {10.1145/3453688.3461756},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NagarkarKRSHD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Nestor21,
author = {John A. Nestor},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Experiences with Remote Teaching an Embedded Systems Course},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {437--442},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461518},
doi = {10.1145/3453688.3461518},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Nestor21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NicholasTS21,
author = {Geraldine Shirley Nicholas and
Bhavin Thakar and
Fareena Saqib},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Hardware Secure Execution and Simulation Model Correlation using {IFT}
on {RISC-V}},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {409--414},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461517},
doi = {10.1145/3453688.3461517},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NicholasTS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NieLHJLH21,
author = {Chen Nie and
Jie Lin and
Huan Hu and
Li Jiang and
Xiaoyao Liang and
Zhezhi He},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based {VMM} Support},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {347--352},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461528},
doi = {10.1145/3453688.3461528},
timestamp = {Tue, 17 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NieLHJLH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NiuJACL021,
author = {Zijing Niu and
Honglan Jiang and
Mohammad Saeed Ansari and
Bruce F. Cockburn and
Leibo Liu and
Jie Han},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {A Logarithmic Floating-Point Multiplier for the Efficient Training
of Neural Networks},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {65--70},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461509},
doi = {10.1145/3453688.3461509},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NiuJACL021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Orlando21,
author = {Pompei Len Orlando},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {An Air Force Perspective on the Application of Machine Learning for
Microelectronics Design and Security},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {319},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3462233},
doi = {10.1145/3453688.3462233},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Orlando21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Patnaik21,
author = {Satwik Patnaik},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {On the Vulnerability of Hardware Masking in Practical Implementations},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {77--82},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461516},
doi = {10.1145/3453688.3461516},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Patnaik21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PhatharodomSS21,
author = {Saran Phatharodom and
Avesta Sasan and
Ioannis Savidis},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {SAT-attack Resilience Measure for Access Restricted Circuits},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {213--220},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461759},
doi = {10.1145/3453688.3461759},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PhatharodomSS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Pieper0AD21,
author = {Pascal Pieper and
Ralf Wimmer and
Gerhard Angst and
Rolf Drechsler},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Minimally Invasive {HW/SW} Co-debug Live Visualization on Architecture
Level},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {321--326},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461524},
doi = {10.1145/3453688.3461524},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Pieper0AD21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/QiSPHZS21,
author = {Panjie Qi and
Yuhong Song and
Hongwu Peng and
Shaoyi Huang and
Qingfeng Zhuge and
Edwin Hsing{-}Mean Sha},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Accommodating Transformer onto {FPGA:} Coupling the Balanced Model
Compression and FPGA-Implementation Optimization},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {163--168},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461739},
doi = {10.1145/3453688.3461739},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/QiSPHZS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RayNRB21,
author = {Sandip Ray and
Atul Prasad Deb Nath and
Kshitij Raj and
Swarup Bhunia},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {The Curious Case of Trusted {IC} Provisioning in Untrusted Testing
Facilities},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {207--212},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461758},
doi = {10.1145/3453688.3461758},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RayNRB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RoshanisefatKHS21,
author = {Shervin Roshanisefat and
Hadi Mardani Kamali and
Houman Homayoun and
Avesta Sasan},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{RANE:} An Open-Source Formal De-obfuscation Attack for Reverse Engineering
of Logic Encrypted Circuits},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {221--228},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461760},
doi = {10.1145/3453688.3461760},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RoshanisefatKHS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SadeghiRK21,
author = {Ahmad{-}Reza Sadeghi and
Jeyavijayan Rajendran and
Rahul Kande},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Organizing The World's Largest Hardware Security Competition: Challenges,
Opportunities, and Lessons Learned},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {95--100},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3464508},
doi = {10.1145/3453688.3464508},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SadeghiRK21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SahooBU021,
author = {Siva Satyendra Sahoo and
Akhil Raj Baranwal and
Salim Ullah and
Akash Kumar},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {\emph{MemOReL}: {A} Memory-oriented Optimization Approach to Reinforcement
Learning on FPGA-based Embedded Systems},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {339--346},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461533},
doi = {10.1145/3453688.3461533},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SahooBU021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SantikellurMC21,
author = {Pranesh Santikellur and
Rijoy Mukherjee and
Rajat Subhra Chakraborty},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{APUF-BNN:} An Automated Framework for Efficient Combinational Logic
Based Implementation of Arbiter {PUF} through Binarized Neural Network},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {89--94},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461484},
doi = {10.1145/3453688.3461484},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SantikellurMC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Schaumont21,
author = {Patrick Schaumont},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Socially-Distant Hands-On Labs for a Real-time Digital Signal Processing
Course},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {425--430},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461490},
doi = {10.1145/3453688.3461490},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Schaumont21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShiflettKLB21,
author = {Kyle Shiflett and
Avinash Karanth and
Ahmed Louri and
Razvan C. Bunescu},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Bitwise Neural Network Acceleration Using Silicon Photonics},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {9--14},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461515},
doi = {10.1145/3453688.3461515},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShiflettKLB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SivakumarKJ21,
author = {S. Sivakumar and
T. M. Abdul Khader and
John Jose},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Improving Lifetime of Non-Volatile Memory Caches by Logical Partitioning},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {123--128},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461488},
doi = {10.1145/3453688.3461488},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SivakumarKJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Song0H21,
author = {Tao Song and
Xiaoming Chen and
Yinhe Han},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Eliminating Iterations of Iterative Methods: Solving Large-Scale Sparse
Linear System in \emph{O}(1) with RRAM-based In-Memory Accelerator},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {71--76},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461510},
doi = {10.1145/3453688.3461510},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Song0H21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangLSLXZS21,
author = {Han Wang and
Longfei Luo and
Liang Shi and
Changlong Li and
Chun Jason Xue and
Qingfeng Zhuge and
Edwin H.{-}M. Sha},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{SFP:} Smart File-Aware Prefetching for Flash based Storage Systems},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {45--50},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461492},
doi = {10.1145/3453688.3461492},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangLSLXZS21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangLWLMZZ21,
author = {Mengdi Wang and
Bing Li and
Ying Wang and
Cheng Liu and
Xiaohan Ma and
Xiandong Zhao and
Lei Zhang},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{MT-DLA:} An Efficient Multi-Task Deep Learning Accelerator Design},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {1--8},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461514},
doi = {10.1145/3453688.3461514},
timestamp = {Wed, 17 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangLWLMZZ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangWL0YDCCLGCP21,
author = {Zheng Wang and
Zhuo Wang and
Jian Liao and
Chao Chen and
Yongkui Yang and
Bo Dong and
Weiguang Chen and
Wenxuan Chen and
Ming Lei and
Weiyu Guo and
Rui Chen and
Yi Peng and
Zhibin Yu},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{CNN-DMA:} {A} Predictable and Scalable Direct Memory Access Engine
for Convolutional Neural Network with Sliding-window Filtering},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {115--121},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461496},
doi = {10.1145/3453688.3461496},
timestamp = {Wed, 08 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangWL0YDCCLGCP21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Wu0H21,
author = {Nan Wu and
Yuan Xie and
Cong Hao},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{IRONMAN:} GNN-assisted Design Space Exploration in High-Level Synthesis
via Reinforcement Learning},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {39--44},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461495},
doi = {10.1145/3453688.3461495},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Wu0H21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiuCYMYGL21,
author = {Nuo Xiu and
Yiming Chen and
Guodong Yin and
Xiaoyang Ma and
Huazhong Yang and
Sumitha George and
Xueqing Li},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Capacitive Content-Addressable Memory: {A} Highly Reliable and Scalable
Approach to Energy-Efficient Parallel Pattern Matching Applications},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {479--484},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461744},
doi = {10.1145/3453688.3461744},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XiuCYMYGL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuSZSGH21,
author = {Rui Xu and
Edwin Hsing{-}Mean Sha and
Qingfeng Zhuge and
Liang Shi and
Shouzhen Gu and
Yan Hou},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Relaxed Placement: Minimizing Shift Operations for Racetrack Memory
in Hybrid {SPM}},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {129--134},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461513},
doi = {10.1145/3453688.3461513},
timestamp = {Fri, 15 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XuSZSGH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Xue0L21,
author = {Mingfu Xue and
Jian Wang and
Weiqiang Liu},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{DNN} Intellectual Property Protection: Taxonomy, Attacks and Evaluations
(Invited Paper)},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {455--460},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461752},
doi = {10.1145/3453688.3461752},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Xue0L21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YanCFXN0W21,
author = {Aibin Yan and
Aoran Cao and
Zhengzheng Fan and
Zhelong Xu and
Tianming Ni and
Patrick Girard and
Xiaoqing Wen},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {A 4NU-Recoverable and HIS-Insensitive Latch Design for Highly Robust
Computing in Harsh Radiation Environments},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {301--306},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461493},
doi = {10.1145/3453688.3461493},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YanCFXN0W21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangJQLLUCDFGHL21,
author = {Mingdai Yang and
Mohammad Reza Jokar and
Junyi Qiu and
Qiuwen Lou and
Yuming Liu and
Aditi Udupa and
Frederic T. Chong and
John M. Dallesasse and
Milton Feng and
Lynford L. Goddard and
X. Sharon Hu and
Yanjing Li},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {A Hybrid Optical-Electrical Analog Deep Learning Accelerator Using
Incoherent Optical Signals},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {271--276},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461531},
doi = {10.1145/3453688.3461531},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangJQLLUCDFGHL21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangJWZZC21,
author = {Jinshan Zhang and
Bo Jiao and
Yunzhengmao Wang and
Haozhe Zhu and
Lihua Zhang and
Chixiao Chen},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{ALPINE:} An Agile Processing-in-Memory Macro Compilation Framework},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {333--338},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461532},
doi = {10.1145/3453688.3461532},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangJWZZC21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangMSY21,
author = {Zhiming Zhang and
Ivan Miketic and
Emre Salman and
Qiaoyan Yu},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Assessing Correlation Power Analysis {(CPA)} Attack Resilience of
Transistor-Level Logic Locking},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {415--420},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461508},
doi = {10.1145/3453688.3461508},
timestamp = {Mon, 21 Jun 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangMSY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangZHY21,
author = {Wei Zhang and
Yongxiao Zhou and
Tsung{-}Yi Ho and
Hailong Yao},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Concentration Gradients Enhancement of Christmas-Tree Structure Based
on a Look-Up Table},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {141--146},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461500},
doi = {10.1145/3453688.3461500},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangZHY21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaoHJLJ21,
author = {Yilong Zhao and
Zhezhi He and
Naifeng Jing and
Xiaoyao Liang and
Li Jiang},
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {Re2PIM: {A} Reconfigurable ReRAM-Based {PIM} Design for Variable-Sized
Vector-Matrix Multiplication},
booktitle = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
pages = {15--20},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688.3461494},
doi = {10.1145/3453688.3461494},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaoHJLJ21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2021,
editor = {Yiran Chen and
Victor V. Zhirnov and
Avesta Sasan and
Ioannis Savidis},
title = {{GLSVLSI} '21: Great Lakes Symposium on {VLSI} 2021, Virtual Event,
USA, June 22-25, 2021},
publisher = {{ACM}},
year = {2021},
url = {https://doi.org/10.1145/3453688},
doi = {10.1145/3453688},
isbn = {978-1-4503-8393-6},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2021.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0001GZ20,
author = {Jianlei Yang and
Xiaopeng Gao and
Weisheng Zhao},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Towards Systems Education for Artificial Intelligence: {A} Course
Practice in Intelligent Computing Architectures},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {567--572},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406935},
doi = {10.1145/3386263.3406935},
timestamp = {Mon, 04 Jul 2022 14:19:34 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/0001GZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0001P20,
author = {Francesco Regazzoni and
Ilia Polian},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Side Channel Attacks vs Approximate Computing},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {321--326},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407592},
doi = {10.1145/3386263.3407592},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/0001P20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0002CLWZZLL20,
author = {Dawen Xu and
Cheng Chu and
Cheng Liu and
Ying Wang and
Xianzhong Zhou and
Lei Zhang and
Huaguo Liang and
Huawei Li},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Multi-task Scheduling for PIM-based Heterogeneous Computing System},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {457--462},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406946},
doi = {10.1145/3386263.3406946},
timestamp = {Thu, 11 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/0002CLWZZLL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0002JCK20,
author = {Yuan He and
Jinyu Jiao and
Thang Cao and
Masaaki Kondo},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Energy-Efficient On-Chip Networks through Profiled Hybrid Switching},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {241--246},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406934},
doi = {10.1145/3386263.3406934},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/0002JCK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0002LYQ20,
author = {Jiliang Zhang and
Chen Li and
Jing Ye and
Gang Qu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Privacy Threats and Protection in Machine Learning},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {531--536},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407599},
doi = {10.1145/3386263.3407599},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/0002LYQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0019SCSGH020,
author = {Bo Liu and
Yuhao Sun and
Hao Cai and
Zeyu Shen and
Yu Gong and
Lepeng Huang and
Zhen Wang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {An Ultra-low Power Keyword-Spotting Accelerator Using Circuit-Architecture-System
Co-design and Self-adaptive Approximate Computing Based {BWN}},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {193--198},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406906},
doi = {10.1145/3386263.3406906},
timestamp = {Mon, 15 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/0019SCSGH020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AgrawalBRK20,
author = {Rashmi S. Agrawal and
Lake Bu and
Eliakin Del Rosario and
Michel A. Kinsy},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Towards Programmable All-Digital True Random Number Generator},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {53--58},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406922},
doi = {10.1145/3386263.3406922},
timestamp = {Tue, 26 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AgrawalBRK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Angizi0F20,
author = {Shaahin Angizi and
Wei Zhang and
Deliang Fan},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Exploring {DNA} Alignment-in-Memory Leveraging Emerging {SOT-MRAM}},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {277--282},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407590},
doi = {10.1145/3386263.3407590},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Angizi0F20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ArafinL20,
author = {Md Tanvir Arafin and
Zhaojun Lu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Security Challenges of Processing-In-Memory Systems},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {229--234},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3411365},
doi = {10.1145/3386263.3411365},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ArafinL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AsadiN20,
author = {Sina Asadi and
M. Hassan Najafi},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Accelerating Deterministic Stochastic Computing with Context-Aware
Bit-stream Generator},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {157--162},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406908},
doi = {10.1145/3386263.3406908},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AsadiN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AwaisMP20,
author = {Muhammad Awais and
Hassan Ghasemzadeh Mohammadi and
Marco Platzner},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Hybrid Synthesis Methodology for Approximate Circuits},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {421--426},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406952},
doi = {10.1145/3386263.3406952},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AwaisMP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Bai0WWZZZZ20,
author = {Yining Bai and
Yue Zhang and
Jinkai Wang and
Guanda Wang and
Zhizhong Zhang and
Zhenyi Zheng and
Kun Zhang and
Weisheng Zhao},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Novel In-memory Computing Scheme Based on Toggle Spin Torque {MRAM}},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {351--356},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406917},
doi = {10.1145/3386263.3406917},
timestamp = {Thu, 24 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Bai0WWZZZZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BaoCCB20,
author = {Wei Bao and
Peng Cao and
Hao Cai and
Aiguo Bu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Learning-Based Timing Prediction Framework for Wide Supply Voltage
Design},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {309--314},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406918},
doi = {10.1145/3386263.3406918},
timestamp = {Wed, 01 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BaoCCB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BavikadiSKGD20,
author = {Sathwika Bavikadi and
Purab Ranjan Sutradhar and
Khaled N. Khasawneh and
Amlan Ganguly and
Sai Manoj Pudukotai Dinakarrao},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Review of In-Memory Computing Architectures for Machine Learning
Applications},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {89--94},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407649},
doi = {10.1145/3386263.3407649},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BavikadiSKGD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BhattacharjyaMS20,
author = {Rajat Bhattacharjya and
Vishesh Mishra and
Saurabh Singh and
Kaustav Goswami and
Dip Sankar Banerjee},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {An Approximate Carry Estimating Simultaneous Adder with Rectification},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {139--144},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406928},
doi = {10.1145/3386263.3406928},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BhattacharjyaMS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BoorstinCPHH20,
author = {Noah Boorstin and
Veronica Cortes and
Kaveh Pezeshki and
David M. Harris and
Shuojin Hang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Simplified Arm Processor for {VLSI} Education},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {555--559},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406920},
doi = {10.1145/3386263.3406920},
timestamp = {Mon, 08 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BoorstinCPHH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BrunsGD20,
author = {Niklas Bruns and
Daniel Gro{\ss}e and
Rolf Drechsler},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Early Verification of {ISA} Extension Specifications using Deep Reinforcement
Learning},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {297--302},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406901},
doi = {10.1145/3386263.3406901},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BrunsGD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CanellaDGK20,
author = {Claudio Canella and
Sai Manoj Pudukotai Dinakarrao and
Daniel Gruss and
Khaled N. Khasawneh},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Evolution of Defenses against Transient-Execution Attacks},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {169--174},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407584},
doi = {10.1145/3386263.3407584},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CanellaDGK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CanellaKG20,
author = {Claudio Canella and
Khaled N. Khasawneh and
Daniel Gruss},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {The Evolution of Transient-Execution Attacks},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {163--168},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407583},
doi = {10.1145/3386263.3407583},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/CanellaKG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenZ20,
author = {Zhe Chen and
Yuelong Zhao},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {{DA-GC:} {A} Dynamic Adjustment Garbage Collection Method Considering
Wear-leveling for {SSD}},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {475--480},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406943},
doi = {10.1145/3386263.3406943},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChengQWYQ20,
author = {Jingxian Cheng and
Saiyu Qi and
Wenqing Wang and
Yuchen Yang and
Yong Qi},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Fast Consistency Auditing for Massive Industrial Data in Untrusted
Cloud Services},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {381--386},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407598},
doi = {10.1145/3386263.3407598},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChengQWYQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CuiLHY20,
author = {Jinhua Cui and
Weiguang Liu and
Jianhang Huang and
Laurence T. Yang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Exploiting Disturbance-Aware Read Redirection for Performance Improvement
in 3D Flash Memory},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {95--100},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406921},
doi = {10.1145/3386263.3406921},
timestamp = {Fri, 21 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CuiLHY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DangKMS20,
author = {Dharanidhar Dang and
Aurosmita Khansama and
Rabi N. Mahapatra and
Debashis Sahoo},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {BPhoton-CNN: An Ultrafast Photonic Backpropagation Accelerator for
Deep Learning},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {27--32},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406932},
doi = {10.1145/3386263.3406932},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DangKMS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DongQPZKJ020,
author = {Meng Dong and
Zhiliang Qiu and
Weitao Pan and
Hongbin Zhang and
Chenglei Kong and
Hui Jin and
Jianlei Yang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Dual-Plane Switch Architecture for Time-Triggered Ethernet},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {375--379},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407597},
doi = {10.1145/3386263.3407597},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DongQPZKJ020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DouYGOWL20,
author = {Yuqin Dou and
Shichao Yu and
Chongyan Gu and
M{\'{a}}ire O'Neill and
Chenghua Wang and
Weiqiang Liu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Security Analysis of Hardware Trojans on Approximate Circuits},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {315--320},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407591},
doi = {10.1145/3386263.3407591},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DouYGOWL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/EbrahimiU020,
author = {Zahra Ebrahimi and
Salim Ullah and
Akash Kumar},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {SIMDive: Approximate {SIMD} Soft Multiplier-Divider for FPGAs with
Tunable Accuracy},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {151--156},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406907},
doi = {10.1145/3386263.3406907},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/EbrahimiU020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FuZTHYFS20,
author = {Rongliang Fu and
Zhimin Zhang and
Guang{-}Ming Tang and
Junying Huang and
Xiaochun Ye and
Dongrui Fan and
Ninghui Sun},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Design Automation Methodology from {RTL} to Gate-level Netlist and
Schematic for {RSFQ} Logic Circuits},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {145--150},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406898},
doi = {10.1145/3386263.3406898},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FuZTHYFS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GeXRN0K20,
author = {Mengke Ge and
Qi Xu and
Huajie Ruan and
Xiaobing Ni and
Song Chen and
Yi Kang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Synthesizing {A} Generalized Brain-inspired Interconnection Network
for Large-scale Network-on-chip Systems},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {303--308},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406904},
doi = {10.1145/3386263.3406904},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GeXRN0K20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Gong0LNMWRDLXW20,
author = {Yifan Gong and
Zheng Zhan and
Zhengang Li and
Wei Niu and
Xiaolong Ma and
Wenhao Wang and
Bin Ren and
Caiwen Ding and
Xue Lin and
Xiaolin Xu and
Yanzhi Wang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Privacy-Preserving-Oriented {DNN} Pruning and Mobile Acceleration
Framework},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {119--124},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407650},
doi = {10.1145/3386263.3407650},
timestamp = {Fri, 08 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Gong0LNMWRDLXW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GuoY0H0L20,
author = {Qingli Guo and
Jing Ye and
Jiliang Zhang and
Yu Hu and
Xiaowei Li and
Huawei Li},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Prediction Stability: {A} New Metric for Quantitatively Evaluating
{DNN} Outputs},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {537--542},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407600},
doi = {10.1145/3386263.3407600},
timestamp = {Mon, 22 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GuoY0H0L20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HaoCZLXHC20,
author = {Cong Hao and
Yao Chen and
Xiaofan Zhang and
Yuhong Li and
Jinjun Xiong and
Wen{-}Mei Hwu and
Deming Chen},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Effective Algorithm-Accelerator Co-design for {AI} Solutions on Edge
Devices},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {283--290},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406956},
doi = {10.1145/3386263.3406956},
timestamp = {Tue, 19 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HaoCZLXHC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HeDHGLH20,
author = {Guorong He and
Chen Dong and
Xing Huang and
Wenzhong Guo and
Ximeng Liu and
Tsung{-}Yi Ho},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {HTcatcher: Finite State Machine and Feature Verifcation for Large-scale
Neuromorphic Computing Systems},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {415--420},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406955},
doi = {10.1145/3386263.3406955},
timestamp = {Wed, 02 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HeDHGLH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HerdtGWGD20,
author = {Vladimir Herdt and
Daniel Gro{\ss}e and
Jonas Wloka and
Tim G{\"{u}}neysu and
Rolf Drechsler},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Verification of Embedded Binaries using Coverage-guided Fuzzing with
SystemC-based Virtual Prototypes},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {101--106},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406899},
doi = {10.1145/3386263.3406899},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HerdtGWGD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HoqueSB20,
author = {Tamzidul Hoque and
Patanjali SLPSK and
Swarup Bhunia},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Trust Issues in {COTS:} The Challenges and Emerging Solution},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {211--216},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407654},
doi = {10.1145/3386263.3407654},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HoqueSB20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HouWZWC20,
author = {Zhengyi Hou and
You Wang and
Deming Zhang and
Chengzhi Wang and
Hao Cai},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Modeling Attack Resilient Physical Unclonable Function Based on
{STT-MRAM}},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {65--70},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406933},
doi = {10.1145/3386263.3406933},
timestamp = {Thu, 24 Mar 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HouWZWC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuDLLWL20,
author = {Chengyu Hu and
Qinghua Duan and
Peng Lu and
Wei Liu and
Jian Wang and
Jinmei Lai},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Tile-based Interconnect Model for {FPGA} Architecture Exploration},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {113--118},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406927},
doi = {10.1145/3386263.3406927},
timestamp = {Wed, 09 Feb 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HuDLLWL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Huang0ZZWZZ20,
author = {Zhe Huang and
Yue Zhang and
Kun Zhang and
Zhizhong Zhang and
Jinkai Wang and
Youguang Zhang and
Weisheng Zhao},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {An In-memory Highly Reconfigurable Logic Circuit Based on Diode-assisted
Enhanced Magnetoresistance Device},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {259--264},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407587},
doi = {10.1145/3386263.3407587},
timestamp = {Thu, 24 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Huang0ZZWZZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuangYZY20,
author = {Yucong Huang and
Zhitao Yang and
Jianghan Zhu and
Terry Tao Ye},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Analog Circuit Implementation of Neurons with Multiply-Accumulate
and ReLU Functions},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {493--498},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406941},
doi = {10.1145/3386263.3406941},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HuangYZY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiangL020,
author = {Xingbin Jiang and
Michele Lora and
Sudipta Chattopadhyay},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Efficient and Trusted Detection of Rootkit in IoT Devices via Offline
Profiling and Online Monitoring},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {433--438},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406939},
doi = {10.1145/3386263.3406939},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JiangL020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiangPP20,
author = {Minmin Jiang and
Ioannis A. Papistas and
Vasilis F. Pavlidis},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Cost Modeling and Analysis of {TSV} and Contactless 3D-ICs},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {519--524},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406931},
doi = {10.1145/3386263.3406931},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JiangPP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JoshiDKK20,
author = {Chirag Joshi and
Palash Das and
Ashwini A. Kulkarni and
Hemangee K. Kapoor},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Dimming Hybrid Caches to Assist in Temperature Control of Chip MultiProcessors},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {487--492},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406951},
doi = {10.1145/3386263.3406951},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JoshiDKK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KamaliAHS20,
author = {Hadi Mardani Kamali and
Kimia Zamiri Azar and
Houman Homayoun and
Avesta Sasan},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {On Designing Secure and Robust Scan Chain for Protecting Obfuscated
Logic},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {217--222},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407655},
doi = {10.1145/3386263.3407655},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KamaliAHS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KarempudiVT20,
author = {Venkata Sai Praneeth Karempudi and
Sairam Sri Vatsavai and
Ishan G. Thakkar},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Redesigning Photonic Interconnects with Silicon-on-Sapphire Device
Platform for Ultra-Low-Energy On-Chip Communication},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {247--252},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406929},
doi = {10.1145/3386263.3406929},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KarempudiVT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Kurdahi20,
author = {Fadi J. Kurdahi},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Towards Self-Aware Systems-on-Chip Through Intelligent Cross-Layer
Coordination},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {137},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3409105},
doi = {10.1145/3386263.3409105},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Kurdahi20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LeeKS20,
author = {Wonjae Lee and
Yonghwi Kwon and
Youngsoo Shin},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Fast {ECO} Leakage Optimization Using Graph Convolutional Network},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {187--192},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406916},
doi = {10.1145/3386263.3406916},
timestamp = {Fri, 16 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LeeKS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LeeLLCKHK20,
author = {Segi Lee and
Sugil Lee and
Jongeun Lee and
Jong{-}Moon Choi and
Do{-}Wan Kwon and
Seung{-}Kwang Hong and
Kee{-}Won Kwon},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Architecture-Accuracy Co-optimization of ReRAM-based Low-cost Neural
Network Processor},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {427--432},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406954},
doi = {10.1145/3386263.3406954},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LeeLLCKHK20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiCRN20,
author = {Zheyu Li and
Nagadastagiri Challapalle and
Akshay Krishna Ramanathan and
Vijaykrishnan Narayanan},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {IMC-Sort: In-Memory Parallel Sorting Architecture using Hybrid Memory
Cube},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {45--50},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407581},
doi = {10.1145/3386263.3407581},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiCRN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiGZKWSWX20,
author = {Shiming Li and
Shasha Guo and
Limeng Zhang and
Ziyang Kang and
Shiying Wang and
Wei Shi and
Lei Wang and
Weixia Xu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {{SNEAP:} {A} Fast and Efficient Toolchain for Mapping Large-Scale
Spiking Neural Network onto NoC-based Neuromorphic Platform},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {9--14},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406900},
doi = {10.1145/3386263.3406900},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiGZKWSWX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiaoD20,
author = {Zhaopo Liao and
Sheqin Dong},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Constraint-Driven Compact Model with Partition Strategy for Ordered
Escape Routing},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {393--398},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406942},
doi = {10.1145/3386263.3406942},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiaoD20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Liu0HCZGGW20,
author = {Bo Liu and
Yan Li and
Lepeng Huang and
Hao Cai and
Wentao Zhu and
Shisheng Guo and
Yu Gong and
Zhen Wang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Background Noise Self-adaptive {VAD} Using {SNR} Prediction Based
Precision Dynamic Reconfigurable Approximate Computing},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {271--275},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407589},
doi = {10.1145/3386263.3407589},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Liu0HCZGGW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuJXWC20,
author = {Heng Liu and
Linzhi Jiang and
Jian Xu and
Dexin Wu and
Liqun Chen},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Adversarial Perturbation with ResNet},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {549--554},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407607},
doi = {10.1145/3386263.3407607},
timestamp = {Sat, 28 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuJXWC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuZZZL20,
author = {Wei Lu and
Yuhang Zhang and
Qing Zhang and
Xinjie Zhang and
Yongfu Li},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Litho-NeuralODE: Improving Hotspot Detection Accuracy with Advanced
Data Augmentation and Neural Ordinary Differential Equations},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {387--392},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406937},
doi = {10.1145/3386263.3406937},
timestamp = {Thu, 17 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LuZZZL20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuoL0X20,
author = {Bo Luo and
Min Li and
Yu Li and
Qiang Xu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {On Configurable Defense against Adversarial Example Attacks},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {543--548},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407601},
doi = {10.1145/3386263.3407601},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LuoL0X20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LvSXZS20,
author = {Yina Lv and
Liang Shi and
Chun Joseph Xue and
Qingfeng Zhuge and
Edwin H.{-}M. Sha},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Latency Variation Aware Read Performance Optimization on 3D High Density
{NAND} Flash Memory},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {411--414},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406953},
doi = {10.1145/3386263.3406953},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LvSXZS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaDDLW20,
author = {Yufei Ma and
Yuan Du and
Li Du and
Jun Lin and
Zhongfeng Wang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {In-Memory Computing: The Next-Generation {AI} Computing Paradigm},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {265--270},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407588},
doi = {10.1145/3386263.3407588},
timestamp = {Fri, 21 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaDDLW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaYNHJ20,
author = {Dongning Ma and
Xunzhao Yin and
Michael T. Niemier and
Xiaobo Sharon Hu and
Xun Jiao},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {AxR-NN: Approximate Computation Reuse for Energy-Efficient Convolutional
Neural Networks},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {363--368},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407595},
doi = {10.1145/3386263.3407595},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaYNHJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaoXXRLZA020,
author = {Wei Mao and
Zhihua Xiao and
Peng Xu and
Hongwei Ren and
Dingbang Liu and
Shirui Zhao and
Fengwei An and
Hao Yu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Energy-Efficient Machine Learning Accelerator for Binary Neural Networks},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {77--82},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407582},
doi = {10.1145/3386263.3407582},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaoXXRLZA020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NajibiLZAA20,
author = {Halima Najibi and
Alexandre Levisse and
Marina Zapater and
Mohamed M. Sabry Aly and
David Atienza},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Towards Deeply Scaled 3D MPSoCs with Integrated Flow Cell Array Technology},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {513--518},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406923},
doi = {10.1145/3386263.3406923},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/NajibiLZAA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NamMF20,
author = {Seungseok Nam and
Emil Mat{\'{u}}s and
Gerhard P. Fettweis},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {An {ASIP} Approach to Path Allocation in {TDM} NoCs using Adaptive
Search Region},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {463--468},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406936},
doi = {10.1145/3386263.3406936},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/NamMF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NiGC20,
author = {Jiacheng Ni and
Xiaochen Guo and
Yuanqing Cheng},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {{SIP:} Boosting Up Graph Computing by Separating the Irregular Property
Data},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {15--20},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406905},
doi = {10.1145/3386263.3406905},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/NiGC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PezeshkiNMJSBH20,
author = {Kaveh Pezeshki and
Caleb Norfleet and
Erik Meike and
Teerapat Jenrungrot and
Matthew Spencer and
Joshua Brake and
David M. Harris},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A Board and Projects for an FPGA/Microcontroller-Based Embedded Systems
Lab},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {561--565},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406930},
doi = {10.1145/3386263.3406930},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PezeshkiNMJSBH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PingTY20,
author = {Liqi Ping and
Jingweijia Tan and
Kaige Yan},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {{SERN:} Modeling and Analyzing the Soft Error Reliability of Convolutional
Neural Networks},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {445--450},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406938},
doi = {10.1145/3386263.3406938},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PingTY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/QiuZJHXMLLN20,
author = {Keni Qiu and
Mengying Zhao and
Zhenge Jia and
Jingtong Hu and
Chun Jason Xue and
Kaisheng Ma and
Xueqing Li and
Yongpan Liu and
Vijaykrishnan Narayanan},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Design Insights of Non-volatile Processors and Accelerators in Energy
Harvesting Systems},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {369--374},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407596},
doi = {10.1145/3386263.3407596},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/QiuZJHXMLLN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RakinHYWWF20,
author = {Adnan Siraj Rakin and
Zhezhi He and
Li Yang and
Yanzhi Wang and
Liqiang Wang and
Deliang Fan},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Robust Sparse Regularization: Defending Adversarial Attacks Via Regularized
Sparse Network},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {125--130},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407651},
doi = {10.1145/3386263.3407651},
timestamp = {Thu, 14 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RakinHYWWF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ReisGAYFNZH20,
author = {Dayane Reis and
Di Gao and
Shaahin Angizi and
Xunzhao Yin and
Deliang Fan and
Michael T. Niemier and
Cheng Zhuo and
Xiaobo Sharon Hu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Modeling and Benchmarking Computing-in-Memory for Design Space Exploration},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {39--44},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407580},
doi = {10.1145/3386263.3407580},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ReisGAYFNZH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SayadiGMMSR0H20,
author = {Hossein Sayadi and
Yifeng Gao and
Hosein Mohammadi Makrani and
Tinoosh Mohsenin and
Avesta Sasan and
Setareh Rafatirad and
Jessica Lin and
Houman Homayoun},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {StealthMiner: Specialized Time Series Machine Learning for Run-Time
Stealthy Malware Detection based on Microarchitectural Features},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {175--180},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407585},
doi = {10.1145/3386263.3407585},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SayadiGMMSR0H20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Schlicker020,
author = {Philipp Schlicker and
Oliver Bringmann},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Gate-Level Models for Fast Cross-Level Power Density Estimation},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {507--512},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406911},
doi = {10.1145/3386263.3406911},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Schlicker020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ServadeiMDWEW20,
author = {Lorenzo Servadei and
Edoardo Mosca and
Keerthikumara Devarajegowda and
Michael Werner and
Wolfgang Ecker and
Robert Wille},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Cost Estimation for Configurable Model-Driven SoC Designs Using Machine
Learning},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {405--410},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406950},
doi = {10.1145/3386263.3406950},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ServadeiMDWEW20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShiraziNA20,
author = {Shirin Haji Amin Shirazi and
Hoda Naghibijouybari and
Nael B. Abu{-}Ghazaleh},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Securing Machine Learning Architectures and Systems},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {499--506},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3409104},
doi = {10.1145/3386263.3409104},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShiraziNA20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShiriMPMHSWM20,
author = {Aidin Shiri and
Arnab Neelim Mazumder and
Bharat Prakash and
Nitheesh Kumar Manjunath and
Houman Homayoun and
Avesta Sasan and
Nicholas R. Waytowich and
Tinoosh Mohsenin},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Energy-Efficient Hardware for Language Guided Reinforcement Learning},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {131--136},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407652},
doi = {10.1145/3386263.3407652},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShiriMPMHSWM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SongZSL020,
author = {Zhuoran Song and
Yilong Zhao and
Yanan Sun and
Xiaoyao Liang and
Li Jiang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {ESNreram: An Energy-Efficient Sparse Neural Network Based on Resistive
Random-Access Memory},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {291--296},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406897},
doi = {10.1145/3386263.3406897},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SongZSL020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SunnyMTPN20,
author = {Febin Sunny and
Asif Mirza and
Ishan G. Thakkar and
Sudeep Pasricha and
Mahdi Nikdast},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {{LORAX:} Loss-Aware Approximations for Energy-Efficient Silicon Photonic
Networks-on-Chip},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {235--240},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406919},
doi = {10.1145/3386263.3406919},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SunnyMTPN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WanDSZ020,
author = {Ziqian Wan and
Guohao Dai and
Yun Joon Soh and
Jishen Zhao and
Yu Wang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {An Order Sampling Processing-in-Memory Architecture for Approximate
Graph Pattern Mining},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {357--362},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406912},
doi = {10.1145/3386263.3406912},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WanDSZ020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangDXLQ20,
author = {Ye Wang and
Jian Dong and
Qian Xu and
Zhaojun Lu and
Gang Qu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Is It Approximate Computing or Malicious Computing?},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {333--338},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407594},
doi = {10.1145/3386263.3407594},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangDXLQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangPC20,
author = {Wei Wang and
Vasilis F. Pavlidis and
Yuanqing Cheng},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Zero-skew Clock Network Synthesis for Monolithic 3D ICs with Minimum
Wirelength},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {399--404},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406949},
doi = {10.1145/3386263.3406949},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangPC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangSSRMH20,
author = {Han Wang and
Hossein Sayadi and
Avesta Sasan and
Setareh Rafatirad and
Tinoosh Mohsenin and
Houman Homayoun},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Comprehensive Evaluation of Machine Learning Countermeasures for Detecting
Microarchitectural Side-Channel Attacks},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {181--186},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407586},
doi = {10.1145/3386263.3407586},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangSSRMH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiaZZTZ0R20,
author = {Tian Xia and
Pengchen Zong and
Haoran Zhao and
Jianming Tong and
Wenzhe Zhao and
Nanning Zheng and
Pengju Ren},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {{COCOA:} Content-Oriented Configurable Architecture Based on Highly-Adaptive
Data Transmission Networks},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {253--258},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406924},
doi = {10.1145/3386263.3406924},
timestamp = {Tue, 21 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XiaZZTZ0R20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Xu0QH20,
author = {Sheng Xu and
Xiaoming Chen and
Xuehai Qian and
Yinhe Han},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {{TUPIM:} {A} Transparent and Universal Processing-in-Memory Architecture
for Unmodified Binaries},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {199--204},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406896},
doi = {10.1145/3386263.3406896},
timestamp = {Tue, 23 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Xu0QH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuCQ20,
author = {Zhichao Xu and
Aijiao Cui and
Gang Qu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A New Aging Sensor for the Detection of Recycled ICs},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {223--228},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407656},
doi = {10.1145/3386263.3407656},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XuCQ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuSO20,
author = {Hongjie Xu and
Jun Shiomi and
Hidetoshi Onodera},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {On-chip Memory Optimized {CNN} Accelerator with Efficient Partial-sum
Accumulation},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {21--26},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406925},
doi = {10.1145/3386263.3406925},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XuSO20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangHZY20,
author = {Zhitao Yang and
Yucong Huang and
Jianghan Zhu and
Terry Tao Ye},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Analog Circuit Implementation of {LIF} and {STDP} Models for Spiking
Neural Networks},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {469--474},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406940},
doi = {10.1145/3386263.3406940},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangHZY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangJLY20,
author = {Zhixi Yang and
Honglan Jiang and
Xianbin Li and
Jun Yang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Power-Efficient Approximate Multiplier Using Adaptive Error Compensation},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {205--210},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406913},
doi = {10.1145/3386263.3406913},
timestamp = {Fri, 30 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/YangJLY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangLCH20,
author = {Yuxin Yang and
Shiqi Lian and
Xiaoming Chen and
Yinhe Han},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Accelerating {RRT} Motion Planning Using {TCAM}},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {481--486},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406948},
doi = {10.1145/3386263.3406948},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangLCH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YelluBXY20,
author = {Pruthvy Yellu and
Landon Buell and
Dongpeng Xu and
Qiaoyan Yu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Blurring Boundaries: {A} New Way to Secure Approximate Computing Systems},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {327--332},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407593},
doi = {10.1145/3386263.3407593},
timestamp = {Tue, 07 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YelluBXY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Yoo20,
author = {Hoi{-}Jun Yoo},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Deep Learning Processors for On-Device Intelligence},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {1--8},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3409103},
doi = {10.1145/3386263.3409103},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Yoo20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YuGCDYF20,
author = {Han Yu and
Chao Guo and
Bin Chen and
Changxin Du and
Xiao Yong and
Senhua Fan},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A New Silicon-aware Big Data SoC Timing Analysis Solution: {A} Case
Study of Empyrean University Program},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {573--578},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3409655},
doi = {10.1145/3386263.3409655},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/YuGCDYF20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhaX20,
author = {Xiaojing Zha and
Yinshui Xia},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Defect-Tolerant Mapping of {CMOL} Circuits with Delay Optimization},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {451--456},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406944},
doi = {10.1145/3386263.3406944},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhaX20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Zhang0ZZWSHLS20,
author = {Grace Li Zhang and
Bing Li and
Ying Zhu and
Shuhang Zhang and
Tianchen Wang and
Yiyu Shi and
Tsung{-}Yi Ho and
Hai (Helen) Li and
Ulf Schlichtmann},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Reliable and Robust RRAM-based Neuromorphic Computing},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {33--38},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407579},
doi = {10.1145/3386263.3407579},
timestamp = {Tue, 19 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Zhang0ZZWSHLS20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangKZZ20,
author = {He Zhang and
Wang Kang and
Youguang Zhang and
Weisheng Zhao},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Deep Neural Network accelerator with Spintronic Memory},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {51},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407646},
doi = {10.1145/3386263.3407646},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangKZZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangLG0HSMJ20,
author = {Zihan Zhang and
Taozhong Li and
Ning Guan and
Qin Wang and
Guanghui He and
Weiguang Sheng and
Zhigang Mao and
Naifeng Jing},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Enabling Resistive-RAM-based Activation Functions for Deep Neural
Network Acceleration},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {345--350},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406915},
doi = {10.1145/3386263.3406915},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangLG0HSMJ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangLZN20,
author = {Lingxuan Zhang and
Linsen Li and
Futai Zou and
Jiachao Niu},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Quantitatively Assessing the Cyber-to-Physical Risk of Industrial
Cyber-Physical Systems},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {439--444},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406945},
doi = {10.1145/3386263.3406945},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangLZN20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangUFE20,
author = {Baogang Zhang and
Necati Uysal and
Deliang Fan and
Rickard Ewetz},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Redundant Neurons and Shared Redundant Synapses for Robust Memristor-based
DNNs with Reduced Overhead},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {339--344},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406910},
doi = {10.1145/3386263.3406910},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangUFE20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangWZHMQZ20,
author = {Zuodong Zhang and
Runsheng Wang and
Zhe Zhang and
Ru Huang and
Chang Meng and
Weikang Qian and
Zhuangzhuang Zhou},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Reliability-Enhanced Circuit Design Flow Based on Approximate Logic
Synthesis},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {71--76},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406926},
doi = {10.1145/3386263.3406926},
timestamp = {Mon, 03 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangWZHMQZ20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhengLLM20,
author = {Liang Zheng and
Changting Li and
Zongbin Liu and
Cunqing Ma},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {Boosting Entropy Extraction of PDL-based {RO} {PUF} by High-order
Difference Method},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {59--64},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406903},
doi = {10.1145/3386263.3406903},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhengLLM20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuSQXKDNCHCXWY20,
author = {Zhenhua Zhu and
Hanbo Sun and
Kaizhong Qiu and
Lixue Xia and
Gokul Krishnan and
Guohao Dai and
Dimin Niu and
Xiaoming Chen and
Xiaobo Sharon Hu and
Yu Cao and
Yuan Xie and
Yu Wang and
Huazhong Yang},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {{MNSIM} 2.0: {A} Behavior-Level Modeling Tool for Memristor-based
Neuromorphic Computing Systems},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {83--88},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3407647},
doi = {10.1145/3386263.3407647},
timestamp = {Mon, 05 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuSQXKDNCHCXWY20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuZLC20,
author = {Siyao Zhu and
Jian Zhao and
Yongfu Li and
Mingyi Chen},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {A 53{\%}-PTE and 4-Mbps Power and Data Telemetry Circuit based on
Adaptive Duty-cycling {BPSK} Modulated Class-E Amplifier},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {525--530},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406914},
doi = {10.1145/3386263.3406914},
timestamp = {Fri, 19 Aug 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuZLC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuangLHJLG20,
author = {Zhen Zhuang and
Genggeng Liu and
Xing Huang and
Xiaotao Jia and
Wen{-}Hao Liu and
Wenzhong Guo},
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {MSFRoute: Multi-Stage {FPGA} Routing for Timing Division Multiplexing
Technique},
booktitle = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
pages = {107--112},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263.3406902},
doi = {10.1145/3386263.3406902},
timestamp = {Wed, 02 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuangLHJLG20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2020,
editor = {Tinoosh Mohsenin and
Weisheng Zhao and
Yiran Chen and
Onur Mutlu},
title = {{GLSVLSI} '20: Great Lakes Symposium on {VLSI} 2020, Virtual Event,
China, September 7-9, 2020},
publisher = {{ACM}},
year = {2020},
url = {https://doi.org/10.1145/3386263},
doi = {10.1145/3386263},
isbn = {978-1-4503-7944-1},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/2020.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0001S0S19,
author = {Wenjie Xiong and
Andr{\'{e}} Schaller and
Stefan Katzenbeisser and
Jakub Szefer},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Dynamic Physically Unclonable Functions},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {311--314},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318025},
doi = {10.1145/3299874.3318025},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/0001S0S19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/0002WLGYS19,
author = {Peng Cao and
Jiangping Wu and
Zhiyuan Liu and
Jingjing Guo and
Jun Yang and
Longxing Shi},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A Statistical Current and Delay Model Based on Log-Skew-Normal Distribution
for Low Voltage Region},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {323--326},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318028},
doi = {10.1145/3299874.3318028},
timestamp = {Mon, 10 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/0002WLGYS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AbbasinasabM19,
author = {Ali Abbasinasab and
Malgorzata Marek{-}Sadowska},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Non-Uniform Temperature Distribution in Interconnects and Its Impact
on Electromigration},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {117--122},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317973},
doi = {10.1145/3299874.3317973},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AbbasinasabM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AdegbijaLK19,
author = {Tosiron Adegbija and
Roman Lysecky and
Vinu Vijay Kumar},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Right-Provisioned IoT Edge Computing: An Overview},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {531--536},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319338},
doi = {10.1145/3299874.3319338},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AdegbijaLK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AgarwalK19,
author = {Sukarn Agarwal and
Hemangee K. Kapoor},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Enhancing the Lifetime of Non-Volatile Caches by Exploiting Module-Wise
Write Restriction},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {213--218},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317987},
doi = {10.1145/3299874.3317987},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AgarwalK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlamGH19,
author = {Mahabubul Alam and
Swaroop Ghosh and
Sujay S. Hosur},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {{TOIC:} Timing Obfuscated Integrated Circuits},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {105--110},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318001},
doi = {10.1145/3299874.3318001},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlamGH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlgharebD19,
author = {Faris S. Alghareb and
Ronald F. DeMara},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Design and Evaluation of DNU-Tolerant Registers for Resilient Architectural
State Storage},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {303--306},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318023},
doi = {10.1145/3299874.3318023},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlgharebD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlvesFK19,
author = {Tiago A. O. Alves and
Felipe M. G. Fran{\c{c}}a and
Sandip Kundu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {MLPrivacyGuard: Defeating Confidence Information based Model Inversion
Attacks on Machine Learning Systems},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {411--415},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319457},
doi = {10.1145/3299874.3319457},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlvesFK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Aly19,
author = {Mohamed M. Sabry Aly},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {{N3XT} Monolithic 3D Energy-Efficient Computing Systems},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {463},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319489},
doi = {10.1145/3299874.3319489},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Aly19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AngiziF19,
author = {Shaahin Angizi and
Deliang Fan},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {GraphiDe: {A} Graph Processing Accelerator leveraging In-DRAM-Computing},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {45--50},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317984},
doi = {10.1145/3299874.3317984},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AngiziF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ArafinSTQ19,
author = {Md Tanvir Arafin and
Hao{-}Ting Shen and
Mark M. Tehranipoor and
Gang Qu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {LPN-based Device Authentication Using Resistive Memory},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {9--14},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317970},
doi = {10.1145/3299874.3317970},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ArafinSTQ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AvvaruP19,
author = {S. V. Sandeep Avvaru and
Keshab K. Parhi},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Feed-Forward {XOR} PUFs: Reliability and Attack-Resistance Analysis},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {287--290},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318019},
doi = {10.1145/3299874.3318019},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AvvaruP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Aysu19,
author = {Aydin Aysu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Teaching the Next Generation of Cryptographic Hardware Design to the
Next Generation of Engineers},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {237--242},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317994},
doi = {10.1145/3299874.3317994},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Aysu19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AzarKHS19,
author = {Kimia Zamiri Azar and
Hadi Mardani Kamali and
Houman Homayoun and
Avesta Sasan},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Threats on Logic Locking: {A} Decade Later},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {471--476},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319495},
doi = {10.1145/3299874.3319495},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AzarKHS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BalajiU0019,
author = {Adarsha Balaji and
Salim Ullah and
Anup Das and
Akash Kumar},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Design Methodology for Embedded Approximate Artificial Neural Networks},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {489--494},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319490},
doi = {10.1145/3299874.3319490},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BalajiU0019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BalajiW0CS19,
author = {Adarsha Balaji and
Yuefeng Wu and
Anup Das and
Francky Catthoor and
Siebren Schaafsma},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Exploration of Segmented Bus As Scalable Global Interconnect for Neuromorphic
Computing},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {495--499},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319491},
doi = {10.1145/3299874.3319491},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BalajiW0CS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Bhunia19,
author = {Swarup Bhunia},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Innovations in IoT for a Safe, Secure, and Sustainable Future},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {7},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3322806},
doi = {10.1145/3299874.3322806},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Bhunia19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Brunvand19,
author = {Erik Brunvand},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Extending Student Labs with {SMT} Circuit Implementation},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {231--236},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317968},
doi = {10.1145/3299874.3317968},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Brunvand19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CaiCRLDYW19,
author = {Ruizhe Cai and
Olivia Chen and
Ao Ren and
Ning Liu and
Caiwen Ding and
Nobuyuki Yoshikawa and
Yanzhi Wang},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron
Superconducting Circuits},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {189--194},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317980},
doi = {10.1145/3299874.3317980},
timestamp = {Tue, 02 Jan 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/CaiCRLDYW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CaiHSYWKZ19,
author = {Hao Cai and
Menglin Han and
Weiwei Shan and
Jun Yang and
You Wang and
Wang Kang and
Weisheng Zhao},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Voltage-Controlled Magnetoelectric Memory Bit-cell Design With Assisted
Body-bias in {FD-SOI}},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {135--140},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317982},
doi = {10.1145/3299874.3317982},
timestamp = {Mon, 02 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CaiHSYWKZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenS19,
author = {Jianqi Chen and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Thermal Fingerprinting of {FPGA} Designs through High-Level Synthesis},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {331--334},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318030},
doi = {10.1145/3299874.3318030},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenSL19,
author = {Fan Chen and
Linghao Song and
Hai (Helen) Li},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Efficient Process-in-Memory Architecture Design for Unsupervised GAN-based
Deep Learning using ReRAM},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {423--428},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319482},
doi = {10.1145/3299874.3319482},
timestamp = {Mon, 01 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenSL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CoveyJ19,
author = {Jacob Covey and
Mark C. Johnson},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {System-on-a-Chip Design as a Platform for Teaching Design and Design
Flow Integration},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {249--253},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318000},
doi = {10.1145/3299874.3318000},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CoveyJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DoWK19,
author = {SangGi Do and
Mingyu Woo and
Seokhyeong Kang},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Fence-Region-Aware Mixed-Height Standard Cell Legalization},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {259--262},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318012},
doi = {10.1145/3299874.3318012},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DoWK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DuTLZYO19,
author = {Gaoming Du and
Chao Tian and
Zhenmin Li and
Duoli Zhang and
Yongsheng Yin and
Yiming Ouyang},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Efficient Softmax Hardware Architecture for Deep Neural Networks},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {75--80},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317988},
doi = {10.1145/3299874.3317988},
timestamp = {Fri, 10 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DuTLZYO19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ErlinaCZN19,
author = {Tati Erlina and
Yan Chen and
Renyuan Zhang and
Yasuhiko Nakashima},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {An Efficient Time-based Stochastic Computing Circuitry Employing Neuron-MOS},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {51--56},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317985},
doi = {10.1145/3299874.3317985},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ErlinaCZN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FangDV19,
author = {Hongyu Fang and
Milos Doroslovacki and
Guru Venkataramani},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {EraseMe: {A} Defense Mechanism against Information Leakage exploiting
{GPU} Memory},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {319--322},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318027},
doi = {10.1145/3299874.3318027},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FangDV19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GoliHGD19,
author = {Mehran Goli and
Muhammad Hassan and
Daniel Gro{\ss}e and
Rolf Drechsler},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Automated Analysis of Virtual Prototypes at Electronic System Level},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {307--310},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318024},
doi = {10.1145/3299874.3318024},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GoliHGD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GuoWWDYLXD19,
author = {Shasha Guo and
Lei Wang and
Shuquan Wang and
Yu Deng and
Zhijie Yang and
Shiming Li and
Zhige Xie and
Qiang Dou},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A Systolic {SNN} Inference Accelerator and its Co-optimized Software
Framework},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {63--68},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317966},
doi = {10.1145/3299874.3317966},
timestamp = {Thu, 23 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GuoWWDYLXD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GuptaIR19,
author = {Saransh Gupta and
Mohsen Imani and
Tajana Rosing},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Exploring Processing In-Memory for Different Technologies},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {201--206},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317977},
doi = {10.1145/3299874.3317977},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GuptaIR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HarttungFMW19,
author = {Julian Harttung and
Elke Franz and
Sadia Moriam and
Paul Walther},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Lightweight Authenticated Encryption for Network-on-Chip Communications},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {33--38},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317990},
doi = {10.1145/3299874.3317990},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HarttungFMW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HermsL19,
author = {Yan Verdeja Herms and
Yanjing Li},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Crash Skipping: {A} Minimal-Cost Framework for Efficient Error Recovery
in Approximate Computing Environments},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {129--134},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317986},
doi = {10.1145/3299874.3317986},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HermsL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuDHLLYWL19,
author = {Chengyu Hu and
Qinghua Duan and
Liran Hu and
Peng Lu and
Zhengjie Li and
Meng Yang and
Jian Wang and
Jinmei Lai},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {An Analytical-based Hybrid Algorithm for {FPGA} Placement},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {351--354},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318035},
doi = {10.1145/3299874.3318035},
timestamp = {Fri, 17 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HuDHLLYWL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuTSRSMSS19,
author = {Bo Hu and
Jingxiang Tian and
Mustafa M. Shihab and
Gaurav Rajavendra Reddy and
William Swartz and
Yiorgos Makris and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer and
Carl Sechen},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Functional Obfuscation of Hardware Accelerators through Selective
Partial Design Extraction onto an Embedded {FPGA}},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {171--176},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317992},
doi = {10.1145/3299874.3317992},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HuTSRSMSS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ImaniGKZR19,
author = {Mohsen Imani and
Saransh Gupta and
Yeseong Kim and
Minxuan Zhou and
Tajana Rosing},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {DigitalPIM: Digital-based Processing In-Memory for Big Data Acceleration},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {429--434},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319483},
doi = {10.1145/3299874.3319483},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ImaniGKZR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JaiswalACA019,
author = {Akhilesh Jaiswal and
Amogh Agrawal and
Indranil Chakraborty and
Mustafa Fayez Ali and
Kaushik Roy},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Digital and Analog-Mixed-Signal In-Memory Processing in {CMOS} {SRAM}},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {371},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319449},
doi = {10.1145/3299874.3319449},
timestamp = {Mon, 19 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JaiswalACA019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiangSALCL019,
author = {Honglan Jiang and
Francisco J. H. Santiago and
Mohammad Saeed Ansari and
Leibo Liu and
Bruce F. Cockburn and
Fabrizio Lombardi and
Jie Han},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Characterizing Approximate Adders and Multipliers Optimized under
Different Design Constraints},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {393--398},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319454},
doi = {10.1145/3299874.3319454},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JiangSALCL019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiangYSS19,
author = {Zhewei Jiang and
Shihui Yin and
Jae{-}sun Seo and
Mingoo Seok},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {{XNOR-SRAM:} In-Bitcell Computing {SRAM} Macro based on Resistive
Computing Mechanism},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {417--422},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319458},
doi = {10.1145/3299874.3319458},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JiangYSS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JuretusRS19,
author = {Kyle Juretus and
Vaibhav Venugopal Rao and
Ioannis Savidis},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Securing Analog Mixed-Signal Integrated Circuits Through Shared Dependencies},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {483--488},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319497},
doi = {10.1145/3299874.3319497},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JuretusRS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KarimianT19,
author = {Nima Karimian and
Fatemeh Tehranipoor},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {How to Generate Robust Keys from Noisy DRAMs?},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {465--469},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319494},
doi = {10.1145/3299874.3319494},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KarimianT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KhasawnehM19,
author = {Mohammad T. Khasawneh and
Patrick H. Madden},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {HydraRoute: {A} Novel Approach to Circuit Routing},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {177--182},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317997},
doi = {10.1145/3299874.3317997},
timestamp = {Fri, 04 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KhasawnehM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KhouzaniY19,
author = {Hoda Aghaei Khouzani and
Chengmo Yang},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Tuning Track-based {NVM} Caches for Low-Power IoT Devices},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {513--518},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319335},
doi = {10.1145/3299874.3319335},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KhouzaniY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KimR19,
author = {Sunwoong Kim and
Rob A. Rutenbar},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {An Area-Efficient Iterative Single-Precision Floating-Point Multiplier
Architecture for {FPGA}},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {87--92},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318002},
doi = {10.1145/3299874.3318002},
timestamp = {Fri, 22 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KimR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KinsyB19,
author = {Michel A. Kinsy and
Novak Boskov},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Secure Computing Systems Design Through Formal Micro-Contracts},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {537--542},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319447},
doi = {10.1145/3299874.3319447},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KinsyB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KolheDRMSH19,
author = {Gaurav Kolhe and
Sai Manoj P. D. and
Setareh Rafatirad and
Hamid Mahmoodi and
Avesta Sasan and
Houman Homayoun},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {On Custom LUT-based Obfuscation},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {477--482},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319496},
doi = {10.1145/3299874.3319496},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KolheDRMSH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KoneruC19,
author = {Abhishek Koneru and
Krishnendu Chakrabarty},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Test and Design-for-Testability Solutions for Monolithic 3D Integrated
Circuits},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {457--462},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319488},
doi = {10.1145/3299874.3319488},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KoneruC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KongY19,
author = {Yuyao Kong and
Jun Yang},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {In-memory Processing based on Time-domain Circuit},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {435--438},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319484},
doi = {10.1145/3299874.3319484},
timestamp = {Sun, 30 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KongY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KuanA19,
author = {Kyle Kuan and
Tosiron Adegbija},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {MirrorCache: An Energy-Efficient Relaxed Retention {L1} {STTRAM} Cache},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {299--302},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318022},
doi = {10.1145/3299874.3318022},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KuanA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LagunaYRNH19,
author = {Ann Franchesca Laguna and
Xunzhao Yin and
Dayane Alfenas Reis and
Michael T. Niemier and
Xiaobo Sharon Hu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Ferroelectric {FET} Based In-Memory Computing for Few-Shot Learning},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {373--378},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319450},
doi = {10.1145/3299874.3319450},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LagunaYRNH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Leef19,
author = {Serge Leef},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Automatic Implementation of Secure Silicon},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {3},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3322803},
doi = {10.1145/3299874.3322803},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Leef19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiD19,
author = {Bingzhe Li and
David H. C. Du},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {TASecure: Temperature-Aware Secure Deletion Scheme for Solid State
Drives},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {275--278},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318016},
doi = {10.1145/3299874.3318016},
timestamp = {Tue, 29 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiHNKL19,
author = {Bingzhe Li and
Jiaxi Hu and
M. Hassan Najafi and
Steven J. Koester and
David J. Lilja},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Low Cost Hybrid Spin-CMOS Compressor for Stochastic Neural Networks},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {141--146},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317989},
doi = {10.1145/3299874.3317989},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiHNKL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiLMLYZLXW19,
author = {Hongjia Li and
Ning Liu and
Xiaolong Ma and
Sheng Lin and
Shaokai Ye and
Tianyun Zhang and
Xue Lin and
Wenyao Xu and
Yanzhi Wang},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {ADMM-based Weight Pruning for Real-Time Deep Learning Acceleration
on Mobile Devices},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {501--506},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319492},
doi = {10.1145/3299874.3319492},
timestamp = {Tue, 21 Jun 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiLMLYZLXW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiXZPHWL19,
author = {Zhengjie Li and
Yuanlong Xiao and
Yufan Zhang and
Yunbing Pang and
Chengyu Hu and
Jian Wang and
Jinmei Lai},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {An Automatic Transistor-Level Tool for {GRM} {FPGA} Interconnect Circuits
Optimization},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {93--98},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318003},
doi = {10.1145/3299874.3318003},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiXZPHWL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiYL19,
author = {Bing Li and
Bonan Yan and
Hai Li},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {An Overview of In-memory Processing with Emerging Non-volatile Memory
for Data-intensive Applications},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {381--386},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319452},
doi = {10.1145/3299874.3319452},
timestamp = {Wed, 25 Nov 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiYL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LinLHDX19,
author = {Jilan Lin and
Shuangchen Li and
Xing Hu and
Lei Deng and
Yuan Xie},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {CNNWire: Boosting Convolutional Neural Network with Winograd on ReRAM
based Accelerators},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {283--286},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318018},
doi = {10.1145/3299874.3318018},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LinLHDX19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuA19,
author = {Xingye Liu and
Paul Ampadu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {An Asymmetric Dual Output On-Chip {DC-DC} Converter for Dynamic Workloads},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {279--282},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318017},
doi = {10.1145/3299874.3318017},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuZGW19,
author = {Genggeng Liu and
Zhen Zhuang and
Wenzhong Guo and
Ting{-}Chi Wang},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {{RDTA:} An Efficient Routability-Driven Track Assignment Algorithm},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {315--318},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318026},
doi = {10.1145/3299874.3318026},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuZGW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaA19,
author = {Shenghou Ma and
Paul Ampadu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Approximate Memory with Approximate {DCT}},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {355--358},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318036},
doi = {10.1145/3299874.3318036},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MajumderHSUR19,
author = {Md. Badruddoja Majumder and
Md Sakib Hasan and
Aysha S. Shanta and
Mesbah Uddin and
Garrett S. Rose},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Design for Eliminating Operation Specific Power Signatures from Digital
Logic},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {111--116},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318006},
doi = {10.1145/3299874.3318006},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MajumderHSUR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ManoharAK19,
author = {Sheel Sindhu Manohar and
Sukarn Agarwal and
Hemangee K. Kapoor},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Towards Optimizing Refresh Energy in embedded-DRAM Caches using Private
Blocks},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {225--230},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317995},
doi = {10.1145/3299874.3317995},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ManoharAK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MoghaddamA19,
author = {Milad Ghorbani Moghaddam and
Cristinel Ababei},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A Case for Heterogeneous Network-on-Chip Based {H.264} Video Decoders},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {263--266},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318013},
doi = {10.1145/3299874.3318013},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MoghaddamA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Mutlu19,
author = {Onur Mutlu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Processing Data Where It Makes Sense in Modern Computing Systems:
Enabling In-Memory Computation},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {5--6},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3322805},
doi = {10.1145/3299874.3322805},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Mutlu19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NamaziMTRASH19,
author = {Mahmoud Namazi and
Hosein Mohammadi Makrani and
Zhi Tian and
Setareh Rafatirad and
Mohamad Hosein Akbari and
Avesta Sasan and
Houman Homayoun},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Mitigating the Performance and Quality of Parallelized Compressive
Sensing Reconstruction Using Image Stitching},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {219--224},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317991},
doi = {10.1145/3299874.3317991},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NamaziMTRASH19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PagliariPMP19,
author = {Daniele Jahier Pagliari and
Francesco Panini and
Enrico Macii and
Massimo Poncino},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Dynamic Beam Width Tuning for Energy-Efficient Recurrent Neural Networks},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {69--74},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317974},
doi = {10.1145/3299874.3317974},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PagliariPMP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PanOZYZWZ19,
author = {Yu Pan and
Peng Ouyang and
Yinglin Zhao and
Shouyi Yin and
Youguang Zhang and
Shaojun Wei and
Weisheng Zhao},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A Skyrmion Racetrack Memory based Computing In-memory Architecture
for Binary Neural Convolutional Network},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {271--274},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318015},
doi = {10.1145/3299874.3318015},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PanOZYZWZ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PasandiP19,
author = {Ghasem Pasandi and
Massoud Pedram},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Balanced Factorization and Rewriting Algorithms for Synthesizing Single
Flux Quantum Logic Circuits},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {183--188},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317967},
doi = {10.1145/3299874.3317967},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PasandiP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PentapatiSL19,
author = {Sai Surya Kiran Pentapati and
Da Eun Shim and
Sung Kyu Lim},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Logic Monolithic 3D ICs: {PPA} Benefits and {EDA} Tools Necessary},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {445--450},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319486},
doi = {10.1145/3299874.3319486},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PentapatiSL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PrakashHWHOM19,
author = {Bharat Prakash and
Mark Horton and
Nicholas R. Waytowich and
William David Hairston and
Tim Oates and
Tinoosh Mohsenin},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {On the use of Deep Autoencoders for Efficient Embedded Reinforcement
Learning},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {507--512},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319493},
doi = {10.1145/3299874.3319493},
timestamp = {Sun, 16 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PrakashHWHOM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RezaA19,
author = {Md Farhadur Reza and
Paul Ampadu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Approximate Communication Strategies for Energy-Efficient and High
Performance NoC: Opportunities and Challenges},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {399--404},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319455},
doi = {10.1145/3299874.3319455},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RezaA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SalehiZD19,
author = {Soheil Salehi and
Ramtin Zand and
Ronald F. DeMara},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Clockless Spin-based Look-Up Tables with Wide Read Margin},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {363--366},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318038},
doi = {10.1145/3299874.3318038},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SalehiZD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SalehiZZRD19,
author = {Soheil Salehi and
Ramtin Zand and
Alireza Zaeemzadeh and
Nazanin Rahnavard and
Ronald F. DeMara},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {AQuRate: MRAM-based Stochastic Oscillator for Adaptive Quantization
Rate Sampling of Sparse Signals},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {359--362},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318037},
doi = {10.1145/3299874.3318037},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SalehiZZRD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SanyalGPDB19,
author = {Sayandeep Sanyal and
Shan Pavan Pani Krishna Garapati and
Amit Patra and
Pallab Dasgupta and
Mayukh Bhattacharya},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Fault Classification and Coverage of Analog Circuits using {DC} Operating
Point and Frequency Response Analysis},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {123--128},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317976},
doi = {10.1145/3299874.3317976},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SanyalGPDB19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SeoL19,
author = {Minjun Seo and
Roman Lysecky},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Automatic Extraction of Requirements from State-based Hardware Designs
for Runtime Verification},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {295--298},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318021},
doi = {10.1145/3299874.3318021},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SeoL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShahhosseiniAAJ19,
author = {Sina Shahhosseini and
Iman Azimi and
Arman Anzanpour and
Axel Jantsch and
Pasi Liljeberg and
Nikil D. Dutt and
Amir M. Rahmani},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Dynamic Computation Migration at the Edge: Is There an Optimal Choice?},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {519--524},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319336},
doi = {10.1145/3299874.3319336},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShahhosseiniAAJ19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShuklaCPS19,
author = {Prachi Shukla and
Ayse K. Coskun and
Vasilis F. Pavlidis and
Emre Salman},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {An Overview of Thermal Challenges and Opportunities for Monolithic
3D ICs},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {439--444},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319485},
doi = {10.1145/3299874.3319485},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShuklaCPS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SimGIKR19,
author = {Joonseop Sim and
Saransh Gupta and
Mohsen Imani and
Yeseong Kim and
Tajana Rosing},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {{UPIM:} Unipolar Switching Logic for High Density Processing-in-Memory
Applications},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {255--258},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318011},
doi = {10.1145/3299874.3318011},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SimGIKR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SimonQLZA19,
author = {William Andrew Simon and
Yasir Mahmood Qureshi and
Alexandre Levisse and
Marina Zapater and
David Atienza},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {{BLADE:} {A} BitLine Accelerator for Devices on the Edge},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {207--212},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317979},
doi = {10.1145/3299874.3317979},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SimonQLZA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SinghGGFPN19,
author = {Karunveer Singh and
Rishabh Gupta and
Vikram Gupta and
Arash Fayyazi and
Massoud Pedram and
Shahin Nazarian},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A Hybrid Framework for Functional Verification using Reinforcement
Learning and Deep Learning},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {367--370},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318039},
doi = {10.1145/3299874.3318039},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SinghGGFPN19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SisejkovicMLAK19,
author = {Dominik Sisejkovic and
Farhad Merchant and
Rainer Leupers and
Gerd Ascheid and
Sascha Kegreiss},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Control-Lock: Securing Processor Cores Against Software-Controlled
Hardware Trojans},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {27--32},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317983},
doi = {10.1145/3299874.3317983},
timestamp = {Thu, 23 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SisejkovicMLAK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SitikLTS19,
author = {Can Sitik and
Weicheng Liu and
Baris Taskin and
Emre Salman},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Low Voltage Clock Tree Synthesis with Local Gate Clusters},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {99--104},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318004},
doi = {10.1145/3299874.3318004},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SitikLTS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SketopoulosSS19,
author = {Nikolaos Sketopoulos and
Christos P. Sotiriou and
Vasileios Samaras},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Investigation and Trade-offs in 3DIC Partitioning Methodologies: {N/A}},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {451--455},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319487},
doi = {10.1145/3299874.3319487},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SketopoulosSS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SorokinR19,
author = {Anton Sorokin and
Nikolay Ryzhenko},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {SAT-Based Placement Adjustment of FinFETs inside Unroutable Standard
Cells Targeting Feasible DRC-Clean Routing},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {159--164},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317965},
doi = {10.1145/3299874.3317965},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SorokinR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SunZWCL19,
author = {Mengshu Sun and
Pu Zhao and
Yanzhi Wang and
Naehyuck Chang and
Xue Lin},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {{HSIM-DNN:} Hardware Simulator for Computation-, Storage- and Power-Efficient
Deep Neural Networks},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {81--86},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317996},
doi = {10.1145/3299874.3317996},
timestamp = {Tue, 28 Mar 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SunZWCL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TehranipoorKKM19,
author = {Fatemeh Tehranipoor and
Nima Karimian and
Mehran Mozaffari Kermani and
Hamid Mahmoodi},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Deep RNN-Oriented Paradigm Shift through BOCANet: Broken Obfuscated
Circuit Attack},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {335--338},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318031},
doi = {10.1145/3299874.3318031},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/TehranipoorKKM19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ThapliyalK19,
author = {Himanshu Thapliyal and
Zachary Kahleifeh},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Solving Energy and Cybersecurity Constraints in IoT Devices Using
Energy Recovery Computing},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {525--530},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319337},
doi = {10.1145/3299874.3319337},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ThapliyalK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/UddinHR19,
author = {Mesbah Uddin and
Md Sakib Hasan and
Garrett S. Rose},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {On the Theoretical Analysis of Memristor based True Random Number
Generator},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {21--26},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317981},
doi = {10.1145/3299874.3317981},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/UddinHR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VinayakaNAKMSSR19,
author = {Vikas Vinayaka and
Sachin P. Namboodiri and
Shadden Abdalla and
Bryan Kerstetter and
Francisco Mata{-}carlos and
Daniel Senda and
James Skelly and
Angsuman Roy and
R. Jacob Baker},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Monolithic 8x8 SiPM with 4-bit Current-Mode Flash {ADC} with Tunable
Dynamic Range},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {57--62},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318005},
doi = {10.1145/3299874.3318005},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/VinayakaNAKMSSR19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VosoughiK19,
author = {M. Ali Vosoughi and
Sel{\c{c}}uk K{\"{o}}se},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Leveraging On-Chip Voltage Regulators Against Fault Injection Attacks},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {15--20},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317978},
doi = {10.1145/3299874.3317978},
timestamp = {Sun, 14 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/VosoughiK19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WanLLG19,
author = {Han Wan and
Kangxu Liu and
Jiazhen Lin and
Xiaopeng Gao},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A Web-based Remote {FPGA} Laboratory for Computer Organization Course},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {243--248},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317999},
doi = {10.1145/3299874.3317999},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WanLLG19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangLLY19,
author = {Xuedi Wang and
Xueqing Li and
Longqiang Lai and
Huazhong Yang},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A 16b Clockless Digital-to-Analog Converter with Ultra-Low-Cost Poly
Resistors Supporting Wide-Temperature Range from -40{\textdegree}C
to 85{\textdegree}C},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {267--270},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318014},
doi = {10.1145/3299874.3318014},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangLLY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangXQD19,
author = {Ye Wang and
Qian Xu and
Gang Qu and
Jian Dong},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Information Hiding behind Approximate Computation},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {405--410},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319456},
doi = {10.1145/3299874.3319456},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangXQD19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WitschenMAP19,
author = {Linus Witschen and
Hassan Ghasemzadeh Mohammadi and
Matthias Artmann and
Marco Platzner},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Jump Search: {A} Fast Technique for the Synthesis of Approximate Circuits},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {153--158},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317998},
doi = {10.1145/3299874.3317998},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WitschenMAP19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Wolf19,
author = {Marilyn Wolf},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Thoughts on Edge Intelligence},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {1},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3322802},
doi = {10.1145/3299874.3322802},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Wolf19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WorekA19,
author = {Brian Worek and
Paul Ampadu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Enabling Approximate Storage through Lossy Media Data Compression},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {327--330},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318029},
doi = {10.1145/3299874.3318029},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WorekA19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XieL19,
author = {Jiafeng Xie and
Chiou{-}Yng Lee},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {{LSM:} Novel Low-Complexity Unified Systolic Multiplier over Binary
Extension Field},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {343--346},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318033},
doi = {10.1145/3299874.3318033},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/XieL19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangC19,
author = {Chengmo Yang and
Zeyu Chen},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A Processing-In-Memory Implementation of {SHA-3} Using a Voltage-Gated
Spin Hall-Effect Driven MTJ-based Crossbar},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {195--200},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317972},
doi = {10.1145/3299874.3317972},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangHF19,
author = {Li Yang and
Zhezhi He and
Deliang Fan},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Binarized Depthwise Separable Neural Network for Object Tracking in
{FPGA}},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {347--350},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318034},
doi = {10.1145/3299874.3318034},
timestamp = {Thu, 14 Dec 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/YangHF19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangMW19,
author = {Zongxian Yang and
Yixiao Ma and
Lan Wei},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Functionally Complete Boolean Logic and Adder Design Based on 2T2R
RRAMs for Post-CMOS In-Memory Computing},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {147--152},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317993},
doi = {10.1145/3299874.3317993},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangMW19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangUS19,
author = {Tongxin Yang and
Tomoaki Ukezono and
Toshinori Sato},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Design of a Low-power and Small-area Approximate Multiplier using
First the Approximate and then the Accurate Compression Method},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {39--44},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317975},
doi = {10.1145/3299874.3317975},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangUS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangX19,
author = {Chengmo Yang and
Yuan Xue},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {A Scalable and Process Variation Aware {NVM-FPGA} Placement Algorithm},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {165--170},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3317971},
doi = {10.1145/3299874.3317971},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangX19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YelluBKY19,
author = {Pruthvy Yellu and
Novak Boskov and
Michel A. Kinsy and
Qiaoyan Yu},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Security Threats in Approximate Computing Systems},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {387--392},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319453},
doi = {10.1145/3299874.3319453},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YelluBKY19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZabihiZCRDPKWS19,
author = {Masoud Zabihi and
Zhengyang Zhao and
Zamshed I. Chowdhury and
Salonik Resch and
Mahendra DC and
Thomas Peterson and
Ulya R. Karpuzcu and
Jianping Wang and
Sachin S. Sapatnekar},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {True In-memory Computing with the {CRAM:} From Technology to Applications},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {379},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3319451},
doi = {10.1145/3299874.3319451},
timestamp = {Tue, 28 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZabihiZCRDPKWS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangUE19,
author = {Baogang Zhang and
Necati Uysal and
Rickard Ewetz},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {{STAT:} Mean and Variance Characterization for Robust Inference of
DNNs on Memristor-based Platforms},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {339--342},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318032},
doi = {10.1145/3299874.3318032},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangUE19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhuTS19,
author = {Zhiqi Zhu and
Farah Naz Taher and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer},
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Exploring Design Trade-offs in Fault-Tolerant Behavioral Hardware
Accelerators},
booktitle = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
pages = {291--294},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874.3318020},
doi = {10.1145/3299874.3318020},
timestamp = {Thu, 16 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhuTS19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2019,
editor = {Houman Homayoun and
Baris Taskin and
Tinoosh Mohsenin and
Weisheng Zhao},
title = {Proceedings of the 2019 on Great Lakes Symposium on VLSI, {GLSVLSI}
2019, Tysons Corner, VA, USA, May 9-11, 2019},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3299874},
doi = {10.1145/3299874},
isbn = {978-1-4503-6252-8},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/2019.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Afzali-KushaAKP18,
author = {Hassan Afzali{-}Kusha and
Omid Akbari and
Mehdi Kamal and
Massoud Pedram},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Energy Consumption and Lifetime Improvement of Coarse-Grained Reconfigurable
Architectures Targeting Low-Power Error-Tolerant Applications},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {431--434},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194631},
doi = {10.1145/3194554.3194631},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Afzali-KushaAKP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlasadYL18,
author = {Qutaiba Alasad and
Jiann{-}Shiun Yuan and
Jie Lin},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Resilient {AES} Against Side-Channel Attack Using All-Spin Logic},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {57--62},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194595},
doi = {10.1145/3194554.3194595},
timestamp = {Tue, 17 Sep 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlasadYL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlsafrjalaniA18,
author = {Mohamad Hammam Alsafrjalani and
Tosiron Adegbija},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {TaSaT: Thermal-Aware Scheduling and Tuning Algorithm for Heterogeneous
and Configurable Embedded Systems},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {75--80},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194576},
doi = {10.1145/3194554.3194576},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AlsafrjalaniA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AngiziHBHLDF18,
author = {Shaahin Angizi and
Zhezhi He and
Yu Bai and
Jie Han and
Mingjie Lin and
Ronald F. DeMara and
Deliang Fan},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Leveraging Spintronic Devices for Efficient Approximate Logic and
Stochastic Neural Networks},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {397--402},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194618},
doi = {10.1145/3194554.3194618},
timestamp = {Thu, 27 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AngiziHBHLDF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AonoHPLC18,
author = {Kenji Aono and
Hassene Hasni and
Owen Pochettino and
Nizar Lajnef and
Shantanu Chakrabartty},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Quasi-self-powered Infrastructural Internet of Things: The Mackinac
Bridge Case Study},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {335--340},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194622},
doi = {10.1145/3194554.3194622},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AonoHPLC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AttaranSMM18,
author = {Aliyar Attaran and
Tyler David Sheaves and
Praveen Kumar Mugula and
Hamid Mahmoodi},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Static Design of Spin Transfer Torques Magnetic Look Up Tables for
{ASIC} Designs},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {507--510},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194651},
doi = {10.1145/3194554.3194651},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AttaranSMM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BahadoriB18,
author = {Meisam Bahadori and
Keren Bergman},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Low-Power Optical Interconnects based on Resonant Silicon Photonic
Devices: Recent Advances and Challenges},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {305--310},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194606},
doi = {10.1145/3194554.3194606},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BahadoriB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BalefFGG18,
author = {Hadi Ahmadi Balef and
Hamed Fatemi and
Kees Goossens and
Jos{\'{e}} Pineda de Gyvez},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Effective In-Situ Chip Health Monitoring with Selective Monitor Insertion
Along Timing Paths},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {213--218},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194563},
doi = {10.1145/3194554.3194563},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BalefFGG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BertozziGN18,
author = {Davide Bertozzi and
Marco Gavanelli and
Maddalena Nonato},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Wavelength-Routed Optical Networks-on-Chip: Design Methods and Tools
to Bridge the Gap Between Logic Topologies and Physical Ones in 3D
Architectures},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {311--316},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194607},
doi = {10.1145/3194554.3194607},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BertozziGN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BonnotDPM18,
author = {Justine Bonnot and
Karol Desnos and
Maxime Pelcat and
Daniel M{\'{e}}nard},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Fast and Fuzzy Functional Simulator of Inexact Arithmetic Operators
for Approximate Computing Systems},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {195--200},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194574},
doi = {10.1145/3194554.3194574},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BonnotDPM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BuK18,
author = {Lake Bu and
Michel A. Kinsy},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Hardening {AES} Hardware Implementations Against Fault and Error Inject
Attacks},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {499--502},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194649},
doi = {10.1145/3194554.3194649},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BuK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Casto18,
author = {Matthew J. Casto},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Hardware Assurance: Trojans, Counterfeits, and Security in an Interconnected
World},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {5},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194555},
doi = {10.1145/3194554.3194555},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Casto18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChakmaSSPDR18,
author = {Gangotree Chakma and
Nicholas D. Skuda and
Catherine D. Schuman and
James S. Plank and
Mark E. Dean and
Garrett S. Rose},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Energy and Area Efficiency in Neuromorphic Computing for Resource
Constrained Devices},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {379--383},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194611},
doi = {10.1145/3194554.3194611},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChakmaSSPDR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChangCNZ18,
author = {Mu{-}Tien Chang and
I. Stephen Choi and
Dimin Niu and
Hongzhong Zheng},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Performance Impact of Emerging Memory Technologies on Big Data Applications:
{A} Latency-Programmable System Emulation Approach},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {439--442},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194633},
doi = {10.1145/3194554.3194633},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChangCNZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenPMP18,
author = {Yukai Chen and
Daniele Jahier Pagliari and
Enrico Macii and
Massimo Poncino},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Battery-aware Design Exploration of Scheduling Policies for Multi-sensor
Devices},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {201--206},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194588},
doi = {10.1145/3194554.3194588},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenPMP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenV18,
author = {Suyuan Chen and
Ranga Vemuri},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Improving the Security of Split Manufacturing Using a Novel {BEOL}
Signal Selection Method},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {135--140},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194564},
doi = {10.1145/3194554.3194564},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChengWZCZL18,
author = {Yuming Cheng and
Chao Wang and
Yangyang Zhao and
Xianglan Chen and
Xuehai Zhou and
Xi Li},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {MuDBN: An Energy-Efficient and High-Performance Multi-FPGA Accelerator
for Deep Belief Networks},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {435--438},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194630},
doi = {10.1145/3194554.3194630},
timestamp = {Mon, 07 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChengWZCZL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DaiLS18,
author = {Wentao Dai and
Peiye Liu and
Weiwei Shan},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Short-path Padding Method for Timing Error Resilient Circuits based
on Transmission Gates Insertion},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {105--110},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194600},
doi = {10.1145/3194554.3194600},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DaiLS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DasK18,
author = {Palash Das and
Hemangee K. Kapoor},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Towards Near-Data Processing of Compare Operations in 3D-Stacked Memory},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {243--248},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194578},
doi = {10.1145/3194554.3194578},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DasK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DasK18a,
author = {Anup Das and
Akash Kumar},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Dataflow-Based Mapping of Spiking Neural Networks on Neuromorphic
Hardware},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {419--422},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194627},
doi = {10.1145/3194554.3194627},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DasK18a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DasT18,
author = {Abhishek Das and
Nur A. Touba},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Low Complexity Burst Error Correcting Codes to Correct MBUs in SRAMs},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {219--224},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194570},
doi = {10.1145/3194554.3194570},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DasT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DiSGL0X18,
author = {Yejia Di and
Liang Shi and
Congming Gao and
Qiao Li and
Kaijie Wu and
Chun Jason Xue},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Loss is Gain: Shortening Data for Lifetime Improvement on Low-Cost
{ECC} Enabled Consumer-Level Flash Memory},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {225--230},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194571},
doi = {10.1145/3194554.3194571},
timestamp = {Wed, 29 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DiSGL0X18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DinakarraoJ18,
author = {Sai Manoj Pudukotai Dinakarrao and
Axel Jantsch},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {ADDHard: Arrhythmia Detection with Digital Hardware by Learning {ECG}
Signal},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {495--498},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194647},
doi = {10.1145/3194554.3194647},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DinakarraoJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DingRYMLLYW18,
author = {Caiwen Ding and
Ao Ren and
Geng Yuan and
Xiaolong Ma and
Jiayu Li and
Ning Liu and
Bo Yuan and
Yanzhi Wang},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Structured Weight Matrices-Based Hardware Accelerators in Deep Neural
Networks: FPGAs and ASICs},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {353--358},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194625},
doi = {10.1145/3194554.3194625},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DingRYMLLYW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Dutt18,
author = {Nikil D. Dutt},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Self-Awareness for Heterogeneous MPSoCs: {A} Case Study using Adaptive,
Reflective Middleware},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {3},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3200203},
doi = {10.1145/3194554.3200203},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Dutt18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/EshratifarP18,
author = {Amir Erfan Eshratifar and
Massoud Pedram},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Energy and Performance Efficient Computation Offloading for Deep Neural
Networks in a Mobile Cloud Computing Environment},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {111--116},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194565},
doi = {10.1145/3194554.3194565},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/EshratifarP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Gaj18,
author = {Kris Gaj},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Challenges and Rewards of Implementing and Benchmarking Post-Quantum
Cryptography in Hardware},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {359--364},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194615},
doi = {10.1145/3194554.3194615},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Gaj18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GaoSDLXS18,
author = {Congming Gao and
Liang Shi and
Yejia Di and
Qiao Li and
Chun Jason Xue and
Edwin Hsing{-}Mean Sha},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {An Efficient Cache Management Scheme for Capacitor Equipped Solid
State Drives},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {463--466},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194639},
doi = {10.1145/3194554.3194639},
timestamp = {Wed, 29 Jan 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/GaoSDLXS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HanWG18,
author = {Kaining Han and
Junchao Wang and
Warren J. Gross},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Bit-Wise Iterative Decoding of Polar Codes using Stochastic Computing},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {409--414},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194620},
doi = {10.1145/3194554.3194620},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HanWG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HerrmannJ18,
author = {Eric Herrmann and
Rashmi Jha},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Gate-Controlled Memristors and their Applications in Neuromorphic
Architectures},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {385--390},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194613},
doi = {10.1145/3194554.3194613},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HerrmannJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Hu18,
author = {Xiaobo Sharon Hu},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Cross-Layer Perspective for Energy Efficient Processing: - From
beyond-CMOS Devices to Deep Learning},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {7},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3200204},
doi = {10.1145/3194554.3200204},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Hu18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JafariHKPM18,
author = {Ali Jafari and
Morteza Hosseini and
Adwaya Kulkarni and
Chintan Patel and
Tinoosh Mohsenin},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {BiNMAC: Binarized neural Network Manycore ACcelerator},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {443--446},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194634},
doi = {10.1145/3194554.3194634},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JafariHKPM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiaWCZ18,
author = {Xiaotao Jia and
Jing Wang and
Yici Cai and
Qiang Zhou},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Electromigration Design Rule aware Global and Detailed Routing Algorithm},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {267--272},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194567},
doi = {10.1145/3194554.3194567},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JiaWCZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KamaliS18,
author = {Hadi Mardani Kamali and
Avesta Sasan},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {{MUCH-SWIFT:} {A} High-Throughput Multi-Core {HW/SW} Co-design K-means
Clustering Architecture},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {459--462},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194648},
doi = {10.1145/3194554.3194648},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KamaliS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KarimiGD18,
author = {Naghmeh Karimi and
Sylvain Guilley and
Jean{-}Luc Danger},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Impact of Aging on Template Attacks},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {455--458},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194638},
doi = {10.1145/3194554.3194638},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KarimiGD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KhalidOVOGR18,
author = {Ayesha Khalid and
Tobias Oder and
Felipe Valencia and
M{\'{a}}ire O'Neill and
Tim G{\"{u}}neysu and
Francesco Regazzoni},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Physical Protection of Lattice-Based Cryptography: Challenges and
Solutions},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {365--370},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194616},
doi = {10.1145/3194554.3194616},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KhalidOVOGR18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KimSJK18,
author = {Myungsuk Kim and
Youngsun Song and
Myoungsoo Jung and
Jihong Kim},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {{SARO:} {A} State-Aware Reliability Optimization Technique for High
Density {NAND} Flash Memory},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {255--260},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194591},
doi = {10.1145/3194554.3194591},
timestamp = {Thu, 13 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KimSJK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KoteshwaraP18,
author = {Sandhya Koteshwara and
Keshab K. Parhi},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Low-Energy Architectures of Linear Classifiers for IoT Applications
using Incremental Precision and Multi-Level Classification},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {291--296},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194603},
doi = {10.1145/3194554.3194603},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KoteshwaraP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KulkarniCMK18,
author = {Ashwini A. Kulkarni and
Shounak Chakraborty and
Shrinivas P. Mahajan and
Hemangee K. Kapoor},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Utility Aware Snoozy Caches for Energy Efficient Chip Multi-Processors},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {249--254},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194581},
doi = {10.1145/3194554.3194581},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KulkarniCMK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LinHYW18,
author = {Chun{-}Xun Lin and
Tsung{-}Wei Huang and
Ting Yu and
Martin D. F. Wong},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Distributed Power Grid Analysis Framework from Sequential Stream
Graph},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {183--188},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194560},
doi = {10.1145/3194554.3194560},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LinHYW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuCSWL18,
author = {Bozhi Liu and
Kemeng Chen and
Minjun Seo and
Janet Meiling Wang and
Roman Lysecky},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Evaluation of the Complexity of Automated Trace Alignment using Novel
Power Obfuscation Methods},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {467--470},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194640},
doi = {10.1145/3194554.3194640},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuCSWL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuLS18,
author = {Shuangnan Liu and
Francis C. M. Lau and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Investigation and Optimization of Pin Multiplexing in High-Level Synthesis},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {427--430},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194629},
doi = {10.1145/3194554.3194629},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuLS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuWD18,
author = {Wei Liu and
Zhigang Wei and
Wei Du},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Novel Fault-Tolerant Last-Level Cache to Improve Reliability at
Near-Threshold Voltage},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {231--236},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194583},
doi = {10.1145/3194554.3194583},
timestamp = {Thu, 23 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuWD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LoykaZK18,
author = {Kyle Loyka and
He Zhou and
Sunil P. Khatri},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Homomorphic Encryption Scheme Based on Affine Transforms},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {51--56},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194585},
doi = {10.1145/3194554.3194585},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LoykaZK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MagalhaesNXHLN18,
author = {Felipe Gohring de Magalhaes and
Mahdi Nikdast and
Yule Xiong and
Fabiano Hessel and
Odile Liboiron{-}Ladouceur and
Gabriela Nicolescu},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Silicon Photonic Interconnects: Minimizing the Controller Latency},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {323--328},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194609},
doi = {10.1145/3194554.3194609},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MagalhaesNXHLN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MahmoodiS18,
author = {Mohammad Reza Mahmoodi and
Dmitri B. Strukov},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Mixed-Signal POp/J Computing with Nonvolatile Memories},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {513},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194612},
doi = {10.1145/3194554.3194612},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MahmoodiS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaragosLSS18,
author = {Konstantinos Maragos and
George Lentaris and
Ioannis Stratakos and
Dimitrios Soudris},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Framework Exploiting Process Variability to Improve Energy Efficiency
in {FPGA} Applications},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {87--92},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194569},
doi = {10.1145/3194554.3194569},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaragosLSS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MarniHM18,
author = {Lahir Marni and
Morteza Hosseini and
Tinoosh Mohsenin},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {{MC3A:} Markov Chain Monte Carlo ManyCore Accelerator},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {165--170},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194577},
doi = {10.1145/3194554.3194577},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MarniHM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MasadehHT18,
author = {Mahmoud Masadeh and
Osman Hasan and
Sofi{\`{e}}ne Tahar},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Comparative Study of Approximate Multipliers},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {415--418},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194626},
doi = {10.1145/3194554.3194626},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MasadehHT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Mazumder18,
author = {Sudip K. Mazumder},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Towards {A} Universal Power Manager for Multi-Source Energy Scavenging
and Storage},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {297--298},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194604},
doi = {10.1145/3194554.3194604},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Mazumder18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MbongueKB18,
author = {Joel Mandebi Mbongue and
Danielle Tchuinkou Kwadjo and
Christophe Bobda},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {FLexiTASK: {A} Flexible {FPGA} Overlay for Efficient Multitasking},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {483--486},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194644},
doi = {10.1145/3194554.3194644},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MbongueKB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MelchertZD18,
author = {Jackson Melchert and
Boyu Zhang and
Azadeh Davoodi},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Comparative Study of Local Net Modeling Using Machine Learning},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {273--278},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194579},
doi = {10.1145/3194554.3194579},
timestamp = {Sat, 30 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MelchertZD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MillerSCDMB18,
author = {Merritt Miller and
Carrie Segal and
David McCarthy and
Aditya Dalakoti and
Prashansa Mukim and
Forrest Brewer},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Impolite High Speed Interfaces with Asynchronous Pulse Logic},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {99--104},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194592},
doi = {10.1145/3194554.3194592},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MillerSCDMB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MittalTP18,
author = {Ayush Mittal and
Saideep Tiku and
Sudeep Pasricha},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Adapting Convolutional Neural Networks for Indoor Localization with
Smart Mobile Devices},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {117--122},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194594},
doi = {10.1145/3194554.3194594},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MittalTP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MoriamFWKSF18,
author = {Sadia Moriam and
Elke Franz and
Paul Walther and
Akash Kumar and
Thorsten Strufe and
Gerhard P. Fettweis},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Protecting Communication in Many-Core Systems against Active Attackers},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {45--50},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194582},
doi = {10.1145/3194554.3194582},
timestamp = {Tue, 01 Dec 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MoriamFWKSF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NikdastNTL18,
author = {Mahdi Nikdast and
Gabriela Nicolescu and
Jelena Trajkovic and
Odile Liboiron{-}Ladouceur},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {DeEPeR: Enhancing Performance and Reliability in Chip-Scale Optical
Interconnection Networks},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {63--68},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194566},
doi = {10.1145/3194554.3194566},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NikdastNTL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PaiSS18,
author = {Suhit Pai and
Newton Singh and
Virendra Singh},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {AB-Aware: Application Behavior Aware Management of Shared Last Level
Caches},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {237--242},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194573},
doi = {10.1145/3194554.3194573},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PaiSS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ParmarS18,
author = {Vivek Parmar and
Manan Suri},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Design Exploration of IoT centric Neural Inference Accelerators},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {391--396},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194614},
doi = {10.1145/3194554.3194614},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ParmarS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Partin-Vaisband18,
author = {Inna Partin{-}Vaisband},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Efficient Wireless Power Transfer for Heterogeneous Adaptive IoT Systems},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {299--304},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194605},
doi = {10.1145/3194554.3194605},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Partin-Vaisband18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PasrichaCT18,
author = {Sudeep Pasricha and
Sai Vineel Reddy Chittamuru and
Ishan G. Thakkar},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Cross-Layer Thermal Reliability Management in Silicon Photonic Networks-on-Chip},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {317--322},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194608},
doi = {10.1145/3194554.3194608},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PasrichaCT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Pellerin18,
author = {David B. Pellerin},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Innovating at Cloud Speed for IoT, AI, and Semiconductor Design},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {511},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3200205},
doi = {10.1145/3194554.3200205},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Pellerin18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PereiraBOFHX18,
author = {Mauricio Pereira and
Dylan Burns and
Daniel Orfeo and
Robert Farrel and
Dryver Huston and
Tian Xia},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {New {GPR} System Integration with Augmented Reality Based Positioning},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {341--346},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194623},
doi = {10.1145/3194554.3194623},
timestamp = {Wed, 01 Sep 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PereiraBOFHX18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Pyne18,
author = {Sumanta Pyne},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {An Architectural Support for Reduction of In-rush Current in Systems
with Instruction Controlled Power Gating},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {487--490},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194645},
doi = {10.1145/3194554.3194645},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Pyne18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/QoutbF18,
author = {Abdelrahman G. Qoutb and
Eby G. Friedman},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {{MTJ} Magnetization Switching Mechanisms for IoT Applications},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {347--352},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194624},
doi = {10.1145/3194554.3194624},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/QoutbF18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RasooriA18,
author = {Sandeep Rasoori and
Venkatesh Akella},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Scalable Hardware Accelerator for Mini-Batch Gradient Descent},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {159--164},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194559},
doi = {10.1145/3194554.3194559},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RasooriA18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RoohiZD18,
author = {Arman Roohi and
Ramtin Zand and
Ronald F. DeMara},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Logic-Encrypted Synthesis for Energy-Harvesting-Powered Spintronic-Embedded
Datapath Design},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {9--14},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194557},
doi = {10.1145/3194554.3194557},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RoohiZD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RookerdKN18,
author = {Ramin Rezaeizadeh Rookerd and
Somayeh Sadeghi Kohan and
Zainalabedin Navabi},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Performance and Energy Enhancement through an Online Single/Multi
Level Mode Switching Cache Architecture},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {33--38},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194599},
doi = {10.1145/3194554.3194599},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RookerdKN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RoshanisefatKS18,
author = {Shervin Roshanisefat and
Hadi Mardani Kamali and
Avesta Sasan},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {153--158},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194596},
doi = {10.1145/3194554.3194596},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RoshanisefatKS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SalmanSDD18,
author = {Emre Salman and
Milutin Stanacevic and
Samir Ranjan Das and
Petar M. Djuric},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Leveraging {RF} Power for Intelligent Tag Networks},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {329--334},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194621},
doi = {10.1145/3194554.3194621},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SalmanSDD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SasanZWSM18,
author = {Avesta Sasan and
Qi Zhu and
Yanzhi Wang and
Jae{-}sun Seo and
Tinoosh Mohsenin},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Low Power and Trusted Machine Learning},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {515},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3216321},
doi = {10.1145/3194554.3216321},
timestamp = {Mon, 06 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SasanZWSM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SaurabhV18,
author = {Sneh Saurabh and
Vishav Vikash},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Assessing the Impact of Temperature and Supply Voltage Variations
in Near-threshold Circuits using an Analytical Model},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {93--98},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194589},
doi = {10.1145/3194554.3194589},
timestamp = {Sun, 25 Jul 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SaurabhV18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SavidisBQCM18,
author = {Ioannis Savidis and
Swarup Bhunia and
Gang Qu and
Matthew J. Casto and
Jeremy Muldavin},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Securing the Systems of the Future - Techniques for a Shifting Attack
Space},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {517},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3216447},
doi = {10.1145/3194554.3216447},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SavidisBQCM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SepulvedaWP18,
author = {Johanna Sep{\'{u}}lveda and
Felix Wilgerodt and
Michael Pehl},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {SEPUFSoC: Using PUFs for Memory Integrity and Authentication in Multi-Processors
System-on-Chip},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {39--44},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194562},
doi = {10.1145/3194554.3194562},
timestamp = {Fri, 12 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SepulvedaWP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShaDJZC018,
author = {Edwin Hsing{-}Mean Sha and
Hailiang Dong and
Weiwen Jiang and
Qingfeng Zhuge and
Xianzhang Chen and
Lei Yang},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {On the Design of Reliable Heterogeneous Systems via Checkpoint Placement
and Core Assignment},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {475--478},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194642},
doi = {10.1145/3194554.3194642},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShaDJZC018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Shamsi0PJ18,
author = {Kaveh Shamsi and
Meng Li and
David Z. Pan and
Yier Jin},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Cross-Lock: Dense Layout-Level Interconnect Locking using Cross-bar
Architectures},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {147--152},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194580},
doi = {10.1145/3194554.3194580},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Shamsi0PJ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SheaPM18,
author = {Colin Shea and
Adam Page and
Tinoosh Mohsenin},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {SCALENet: {A} SCalable Low power AccELerator for Real-time Embedded
Deep Neural Networks},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {129--134},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194601},
doi = {10.1145/3194554.3194601},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SheaPM18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SheikhW18,
author = {Kaship Sheikh and
Lan Wei},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Methodology to Capture Statistical Effect of Process Imperfections
on Glitch Suppression in {CNFET} Circuits and to Improve by Using
Approximate Circuits},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {27--32},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194587},
doi = {10.1145/3194554.3194587},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SheikhW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Shen18,
author = {Wade Shen},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {DARPA's Data Driven Discovery of Models {(D3M)} and Software Defined
Hardware {(SDH)} Programs},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {1},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3200206},
doi = {10.1145/3194554.3200206},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Shen18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShindeSDAIG18,
author = {Tanmay Shinde and
Suryanarayanan Subramaniam and
Padmanabh Deshmukh and
M. Meraj Ahmed and
Mark A. Indovina and
Amlan Ganguly},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A 0.24pJ/bit, 16Gbps {OOK} Transmitter Circuit in 45-nm {CMOS} for
Inter and Intra-Chip Wireless Interconnects},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {69--74},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194575},
doi = {10.1145/3194554.3194575},
timestamp = {Mon, 25 Mar 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ShindeSDAIG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShkurkoGBKSVMY18,
author = {Konstantin Shkurko and
Tim Grant and
Erik Brunvand and
Daniel M. Kopta and
Josef B. Spjut and
Elena Vasiou and
Ian Mallett and
Cem Yuksel},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {SimTRaX: Simulation Infrastructure for Exploring Thousands of Cores},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {503--506},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194650},
doi = {10.1145/3194554.3194650},
timestamp = {Tue, 23 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShkurkoGBKSVMY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SongXXY18,
author = {Mingye Song and
Zhezhao Xu and
Wei Xue and
Wenjian Yu},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Distributed Parallel Random Walk Algorithm for Large-Scale Capacitance
Extraction and Simulation},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {189--194},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194568},
doi = {10.1145/3194554.3194568},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SongXXY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SungY18,
author = {Jae{-}hyeon Sung and
Kwang{-}sub Yoon},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A {CMOS} Low Power 4\({}^{\mbox{th}}\)-Order Delta-Sigma Modulator
with One Reconfigurable Amplifier},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {471--474},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194641},
doi = {10.1145/3194554.3194641},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SungY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TalaSKB18,
author = {Mahdi Tala and
Oliver Schrape and
Milos Krstic and
Davide Bertozzi},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Interfacing 3D-stacked Electronic and Optical NoCs with Mixed {CMOS-ECL}
Bridges: a Realistic Preliminary Assessment},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {81--86},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194593},
doi = {10.1145/3194554.3194593},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TalaSKB18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TingH18,
author = {Pai{-}Shun Ting and
John P. Hayes},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Maxflow: Minimizing Latency in Hybrid Stochastic-Binary Systems},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {21--26},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194586},
doi = {10.1145/3194554.3194586},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TingH18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TuPY18,
author = {Peishan Tu and
Chak{-}Wa Pui and
Evangeline F. Y. Young},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Simultaneous Timing Driven Tree Surgery in Routing with Machine Learning-based
Acceleration},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {261--266},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194556},
doi = {10.1145/3194554.3194556},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TuPY18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/UstaogluHGD18,
author = {Buse Ustaoglu and
Sebastian Huhn and
Daniel Gro{\ss}e and
Rolf Drechsler},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {SAT-Lancer: {A} Hardware SAT-Solver for Self-Verification},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {479--482},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194643},
doi = {10.1145/3194554.3194643},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/UstaogluHGD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VincoMP18,
author = {Sara Vinco and
Enrico Macii and
Massimo Poncino},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Optimal Topology-Aware {PV} Panel Floorplanning with Hybrid Orientation},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {491--494},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194646},
doi = {10.1145/3194554.3194646},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/VincoMP18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangCYADQC18,
author = {Tian Wang and
Xiaoxin Cui and
Dunshan Yu and
Omid Aramoon and
Timothy Dunlap and
Gang Qu and
Xiaole Cui},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Novel Polymorphic Gate Based Circuit Fingerprinting Technique},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {141--146},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194572},
doi = {10.1145/3194554.3194572},
timestamp = {Wed, 15 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangCYADQC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangGQ18,
author = {Qian Wang and
Mingze Gao and
Gang Qu},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Machine Learning Attack Resistant Dual-mode {PUF}},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {177--182},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194590},
doi = {10.1145/3194554.3194590},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangGQ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangK18,
author = {Longfei Wang and
Sel{\c{c}}uk K{\"{o}}se},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Reliable On-Chip Voltage Regulation for Sustainable and Compact IoT
and Heterogeneous Computing Systems},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {285--290},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194602},
doi = {10.1145/3194554.3194602},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangK18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangSN18,
author = {Wen Wang and
Jakub Szefer and
Ruben Niederhagen},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Post-Quantum Cryptography on FPGAs: The Niederreiter Cryptosystem:
Extended Abstract},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {371},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194617},
doi = {10.1145/3194554.3194617},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangSN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangZPXBN18,
author = {Fanchao Wang and
Hanbin Zhu and
Pranjay Popli and
Yao Xiao and
Paul Bogdan and
Shahin Nazarian},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Accelerating Coverage Directed Test Generation for Functional Verification:
{A} Neural Network-based Framework},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {207--212},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194561},
doi = {10.1145/3194554.3194561},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangZPXBN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangZZZCN18,
author = {You Wang and
Yue Zhang and
Youguang Zhang and
Weisheng Zhao and
Hao Cai and
Lirida A. B. Naviner},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Design Space Exploration of Magnetic Tunnel Junction based Stochastic
Computing in Deep Learning},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {403--408},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194619},
doi = {10.1145/3194554.3194619},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangZZZCN18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WuLLWJCWLWC18,
author = {Chia{-}Cheng Wu and
Tung{-}Yuan Lee and
Yung{-}An Lai and
Hsin{-}Pei Wang and
De{-}Xuan Ji and
Yan{-}Ping Chang and
Teng{-}Chia Wang and
Chin{-}Heng Liu and
Chun{-}Yao Wang and
Yung{-}Chih Chen},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {A Hybrid Approach to Equivalent Fault Identification for Verification
Environment Qualification},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {447--450},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194635},
doi = {10.1145/3194554.3194635},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WuLLWJCWLWC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiaoXZ18,
author = {Chunhua Xiao and
Yuhua Xie and
Lei Zhang},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {{AEAS} - Towards High Energy-efficiency Design for OpenSSL Encryption
Acceleration through {HW/SW} Co-design},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {171--176},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194584},
doi = {10.1145/3194554.3194584},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XiaoXZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuCYW18,
author = {Qi Xu and
Song Chen and
Bei Yu and
Feng Wu},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Memristive Crossbar Mapping for Neuromorphic Computing Systems on
3D {IC}},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {451--454},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194636},
doi = {10.1145/3194554.3194636},
timestamp = {Wed, 03 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XuCYW18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Yanguas-Gil18,
author = {Angel Yanguas{-}Gil},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Going Small: Using the Insect Brain as a Model System for Edge Processing
Applications},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {373--378},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194610},
doi = {10.1145/3194554.3194610},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Yanguas-Gil18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YinWLL18,
author = {Peipei Yin and
Chenghua Wang and
Weiqiang Liu and
Fabrizio Lombardi},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Design of Dynamic Range Approximate Logarithmic Multipliers},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {423--426},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194628},
doi = {10.1145/3194554.3194628},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/YinWLL18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YoonHS18,
author = {Kiwon Yoon and
Daijoon Hyun and
Youngsoo Shin},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Fast Timing Analysis of Non-Tree Clock Network with Shorted Wires},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {279--284},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194598},
doi = {10.1145/3194554.3194598},
timestamp = {Wed, 21 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/YoonHS18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZandCPAKD18,
author = {Ramtin Zand and
Kerem Yunus {\c{C}}amsari and
Steven D. Pyle and
Ibrahim Ahmed and
Chris H. Kim and
Ronald F. DeMara},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Low-Energy Deep Belief Networks Using Intrinsic Sigmoidal Spintronic-based
Probabilistic Neurons},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {15--20},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194558},
doi = {10.1145/3194554.3194558},
timestamp = {Tue, 05 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZandCPAKD18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhugeLZGXC18,
author = {Chuanhao Zhuge and
Xinheng Liu and
Xiaofan Zhang and
Sudeep Gummadi and
Jinjun Xiong and
Deming Chen},
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Face Recognition with Hybrid Efficient Convolution Algorithms on FPGAs},
booktitle = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
pages = {123--128},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554.3194597},
doi = {10.1145/3194554.3194597},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhugeLZGXC18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2018,
editor = {Deming Chen and
Houman Homayoun and
Baris Taskin},
title = {Proceedings of the 2018 on Great Lakes Symposium on VLSI, {GLSVLSI}
2018, Chicago, IL, USA, May 23-25, 2018},
publisher = {{ACM}},
year = {2018},
url = {https://doi.org/10.1145/3194554},
doi = {10.1145/3194554},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/2018.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AbusultanK17,
author = {Monther Abusultan and
Sunil P. Khatri},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Design of a Flash-based Circuit for Multi-valued Logic},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {41--46},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060452},
doi = {10.1145/3060403.3060452},
timestamp = {Tue, 06 Nov 2018 16:59:34 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AbusultanK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlasadYF17,
author = {Qutaiba Alasad and
Jiann{-}Shiun Yuan and
Deliang Fan},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Leveraging All-Spin Logic to Improve Hardware Security},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {491--494},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060471},
doi = {10.1145/3060403.3060471},
timestamp = {Thu, 08 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AlasadYF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AmirSFTB17,
author = {Sarah Amir and
Bicky Shakya and
Domenic Forte and
Mark M. Tehranipoor and
Swarup Bhunia},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Comparative Analysis of Hardware Obfuscation for {IP} Protection},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {363--368},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060495},
doi = {10.1145/3060403.3060495},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AmirSFTB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AngiziHF17,
author = {Shaahin Angizi and
Zhezhi He and
Deliang Fan},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Energy Efficient In-Memory Computing Platform Based on 4-Terminal
Spin Hall Effect-Driven Domain Wall Motion Devices},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {77--82},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060459},
doi = {10.1145/3060403.3060459},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AngiziHF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ArafinAQ17,
author = {Md Tanvir Arafin and
Dhananjay Anand and
Gang Qu},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Low-Cost {GPS} Spoofing Detector Design for Internet of Things (IoT)
Applications},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {161--166},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060455},
doi = {10.1145/3060403.3060455},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ArafinAQ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AtaeiS17,
author = {Samira Ataei and
James E. Stine},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Reconfigurable Replica Bitline to Determine Optimum {SRAM} Sense
Amplifier Set Time},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {269--274},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060463},
doi = {10.1145/3060403.3060463},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AtaeiS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AzrielGM17,
author = {Leonid Azriel and
Ran Ginosar and
Avi Mendelson},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Revealing On-chip Proprietary Security Functions with Scan Side Channel
Based Reverse Engineering},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {233--238},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060464},
doi = {10.1145/3060403.3060464},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AzrielGM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BaiHDL17,
author = {Yu Bai and
X. Sharon Hu and
Ronald F. DeMara and
Mingjie Lin},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Spin-Orbit Torque based Cellular Neural Network {(CNN)} Architecture},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {59--64},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060472},
doi = {10.1145/3060403.3060472},
timestamp = {Tue, 13 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BaiHDL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Bruton17,
author = {Alex Bruton},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Designing Really Big Value Ideas},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {9},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3066909},
doi = {10.1145/3060403.3066909},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Bruton17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CaiWNKZ17,
author = {Hao Cai and
You Wang and
Lirida A. B. Naviner and
Wang Kang and
Weisheng Zhao},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Energy Efficient Magnetic Tunnel Junction Based Hybrid {LSI} Using
Multi-Threshold {UTBB-FD-SOI} Device},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {23--28},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060413},
doi = {10.1145/3060403.3060413},
timestamp = {Mon, 02 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/CaiWNKZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Chandrasekharan17,
author = {Arun Chandrasekharan and
Daniel Gro{\ss}e and
Rolf Drechsler},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {ProACt: {A} Processor for High Performance On-demand Approximate Computing},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {463--466},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060415},
doi = {10.1145/3060403.3060415},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Chandrasekharan17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Chang17,
author = {Leland Chang},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Cognitive Data-Centric Systems},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {1},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060491},
doi = {10.1145/3060403.3060491},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Chang17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenLMHL17,
author = {Linbin Chen and
Fabrizio Lombardi and
Paolo Montuschi and
Jie Han and
Weiqiang Liu},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Design of Approximate High-Radix Dividers by Inexact Binary Signed-Digit
Addition},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {293--298},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060404},
doi = {10.1145/3060403.3060404},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenLMHL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenMF17,
author = {Yong Chen and
Emil Mat{\'{u}}s and
Gerhard P. Fettweis},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Combined Centralized and Distributed Connection Allocation in Large
{TDM} Circuit Switching NoCs},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {411--414},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060414},
doi = {10.1145/3060403.3060414},
timestamp = {Mon, 08 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenMF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenWGYLQ17,
author = {Zixuan Chen and
Huaqiang Wu and
Bin Gao and
Peng Yao and
Xinyi Li and
He Qian},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Neuromorphic Computing based on Resistive {RAM}},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {311--315},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3066873},
doi = {10.1145/3060403.3066873},
timestamp = {Tue, 16 Apr 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenWGYLQ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenZQHLY17,
author = {Yuanchang Chen and
Yizhe Zhu and
Fei Qiao and
Jie Han and
Yuansheng Liu and
Huazhong Yang},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Evaluating Data Resilience in CNNs from an Approximate Memory Perspective},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {89--94},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060435},
doi = {10.1145/3060403.3060435},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenZQHLY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChengLDNW17,
author = {Huimei Cheng and
Ji Li and
Jeffrey T. Draper and
Shahin Nazarian and
Yanzhi Wang},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Deadline-Aware Joint Optimization of Sleep Transistor and Supply Voltage
for FinFET Based Embedded Systems},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {427--430},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060424},
doi = {10.1145/3060403.3060424},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChengLDNW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChuTSPZAXIMG17,
author = {Zhufei Chu and
Xifan Tang and
Mathias Soeken and
Ana Petkovska and
Grace Zgheib and
Luca Gaetano Amar{\`{u}} and
Yinshui Xia and
Paolo Ienne and
Giovanni De Micheli and
Pierre{-}Emmanuel Gaillardon},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Improving Circuit Mapping Performance Through MIG-based Synthesis
for Carry Chains},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {131--136},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060432},
doi = {10.1145/3060403.3060432},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChuTSPZAXIMG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CritesKB17,
author = {Brian Crites and
Karen Kong and
Philip Brisk},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Reducing Microfluidic Very Large Scale Integration (mVLSI) Chip Area
by Seam Carving},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {459--462},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060461},
doi = {10.1145/3060403.3060461},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/CritesKB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DingLSMB17,
author = {Ruizhou Ding and
Zeye Liu and
Rongye Shi and
Diana Marculescu and
R. D. (Shawn) Blanton},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {LightNN: Filling the Gap between Conventional Deep Neural Networks
and Binarized Networks},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {35--40},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060465},
doi = {10.1145/3060403.3060465},
timestamp = {Mon, 24 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DingLSMB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DofeGSYK017,
author = {Jaya Dofe and
Peng Gu and
Dylan C. Stow and
Qiaoyan Yu and
Eren Kursun and
Yuan Xie},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Security Threats and Countermeasures in Three-Dimensional Integrated
Circuits},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {321--326},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060500},
doi = {10.1145/3060403.3060500},
timestamp = {Fri, 15 Nov 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DofeGSYK017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DofeZYYS17,
author = {Jaya Dofe and
Zhiming Zhang and
Qiaoyan Yu and
Chen Yan and
Emre Salman},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Impact of Power Distribution Network on Power Analysis Attacks in
Three-Dimensional Integrated Circuits},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {327--332},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060501},
doi = {10.1145/3060403.3060501},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DofeZYYS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/EhsanZ017,
author = {Md. Amimul Ehsan and
Zhen Zhou and
Yang Yi},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Neuromorphic 3D Integrated Circuit: {A} Hybrid, Reliable and Energy
Efficient Approach for Next Generation Computing},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {221--226},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060470},
doi = {10.1145/3060403.3060470},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/EhsanZ017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/FairouzAK17,
author = {Abbas A. Fairouz and
Monther Abusultan and
Sunil P. Khatri},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Circuit Level Design of a Hardware Hash Unit for use in Modern Microprocessors},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {101--106},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060451},
doi = {10.1145/3060403.3060451},
timestamp = {Fri, 13 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/FairouzAK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GokH17,
author = {Ali Murat Gok and
Nikos Hardavellas},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {VaLHALLA: Variable Latency History Aware Local-carry Lazy Adder},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {17--22},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060437},
doi = {10.1145/3060403.3060437},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GokH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HeAPF17,
author = {Zhezhi He and
Shaahin Angizi and
Farhana Parveen and
Deliang Fan},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Leveraging Dual-Mode Magnetic Crossbar for Ultra-low Energy In-memory
Data Encryption},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {83--88},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060460},
doi = {10.1145/3060403.3060460},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HeAPF17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HeWGC17,
author = {Xu He and
Yao Wang and
Yang Guo and
Sorin Cotofana},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Mixed-Size Monolithic 3D Placer with 2D Layout Inheritance},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {29--34},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060411},
doi = {10.1145/3060403.3060411},
timestamp = {Sun, 23 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HeWGC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HerathPJS17,
author = {Kalindu Herath and
Alok Prakash and
Guiyuan Jiang and
Thambipillai Srikanthan},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Communication-aware Partitioning for Energy Optimization of Large
{FPGA} Designs},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {407--410},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060441},
doi = {10.1145/3060403.3060441},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HerathPJS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HungCM17,
author = {Chung{-}Yao Hung and
Peng{-}Yi Chou and
Wai{-}Kei Mak},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Mixed-Cell-Height Standard Cell Placement Legalization},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {149--154},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060473},
doi = {10.1145/3060403.3060473},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HungCM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JeonK17,
author = {Gyunam Jeon and
Yong{-}Bin Kim},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Switched Capacitor and Infinite Impulse Response Summation for a Quarter-Rate
{DFE} with 4Gb/s Data Rate},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {439--442},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060427},
doi = {10.1145/3060403.3060427},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JeonK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Jha17,
author = {Niraj K. Jha},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Internet-of-Medical-Things},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {7},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3066861},
doi = {10.1145/3060403.3066861},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Jha17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiangFK17,
author = {Zhen Hang Jiang and
Yunsi Fei and
David R. Kaeli},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Novel Side-Channel Timing Attack on GPUs},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {167--172},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060462},
doi = {10.1145/3060403.3060462},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JiangFK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiangMW17,
author = {Lei Jiang and
Sparsh Mittal and
Wujie Wen},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Building a Fast and Power Efficient Inductive Charge Pump System for
3D Stacked Phase Change Memories},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {275--280},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060412},
doi = {10.1145/3060403.3060412},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JiangMW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Jones17,
author = {Alex K. Jones},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Green Computing: New Challenges and Opportunities},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {3},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3066859},
doi = {10.1145/3060403.3066859},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Jones17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JunsangsriLJM17,
author = {Pilin Junsangsri and
Fabrizio Lombardi and
Salin Junsangsri and
Martin Margala},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Design of a Low-Power Non-Volatile Programmable Inverter Cell for
COGRE-based Circuits},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {11--16},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060405},
doi = {10.1145/3060403.3060405},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JunsangsriLJM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KangWZLZZ17,
author = {Wang Kang and
Zhaohao Wang and
He Zhang and
Sai Li and
Youguang Zhang and
Weisheng Zhao},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Advanced Low Power Spintronic Memories beyond {STT-MRAM}},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {299--304},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060589},
doi = {10.1145/3060403.3060589},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KangWZLZZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KazmaHMS17,
author = {Ghaith Kazma and
Ghaith Bany Hamad and
Otmane A{\"{\i}}t Mohamed and
Yvon Savaria},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Analysis of {SEU} Propagation in Combinational Circuits at {RTL} Based
on Satisfiability Modulo Theories},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {239--244},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060438},
doi = {10.1145/3060403.3060438},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KazmaHMS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KinsyKI17,
author = {Michel A. Kinsy and
Shreeya Khadka and
Mihailo Isakov},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {PreNoc: Neural Network based Predictive Routing for Network-on-Chip
Architectures},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {65--70},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060406},
doi = {10.1145/3060403.3060406},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KinsyKI17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KongSZ17,
author = {Shuyu Kong and
Yuanqi Shen and
Hai Zhou},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Using Security Invariant To Verify Confidentiality in Hardware Design},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {487--490},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060456},
doi = {10.1145/3060403.3060456},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KongSZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Kose17,
author = {Sel{\c{c}}uk K{\"{o}}se},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Efficient and Secure On-Chip Reconfigurable Voltage Regulation for
IoT Devices},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {369--374},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060496},
doi = {10.1145/3060403.3060496},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Kose17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KramerZDY17,
author = {Sean Kramer and
Zhiming Zhang and
Jaya Dofe and
Qiaoyan Yu},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Mitigating Control Flow Attacks in Embedded Systems with Novel Built-in
Secure Register Bank},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {483--486},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060433},
doi = {10.1145/3060403.3060433},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KramerZDY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KumarJFS17,
author = {Binod Kumar and
Ankit Jindal and
Masahiro Fujita and
Virendra Singh},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Combining Restorability and Error Detection Ability for Effective
Trace Signal Selection},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {191--196},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060475},
doi = {10.1145/3060403.3060475},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KumarJFS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LeeSEGJ17,
author = {Wooseok Lee and
Dam Sunwoo and
Christopher D. Emmons and
Andreas Gerstlauer and
Lizy K. John},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Exploring Heterogeneous-ISA Core Architectures for High-Performance
and Energy-Efficient Mobile SoCs},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {419--422},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060408},
doi = {10.1145/3060403.3060408},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LeeSEGJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LinBT17,
author = {Xiang Lin and
R. D. (Shawn) Blanton and
Donald E. Thomas},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Random Forest Architectures on {FPGA} for Multiple Applications},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {415--418},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060416},
doi = {10.1145/3060403.3060416},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LinBT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LinLHW17,
author = {Jack S.{-}Y. Lin and
Louis Y.{-}Z. Lin and
Ryan H.{-}M. Huang and
Charles H.{-}P. Wen},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Coupling-Aware Functional Timing Analysis for Tighter Bounds: How
Much Margin Can We Relax?},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {251--256},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060443},
doi = {10.1145/3060403.3060443},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LinLHW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LinLLL17,
author = {Kuen{-}Wey Lin and
Yeh{-}Sheng Lin and
Yih{-}Lang Li and
Rung{-}Bin Lin},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Maze Routing-Based Algorithm for {ML-OARST} with Pre-Selecting and
Re-Building Steiner Points},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {399--402},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060448},
doi = {10.1145/3060403.3060448},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LinLLL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LinWC17,
author = {Yuwen Dave Lin and
Charles H.{-}P. Wen and
Herming Chiueh},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Radiation-Hardened Designs for Soft-Error-Rate Reduction by Delay-Adjustable
D-Flip-Flops},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {197--202},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060442},
doi = {10.1145/3060403.3060442},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LinWC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuWLXG17,
author = {Weichen Liu and
Peng Wang and
Mengquan Li and
Yiyuan Xie and
Nan Guan},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Quantitative Modeling of Thermo-Optic Effects in Optical Networks-on-Chip},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {263--268},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060457},
doi = {10.1145/3060403.3060457},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuWLXG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuXWL17,
author = {Weiqiang Liu and
Jiahua Xu and
Danye Wang and
Fabrizio Lombardi},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Design of Approximate Logarithmic Multipliers},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {47--52},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060409},
doi = {10.1145/3060403.3060409},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuXWL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuinaudSL17,
author = {Thomas Luinaud and
Yvon Savaria and
J. M. Pierre Langlois},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {An {FPGA} Coarse Grained Intermediate Fabric for Regular Expression
Search},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {423--426},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060429},
doi = {10.1145/3060403.3060429},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LuinaudSL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MachadoC17,
author = {Lucas Machado and
Jordi Cortadella},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Boolean Decomposition for {AIG} Optimization},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {143--148},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060420},
doi = {10.1145/3060403.3060420},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MachadoC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaitiP17,
author = {Shoumik Maiti and
Sudeep Pasricha},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {{DELCA:} {DVFS} Efficient Low Cost Multicore Architecture},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {107--112},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060422},
doi = {10.1145/3060403.3060422},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MaitiP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MartevHS17,
author = {Dimo Martev and
Sven Hampel and
Ulf Schlichtmann},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Method for Phase Noise Analysis of {RF} Circuits},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {227--231},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060430},
doi = {10.1145/3060403.3060430},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MartevHS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MassadIGT17,
author = {Mohamed El Massad and
Frank Imeson and
Siddharth Garg and
Mahesh Tripunitara},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {The Need for Declarative Properties in Digital {IC} Security},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {333--338},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3066870},
doi = {10.1145/3060403.3066870},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MassadIGT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OlsenA17,
author = {Daniel Olsen and
Iraklis Anagnostopoulos},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Performance-Aware Resource Management of Multi-Threaded Applications
on Many-Core Systems},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {119--124},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060426},
doi = {10.1145/3060403.3060426},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/OlsenA17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OuyangYXLW17,
author = {Peng Ouyang and
Shouyi Yin and
Chunxiao Xing and
Leibo Liu and
Shaojun Wei},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Power Efficient Architecture with Optimized Parallel Memory Accessing
for Feature Generation},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {287--292},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060436},
doi = {10.1145/3060403.3060436},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/OuyangYXLW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Partin-Vaisband17,
author = {Inna Partin{-}Vaisband},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Automated Design of Stable Power Delivery Systems for Heterogeneous
IoT Systems},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {381--386},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060497},
doi = {10.1145/3060403.3060497},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Partin-Vaisband17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PathakHS17,
author = {Divya Pathak and
Houman Homayoun and
Ioannis Savidis},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Work Load Scheduling For Multi Core Systems With Under-Provisioned
Power Delivery},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {387--392},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060498},
doi = {10.1145/3060403.3060498},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PathakHS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PerriconeTNH17,
author = {Robert Perricone and
Li Tang and
Michael T. Niemier and
Xiaobo Sharon Hu},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Exploiting Non-Volatility for Information Processing},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {305--310},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3066872},
doi = {10.1145/3060403.3066872},
timestamp = {Sun, 17 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PerriconeTNH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PotterGB17,
author = {Joshua Potter and
William H. Grover and
Philip Brisk},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Design Automation for Paper Microfluidics with Passive Flow Substrates},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {215--220},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060476},
doi = {10.1145/3060403.3060476},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PotterGB17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Putnam17,
author = {Andrew Putnam},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {FPGAs in the Datacenter: Combining the Worlds of Hardware and Software
Development},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {5},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3066860},
doi = {10.1145/3060403.3066860},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Putnam17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RajgadiaNS17,
author = {Abhishek Rajgadia and
Newton and
Virendra Singh},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {{EEAL:} Processors' Performance Enhancement Through Early Execution
of Aliased Loads},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {113--118},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060445},
doi = {10.1145/3060403.3060445},
timestamp = {Sun, 12 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/RajgadiaNS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SalehiLRP17,
author = {Sayed Ahmad Salehi and
Yin Liu and
Marc D. Riedel and
Keshab K. Parhi},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Computing Polynomials with Positive Coefficients using Stochastic
Logic by Double-NAND Expansion},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {471--474},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060410},
doi = {10.1145/3060403.3060410},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SalehiLRP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Sankaranarayanan17,
author = {Rajsaktish Sankaranarayanan and
Matthew R. Guthaus},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Energy Savings and Performance Improvement in Subthreshold Using Adaptive
Body Bias},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {431--434},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060421},
doi = {10.1145/3060403.3060421},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Sankaranarayanan17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SayyaparajuCAR17,
author = {Sagarvarma Sayyaparaju and
Gangotree Chakma and
Sherif Amer and
Garrett S. Rose},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Circuit Techniques for Online Learning of Memristive Synapses in CMOS-Memristor
Neuromorphic Systems},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {479--482},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060418},
doi = {10.1145/3060403.3060418},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SayyaparajuCAR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SerafyYS17,
author = {Caleb Serafy and
Zhiyuan Yang and
Ankur Srivastava},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Design Space Modeling and Simulation for Physically Constrained 3D
CPUs},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {375--380},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060499},
doi = {10.1145/3060403.3060499},
timestamp = {Thu, 17 Nov 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SerafyYS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShaWRQ17,
author = {Shi Sha and
Wujie Wen and
Shaolei Ren and
Gang Quan},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Thermal-Balanced Variable-Sized-Bin-Packing Approach for Energy
Efficient Multi-Core Real-Time Scheduling},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {257--262},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060444},
doi = {10.1145/3060403.3060444},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ShaWRQ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShamsiLMZPJ17,
author = {Kaveh Shamsi and
Meng Li and
Travis Meade and
Zheng Zhao and
David Z. Pan and
Yier Jin},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Cyclic Obfuscation for Creating SAT-Unresolvable Circuits},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {173--178},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060458},
doi = {10.1145/3060403.3060458},
timestamp = {Fri, 30 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShamsiLMZPJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShamsiLMZPJ17a,
author = {Kaveh Shamsi and
Meng Li and
Travis Meade and
Zheng Zhao and
David Z. Pan and
Yier Jin},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Circuit Obfuscation and Oracle-guided Attacks: Who can Prevail?},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {357--362},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060494},
doi = {10.1145/3060403.3060494},
timestamp = {Fri, 30 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShamsiLMZPJ17a.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShaoYYHC17,
author = {Lingxuan Shao and
Yibin Yang and
Hailong Yao and
Tsung{-}Yi Ho and
Yici Cai},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {{LUTOSAP:} Lookup Table Based Online Sample Preparation in Microfluidic
Biochips},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {447--450},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060446},
doi = {10.1145/3060403.3060446},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShaoYYHC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SharmaK17,
author = {Kinshuk Sharma and
Sunil P. Khatri},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Robust C-element Design with Enhanced Metastability Performance},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {95--100},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060425},
doi = {10.1145/3060403.3060425},
timestamp = {Wed, 31 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SharmaK17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShenZ17,
author = {Yuanqi Shen and
Hai Zhou},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Double {DIP:} Re-Evaluating Security of Logic Encryption Algorithms},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {179--184},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060469},
doi = {10.1145/3060403.3060469},
timestamp = {Wed, 16 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ShenZ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ShiXFT17,
author = {Qihang Shi and
Kan Xiao and
Domenic Forte and
Mark M. Tehranipoor},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Securing Split Manufactured ICs with Wire Lifting Obfuscated Built-In
Self-Authentication},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {339--344},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060588},
doi = {10.1145/3060403.3060588},
timestamp = {Wed, 07 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ShiXFT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SomashekarT17,
author = {Ahish Mysore Somashekar and
Spyros Tragoudas},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Efficient Critical Path Selection Under a Probabilistic Delay Model},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {185--190},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060468},
doi = {10.1145/3060403.3060468},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SomashekarT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SongDBSGJ17,
author = {Shuang Song and
Raj Desikan and
Mohamad Barakat and
Sridhar Sundaram and
Andreas Gerstlauer and
Lizy K. John},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Fine-Grain Program Snippets Generator for Mobile Core Design},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {245--250},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060439},
doi = {10.1145/3060403.3060439},
timestamp = {Mon, 03 Aug 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SongDBSGJ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SongJS17,
author = {Youngsoo Song and
Jinwook Jung and
Youngsoo Shin},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Redundant Via Insertion with Cut Optimization for Self-Aligned Double
Patterning},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {137--142},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060440},
doi = {10.1145/3060403.3060440},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SongJS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SterponeADCG17,
author = {Luca Sterpone and
Sarah Azimi and
Boyang Du and
David Merodio Codinachs and
Raoul Grimoldi},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Effective Mitigation of Radiation-induced Single Event Transient on
Flash-based FPGAs},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {203--208},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060454},
doi = {10.1145/3060403.3060454},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/SterponeADCG17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TanwirHL17,
author = {Sarmad Tanwir and
Michael S. Hsiao and
Loganathan Lingappan},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Test Pattern Quality Metric for Diagnosis of Multiple Stuck-at and
Transition faults},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {455--458},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060450},
doi = {10.1145/3060403.3060450},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TanwirHL17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TingH17,
author = {Pai{-}Shun Ting and
John P. Hayes},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {On the Role of Sequential Circuits in Stochastic Computing},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {475--478},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060453},
doi = {10.1145/3060403.3060453},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TingH17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TossonYAW17,
author = {Amr M. S. Tosson and
Shimeng Yu and
Mohab H. Anis and
Lan Wei},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Mitigating the Effect of Reliability Soft-errors of {RRAM} Devices
on the Performance of RRAM-based Neuromorphic Systems},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {53--58},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060431},
doi = {10.1145/3060403.3060431},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TossonYAW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Umaz017,
author = {Ridvan Umaz and
Lei Wang},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {An Energy Combiner Design for Multiple Microbial Energy Harvesting
Sources},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {443--446},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060434},
doi = {10.1145/3060403.3060434},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Umaz017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VianelloWGNSPBY17,
author = {Elisa Vianello and
Thilo Werner and
Alessandro Grossi and
Etienne Nowak and
Barbara De Salvo and
Luca Perniola and
Olivier Bichler and
Blaise Yvert},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Bioinspired Programming of Resistive Memory Devices for Implementing
Spiking Neural Networks},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {393--398},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3066871},
doi = {10.1145/3060403.3066871},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/VianelloWGNSPBY17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Vidal-ObiolsCP17,
author = {Alex Vidal{-}Obiols and
Jordi Cortadella and
Jordi Petit},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Under-the-Cell Routing to Improve Manufacturability},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {125--130},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060428},
doi = {10.1145/3060403.3060428},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Vidal-ObiolsCP17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VincentLWQ17,
author = {Adrien F. Vincent and
Nicolas Locatelli and
Qifan Wu and
Damien Querlioz},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Implications of the Use of Magnetic Tunnel Junctions as Synapses in
Neuromorphic Systems},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {317--320},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060587},
doi = {10.1145/3060403.3060587},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/VincentLWQ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangWLM17,
author = {Liang Wang and
Xiaohang Wang and
Ho{-}fung Leung and
Terrence S. T. Mak},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Throughput Optimization for Lifetime Budgeting in Many-Core Systems},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {451--454},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060419},
doi = {10.1145/3060403.3060419},
timestamp = {Mon, 24 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WangWLM17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangZCQ17,
author = {Xueyan Wang and
Qiang Zhou and
Yici Cai and
Gang Qu},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {An Empirical Study on Gate Camouflaging Methods Against Circuit Partition
Attack},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {345--350},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060493},
doi = {10.1145/3060403.3060493},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangZCQ17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuXHC17,
author = {Xiaodong Xu and
Qi Xu and
Jinglei Huang and
Song Chen},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {An Integrated Optimization Framework for Partitioning, Scheduling
and Floorplanning on Partially Dynamically Reconfigurable FPGAs},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {403--406},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060447},
doi = {10.1145/3060403.3060447},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XuXHC17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YaoVD17,
author = {Fan Yao and
Guru Venkataramani and
Milos Doroslovacki},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Covert Timing Channels Exploiting Non-Uniform Memory Access based
Architectures},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {155--160},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060417},
doi = {10.1145/3060403.3060417},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YaoVD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YasinSSMSR17,
author = {Muhammad Yasin and
Abhrajit Sengupta and
Benjamin Carri{\'{o}}n Sch{\"{a}}fer and
Yiorgos Makris and
Ozgur Sinanoglu and
Jeyavijayan Rajendran},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {What to Lock?: Functional and Parametric Locking},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {351--356},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060492},
doi = {10.1145/3060403.3060492},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YasinSSMSR17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YuHN17,
author = {Jintao Yu and
Tom Hogervorst and
Razvan Nane},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {A Domain-Specific Language and Compiler for Computation-in-Memory
Skeletons},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {71--76},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060474},
doi = {10.1145/3060403.3060474},
timestamp = {Fri, 09 Apr 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YuHN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YuanLLDRYQDW17,
author = {Zihao Yuan and
Ji Li and
Zhe Li and
Caiwen Ding and
Ao Ren and
Bo Yuan and
Qinru Qiu and
Jeffrey Draper and
Yanzhi Wang},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Softmax Regression Design for Stochastic Computing Based Deep Convolutional
Neural Networks},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {467--470},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060467},
doi = {10.1145/3060403.3060467},
timestamp = {Mon, 26 Jun 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YuanLLDRYQDW17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhouHLZD17,
author = {Chaobing Zhou and
Libo Huang and
Zhisheng Li and
Tan Zhang and
Qiang Dou},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Design Space Exploration of {TAGE} Branch Predictor with Ultra-Small
{RAM}},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {281--286},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060423},
doi = {10.1145/3060403.3060423},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhouHLZD17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZompakisNRCS17,
author = {Nikolaos Zompakis and
Michail Noltsis and
Dimitrios Rodopoulos and
Francky Catthoor and
Dimitrios Soudris},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Energy Efficient Adaptive Approach for Dependable Performance in the
presence of Timing Interference},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {209--214},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060449},
doi = {10.1145/3060403.3060449},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZompakisNRCS17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZouLN17,
author = {Xuncheng Zou and
Bo Liu and
Shigetoshi Nakatake},
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Low Voltage Stochastic Flash {ADC} with Front-end of Inverter-based
Comparative Unit},
booktitle = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
pages = {435--438},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403.3060466},
doi = {10.1145/3060403.3060466},
timestamp = {Wed, 12 Feb 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZouLN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2017,
editor = {Laleh Behjat and
Jie Han and
Miroslav N. Velev and
Deming Chen},
title = {Proceedings of the on Great Lakes Symposium on {VLSI} 2017, Banff,
AB, Canada, May 10-12, 2017},
publisher = {{ACM}},
year = {2017},
url = {https://doi.org/10.1145/3060403},
doi = {10.1145/3060403},
isbn = {978-1-4503-4972-7},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/2017.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AbdelwahedNAW16,
author = {Amr M. S. Tosson Abdelwahed and
Adam Neale and
Mohab H. Anis and
Lan Wei},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {8T1R: {A} Novel Low-power High-speed RRAM-based Non-volatile {SRAM}
Design},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {239--244},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903016},
doi = {10.1145/2902961.2903016},
timestamp = {Wed, 10 Mar 2021 14:55:38 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AbdelwahedNAW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AdamesDB16,
author = {Ilia A. Bautista Adames and
Jayita Das and
Sanjukta Bhanja},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Survey of Emerging Technology Based Physical Unclonable Funtions},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {317--322},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903044},
doi = {10.1145/2902961.2903044},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AdamesDB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Adegbija16,
author = {Tosiron Adegbija},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Exploring Configurable Non-Volatile Memory-based Caches for Energy-Efficient
Embedded Systems},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {157--162},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903009},
doi = {10.1145/2902961.2903009},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Adegbija16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Afzali-KushaSP16,
author = {Hassan Afzali{-}Kusha and
Alireza Shafaei and
Massoud Pedram},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Optimizing the Operating Voltage of Tunnel FET-Based {SRAM} Arrays
Equipped with Read/Write Assist Circuitry},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {415--420},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903031},
doi = {10.1145/2902961.2903031},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Afzali-KushaSP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlsafrjalaniG16,
author = {Mohamad Hammam Alsafrjalani and
Ann Gordon{-}Ross},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Quality of Service-Aware, Scalable Cache Tuning Algorithm in Consumer-based
Embedded Devices},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {357--360},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902987},
doi = {10.1145/2902961.2902987},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AlsafrjalaniG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlsuwaiyanM16,
author = {Ali Alsuwaiyan and
Kartik Mohanram},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {An Offline Frequent Value Encoding for Energy-Efficient {MLC/TLC}
Non-volatile Memories},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {403--408},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902979},
doi = {10.1145/2902961.2902979},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AlsuwaiyanM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AprileBGYSLC16,
author = {Cosimo Aprile and
Luca Baldassarre and
Vipul Gupta and
Juhwan Yoo and
Mahsa Shoaran and
Yusuf Leblebici and
Volkan Cevher},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Learning-Based Near-Optimal Area-Power Trade-offs in Hardware Design
for Neural Signal Acquisition},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {433--438},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903028},
doi = {10.1145/2902961.2903028},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AprileBGYSLC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ArafinQ16,
author = {Md Tanvir Arafin and
Gang Qu},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Secret Sharing and Multi-user Authentication: From Visual Cryptography
to {RRAM} Circuits},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {169--174},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903039},
doi = {10.1145/2902961.2903039},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ArafinQ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BaiHKL16,
author = {Yu Bai and
Bo Hu and
Weidong Kuang and
Mingjie Lin},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Ultra-Robust Null Convention Logic Circuit with Emerging Domain Wall
Devices},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {251--256},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903019},
doi = {10.1145/2902961.2903019},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BaiHKL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BatraSKHBG16,
author = {Nidhi Batra and
Pawan Sehgal and
Shashwat Kaushik and
Mohammad S. Hashmi and
Sudesh Bhalla and
Anuj Grover},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Static Noise Margin based Yield Modelling of 6T {SRAM} for Area and
Minimum Operating Voltage Improvement using Recovery Techniques},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {117--120},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903005},
doi = {10.1145/2902961.2903005},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BatraSKHBG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BiHJNSY16,
author = {Yu Bi and
Xiaobo Sharon Hu and
Yier Jin and
Michael T. Niemier and
Kaveh Shamsi and
Xunzhao Yin},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Enhancing Hardware Security with Emerging Transistor Technologies},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {305--310},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903041},
doi = {10.1145/2902961.2903041},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BiHJNSY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BianSMAHS16,
author = {Song Bian and
Michihiro Shintani and
Shumpei Morita and
Hiromitsu Awano and
Masayuki Hiromoto and
Takashi Sato},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Workload-Aware Worst Path Analysis of Processor-Scale {NBTI} Degradation},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {203--208},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903013},
doi = {10.1145/2902961.2903013},
timestamp = {Mon, 17 Jun 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/BianSMAHS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BishnoiOT16,
author = {Rajendra Bishnoi and
Fabian Oboril and
Mehdi Baradaran Tahoori},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Low-Power Multi-Port Memory Architecture based on Spin Orbit Torque
Magnetic Devices},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {409--414},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903022},
doi = {10.1145/2902961.2903022},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BishnoiOT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BoratenDK16,
author = {Travis Boraten and
Dominic DiTomaso and
Avinash Karanth Kodi},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Secure Model Checkers for Network-on-Chip (NoC) Architectures},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {45--50},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903032},
doi = {10.1145/2902961.2903032},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BoratenDK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChakrabortyKASM16,
author = {Tuhin Subhra Chakraborty and
Santanu Kundu and
Deepak Agrawal and
Sanjay Tanaji Shinde and
Jacob Mathews and
Rekha K. James},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Leakage Power Minimization in Deep Sub-Micron Technology by Exploiting
Positive Slacks of Dependent Paths},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {365--368},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902991},
doi = {10.1145/2902961.2902991},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChakrabortyKASM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenMF16,
author = {Yong Chen and
Emil Mat{\'{u}}s and
Gerhard P. Fettweis},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Trellis-search based Dynamic Multi-Path Connection Allocation for
TDM-NoCs},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {323--328},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902968},
doi = {10.1145/2902961.2902968},
timestamp = {Mon, 08 Jul 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenMF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenVMP16,
author = {Yukai Chen and
Sara Vinco and
Enrico Macii and
Massimo Poncino},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Fast Thermal Simulation using SystemC-AMS},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {427--432},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902975},
doi = {10.1145/2902961.2902975},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenVMP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChoiK16,
author = {Yongsuk Choi and
Yong{-}Bin Kim},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A Novel On-Chip Impedance Calibration Method for {LPDDR4} Interface
between {DRAM} and AP/SoC},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {215--219},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902982},
doi = {10.1145/2902961.2902982},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChoiK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DalakotiSMB16,
author = {Aditya Dalakoti and
Carrie Segal and
Merritt Miller and
Forrest Brewer},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Asynchronous High Speed Serial Links Analysis using Integrated Charge
for Event Detection},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {121--124},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902998},
doi = {10.1145/2902961.2902998},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DalakotiSMB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DasDMDD16,
author = {Subrata Das and
Soma Das and
Adrija Majumder and
Parthasarathi Dasgupta and
Debesh Kumar Das},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Delay Estimates for Graphene Nanoribbons: {A} Novel Measure of Fidelity
and Experiments with Global Routing Trees},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {263--268},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903036},
doi = {10.1145/2902961.2903036},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DasDMDD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DofeYWS16,
author = {Jaya Dofe and
Qiaoyan Yu and
Hailang Wang and
Emre Salman},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Hardware Security Threats and Potential Countermeasures in Emerging
3D ICs},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {69--74},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903014},
doi = {10.1145/2902961.2903014},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DofeYWS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DuBW16,
author = {Chaohui Du and
Guoqiang Bai and
Xingjun Wu},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {High-Speed Polynomial Multiplier Architecture for Ring-LWE Based Public
Key Cryptosystems},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {9--14},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902969},
doi = {10.1145/2902961.2902969},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DuBW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Fan16,
author = {Deliang Fan},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Ultra-Low Energy Reconfigurable Spintronic Threshold Logic Gate},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {385--388},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902994},
doi = {10.1145/2902961.2902994},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Fan16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Fu16,
author = {Kevin Fu},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Medical Device Security: The First 165 Years},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {5},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902964},
doi = {10.1145/2902961.2902964},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Fu16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/GuLSBL0K16,
author = {Peng Gu and
Shuangchen Li and
Dylan C. Stow and
Russell Barnes and
Liu Liu and
Yuan Xie and
Eren Kursun},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Leveraging 3D Technologies for Hardware Security: Opportunities and
Challenges},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {347--352},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903512},
doi = {10.1145/2902961.2903512},
timestamp = {Sat, 09 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/GuLSBL0K16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HanDBZP16,
author = {Xijing Han and
Marco Donato and
R. Iris Bahar and
Alexander Zaslavsky and
William R. Patterson},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Design of Error-Resilient Logic Gates with Reinforcement Using Implications},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {191--196},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902983},
doi = {10.1145/2902961.2902983},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HanDBZP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HuSSZ16,
author = {Qingda Hu and
Guangyu Sun and
Jiwu Shu and
Chao Zhang},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Exploring Main Memory Design Based on Racetrack Memory Technology},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {397--402},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902967},
doi = {10.1145/2902961.2902967},
timestamp = {Sat, 18 May 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/HuSSZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HungFCCLL16,
author = {Yu{-}Hsiang Hung and
Sheng{-}Hsin Fang and
Hung{-}Ming Chen and
Shen{-}Min Chen and
Chang{-}Tzu Lin and
Chia{-}Hsin Lee},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A New Methodology for Noise Sensor Placement Based on Association
Rule Mining},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {81--86},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902973},
doi = {10.1145/2902961.2902973},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HungFCCLL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ImaniPR16,
author = {Mohsen Imani and
Shruti Patil and
Tajana Simunic Rosing},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {{DCC:} Double Capacity Cache Architecture for Narrow-Width Values},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {113--116},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902990},
doi = {10.1145/2902961.2902990},
timestamp = {Fri, 12 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ImaniPR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JassiSMS16,
author = {Munish Jassi and
Uzair Sharif and
Daniel M{\"{u}}ller{-}Gritschneder and
Ulf Schlichtmann},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Hardware-Accelerated Software Library Drivers Generation for IP-Centric
SoC Designs},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {287--292},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903026},
doi = {10.1145/2902961.2903026},
timestamp = {Wed, 25 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/JassiSMS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiaCZY16,
author = {Xiaotao Jia and
Yici Cai and
Qiang Zhou and
Bei Yu},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {MCFRoute 2.0: {A} Redundant Via Insertion Enhanced Concurrent Detailed
Router},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {87--92},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902966},
doi = {10.1145/2902961.2902966},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JiaCZY16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JunsangsriHL16,
author = {Salin Junsangsri and
Jie Han and
Fabrizio Lombardi},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A Design of a Non-Volatile PMC-Based (Programmable Metallization Cell)
Register File},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {21--26},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903034},
doi = {10.1145/2902961.2903034},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JunsangsriHL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JuretusS16,
author = {Kyle Juretus and
Ioannis Savidis},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Reduced Overhead Gate Level Logic Encryption},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {15--20},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902972},
doi = {10.1145/2902961.2902972},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JuretusS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KaramLCYB16,
author = {Robert Karam and
Rui Liu and
Pai{-}Yu Chen and
Shimeng Yu and
Swarup Bhunia},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Security Primitive Design with Nanoscale Devices: {A} Case Study with
Resistive {RAM}},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {299--304},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903042},
doi = {10.1145/2902961.2903042},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KaramLCYB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KiamehrET16,
author = {Saman Kiamehr and
Mojtaba Ebrahimi and
Mehdi Baradaran Tahoori},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Temperature-aware Dynamic Voltage Scaling for Near-Threshold Computing},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {361--364},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902997},
doi = {10.1145/2902961.2902997},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KiamehrET16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KulkarniASM16,
author = {Amey M. Kulkarni and
Tahmid Abtahi and
Emily Smith and
Tinoosh Mohsenin},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Low Energy Sketching Engines on Many-Core Platform for Big Data Acceleration},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {57--62},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902984},
doi = {10.1145/2902961.2902984},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KulkarniASM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LeDTF016,
author = {Thao Le and
Jia Di and
Mark M. Tehranipoor and
Domenic Forte and
Lei Wang},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Tracking Data Flow at Gate-Level through Structural Checking},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {185--189},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903040},
doi = {10.1145/2902961.2903040},
timestamp = {Wed, 10 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LeDTF016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Leblebici16,
author = {Yusuf Leblebici},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Design and Implementation of Real-Time Multi-sensor Vision Systems},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {3},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902965},
doi = {10.1145/2902961.2902965},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Leblebici16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuDWH16,
author = {Ning Liu and
Caiwen Ding and
Yanzhi Wang and
Jingtong Hu},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Neural Network-based Prediction Algorithms for In-Door Multi-Source
Energy Harvesting System for Non-Volatile Processors},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {275--280},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903037},
doi = {10.1145/2902961.2903037},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuDWH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuP16,
author = {Yin Liu and
Keshab K. Parhi},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Computing Complex Functions using Factorization in Unipolar Stochastic
Logic},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {109--112},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902999},
doi = {10.1145/2902961.2902999},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuoLF16,
author = {Pei Luo and
Cheng Li and
Yunsi Fei},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Concurrent Error Detection for Reliable {SHA-3} Design},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {39--44},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902985},
doi = {10.1145/2902961.2902985},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LuoLF16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaoZFHM16,
author = {Fubing Mao and
Wei Zhang and
Bo Feng and
Bingsheng He and
Yuchun Ma},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Modular Placement for Interposer based Multi-FPGA Systems},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {93--98},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903025},
doi = {10.1145/2902961.2903025},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MaoZFHM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MarthiRHMMIMG16,
author = {Poorna Marthi and
Sheikh Rufsan Reza and
Nazir Hossain and
Jean{-}Fran{\c{c}}ois Millithaler and
Martin Margala and
Ignacio I{\~{n}}iguez{-}de{-}la{-}Torre and
Javier Mateos and
Tom{\'{a}}s Gonz{\'{a}}lez},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Modeling and Study of Two-BDT-Nanostructure based Sequential Logic
Circuits},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {393--396},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903001},
doi = {10.1145/2902961.2903001},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MarthiRHMMIMG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MercatiPBIBR16,
author = {Pietro Mercati and
Francesco Paterna and
Andrea Bartolini and
Mohsen Imani and
Luca Benini and
Tajana Simunic Rosing},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {VarDroid: Online Variability Emulation in Android/Linux Platforms},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {269--274},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902971},
doi = {10.1145/2902961.2902971},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MercatiPBIBR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MirianC16,
author = {Vincent Mirian and
Paul Chow},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Extracting Designs of Secure IPs Using {FPGA} {CAD} Tools},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {293--298},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903033},
doi = {10.1145/2902961.2903033},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MirianC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MittalV16,
author = {Sparsh Mittal and
Jeffrey S. Vetter},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Reducing Soft-error Vulnerability of Caches using Data Compression},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {197--202},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902977},
doi = {10.1145/2902961.2902977},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MittalV16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NybergHHS16,
author = {Ralph Nyberg and
Johann Heyszl and
Dietmar Heinz and
Georg Sigl},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Enhancing Fault Emulation of Transient Faults by Separating Combinational
and Sequential Fault Propagation},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {209--214},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903021},
doi = {10.1145/2902961.2903021},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/NybergHHS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PageASHM16,
author = {Adam Page and
Nasrin Attaran and
Colin Shea and
Houman Homayoun and
Tinoosh Mohsenin},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Low-Power Manycore Accelerator for Personalized Biomedical Applications},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {63--68},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902986},
doi = {10.1145/2902961.2902986},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PageASHM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PagliariMP16,
author = {Daniele Jahier Pagliari and
Enrico Macii and
Massimo Poncino},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Approximate Differential Encoding for Energy-Efficient Serial Communication},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {421--426},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902974},
doi = {10.1145/2902961.2902974},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PagliariMP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PalmerFW16,
author = {Doug Palmer and
Saverio Fazzari and
Scott Wartenberg},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Defense Systems and IoT: Security Issues in an Era of Distributed
Command and Control},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {175--179},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903038},
doi = {10.1145/2902961.2903038},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PalmerFW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PapistasP16,
author = {Ioannis A. Papistas and
Vasilis F. Pavlidis},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Inter-Tier Crosstalk Noise On Power Delivery Networks For 3-D ICs
With Inductively-Coupled Interconnects},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {257--262},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903020},
doi = {10.1145/2902961.2903020},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PapistasP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ParkO16,
author = {Jaeyoung Park and
Michael Orshansky},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Multiple Attempt Write Strategy for Low Energy {STT-RAM}},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {163--168},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903015},
doi = {10.1145/2902961.2903015},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ParkO16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PatelXFR16,
author = {Ravi Patel and
Kan Xu and
Eby G. Friedman and
Praveen Raghavan},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Exploratory Power Noise Models of Standard Cell 14, 10, and 7 nm FinFET
ICs},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {233--238},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903035},
doi = {10.1145/2902961.2903035},
timestamp = {Mon, 07 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PatelXFR16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PathakHTHS16,
author = {Divya Pathak and
Mohammad Hossein Hajkazemi and
Mohammad Khavari Tavana and
Houman Homayoun and
Ioannis Savidis},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Load Balanced On-Chip Power Delivery for Average Current Demand},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {439--444},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903030},
doi = {10.1145/2902961.2903030},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PathakHTHS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Perez-Puigdemont16,
author = {Jordi Perez{-}Puigdemont and
Francesc Moll},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {{ASIC} Implementation of An All-digital Self-adaptive {PVTA} Variation-aware
Clock Generation System},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {381--384},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903006},
doi = {10.1145/2902961.2903006},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/Perez-Puigdemont16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PrashanthL16,
author = {Daniel Prashanth and
Hae{-}Seung Lee},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A Sampling Clock Skew Correction Technique for Time-Interleaved {SAR}
ADCs},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {129--132},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903008},
doi = {10.1145/2902961.2903008},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PrashanthL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PsarrasLMND16,
author = {Anastasios Psarras and
Junghee Lee and
Pavlos M. Mattheakis and
Chrysostomos Nicopoulos and
Giorgos Dimitrakopoulos},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {335--340},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903010},
doi = {10.1145/2902961.2903010},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PsarrasLMND16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RathoreCS16,
author = {Vijeta Rathore and
Vivek Chaturvedi and
Thambipillai Srikanthan},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Performance Constraint-Aware Task Mapping to Optimize Lifetime Reliability
of Manycore Systems},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {377--380},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902996},
doi = {10.1145/2902961.2902996},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RathoreCS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RezaZW16,
author = {Md Farhadur Reza and
Dan Zhao and
Hongyi Wu},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Task-Resource Co-Allocation for Hotspot Minimization in Heterogeneous
Many-Core NoCs},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {137--140},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903003},
doi = {10.1145/2902961.2903003},
timestamp = {Fri, 15 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RezaZW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Rose16,
author = {Garrett S. Rose},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Security Meets Nanoelectronics for Internet of Things Applications},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {181--183},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903045},
doi = {10.1145/2902961.2903045},
timestamp = {Wed, 14 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Rose16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/RuaroM16,
author = {Marcelo Ruaro and
Fernando Gehm Moraes},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Dynamic Real-Time Scheduler for Large-Scale MPSoCs},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {341--346},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903027},
doi = {10.1145/2902961.2903027},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/RuaroM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SannenaD16,
author = {Govinda Sannena and
Bishnu Prasad Das},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A Metastability Immune Timing Error Masking Flip-Flop for Dynamic
Variation Tolerance},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {151--156},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902976},
doi = {10.1145/2902961.2902976},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SannenaD16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SarafB16,
author = {Naman Saraf and
Kia Bazargan},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Polynomial Arithmetic Using Sequential Stochastic Logic},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {245--250},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902981},
doi = {10.1145/2902961.2902981},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SarafB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SoltaniEN16,
author = {Morteza Soltani and
Mohammad Ebrahimi and
Zainalabedin Navabi},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Prolonging Lifetime of Non-volatile Last Level Caches with Cluster
Mapping},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {329--334},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902980},
doi = {10.1145/2902961.2902980},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SoltaniEN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/SongLSCWZ16,
author = {Jiachen Song and
Xi Li and
Beilei Sun and
Zhinan Cheng and
Chao Wang and
Xuehai Zhou},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {{FCM:} Towards Fine-Grained {GPU} Power Management for Closed Source
Mobile Games},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {353--356},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902989},
doi = {10.1145/2902961.2902989},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/SongLSCWZ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/StamoulisCRWDMK16,
author = {Dimitrios Stamoulis and
Simone Corbetta and
Dimitrios Rodopoulos and
Pieter Weckx and
Peter Debacker and
Brett H. Meyer and
Ben Kaczer and
Praveen Raghavan and
Dimitrios Soudris and
Francky Catthoor and
Zeljko Zilic},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Capturing True Workload Dependency of BTI-induced Degradation in {CPU}
Components},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {373--376},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902992},
doi = {10.1145/2902961.2902992},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/StamoulisCRWDMK16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TabkhiSS16,
author = {Hamed Tabkhi and
Majid Sabbagh and
Gunar Schirner},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Guiding Power/Quality Exploration for Communication-Intense Stream
Processing},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {141--144},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903004},
doi = {10.1145/2902961.2903004},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TabkhiSS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TenaceCMP16,
author = {Valerio Tenace and
Andrea Calimera and
Enrico Macii and
Massimo Poncino},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Graphene-PLA {(GPLA):} a Compact and Ultra-Low Power Logic Array Architecture},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {145--150},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902970},
doi = {10.1145/2902961.2902970},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/TenaceCMP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/TossonAW16,
author = {Amr M. S. Tosson and
Mohab H. Anis and
Lan Wei},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {{RRAM} Refresh Circuit: {A} Proposed Solution To Resolve The Soft-Error
Failures For HfO\({}_{\mbox{2}}\)/Hf 1T1R {RRAM} Memory Cell},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {227--232},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903017},
doi = {10.1145/2902961.2903017},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/TossonAW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Verbauwhede16,
author = {Ingrid Verbauwhede},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {{VLSI} Design Methods for Low Power Embedded Encryption},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {7},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902963},
doi = {10.1145/2902961.2902963},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Verbauwhede16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/VincoCMP16,
author = {Sara Vinco and
Yukai Chen and
Enrico Macii and
Massimo Poncino},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A Unified Model of Power Sources for the Simulation of Electrical
Energy Systems},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {281--286},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903024},
doi = {10.1145/2902961.2903024},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/VincoCMP16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WangJZCYGQ16,
author = {Xueyan Wang and
Xiaotao Jia and
Qiang Zhou and
Yici Cai and
Jianlei Yang and
Mingze Gao and
Gang Qu},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Secure and Low-Overhead Circuit Obfuscation Technique with Multiplexers},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {133--136},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903000},
doi = {10.1145/2902961.2903000},
timestamp = {Tue, 14 Dec 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WangJZCYGQ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WatkinsT16,
author = {Adam Watkins and
Spyros Tragoudas},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {An Enhanced Analytical Electrical Masking Model for Multiple Event
Transients},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {369--372},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903007},
doi = {10.1145/2902961.2903007},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/WatkinsT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/WeiNL16,
author = {Wei Wei and
Kazuteru Namba and
Fabrizio Lombardi},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Design and Comparative Evaluation of a Hybrid Cache Memory at Architectural
Level},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {125--128},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903002},
doi = {10.1145/2902961.2903002},
timestamp = {Wed, 22 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/WeiNL16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Witteman16,
author = {Marc Witteman},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Why Is It So Hard to Make Secure Chips?},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {1},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902962},
doi = {10.1145/2902961.2902962},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Witteman16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XiongLWX16,
author = {Qin Xiong and
Zhonghai Lu and
Fei Wu and
Changsheng Xie},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Real-Time Analysis for Wormhole NoC: Revisited and Revised},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {75--80},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903023},
doi = {10.1145/2902961.2903023},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XiongLWX16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuH16,
author = {Xiaolin Xu and
Daniel E. Holcomb},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A Clockless Sequential {PUF} with Autonomous Majority Voting},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {27--32},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903029},
doi = {10.1145/2902961.2903029},
timestamp = {Fri, 08 Nov 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XuH16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/XuYZZLM16,
author = {Zhezhao Xu and
Wenjian Yu and
Chao Zhang and
Bolong Zhang and
Meijuan Lu and
Michael Mascagni},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A Parallel Random Walk Solver for the Capacitance Calculation Problem
in Touchscreen Design},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {99--104},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903011},
doi = {10.1145/2902961.2903011},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/XuYZZLM16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangLWCLZS16,
author = {Chaofei Yang and
Beiye Liu and
Yandan Wang and
Yiran Chen and
Hai Li and
Xian Zhang and
Guangyu Sun},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {The Applications of {NVM} Technology in Hardware Security},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {311--316},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903043},
doi = {10.1145/2902961.2903043},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangLWCLZS16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YangLZC16,
author = {Chen Yang and
Yan Li and
Wei Zhong and
Song Chen},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Real-Time Hardware Stereo Matching Using Guided Image Filter},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {105--108},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902995},
doi = {10.1145/2902961.2902995},
timestamp = {Fri, 16 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YangLZC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/YuanWW16,
author = {Bo Yuan and
Yanzhi Wang and
Zhongfeng Wang},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Area-Efficient Error-Resilient Discrete Fourier Transformation Design
using Stochastic Computing},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {33--38},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902978},
doi = {10.1145/2902961.2902978},
timestamp = {Fri, 21 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/YuanWW16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhangCXLC16,
author = {Hang Zhang and
Xuhao Chen and
Nong Xiao and
Fang Liu and
Zhiguang Chen},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Red-Shield: Shielding Read Disturbance for {STT-RAM} Based Register
Files on GPUs},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {389--392},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2902988},
doi = {10.1145/2902961.2902988},
timestamp = {Thu, 07 May 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhangCXLC16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ZhouQ16,
author = {Rui Zhou and
Weikang Qian},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {A General Sign Bit Error Correction Scheme for Approximate Adders},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {221--226},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903012},
doi = {10.1145/2902961.2903012},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ZhouQ16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/kondamadugulaN16,
author = {Sita Kondamadugula and
Srinath R. Naidu},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Parameter-importance based Monte-Carlo Technique for Variation-aware
Analog Yield Optimization},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {51--56},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903018},
doi = {10.1145/2902961.2903018},
timestamp = {Wed, 25 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/kondamadugulaN16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@proceedings{DBLP:conf/glvlsi/2016,
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961},
doi = {10.1145/2902961},
isbn = {978-1-4503-4274-2},
timestamp = {Wed, 10 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/2016.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AbusultanK15,
author = {Monther Abusultan and
Sunil P. Khatri},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Delay, Power and Energy Tradeoffs in Deep Voltage-scaled FPGAs},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {111--114},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742120},
doi = {10.1145/2742060.2742120},
timestamp = {Tue, 23 Jul 2019 15:03:09 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AbusultanK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AdegbijaG15,
author = {Tosiron Adegbija and
Ann Gordon{-}Ross},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Phase-based Cache Locking for Embedded Systems},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {115--120},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742076},
doi = {10.1145/2742060.2742076},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AdegbijaG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AghaeePE15,
author = {Nima Aghaee and
Zebo Peng and
Petru Eles},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Efficient Test Application for Rapid Multi-Temperature Testing},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {3--8},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742064},
doi = {10.1145/2742060.2742064},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AghaeePE15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AkbariPNM15,
author = {Ali Akbari and
Saadat Pour{-}Mozafari and
Hamid Noori and
Farhad Mehdipour},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Dynamic Task Priority Scaling for Thermal Management of Multi-core
Processors with Heavy Workload},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {373--378},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742101},
doi = {10.1145/2742060.2742101},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AkbariPNM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AlaghiH15,
author = {Armin Alaghi and
John P. Hayes},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {On the Functions Realized by Stochastic Computing Circuits},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {331--336},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2743758},
doi = {10.1145/2742060.2743758},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AlaghiH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AsadJ15,
author = {Hafiz ul Asad and
Kevin D. Jones},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Inevitability of Phase-locking in a Charge Pump Phase Lock Loop using
Deductive Verification},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {295--300},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742072},
doi = {10.1145/2742060.2742072},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/AsadJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/AtaeiS15,
author = {Samira Ataei and
James E. Stine},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Multi Replica Bitline Delay Technique for Variation Tolerant Timing
of {SRAM} Sense Amplifiers},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {173--178},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742065},
doi = {10.1145/2742060.2742065},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/AtaeiS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BejestanWRXBP15,
author = {Alireza Shafaei Bejestan and
Yanzhi Wang and
Srikanth Ramadurgam and
Yuankun Xue and
Paul Bogdan and
Massoud Pedram},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Analyzing the Dark Silicon Phenomenon in a Many-Core Chip Multi-Processor
under Deeply-Scaled Process Technologies},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {127--132},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742096},
doi = {10.1145/2742060.2742096},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BejestanWRXBP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BriereDPGPULM15,
author = {Alexandre Briere and
Julien Denoulet and
Andr{\'{e}}a Pinna and
Bertrand Granado and
Fran{\c{c}}ois P{\^{e}}cheux and
Eren Unlu and
Yves Lou{\"{e}}t and
Christophe Moy},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {A Dynamically Reconfigurable {RF} NoC for Many-Core},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {139--144},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742082},
doi = {10.1145/2742060.2742082},
timestamp = {Mon, 26 Oct 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BriereDPGPULM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Brunvand15,
author = {Erik Brunvand},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Computational Thinking Meets Design Thinking: Technology and Arts
Collaborations},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {145},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742123},
doi = {10.1145/2742060.2742123},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Brunvand15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CavigelliGMWMB15,
author = {Lukas Cavigelli and
David Gschwend and
Christoph Mayer and
Samuel Willi and
Beat Muheim and
Luca Benini},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Origami: {A} Convolutional Network Accelerator},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {199--204},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2743766},
doi = {10.1145/2742060.2743766},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/CavigelliGMWMB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Chakrabarty15,
author = {Krishnendu Chakrabarty},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Digital Microfluidic Biochips: Towards Functional Diversity, More
than Moore, and Cyberphysical Integration},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {1},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2745701},
doi = {10.1145/2742060.2745701},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Chakrabarty15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChakrabortyW15,
author = {Avijit Chakraborty and
D. M. H. Walker},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Optimizing {VMIN} of {ROM} Arrays Without Loss of Noise Margin},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {397--402},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742100},
doi = {10.1145/2742060.2742100},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChakrabortyW15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenCMP15,
author = {Yukai Chen and
Andrea Calimera and
Enrico Macii and
Massimo Poncino},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Characterizing the Activity Factor in {NBTI} Aging Models for Embedded
Cores},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {75--78},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742111},
doi = {10.1145/2742060.2742111},
timestamp = {Mon, 16 Sep 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenCMP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChenHLL15,
author = {Linbin Chen and
Jie Han and
Weiqiang Liu and
Fabrizio Lombardi},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Design of Approximate Unsigned Integer Non-restoring Divider for Inexact
Computing},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {51--56},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742063},
doi = {10.1145/2742060.2742063},
timestamp = {Wed, 22 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChenHLL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/ChittamuruDP15,
author = {Sai Vineel Reddy Chittamuru and
Srinivas Desai and
Sudeep Pasricha},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Reconfigurable Silicon-Photonic Network with Improved Channel Sharing
for Multicore Architectures},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {63--68},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742067},
doi = {10.1145/2742060.2742067},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/ChittamuruDP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/CuiCWNP15,
author = {Tiansong Cui and
Bowen Chen and
Yanzhi Wang and
Shahin Nazarian and
Massoud Pedram},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Layout Characterization and Power Density Analysis for Shorted-Gate
and Independent-Gate 7nm FinFET Standard Cells},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {33--38},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742093},
doi = {10.1145/2742060.2742093},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/CuiCWNP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DangPM15,
author = {Dharanidhar Dang and
Biplab Patra and
Rabi N. Mahapatra},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {A Multilayered Design Approach for Efficient Hybrid 3D Photonics Network-on-chip},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {121--126},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742083},
doi = {10.1145/2742060.2742083},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DangPM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DaniloCCGG15,
author = {Robin Danilo and
Philippe Coussy and
Laura Conde{-}Canencia and
Vincent Gripon and
Warren J. Gross},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Restricted Clustered Neural Network for Storing Real Data},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {205--210},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2743767},
doi = {10.1145/2742060.2743767},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DaniloCCGG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DasLKP15,
author = {Sourav Das and
Dongjin Lee and
Dae Hyun Kim and
Partha Pratim Pande},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Small-World Network Enabled Energy Efficient and Robust 3D NoC Architectures},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {133--138},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742085},
doi = {10.1145/2742060.2742085},
timestamp = {Fri, 15 Apr 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DasLKP15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DistefanoFLBG15,
author = {Rosario Distefano and
Franco Fummi and
Carlo Laudanna and
Nicola Bombieri and
Rosalba Giugno},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {A SystemC Platform for Signal Transduction Modelling and Simulation
in Systems Biology},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {233--236},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742115},
doi = {10.1145/2742060.2742115},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/DistefanoFLBG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/DonatoBPZ15,
author = {Marco Donato and
R. Iris Bahar and
William R. Patterson and
Alexander Zaslavsky},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {A Simulation Framework for Analyzing Transient Effects Due to Thermal
Noise in Sub-Threshold Circuits},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {45--50},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742066},
doi = {10.1145/2742060.2742066},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/DonatoBPZ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/HajkazemiCBTH15,
author = {Mohammad Hossein Hajkazemi and
Michael Chorney and
Reyhaneh Jabbarvand Behrouz and
Mohammad Khavari Tavana and
Houman Homayoun},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Adaptive Bandwidth Management for Performance-Temperature Trade-offs
in Heterogeneous HMC+DDRx Memory},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {391--396},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742070},
doi = {10.1145/2742060.2742070},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/HajkazemiCBTH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JiangHL15,
author = {Honglan Jiang and
Jie Han and
Fabrizio Lombardi},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {A Comparative Review and Evaluation of Approximate Adders},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {343--348},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2743760},
doi = {10.1145/2742060.2743760},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JiangHL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/JunsangsriLH15,
author = {Pilin Junsangsri and
Fabrizio Lombardi and
Jie Han},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {A Ternary Content Addressable Cell Using a Single Phase Change Memory
{(PCM)}},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {259--264},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742062},
doi = {10.1145/2742060.2742062},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/JunsangsriLH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Kaneko15,
author = {Mineo Kaneko},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {A Novel Framework for Temperature Dependence Aware Clock Skew Scheduling},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {367--372},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742073},
doi = {10.1145/2742060.2742073},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Kaneko15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KlineWMJ15,
author = {Donald Kline Jr. and
Kai Wang and
Rami G. Melhem and
Alex K. Jones},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {{MSCS:} Multi-hop Segmented Circuit Switching},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {179--184},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742087},
doi = {10.1145/2742060.2742087},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/KlineWMJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/KongMK15,
author = {Joonho Kong and
Arslan Munir and
Farinaz Koushanfar},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Fine-Grained Voltage Boosting for Improving Yield in Near-Threshold
Many-Core Processors},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {225--228},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742105},
doi = {10.1145/2742060.2742105},
timestamp = {Sun, 06 Oct 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/KongMK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiCKS15,
author = {Yaoqiang Li and
Pierce I{-}Jen Chuang and
Andrew A. Kennings and
Manoj Sachdev},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Voltage-Boosted Synchronizers},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {307--312},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742075},
doi = {10.1145/2742060.2742075},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiCKS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiXMJ15,
author = {Yong Li and
Haifeng Xu and
Rami G. Melhem and
Alex K. Jones},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Space Oblivious Compression: Power Reduction for Non-Volatile Main
Memories},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {217--220},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742107},
doi = {10.1145/2742060.2742107},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiXMJ15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuSST15,
author = {Weicheng Liu and
Emre Salman and
Can Sitik and
Baris Taskin},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Clock Skew Scheduling in the Presence of Heavily Gated Clock Networks},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {283--288},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742092},
doi = {10.1145/2742060.2742092},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuSST15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LiuWCLWH15,
author = {Beiye Liu and
Wei Wen and
Yiran Chen and
Xin Li and
Chi{-}Ruo Wu and
Tsung{-}Yi Ho},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {{EDA} Challenges for Memristor-Crossbar based Neuromorphic Computing},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {185--188},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2743754},
doi = {10.1145/2742060.2743754},
timestamp = {Mon, 04 Jul 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LiuWCLWH15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Lohmueller15,
author = {Jason Lohmueller},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Mammalian Synthetic Gene Networks},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {325--326},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2743764},
doi = {10.1145/2742060.2743764},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Lohmueller15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LombardiWN15,
author = {Fabrizio Lombardi and
Wei Wei and
Kazuteru Namba},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Novel Designs of Embedded Hybrid Cells for High Performance Memory
Circuits},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {91--94},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742103},
doi = {10.1145/2742060.2742103},
timestamp = {Wed, 22 Jul 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/LombardiWN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LouPHHNN15,
author = {Qiuwen Lou and
Indranil Palit and
Andr{\'{a}}s Horv{\'{a}}th and
Xiaobo Sharon Hu and
Michael T. Niemier and
Joseph Nahas},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {TFET-based Operational Transconductance Amplifier Design for {CNN}
Systems},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {277--282},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742089},
doi = {10.1145/2742060.2742089},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LouPHHNN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuS15,
author = {Tiantao Lu and
Ankur Srivastava},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Electromigration-aware Clock Tree Synthesis for TSV-based 3D-ICs},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {27--32},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742068},
doi = {10.1145/2742060.2742068},
timestamp = {Thu, 18 Nov 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LuS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/LuTB15,
author = {Shiting (Justin) Lu and
Russell Tessier and
Wayne P. Burleson},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Reinforcement Learning for Thermal-aware Many-core Task Allocation},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {379--384},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742078},
doi = {10.1145/2742060.2742078},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/LuTB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Ma15,
author = {Zhenqiang Jack Ma},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Graphene Neural Sensors for Next Generation In Vivo Imaging and Optogenetics},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {147},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2745702},
doi = {10.1145/2742060.2745702},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Ma15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MaCHD15,
author = {Yue Ma and
Thidapat Chantem and
Xiaobo Sharon Hu and
Robert P. Dick},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Improving Lifetime of Multicore Soft Real-Time Systems through Global
Utilization Control},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {79--82},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742113},
doi = {10.1145/2742060.2742113},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MaCHD15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MarconiC15,
author = {Thomas Marconi and
Sorin Cotofana},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Dynamic Bitstream Length Scaling Energy Effective Stochastic {LDPC}
Decoding},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {245--248},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742117},
doi = {10.1145/2742060.2742117},
timestamp = {Mon, 15 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MarconiC15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MavropoulosKAN15,
author = {Michail Mavropoulos and
Georgios Keramidas and
Grigorios Adamopoulos and
Dimitris Nikolos},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Reconfigurable: Self Adaptive Fault Tolerant Cache Memory for {DVS}
enabled Systems},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {161--166},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742091},
doi = {10.1145/2742060.2742091},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MavropoulosKAN15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MiryalaTCMPAMG15,
author = {Sandeep Miryala and
Valerio Tenace and
Andrea Calimera and
Enrico Macii and
Massimo Poncino and
Luca Gaetano Amar{\`{u}} and
Giovanni De Micheli and
Pierre{-}Emmanuel Gaillardon},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Exploiting the Expressive Power of Graphene Reconfigurable Gates via
Post-Synthesis Optimization},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {39--44},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742098},
doi = {10.1145/2742060.2742098},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MiryalaTCMPAMG15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Miskov-Zivanov15,
author = {Natasa Miskov{-}Zivanov},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Automation of Biological Model Learning, Design and Analysis},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {327--329},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2743765},
doi = {10.1145/2742060.2743765},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Miskov-Zivanov15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MohsinS15,
author = {K. M. Mohsin and
Ashok Srivastava},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Characterization of {SWCNT} Bundle Based {VLSI} Interconnect with
Self-heating Induced Scatterings},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {265--270},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742074},
doi = {10.1145/2742060.2742074},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MohsinS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MozafariMS15,
author = {Seyyed Hasan Mozafari and
Brett H. Meyer and
Kevin Skadron},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Yield-aware Performance-Cost Characterization for Multi-Core {SIMT}},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {237--240},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742112},
doi = {10.1145/2742060.2742112},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/MozafariMS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/MurrayK15,
author = {Luke Murray and
Sunil P. Khatri},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {An Efficient Approach to Sample On-Chip Power Supplies},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {241--244},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742121},
doi = {10.1145/2742060.2742121},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/MurrayK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NajvirtSHFNS15,
author = {Robert Najvirt and
Ulrich Schmid and
Michael Hofbauer and
Matthias F{\"{u}}gger and
Thomas Nowak and
Kurt Schweiger},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Experimental Validation of a Faithful Binary Circuit Model},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {355--360},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742081},
doi = {10.1145/2742060.2742081},
timestamp = {Sat, 19 Oct 2019 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NajvirtSHFNS15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NeelKK15,
author = {Brian Neel and
Matthew Kennedy and
Avinash Karanth Kodi},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Dynamic Power Reduction Techniques in On-Chip Photonic Interconnects},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {249--252},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742118},
doi = {10.1145/2742060.2742118},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/NeelKK15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/NeshatpourHKB15,
author = {Katayoun Neshatpour and
Houman Homayoun and
Amin Khajeh and
Wayne P. Burleson},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Revisiting Dynamic Thermal Management Exploiting Inverse Thermal Dependence},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {385--390},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742086},
doi = {10.1145/2742060.2742086},
timestamp = {Mon, 06 Apr 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/NeshatpourHKB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/OuYGPPL15,
author = {Jiaojiao Ou and
Bei Yu and
Jhih{-}Rong Gao and
David Z. Pan and
Moshe Preil and
Azat Latypov},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Directed Self-Assembly Based Cut Mask Optimization for Unidirectional
Design},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {83--86},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742114},
doi = {10.1145/2742060.2742114},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/OuYGPPL15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PaindavoineBCPB15,
author = {Michel Paindavoine and
Olivier Boisard and
Alexandre Carbon and
Jean{-}Marc Philippe and
Olivier Brousse},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {NeuroDSP Accelerator for Face Detection Application},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {211--215},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2743769},
doi = {10.1145/2742060.2743769},
timestamp = {Sun, 02 Oct 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PaindavoineBCPB15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PalangappaM15,
author = {Poovaiah M. Palangappa and
Kartik Mohanram},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Flip-Mirror-Rotate: An Architecture for Bit-write Reduction and Wear
Leveling in Non-volatile Memories},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {221--224},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742110},
doi = {10.1145/2742060.2742110},
timestamp = {Tue, 06 Nov 2018 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/PalangappaM15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/Papagiannopoulou15,
author = {Dimitra Papagiannopoulou and
Andrea Marongiu and
Tali Moreshet and
Luca Benini and
Maurice Herlihy and
R. Iris Bahar},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {Playing with Fire: Transactional Memory Revisited for Error-Resilient
and Energy-Efficient MPSoC Execution},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {9--14},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742090},
doi = {10.1145/2742060.2742090},
timestamp = {Fri, 27 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/Papagiannopoulou15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/PeiZJJLX15,
author = {Songwei Pei and
Jingdong Zhang and
Yu Jin and
Song Jin and
Jun Liu and
Weizhi Xu},
editor = {Alex K. Jones and
Hai (Helen) Li and
Ayse K. Coskun and
Martin Margala},
title = {An Effective {TSV} Self-Repair Scheme for 3D-Stacked ICs},
booktitle = {Proceedings of the 25th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2015, Pittsburgh, PA, USA, May 20 - 22, 2015},
pages = {21--26},
publisher = {{ACM}},
year = {2015},
url = {https://doi.org/10.1145/2742060.2742071},
doi = {10.1145/2742060.2742071},
timestamp = {Wed, 12 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/glvlsi/PeiZJJLX15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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