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@article{DBLP:journals/cal/AgarwalFGSB24,
  author       = {Nikhil Agarwal and
                  Mitchell Fream and
                  Souradip Ghosh and
                  Brian C. Schwedock and
                  Nathan Beckmann},
  title        = {{UDIR:} Towards a Unified Compiler Framework for Reconfigurable Dataflow
                  Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {99--103},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3342130},
  doi          = {10.1109/LCA.2023.3342130},
  timestamp    = {Fri, 17 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AgarwalFGSB24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AjdariMAA24,
  author       = {Mohammadamin Ajdari and
                  Behrang Montazerzohour and
                  Kimia Abdi and
                  Hossein Asadi},
  title        = {Empirical Architectural Analysis on Performance Scalability of Petascale
                  All-Flash Storage Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {2},
  pages        = {158--161},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3418874},
  doi          = {10.1109/LCA.2024.3418874},
  timestamp    = {Tue, 22 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AjdariMAA24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlcortaMATYG24,
  author       = {Erika S. Alcorta and
                  Mahesh Madhav and
                  Richard Afoakwa and
                  Scott Tetrick and
                  Neeraja J. Yadwadkar and
                  Andreas Gerstlauer},
  title        = {Characterizing Machine Learning-Based Runtime Prefetcher Selection},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {2},
  pages        = {146--149},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3404887},
  doi          = {10.1109/LCA.2024.3404887},
  timestamp    = {Tue, 22 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AlcortaMATYG24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AyanzadehQ24,
  author       = {Ramin Ayanzadeh and
                  Moinuddin K. Qureshi},
  title        = {Enhancing the Reach and Reliability of Quantum Annealers by Pruning
                  Longer Chains},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {25--28},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3340030},
  doi          = {10.1109/LCA.2023.3340030},
  timestamp    = {Sat, 16 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AyanzadehQ24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChoAFAMRNZ24,
  author       = {Minsik Cho and
                  Keivan Alizadeh{-}Vahid and
                  Qichen Fu and
                  Saurabh Adya and
                  Carlo C. del Mundo and
                  Mohammad Rastegari and
                  Devang Naik and
                  Peter Zatloukal},
  title        = {eDKM: An Efficient and Accurate Train-Time Weight Clustering for Large
                  Language Models},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {37--40},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3363492},
  doi          = {10.1109/LCA.2024.3363492},
  timestamp    = {Mon, 29 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ChoAFAMRNZ24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CorontzosF24,
  author       = {Caden Corontzos and
                  Eitan Frachtenberg},
  title        = {Direct-Coding {DNA} With Multilevel Parallelism},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {21--24},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3355109},
  doi          = {10.1109/LCA.2024.3355109},
  timestamp    = {Sat, 16 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/CorontzosF24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Eeckhout24,
  author       = {Lieven Eeckhout},
  title        = {{R.I.P.} Geomean Speedup Use Equal-Work (Or Equal-Time) Harmonic Mean
                  Speedup Instead},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {78--82},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3361925},
  doi          = {10.1109/LCA.2024.3361925},
  timestamp    = {Sat, 04 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Eeckhout24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FranceBNMB24,
  author       = {Lo{\"{\i}}c France and
                  Florent Bruguier and
                  David Novo and
                  Maria Mushtaq and
                  Pascal Benoit},
  title        = {Reducing the Silicon Area Overhead of Counter-Based Rowhammer Mitigations},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {61--64},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3328824},
  doi          = {10.1109/LCA.2023.3328824},
  timestamp    = {Fri, 17 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/FranceBNMB24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GheibiFetratAHS24,
  author       = {Atiyeh Gheibi{-}Fetrat and
                  Negar Akbarzadeh and
                  Shaahin Hessabi and
                  Hamid Sarbazi{-}Azad},
  title        = {Tulip: Turn-Free Low-Power Network-on-Chip},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {5--8},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3339646},
  doi          = {10.1109/LCA.2023.3339646},
  timestamp    = {Sat, 13 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GheibiFetratAHS24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GohilDULRD24,
  author       = {Varun Gohil and
                  Sundar Dev and
                  Gaurang Upasani and
                  David Lo and
                  Parthasarathy Ranganathan and
                  Christina Delimitrou},
  title        = {The Importance of Generalizability in Machine Learning for Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {95--98},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3384449},
  doi          = {10.1109/LCA.2024.3384449},
  timestamp    = {Fri, 17 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/GohilDULRD24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GoldenIHZZB24,
  author       = {Courtney Golden and
                  Dan Ilan and
                  Caroline Huang and
                  Niansong Zhang and
                  Zhiru Zhang and
                  Christopher Batten},
  title        = {Supporting a Virtual Vector Instruction Set on a Commercial Compute-in-SRAM
                  Accelerator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {29--32},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3341389},
  doi          = {10.1109/LCA.2023.3341389},
  timestamp    = {Sat, 16 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GoldenIHZZB24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HafezanA24,
  author       = {Mohammad Hafezan and
                  Ehsan Atoofian},
  title        = {Improving Energy-Efficiency of Capsule Networks on Modern GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {49--52},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3365149},
  doi          = {10.1109/LCA.2024.3365149},
  timestamp    = {Mon, 15 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/HafezanA24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JahshanY24,
  author       = {Zuher Jahshan and
                  Leonid Yavits},
  title        = {MajorK: Majority Based kmer Matching in Commodity {DRAM}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {83--86},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3384259},
  doi          = {10.1109/LCA.2024.3384259},
  timestamp    = {Sat, 04 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JahshanY24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KakolyrisMXS24,
  author       = {Andreas Kosmas Kakolyris and
                  Dimosthenis Masouros and
                  Sotirios Xydis and
                  Dimitrios Soudris},
  title        = {SLO-Aware {GPU} {DVFS} for Energy-Efficient {LLM} Inference Serving},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {2},
  pages        = {150--153},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3406038},
  doi          = {10.1109/LCA.2024.3406038},
  timestamp    = {Tue, 22 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KakolyrisMXS24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KatebiAG24,
  author       = {Hossein Katebi and
                  Navidreza Asadi and
                  Maziar Goudarzi},
  title        = {FullPack: Full Vector Utilization for Sub-Byte Quantized Matrix-Vector
                  Multiplication on General Purpose CPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {2},
  pages        = {142--145},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3370402},
  doi          = {10.1109/LCA.2024.3370402},
  timestamp    = {Tue, 22 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KatebiAG24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhanHSJC24,
  author       = {Asif Ali Khan and
                  Fazal Hameed and
                  Taha Shahroodi and
                  Alex K. Jones and
                  Jer{\'{o}}nimo Castrill{\'{o}}n},
  title        = {Efficient Memory Layout for Pre-Alignment Filtering of Long {DNA}
                  Reads Using Racetrack Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {129--132},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3350701},
  doi          = {10.1109/LCA.2024.3350701},
  timestamp    = {Tue, 18 Jun 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KhanHSJC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimHSKK24,
  author       = {Yanggon Kim and
                  Yunki Han and
                  Jaekang Shin and
                  Junkyum Kim and
                  Lee{-}Sup Kim},
  title        = {Accelerating Deep Reinforcement Learning via Phase-Level Parallelism
                  for Robotics Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {41--44},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3341152},
  doi          = {10.1109/LCA.2023.3341152},
  timestamp    = {Sat, 16 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimHSKK24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimLR24,
  author       = {Hyeseong Kim and
                  Yunjae Lee and
                  Minsoo Rhu},
  title        = {FPGA-Accelerated Data Preprocessing for Personalized Recommendation
                  Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {7--10},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3336841},
  doi          = {10.1109/LCA.2023.3336841},
  timestamp    = {Thu, 29 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimLR24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimYWYK24,
  author       = {Hyungyo Kim and
                  Gaohan Ye and
                  Nachuan Wang and
                  Amir Yazdanbakhsh and
                  Nam Sung Kim},
  title        = {Exploiting Intel Advanced Matrix Extensions {(AMX)} for Large Language
                  Model Inference},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {117--120},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3397747},
  doi          = {10.1109/LCA.2024.3397747},
  timestamp    = {Tue, 18 Jun 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimYWYK24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiCWWG24,
  author       = {Tianzheng Li and
                  Enfang Cui and
                  Yuting Wu and
                  Qian Wei and
                  Yue Gao},
  title        = {TeleVM: {A} Lightweight Virtual Machine for {RISC-V} Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {121--124},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3394835},
  doi          = {10.1109/LCA.2024.3394835},
  timestamp    = {Tue, 18 Jun 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LiCWWG24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LuoTBOYM24,
  author       = {Haocong Luo and
                  Yahya Can Tugrul and
                  F. Nisa Bostanci and
                  Ataberk Olgun and
                  Abdullah Giray Yaglik{\c{c}}i and
                  Onur Mutlu},
  title        = {Ramulator 2.0: {A} Modern, Modular, and Extensible {DRAM} Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {112--116},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3333759},
  doi          = {10.1109/LCA.2023.3333759},
  timestamp    = {Fri, 02 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LuoTBOYM24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MaHMGKSC24,
  author       = {Rui Ma and
                  Jia{-}Ching Hsu and
                  Ali Mansoorshahi and
                  Joseph Garvey and
                  Michael Kinsner and
                  Deshanand P. Singh and
                  Derek Chiou},
  title        = {Primate: {A} Framework to Automatically Generate Soft Processors for
                  Network Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {57--60},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3358839},
  doi          = {10.1109/LCA.2024.3358839},
  timestamp    = {Mon, 15 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MaHMGKSC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MajiLC24,
  author       = {Saurav Maji and
                  Kyungmi Lee and
                  Anantha P. Chandrakasan},
  title        = {SparseLeakyNets: Classification Prediction Attack Over Sparsity-Aware
                  Embedded Neural Networks Using Timing Side-Channel Information},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {133--136},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3397730},
  doi          = {10.1109/LCA.2024.3397730},
  timestamp    = {Tue, 18 Jun 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MajiLC24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MishraKPSSMM24,
  author       = {Deepanjali Mishra and
                  Konstantinos Kanellopoulos and
                  Ashish Panwar and
                  Akshitha Sriraman and
                  Vivek Seshadri and
                  Onur Mutlu and
                  Todd C. Mowry},
  title        = {Address Scaling: Architectural Support for Fine-Grained Thread-Safe
                  Metadata Management},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {69--72},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3373760},
  doi          = {10.1109/LCA.2024.3373760},
  timestamp    = {Sat, 04 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MishraKPSSMM24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MohammadpurFardDFMS24,
  author       = {Ali Mohammadpur{-}Fard and
                  Sina Darabi and
                  Hajar Falahati and
                  Negin Mahani and
                  Hamid Sarbazi{-}Azad},
  title        = {Exploiting Direct Memory Operands in {GPU} Instructions},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {2},
  pages        = {162--165},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3371062},
  doi          = {10.1109/LCA.2024.3371062},
  timestamp    = {Tue, 22 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MohammadpurFardDFMS24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NagabhiruB24,
  author       = {Mahita Nagabhiru and
                  Gregory T. Byrd},
  title        = {Achieving Forward Progress Guarantee in Small Hardware Transactions},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {53--56},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3370992},
  doi          = {10.1109/LCA.2024.3370992},
  timestamp    = {Mon, 15 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/NagabhiruB24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ParkPASLBB24,
  author       = {Yongmo Park and
                  Subhankar Pal and
                  Aporva Amarnath and
                  Karthik Swaminathan and
                  Wei D. Lu and
                  Alper Buyuktosunoglu and
                  Pradip Bose},
  title        = {Dramaton: {A} Near-DRAM Accelerator for Large Number Theoretic Transforms},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {108--111},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3381452},
  doi          = {10.1109/LCA.2024.3381452},
  timestamp    = {Fri, 17 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ParkPASLBB24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PeltekisTND24,
  author       = {Christodoulos Peltekis and
                  Vasileios Titopoulos and
                  Chrysostomos Nicopoulos and
                  Giorgos Dimitrakopoulos},
  title        = {DeMM: {A} Decoupled Matrix Multiplication Engine Supporting Relaxed
                  Structured Sparsity},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {17--20},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3355178},
  doi          = {10.1109/LCA.2024.3355178},
  timestamp    = {Sat, 16 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PeltekisTND24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/QiYZQH24,
  author       = {Yingjie Qi and
                  Jianlei Yang and
                  Ao Zhou and
                  Tong Qiao and
                  Chunming Hu},
  title        = {Architectural Implications of {GNN} Aggregation Programming Abstractions},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {125--128},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3326170},
  doi          = {10.1109/LCA.2023.3326170},
  timestamp    = {Tue, 18 Jun 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/QiYZQH24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RezaeiMM24,
  author       = {Seyyed Hossein Seyyedaghaei Rezaei and
                  Parham Zilouchian Moghaddam and
                  Mehdi Modarressi},
  title        = {Smart Memory: Deep Learning Acceleration in 3D-Stacked Memories},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {137--141},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3287976},
  doi          = {10.1109/LCA.2023.3287976},
  timestamp    = {Thu, 04 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/RezaeiMM24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SasmalJB24,
  author       = {Mrinmay Sasmal and
                  Tresa Joseph and
                  T. S. Bindiya},
  title        = {Approximate Multiplier Design With LFSR-Based Stochastic Sequence
                  Generators for Edge {AI}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {91--94},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3379002},
  doi          = {10.1109/LCA.2024.3379002},
  timestamp    = {Fri, 17 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SasmalJB24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShinKSJLCL24,
  author       = {Changmin Shin and
                  Taehee Kwon and
                  Jaeyong Song and
                  Jae Hyung Ju and
                  Frank Liu and
                  YeonKyu Choi and
                  Jinho Lee},
  title        = {A Case for In-Memory Random Scatter-Gather for Fast Graph Processing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {73--77},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3376680},
  doi          = {10.1109/LCA.2024.3376680},
  timestamp    = {Sat, 04 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ShinKSJLCL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ThomasWIMCBIL24,
  author       = {Samuel Thomas and
                  Kidus Workneh and
                  Ange{-}Thierry Ishimwe and
                  Zack McKevitt and
                  Phaedra S. Curlin and
                  R. Iris Bahar and
                  Joseph Izraelevitz and
                  Tamara Lehman},
  title        = {Baobab Merkle Tree for Efficient Secure Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {33--36},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3360709},
  doi          = {10.1109/LCA.2024.3360709},
  timestamp    = {Sat, 16 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ThomasWIMCBIL24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TsantikidouS24,
  author       = {Kyriaki Tsantikidou and
                  Nicolas Sklavos},
  title        = {An Area Efficient Architecture of a Novel Chaotic System for High
                  Randomness Security in e-Health},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {104--107},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3387352},
  doi          = {10.1109/LCA.2024.3387352},
  timestamp    = {Fri, 17 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/TsantikidouS24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/UenoTTTTIN24,
  author       = {Yosuke Ueno and
                  Yuna Tomida and
                  Teruo Tanimoto and
                  Masamitsu Tanaka and
                  Yutaka Tabuchi and
                  Koji Inoue and
                  Hiroshi Nakamura},
  title        = {Inter-Temperature Bandwidth Reduction in Cryogenic {QAOA} Machines},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {6--9},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3322700},
  doi          = {10.1109/LCA.2023.3322700},
  timestamp    = {Thu, 29 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/UenoTTTTIN24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/VieiraRFT24,
  author       = {Jo{\~{a}}o Vieira and
                  Nuno Roma and
                  Gabriel Falc{\~{a}}o and
                  Pedro Tom{\'{a}}s},
  title        = {gem5-accel: {A} Pre-RTL Simulation Toolchain for Accelerator Architecture
                  Validation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {1--4},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3329443},
  doi          = {10.1109/LCA.2023.3329443},
  timestamp    = {Fri, 26 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/VieiraRFT24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YangCH24,
  author       = {Yuxin Yang and
                  Xiaoming Chen and
                  Yinhe Han},
  title        = {{JANM-IK:} Jacobian Argumented Nelder-Mead Algorithm for Inverse Kinematics
                  and its Hardware Acceleration},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {45--48},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3369940},
  doi          = {10.1109/LCA.2024.3369940},
  timestamp    = {Thu, 25 Apr 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YangCH24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Yavits24,
  author       = {Leonid Yavits},
  title        = {{DRAMA:} Commodity {DRAM} Based Content Addressable Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {65--68},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2023.3341830},
  doi          = {10.1109/LCA.2023.3341830},
  timestamp    = {Sat, 04 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Yavits24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YiQLXGZF24,
  author       = {Shiyan Yi and
                  Yudi Qiu and
                  Lingfei Lu and
                  Guohao Xu and
                  Yong Gong and
                  Xiaoyang Zeng and
                  Yibo Fan},
  title        = {GATe: Streamlining Memory Access and Communication to Accelerate Graph
                  Attention Network With Near-Memory Processing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {1},
  pages        = {87--90},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3386734},
  doi          = {10.1109/LCA.2024.3386734},
  timestamp    = {Sun, 08 Sep 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YiQLXGZF24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YoonKLR24,
  author       = {Dongho Yoon and
                  Taehun Kim and
                  Jae W. Lee and
                  Minsoo Rhu},
  title        = {A Quantitative Analysis of State Space Model-Based Large Language
                  Model: Study of Hungry Hungry Hippos},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {23},
  number       = {2},
  pages        = {154--157},
  year         = {2024},
  url          = {https://doi.org/10.1109/LCA.2024.3422492},
  doi          = {10.1109/LCA.2024.3422492},
  timestamp    = {Tue, 22 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YoonKLR24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BaeGLKKZJ23,
  author       = {Hanyeoreum Bae and
                  Donghyun Gouk and
                  Seungjun Lee and
                  Jiseon Kim and
                  Sungjoon Koh and
                  Jie Zhang and
                  Myoungsoo Jung},
  title        = {Intelligent {SSD} Firmware for Zero-Overhead Journaling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {25--28},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3243695},
  doi          = {10.1109/LCA.2023.3243695},
  timestamp    = {Sat, 29 Apr 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/BaeGLKKZJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BranaSMB23,
  author       = {Jennifer Brana and
                  Brian C. Schwedock and
                  Yatin A. Manerkar and
                  Nathan Beckmann},
  title        = {Kobold: Simplified Cache Coherence for Cache-Attached Accelerators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {41--44},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3269399},
  doi          = {10.1109/LCA.2023.3269399},
  timestamp    = {Thu, 15 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/BranaSMB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChoiPKKA23,
  author       = {Jaewan Choi and
                  Jaehyun Park and
                  Kwanhee Kyung and
                  Nam Sung Kim and
                  Jung Ho Ahn},
  title        = {Unleashing the Potential of {PIM:} Accelerating Large Batched Inference
                  of Transformer-Based Generative Models},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {113--116},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3305386},
  doi          = {10.1109/LCA.2023.3305386},
  timestamp    = {Wed, 01 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChoiPKKA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DeshpandePP23,
  author       = {Chandana S. Deshpande and
                  Arthur Perais and
                  Fr{\'{e}}d{\'{e}}ric P{\'{e}}trot},
  title        = {Toward Practical 128-Bit General Purpose Microarchitectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {81--84},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3287762},
  doi          = {10.1109/LCA.2023.3287762},
  timestamp    = {Thu, 31 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/DeshpandePP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FengARHGS23,
  author       = {Justin Feng and
                  Fatemeh Arkannezhad and
                  Christopher Ryu and
                  Enoch Huang and
                  Siddhant Gupta and
                  Nader Sehatbakhsh},
  title        = {Simulating Our Way to Safer Software: {A} Tale of Integrating Microarchitecture
                  Simulation and Leakage Estimation Modeling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {109--112},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3303913},
  doi          = {10.1109/LCA.2023.3303913},
  timestamp    = {Sun, 24 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/FengARHGS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GarciaMallenPMMRH23,
  author       = {Jonathan Garcia{-}Mallen and
                  Shuohao Ping and
                  Alex Miralles{-}Cordal and
                  Ian Martin and
                  Mukund Ramakrishnan and
                  Yipeng Huang},
  title        = {Towards an Accelerator for Differential and Algebraic Equations Useful
                  to Scientists},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {185--188},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3332318},
  doi          = {10.1109/LCA.2023.3332318},
  timestamp    = {Sat, 13 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GarciaMallenPMMRH23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GoudarziAHRZSBY23,
  author       = {Maziar Goudarzi and
                  Reza Azimi and
                  Julian Humecki and
                  Faizaan Rehman and
                  Richard Zhang and
                  Chirag Sethi and
                  Tanishq Bomman and
                  Yuqi Yang},
  title        = {By-Software Branch Prediction in Loops},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {129--132},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3304613},
  doi          = {10.1109/LCA.2023.3304613},
  timestamp    = {Fri, 27 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/GoudarziAHRZSBY23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HastingsPS23,
  author       = {Adam Hastings and
                  Ryan Piersma and
                  Simha Sethumadhavan},
  title        = {Architectural Security Regulation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {173--176},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3327952},
  doi          = {10.1109/LCA.2023.3327952},
  timestamp    = {Sun, 31 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HastingsPS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HeTKX23,
  author       = {Pengzhou He and
                  Yazheng Tu and
                  {\c{C}}etin Kaya Ko{\c{c}} and
                  Jiafeng Xie},
  title        = {Hardware-Implemented Lightweight Accelerator for Large Integer Polynomial
                  Multiplication},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {57--60},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3274931},
  doi          = {10.1109/LCA.2023.3274931},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/HeTKX23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HossainBWBM23,
  author       = {Naorin Hossain and
                  Alper Buyuktosunoglu and
                  John{-}David Wellman and
                  Pradip Bose and
                  Margaret Martonosi},
  title        = {SoCurity: {A} Design Approach for Enhancing SoC Security},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {105--108},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3301448},
  doi          = {10.1109/LCA.2023.3301448},
  timestamp    = {Sun, 24 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/HossainBWBM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JeonLKK23,
  author       = {Kiseok Jeon and
                  Junghee Lee and
                  Bumsoo Kim and
                  James J. Kim},
  title        = {Hardware Accelerated Reusable Merkle Tree Generation for Bitcoin Blockchain
                  Headers},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {69--72},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3289515},
  doi          = {10.1109/LCA.2023.3289515},
  timestamp    = {Fri, 18 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JeonLKK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JeongLSPYK23,
  author       = {Ipoom Jeong and
                  Jiaqi Lou and
                  Yongseok Son and
                  Yongjoo Park and
                  Yifan Yuan and
                  Nam Sung Kim},
  title        = {{LADIO:} Leakage-Aware Direct {I/O} for I/O-Intensive Workloads},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {77--80},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3290427},
  doi          = {10.1109/LCA.2023.3290427},
  timestamp    = {Fri, 18 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JeongLSPYK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JimenezTG23,
  author       = {Daniel A. Jim{\'{e}}nez and
                  Elvira Teran and
                  Paul V. Gratz},
  title        = {Last-Level Cache Insertion and Promotion Policy in the Presence of
                  Aggressive Prefetching},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {17--20},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3242178},
  doi          = {10.1109/LCA.2023.3242178},
  timestamp    = {Tue, 28 Mar 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JimenezTG23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KarLKSKK23,
  author       = {Anurag Kar and
                  Xueyang Liu and
                  Yonghae Kim and
                  Gururaj Saileshwar and
                  Hyesoon Kim and
                  Tushar Krishna},
  title        = {Mitigating Timing-Based NoC Side-Channel Attacks With {LLC} Remapping},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {53--56},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3276709},
  doi          = {10.1109/LCA.2023.3276709},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KarLKSKK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhoramDL23,
  author       = {Soroosh Khoram and
                  Kyle Daruwalla and
                  Mikko H. Lipasti},
  title        = {Energy-Efficient Bayesian Inference Using Bitstream Computing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {37--40},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3238584},
  doi          = {10.1109/LCA.2023.3238584},
  timestamp    = {Fri, 02 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KhoramDL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKLLK23,
  author       = {Yonghae Kim and
                  Anurag Kar and
                  Jaewon Lee and
                  Jaekyu Lee and
                  Hyesoon Kim},
  title        = {Hardware-Assisted Code-Pointer Tagging for Forward-Edge Control-Flow
                  Integrity},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {117--120},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3306326},
  doi          = {10.1109/LCA.2023.3306326},
  timestamp    = {Fri, 27 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimKLLK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KurzumSGW23,
  author       = {Samer Kurzum and
                  Gil Shomron and
                  Freddy Gabbay and
                  Uri C. Weiser},
  title        = {Enhancing {DNN} Training Efficiency Via Dynamic Asymmetric Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {49--52},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3275909},
  doi          = {10.1109/LCA.2023.3275909},
  timestamp    = {Thu, 15 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KurzumSGW23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeHPR23,
  author       = {Seonho Lee and
                  Ranggi Hwang and
                  Jongse Park and
                  Minsoo Rhu},
  title        = {{HAMMER:} Hardware-Friendly Approximate Computing for Self-Attention
                  With Mean-Redistribution And Linearization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {13--16},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2022.3233832},
  doi          = {10.1109/LCA.2022.3233832},
  timestamp    = {Sat, 25 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LeeHPR23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeLJK23,
  author       = {Hwanjun Lee and
                  Seunghak Lee and
                  Yeji Jung and
                  Daehoon Kim},
  title        = {{T-CAT:} Dynamic Cache Allocation for Tiered Memory Systems With Memory
                  Interleaving},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {73--76},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3290197},
  doi          = {10.1109/LCA.2023.3290197},
  timestamp    = {Fri, 18 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LeeLJK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiCKA23,
  author       = {Hailong Li and
                  Jaewan Choi and
                  Yongsuk Kwon and
                  Jung Ho Ahn},
  title        = {A Hardware-Friendly Tiled Singular-Value Decomposition-Based Matrix
                  Multiplication for Transformer-Based Models},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {169--172},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3323482},
  doi          = {10.1109/LCA.2023.3323482},
  timestamp    = {Sun, 31 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiCKA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LoTL23,
  author       = {Yun{-}Chen Lo and
                  Yu{-}Chih Tsai and
                  Ren{-}Shuo Liu},
  title        = {{LV:} Latency-Versatile Floating-Point Engine for High-Performance
                  Deep Neural Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {125--128},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3287096},
  doi          = {10.1109/LCA.2023.3287096},
  timestamp    = {Fri, 27 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LoTL23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LuQYF23,
  author       = {Lingfei Lu and
                  Yudi Qiu and
                  Shiyan Yi and
                  Yibo Fan},
  title        = {A Flexible Embedding-Aware Near Memory Processing Architecture for
                  Recommendation System},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {165--168},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3305668},
  doi          = {10.1109/LCA.2023.3305668},
  timestamp    = {Sun, 31 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LuQYF23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MarsKDLMFT23,
  author       = {Jason Mars and
                  Yiping Kang and
                  Roland Daynauth and
                  Baichuan Li and
                  Ashish Mahendra and
                  Kriszti{\'{a}}n Flautner and
                  Lingjia Tang},
  title        = {The Jaseci Programming Paradigm and Runtime Stack: Building Scale-Out
                  Production Applications Easy and Fast},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {101--104},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3274038},
  doi          = {10.1109/LCA.2023.3274038},
  timestamp    = {Thu, 14 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MarsKDLMFT23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MelchertZMHTR23,
  author       = {Jackson Melchert and
                  Keyi Zhang and
                  Yuchen Mei and
                  Mark Horowitz and
                  Christopher Torng and
                  Priyanka Raina},
  title        = {Canal: {A} Flexible Interconnect Generator for Coarse-Grained Reconfigurable
                  Arrays},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {45--48},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3268126},
  doi          = {10.1109/LCA.2023.3268126},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MelchertZMHTR23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MoonDKLA23,
  author       = {Yaebin Moon and
                  Wanju Doh and
                  Kwanhee Kyung and
                  Eojin Lee and
                  Jung Ho Ahn},
  title        = {{ADT:} Aggressive Demotion and Promotion for Tiered Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {21--24},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3236685},
  doi          = {10.1109/LCA.2023.3236685},
  timestamp    = {Tue, 28 Mar 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MoonDKLA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MosqueraKMJ23,
  author       = {Fernando Mosquera and
                  Krishna Kavi and
                  Gayatri Mehta and
                  Lizy K. John},
  title        = {Guard Cache: Creating Noisy Side-Channels},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {97--100},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3289710},
  doi          = {10.1109/LCA.2023.3289710},
  timestamp    = {Thu, 14 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MosqueraKMJ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NamBWKPSKA23,
  author       = {Hwayong Nam and
                  Seungmin Baek and
                  Minbok Wi and
                  Michael Jaemin Kim and
                  Jaehyun Park and
                  Chihun Song and
                  Nam Sung Kim and
                  Jung Ho Ahn},
  title        = {X-ray: Discovering {DRAM} Internal Structure and Error Characteristics
                  by Issuing Memory Commands},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {89--92},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3296153},
  doi          = {10.1109/LCA.2023.3296153},
  timestamp    = {Thu, 14 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/NamBWKPSKA23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NematallahPB23,
  author       = {Ahmed Nematallah and
                  Chang Hyun Park and
                  David Black{-}Schaffer},
  title        = {Exploring the Latency Sensitivity of Cache Replacement Policies},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {93--96},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3296251},
  doi          = {10.1109/LCA.2023.3296251},
  timestamp    = {Thu, 14 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/NematallahPB23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ParkKKK23,
  author       = {Gyeongseo Park and
                  Ki{-}Dong Kang and
                  Minho Kim and
                  Daehoon Kim},
  title        = {CoreNap: Energy Efficient Core Allocation for Latency-Critical Workloads},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {1--4},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2022.3227629},
  doi          = {10.1109/LCA.2022.3227629},
  timestamp    = {Fri, 10 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ParkKKK23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ParkS23,
  author       = {Jueon Park and
                  Hyojin Sung},
  title        = {{XLA-NDP:} Efficient Scheduling and Code Generation for Deep Learning
                  Model Training on Near-Data Processing Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {61--64},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3261136},
  doi          = {10.1109/LCA.2023.3261136},
  timestamp    = {Fri, 07 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ParkS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PatelGRCMAS23,
  author       = {Pratyush Patel and
                  Zibo Gong and
                  Syeda Rizvi and
                  Esha Choukse and
                  Pulkit A. Misra and
                  Thomas E. Anderson and
                  Akshitha Sriraman},
  title        = {Towards Improved Power Management in Cloud GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {141--144},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3278652},
  doi          = {10.1109/LCA.2023.3278652},
  timestamp    = {Tue, 05 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PatelGRCMAS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RingleinADWHF23,
  author       = {Burkhard Ringlein and
                  Fran{\c{c}}ois Abel and
                  Dionysios Diamantopoulos and
                  Beat Weiss and
                  Christoph Hagleitner and
                  Dietmar Fey},
  title        = {Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {9--12},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2022.3227643},
  doi          = {10.1109/LCA.2022.3227643},
  timestamp    = {Fri, 10 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RingleinADWHF23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RobertsYBE23,
  author       = {David Andrew Roberts and
                  Haojie Ye and
                  Tony Brewer and
                  Sean Eilert},
  title        = {In-Memory Versioning {(IMV)}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {65--68},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3273124},
  doi          = {10.1109/LCA.2023.3273124},
  timestamp    = {Thu, 13 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/RobertsYBE23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SaileshwarQ23,
  author       = {Gururaj Saileshwar and
                  Moinuddin K. Qureshi},
  title        = {The Mirage of Breaking {MIRAGE:} Analyzing the Modeling Pitfalls in
                  Emerging "Attacks" on {MIRAGE}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {121--124},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3297875},
  doi          = {10.1109/LCA.2023.3297875},
  timestamp    = {Fri, 27 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SaileshwarQ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SimAALRKSMKP23,
  author       = {Joonseop Sim and
                  Soohong Ahn and
                  Taeyoung Ahn and
                  Seungyong Lee and
                  Myunghyun Rhee and
                  Jooyoung Kim and
                  Kwangsik Shin and
                  Donguk Moon and
                  Euiseok Kim and
                  Kyoung Park},
  title        = {Computational CXL-Memory Solution for Accelerating Memory-Intensive
                  Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {5--8},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2022.3226482},
  doi          = {10.1109/LCA.2022.3226482},
  timestamp    = {Fri, 10 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SimAALRKSMKP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TrochatosXDLDS23,
  author       = {Theodoros Trochatos and
                  Chuanqi Xu and
                  Sanjay Deshpande and
                  Yao Lu and
                  Yongshan Ding and
                  Jakub Szefer},
  title        = {A Quantum Computer Trusted Execution Environment},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {177--180},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3325852},
  doi          = {10.1109/LCA.2023.3325852},
  timestamp    = {Sun, 31 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/TrochatosXDLDS23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TzenetopoulosMSX23,
  author       = {Achilleas Tzenetopoulos and
                  Dimosthenis Masouros and
                  Dimitrios Soudris and
                  Sotirios Xydis},
  title        = {DVFaaS: Leveraging {DVFS} for FaaS Workflows},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {85--88},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3288089},
  doi          = {10.1109/LCA.2023.3288089},
  timestamp    = {Thu, 14 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/TzenetopoulosMSX23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WestonMJM23,
  author       = {Kevin Weston and
                  Farabi Mahmud and
                  Vahid Janfaza and
                  Abdullah Muzahid},
  title        = {SmartIndex: Learning to Index Caches to Improve Performance},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {33--36},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3264478},
  doi          = {10.1109/LCA.2023.3264478},
  timestamp    = {Fri, 02 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WestonMJM23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WuLZZ23,
  author       = {Peiyun Wu and
                  Trung Le and
                  Zhichun Zhu and
                  Zhao Zhang},
  title        = {Redundant Array of Independent Memory Devices},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {181--184},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3334989},
  doi          = {10.1109/LCA.2023.3334989},
  timestamp    = {Sat, 13 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WuLZZ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WuYYLZYF23,
  author       = {Meng Wu and
                  Mingyu Yan and
                  Xiaocheng Yang and
                  Wenming Li and
                  Zhimin Zhang and
                  Xiaochun Ye and
                  Dongrui Fan},
  title        = {Characterizing and Understanding Defense Methods for GNNs on GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {137--140},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3304638},
  doi          = {10.1109/LCA.2023.3304638},
  timestamp    = {Fri, 06 Sep 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WuYYLZYF23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YunP23,
  author       = {Yugyoung Yun and
                  Eunhyeok Park},
  title        = {Fast Performance Prediction for Efficient Distributed {DNN} Training},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {2},
  pages        = {133--136},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3316452},
  doi          = {10.1109/LCA.2023.3316452},
  timestamp    = {Fri, 27 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YunP23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhaoZWLZ23,
  author       = {Xia Zhao and
                  Guangda Zhang and
                  Lu Wang and
                  Yangmei Li and
                  Yongjun Zhang},
  title        = {RouteReplies: Alleviating Long Latency in Many-Chip-Module GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {22},
  number       = {1},
  pages        = {29--32},
  year         = {2023},
  url          = {https://doi.org/10.1109/LCA.2023.3255555},
  doi          = {10.1109/LCA.2023.3255555},
  timestamp    = {Mon, 22 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ZhaoZWLZ23.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/0001E22,
  author       = {Majid Jalili and
                  Mattan Erez},
  title        = {Managing Prefetchers With Deep Reinforcement Learning},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {105--108},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3210397},
  doi          = {10.1109/LCA.2022.3210397},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/0001E22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AccettiYL22,
  author       = {Cecil Accetti and
                  Rendong Ying and
                  Peilin Liu},
  title        = {Structured Combinators for Efficient Graph Reduction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {73--76},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3198844},
  doi          = {10.1109/LCA.2022.3198844},
  timestamp    = {Sun, 13 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AccettiYL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BarberGZT22,
  author       = {Kristin Barber and
                  Moein Ghaniyoun and
                  Yinqian Zhang and
                  Radu Teodorescu},
  title        = {A Pre-Silicon Approach to Discovering Microarchitectural Vulnerabilities
                  in Security Critical Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {1},
  pages        = {9--12},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3151256},
  doi          = {10.1109/LCA.2022.3151256},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/BarberGZT22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChaconWKSG22,
  author       = {Gino A. Chacon and
                  Charles Williams and
                  Johann Knechtel and
                  Ozgur Sinanoglu and
                  Paul V. Gratz},
  title        = {Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet
                  Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {133--136},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3216820},
  doi          = {10.1109/LCA.2022.3216820},
  timestamp    = {Wed, 17 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ChaconWKSG22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Eeckhout22,
  author       = {Lieven Eeckhout},
  title        = {A First-Order Model to Assess Computer Architecture Sustainability},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {137--140},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3217366},
  doi          = {10.1109/LCA.2022.3217366},
  timestamp    = {Wed, 17 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Eeckhout22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FariborzSOLYA22,
  author       = {Marjan Fariborz and
                  Mahyar Samani and
                  Terry O'Neill and
                  Jason Lowe{-}Power and
                  S. J. Ben Yoo and
                  Venkatesh Akella},
  title        = {A Model for Scalable and Balanced Accelerators for Graph Processing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {149--152},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3215489},
  doi          = {10.1109/LCA.2022.3215489},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/FariborzSOLYA22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GoukKKJCLJ22,
  author       = {Donghyun Gouk and
                  Seungkwan Kang and
                  Miryeong Kwon and
                  Junhyeok Jang and
                  Hyunkyu Choi and
                  Sangwon Lee and
                  Myoungsoo Jung},
  title        = {PreGNN: Hardware Acceleration to Take Preprocessing Off the Critical
                  Path in Graph Neural Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {117--120},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3193256},
  doi          = {10.1109/LCA.2022.3193256},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GoukKKJCLJ22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HameedKOJC22,
  author       = {Fazal Hameed and
                  Asif Ali Khan and
                  S{\'{e}}bastien Ollivier and
                  Alex K. Jones and
                  Jer{\'{o}}nimo Castrill{\'{o}}n},
  title        = {{DNA} Pre-Alignment Filter Using Processing Near Racetrack Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {53--56},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3194263},
  doi          = {10.1109/LCA.2022.3194263},
  timestamp    = {Sun, 13 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HameedKOJC22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HongCK22,
  author       = {Jeongmin Hong and
                  Sungjun Cho and
                  Gwangsun Kim},
  title        = {Overcoming Memory Capacity Wall of GPUs With Heterogeneous Memory
                  Stack},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {61--64},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3196932},
  doi          = {10.1109/LCA.2022.3196932},
  timestamp    = {Sun, 13 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HongCK22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HouXLTSLC22,
  author       = {Xiaofeng Hou and
                  Cheng Xu and
                  Jiacheng Liu and
                  Xuehan Tang and
                  Lingyu Sun and
                  Chao Li and
                  Kwang{-}Ting Cheng},
  title        = {Characterizing and Understanding End-to-End Multi-Modal Neural Networks
                  on GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {125--128},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3215718},
  doi          = {10.1109/LCA.2022.3215718},
  timestamp    = {Sat, 27 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/HouXLTSLC22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HuangH22,
  author       = {Jianming Huang and
                  Yu Hua},
  title        = {Ensuring Data Confidentiality in eADR-Based {NVM} Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {153--156},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3225949},
  doi          = {10.1109/LCA.2022.3225949},
  timestamp    = {Sat, 20 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/HuangH22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JangKKCJLCKJ22,
  author       = {Hamin Jang and
                  Taehun Kang and
                  Joonsung Kim and
                  Jaeyong Cho and
                  Jae{-}Eon Jo and
                  Seungwook Lee and
                  Wooseok Chang and
                  Jangwoo Kim and
                  Hanhwi Jang},
  title        = {LSim: Fine-Grained Simulation Framework for Large-Scale Performance
                  Evaluation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {1},
  pages        = {25--28},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3168831},
  doi          = {10.1109/LCA.2022.3168831},
  timestamp    = {Thu, 02 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JangKKCJLCKJ22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JinJPKK22,
  author       = {Hoyong Jin and
                  Donghun Jeong and
                  Taewon Park and
                  Jong Hwan Ko and
                  Jungrae Kim},
  title        = {Multi-Prediction Compression: An Efficient and Scalable Memory Compression
                  Framework for {GP-GPU}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {37--40},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3177419},
  doi          = {10.1109/LCA.2022.3177419},
  timestamp    = {Thu, 27 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JinJPKK22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKJKL22,
  author       = {Sejin Kim and
                  Jungwoo Kim and
                  Yongjoo Jang and
                  Jaeha Kung and
                  Sungjin Lee},
  title        = {{SEMS:} Scalable Embedding Memory System for Accelerating Embedding-Based
                  DNNs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {157--160},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3227560},
  doi          = {10.1109/LCA.2022.3227560},
  timestamp    = {Wed, 17 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimKJKL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKLL22,
  author       = {Minjae Kim and
                  Bryan S. Kim and
                  Eunji Lee and
                  Sungjin Lee},
  title        = {A Case Study of a {DRAM-NVM} Hybrid Memory Allocator for Key-Value
                  Stores},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {81--84},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3197654},
  doi          = {10.1109/LCA.2022.3197654},
  timestamp    = {Sat, 17 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimKLL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KokkinisDS22,
  author       = {Argyris Kokkinis and
                  Dionysios Diamantopoulos and
                  Kostas Siozios},
  title        = {Dynamic Optimization of On-Chip Memories for {HLS} Targeting Many-Accelerator
                  Platforms},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {41--44},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3190048},
  doi          = {10.1109/LCA.2022.3190048},
  timestamp    = {Sun, 13 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KokkinisDS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeHCK22,
  author       = {Dusol Lee and
                  Duwon Hong and
                  Wonil Choi and
                  Jihong Kim},
  title        = {MQSim-E: An Enterprise {SSD} Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {1},
  pages        = {13--16},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3144773},
  doi          = {10.1109/LCA.2022.3144773},
  timestamp    = {Wed, 27 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LeeHCK22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LenjaniAS22,
  author       = {Marzieh Lenjani and
                  Alif Ahmed and
                  Kevin Skadron},
  title        = {Pulley: An Algorithm/Hardware Co-Optimization for In-Memory Sorting},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {109--112},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3208255},
  doi          = {10.1109/LCA.2022.3208255},
  timestamp    = {Wed, 17 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LenjaniAS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LinYYZLYF22,
  author       = {Haiyang Lin and
                  Mingyu Yan and
                  Xiaocheng Yang and
                  Mo Zou and
                  Wenming Li and
                  Xiaochun Ye and
                  Dongrui Fan},
  title        = {Characterizing and Understanding Distributed {GNN} Training on GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {1},
  pages        = {21--24},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3168067},
  doi          = {10.1109/LCA.2022.3168067},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LinYYZLYF22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LucasAMTHSGGJX22,
  author       = {Benjamin J. Lucas and
                  Ali Alwan and
                  Marion Murzello and
                  Yazheng Tu and
                  Pengzhou He and
                  Andrew J. Schwartz and
                  David Guevara and
                  Ujjwal Guin and
                  Kyle Juretus and
                  Jiafeng Xie},
  title        = {Lightweight Hardware Implementation of Binary Ring-LWE {PQC} Accelerator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {1},
  pages        = {17--20},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3160394},
  doi          = {10.1109/LCA.2022.3160394},
  timestamp    = {Thu, 27 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LucasAMTHSGGJX22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MaGHGBN22,
  author       = {Rui Ma and
                  Evangelos Georganas and
                  Alexander Heinecke and
                  Sergey Gribok and
                  Andrew Boutros and
                  Eriko Nurvitadhi},
  title        = {FPGA-Based {AI} Smart NICs for Scalable Distributed {AI} Training
                  Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {49--52},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3189207},
  doi          = {10.1109/LCA.2022.3189207},
  timestamp    = {Sun, 13 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MaGHGBN22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NyeK22,
  author       = {Jared Nye and
                  Omer Khan},
  title        = {{SSE:} Security Service Engines to Accelerate Enclave Performance
                  in Secure Multicore Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {129--132},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3210149},
  doi          = {10.1109/LCA.2022.3210149},
  timestamp    = {Wed, 17 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/NyeK22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/OmoriK22,
  author       = {Yu Omori and
                  Keiji Kimura},
  title        = {Open-Source Hardware Memory Protection Engine Integrated With {NVMM}
                  Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {77--80},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3197777},
  doi          = {10.1109/LCA.2022.3197777},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/OmoriK22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ParkJ22,
  author       = {Jongwon Park and
                  Jinkyu Jeong},
  title        = {Speculative Multi-Level Access in {LSM} Tree-Based {KV} Store},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {145--148},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3219808},
  doi          = {10.1109/LCA.2022.3219808},
  timestamp    = {Wed, 17 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ParkJ22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PiccolboniGC22,
  author       = {Luca Piccolboni and
                  Davide Giri and
                  Luca P. Carloni},
  title        = {Accelerators {\&} Security: The Socket Approach},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {65--68},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3179947},
  doi          = {10.1109/LCA.2022.3179947},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/PiccolboniGC22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ReschK22,
  author       = {Salonik Resch and
                  Ulya R. Karpuzcu},
  title        = {On Variable Strength Quantum {ECC}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {93--96},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3200204},
  doi          = {10.1109/LCA.2022.3200204},
  timestamp    = {Sun, 13 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ReschK22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SalvesenJ22,
  author       = {Peter Salvesen and
                  Magnus Jahre},
  title        = {{LMT:} Accurate and Resource-Scalable Slowdown Prediction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {97--100},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3203483},
  doi          = {10.1109/LCA.2022.3203483},
  timestamp    = {Sun, 13 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SalvesenJ22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShinK022,
  author       = {Gyeongcheol Shin and
                  Junsoo Kim and
                  Joo{-}Young Kim},
  title        = {OpenMDS: An Open-Source Shell Generation Framework for High-Performance
                  Design on Xilinx Multi-Die FPGAs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {101--104},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3202016},
  doi          = {10.1109/LCA.2022.3202016},
  timestamp    = {Tue, 05 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShinK022.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShinPHS22,
  author       = {Yongwon Shin and
                  Juseong Park and
                  Jeongmin Hong and
                  Hyojin Sung},
  title        = {Runtime Support for Accelerating {CNN} Models on Digital {DRAM} Processing-in-Memory
                  Hardware},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {33--36},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3182363},
  doi          = {10.1109/LCA.2022.3182363},
  timestamp    = {Sun, 13 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShinPHS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangLLZWFYFD22,
  author       = {Yinshen Wang and
                  Wenming Li and
                  Tianyu Liu and
                  Liangjiang Zhou and
                  Bingnan Wang and
                  Zhihua Fan and
                  Xiaochun Ye and
                  Dongrui Fan and
                  Chibiao Ding},
  title        = {Characterization and Implementation of Radar System Applications on
                  a Reconfigurable Dataflow Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {121--124},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3215595},
  doi          = {10.1109/LCA.2022.3215595},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WangLLZWFYFD22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangLN22,
  author       = {Zhengrong Wang and
                  Christopher Liu and
                  Tony Nowatzki},
  title        = {Infinity Stream: Enabling Transparent and Automated In-Memory Computing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {85--88},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3203064},
  doi          = {10.1109/LCA.2022.3203064},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WangLN22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WuSVS22,
  author       = {Lingxi Wu and
                  Rasool Sharifi and
                  Ashish Venkat and
                  Kevin Skadron},
  title        = {{DRAM-CAM:} General-Purpose Bit-Serial Exact Pattern Matching},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {89--92},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3201168},
  doi          = {10.1109/LCA.2022.3201168},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WuSVS22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XiaoXWWH22,
  author       = {Hang Xiao and
                  Haobo Xu and
                  Ying Wang and
                  Yujie Wang and
                  Yinhe Han},
  title        = {{LINAC:} {A} Spatially Linear Accelerator for Convolutional Neural
                  Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {1},
  pages        = {29--32},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3167465},
  doi          = {10.1109/LCA.2022.3167465},
  timestamp    = {Tue, 23 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/XiaoXWWH22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XieGHDX22,
  author       = {Xinfeng Xie and
                  Peng Gu and
                  Jiayi Huang and
                  Yufei Ding and
                  Yuan Xie},
  title        = {MPU-Sim: {A} Simulator for In-DRAM Near-Bank Processing Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {1},
  pages        = {1--4},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2021.3135557},
  doi          = {10.1109/LCA.2021.3135557},
  timestamp    = {Fri, 01 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/XieGHDX22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YanZYLYF022,
  author       = {Mingyu Yan and
                  Mo Zou and
                  Xiaocheng Yang and
                  Wenming Li and
                  Xiaochun Ye and
                  Dongrui Fan and
                  Yuan Xie},
  title        = {Characterizing and Understanding HGNNs on GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {69--72},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3198281},
  doi          = {10.1109/LCA.2022.3198281},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YanZYLYF022.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YangHYXM0X22,
  author       = {Ling Yang and
                  Libo Huang and
                  Run Yan and
                  Nong Xiao and
                  Sheng Ma and
                  Li Shen and
                  Weixia Xu},
  title        = {Stride Equality Prediction for Value Speculation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {57--60},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3195411},
  doi          = {10.1109/LCA.2022.3195411},
  timestamp    = {Sun, 13 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YangHYXM0X22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YunKPNAL22,
  author       = {Sungmin Yun and
                  Byeongho Kim and
                  Jaehyun Park and
                  Hwayong Nam and
                  Jung Ho Ahn and
                  Eojin Lee},
  title        = {GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping
                  for Graph Convolutional Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {45--48},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3182387},
  doi          = {10.1109/LCA.2022.3182387},
  timestamp    = {Thu, 18 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YunKPNAL22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhouTRA22,
  author       = {Ranyang Zhou and
                  Sepehr Tabrizchi and
                  Arman Roohi and
                  Shaahin Angizi},
  title        = {{LT-PIM:} An LUT-Based Processing-in-DRAM Architecture With RowHammer
                  Self-Tracking},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {141--144},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3220084},
  doi          = {10.1109/LCA.2022.3220084},
  timestamp    = {Wed, 17 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ZhouTRA22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhuWT22,
  author       = {Yongye Zhu and
                  Shijia Wei and
                  Mohit Tiwari},
  title        = {Revisiting Browser Performance Benchmarking From an Architectural
                  Perspective},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {2},
  pages        = {113--116},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3210483},
  doi          = {10.1109/LCA.2022.3210483},
  timestamp    = {Wed, 17 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ZhuWT22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZouZWSYFT22,
  author       = {Mo Zou and
                  Mingzhe Zhang and
                  Rujia Wang and
                  Xian{-}He Sun and
                  Xiaochun Ye and
                  Dongrui Fan and
                  Zhimin Tang},
  title        = {Accelerating Graph Processing With Lightweight Learning-Based Data
                  Reordering},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {21},
  number       = {1},
  pages        = {5--8},
  year         = {2022},
  url          = {https://doi.org/10.1109/LCA.2022.3151087},
  doi          = {10.1109/LCA.2022.3151087},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ZouZWSYFT22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AimoniotisSSK21,
  author       = {Pavlos Aimoniotis and
                  Christos Sakalis and
                  Magnus Sj{\"{a}}lander and
                  Stefanos Kaxiras},
  title        = {Reorder Buffer Contention: {A} Forward Speculative Interference Attack
                  for Speculation Invariant Instructions},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {162--165},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3123408},
  doi          = {10.1109/LCA.2021.3123408},
  timestamp    = {Sat, 08 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AimoniotisSSK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlianSKWDKK21,
  author       = {Mohammad Alian and
                  Jongmin Shin and
                  Ki{-}Dong Kang and
                  Ren Wang and
                  Alexandros Daglis and
                  Daehoon Kim and
                  Nam Sung Kim},
  title        = {{IDIO:} Orchestrating Inbound Network Data on Server Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {30--33},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2020.3044923},
  doi          = {10.1109/LCA.2020.3044923},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AlianSKWDKK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AmarnathPKVBFWD21,
  author       = {Aporva Amarnath and
                  Subhankar Pal and
                  Hiwot Tadese Kassa and
                  Augusto Vega and
                  Alper Buyuktosunoglu and
                  Hubertus Franke and
                  John{-}David Wellman and
                  Ronald Dreslinski Jr. and
                  Pradip Bose},
  title        = {Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {82--85},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3085505},
  doi          = {10.1109/LCA.2021.3085505},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AmarnathPKVBFWD21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AsheimGK21,
  author       = {Truls Asheim and
                  Boris Grot and
                  Rakesh Kumar},
  title        = {{BTB-X:} {A} Storage-Effective {BTB} Organization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {134--137},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3109945},
  doi          = {10.1109/LCA.2021.3109945},
  timestamp    = {Wed, 03 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AsheimGK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BoranRUS21,
  author       = {Nirmal Kumar Boran and
                  Shubhankit Rathore and
                  Meet Udeshi and
                  Virendra Singh},
  title        = {Fine-Grained Scheduling in Heterogeneous-ISA Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {9--12},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2020.3045056},
  doi          = {10.1109/LCA.2020.3045056},
  timestamp    = {Tue, 23 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BoranRUS21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/EyermanHH21,
  author       = {Stijn Eyerman and
                  Wim Heirman and
                  Ibrahim Hur},
  title        = {Modeling {DRAM} Timing in Parallel Simulators With Immediate-Response
                  Memory Model},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {90--93},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3093075},
  doi          = {10.1109/LCA.2021.3093075},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/EyermanHH21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FalahatiPATSLS21,
  author       = {Hajar Falahati and
                  Masoud Peyro and
                  Hossein Amini and
                  Mehran Taghian and
                  Mohammad Sadrosadati and
                  Pejman Lotfi{-}Kamran and
                  Hamid Sarbazi{-}Azad},
  title        = {Data-Aware Compression of Neural Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {94--97},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3096191},
  doi          = {10.1109/LCA.2021.3096191},
  timestamp    = {Tue, 16 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/FalahatiPATSLS21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GhasemiJ21,
  author       = {Fatemeh Ghasemi and
                  Magnus Jahre},
  title        = {Modeling Periodic Energy-Harvesting Computing Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {142--145},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3117031},
  doi          = {10.1109/LCA.2021.3117031},
  timestamp    = {Sat, 08 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GhasemiJ21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GurumurthiLJSNR21,
  author       = {Sudhanva Gurumurthi and
                  Kijun Lee and
                  Munseon Jang and
                  Vilas Sridharan and
                  Aaron Nygren and
                  Yesin Ryu and
                  Kyomin Sohn and
                  Taekyun Kim and
                  Hoeju Chung},
  title        = {{HBM3} {RAS:} Enhancing Resilience at Scale},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {158--161},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3117150},
  doi          = {10.1109/LCA.2021.3117150},
  timestamp    = {Sat, 08 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GurumurthiLJSNR21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HamCKPHSPLK21,
  author       = {Hyungkyu Ham and
                  Hyunuk Cho and
                  Minjae Kim and
                  Jueon Park and
                  Jeongmin Hong and
                  Hyojin Sung and
                  Eunhyeok Park and
                  Euicheol Lim and
                  Gwangsun Kim},
  title        = {Near-Data Processing in Memory Expander for {DNN} Acceleration on
                  GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {171--174},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3126450},
  doi          = {10.1109/LCA.2021.3126450},
  timestamp    = {Sat, 08 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HamCKPHSPLK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HeirmanEBH21,
  author       = {Wim Heirman and
                  Stijn Eyerman and
                  Kristof Du Bois and
                  Ibrahim Hur},
  title        = {{RIO:} ROB-Centric In-Order Modeling of Out-of-Order Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {78--81},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3084365},
  doi          = {10.1109/LCA.2021.3084365},
  timestamp    = {Tue, 13 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/HeirmanEBH21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HyunLR21,
  author       = {Bongjoon Hyun and
                  Jiwon Lee and
                  Minsoo Rhu},
  title        = {Characterization and Analysis of Deep Learning for 3D Point Cloud
                  Analytics},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {106--109},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3099117},
  doi          = {10.1109/LCA.2021.3099117},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/HyunLR21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JangKKLK21,
  author       = {Yongjoo Jang and
                  Sejin Kim and
                  Daehoon Kim and
                  Sungjin Lee and
                  Jaeha Kung},
  title        = {Deep Partitioned Training From Near-Storage Computing to {DNN} Accelerators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {70--73},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3081752},
  doi          = {10.1109/LCA.2021.3081752},
  timestamp    = {Thu, 27 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JangKKLK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KalaniP21,
  author       = {Neelu Shivprakash Kalani and
                  Biswabandan Panda},
  title        = {Instruction Criticality Based Energy-Efficient Hardware Data Prefetching},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {146--149},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3117005},
  doi          = {10.1109/LCA.2021.3117005},
  timestamp    = {Sat, 08 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KalaniP21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KasanK21,
  author       = {Hans Kasan and
                  John Kim},
  title        = {The Case for Dynamic Bias in Global Adaptive Routing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {38--41},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3061408},
  doi          = {10.1109/LCA.2021.3061408},
  timestamp    = {Thu, 26 Sep 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KasanK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimJK21,
  author       = {Jiho Kim and
                  Myoungsoo Jung and
                  John Kim},
  title        = {Decoupled {SSD:} Reducing Data Movement on NAND-Based Flash {SSD}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {150--153},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3118688},
  doi          = {10.1109/LCA.2021.3118688},
  timestamp    = {Thu, 26 Sep 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimJK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimLCA21,
  author       = {Hweesoo Kim and
                  Sunjung Lee and
                  Jaewan Choi and
                  Jung Ho Ahn},
  title        = {Row-Streaming Dataflow Using a Chaining Buffer and Systolic Array+
                  Structure},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {34--37},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3054371},
  doi          = {10.1109/LCA.2021.3054371},
  timestamp    = {Thu, 27 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimLCA21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimLWJ21,
  author       = {Sunghwan Kim and
                  Gyusun Lee and
                  Jiwon Woo and
                  Jinkyu Jeong},
  title        = {Zero-Copying {I/O} Stack for Low-Latency SSDs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {50--53},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3064876},
  doi          = {10.1109/LCA.2021.3064876},
  timestamp    = {Thu, 29 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimLWJ21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimPLRA21,
  author       = {Byeongho Kim and
                  Jaehyun Park and
                  Eojin Lee and
                  Minsoo Rhu and
                  Jung Ho Ahn},
  title        = {TRiM: Tensor Reduction in Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {5--8},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2020.3042805},
  doi          = {10.1109/LCA.2020.3042805},
  timestamp    = {Thu, 27 Jul 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimPLRA21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KumarYP21,
  author       = {Pratik Kumar and
                  Chavhan Sujeet Yashavant and
                  Biswabandan Panda},
  title        = {{DAMARU:} {A} Denial-of-Service Attack on Randomized Last-Level Caches},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {138--141},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3112180},
  doi          = {10.1109/LCA.2021.3112180},
  timestamp    = {Wed, 03 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KumarYP21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KwonPPK21,
  author       = {Hyoukjun Kwon and
                  Michael Pellauer and
                  Angshuman Parashar and
                  Tushar Krishna},
  title        = {Flexion: {A} Quantitative Metric for Flexibility in {DNN} Accelerators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {1--4},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2020.3044607},
  doi          = {10.1109/LCA.2020.3044607},
  timestamp    = {Tue, 23 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KwonPPK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeKLLKLKMK21,
  author       = {Hyeon Gyu Lee and
                  Minwook Kim and
                  Juwon Lee and
                  Eunji Lee and
                  Bryan S. Kim and
                  Sungjin Lee and
                  Yeseong Kim and
                  Sang Lyul Min and
                  Jin{-}Soo Kim},
  title        = {Learned Performance Model for {SSD}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {154--157},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3120728},
  doi          = {10.1109/LCA.2021.3120728},
  timestamp    = {Sun, 06 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LeeKLLKLKMK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeKR21,
  author       = {Yunjae Lee and
                  Youngeun Kwon and
                  Minsoo Rhu},
  title        = {Understanding the Implication of Non-Volatile Memory for Large-Scale
                  Graph Neural Network Training},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {118--121},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3098943},
  doi          = {10.1109/LCA.2021.3098943},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LeeKR21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiLMITKK21,
  author       = {Qian Li and
                  Bin Li and
                  Pietro Mercati and
                  Ramesh Illikkal and
                  Charlie Tai and
                  Michael Kishinevsky and
                  Christos Kozyrakis},
  title        = {{RAMBO:} Resource Allocation for Microservices Using Bayesian Optimization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {46--49},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3066142},
  doi          = {10.1109/LCA.2021.3066142},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiLMITKK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiYYDLYFX21,
  author       = {Han Li and
                  Mingyu Yan and
                  Xiaocheng Yang and
                  Lei Deng and
                  Wenming Li and
                  Xiaochun Ye and
                  Dongrui Fan and
                  Yuan Xie},
  title        = {Hardware Acceleration for GCNs via Bidirectional Fusion},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {66--69},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3077956},
  doi          = {10.1109/LCA.2021.3077956},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiYYDLYFX21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiuHEAE21,
  author       = {Wenjie Liu and
                  Wim Heirman and
                  Stijn Eyerman and
                  Shoaib Akram and
                  Lieven Eeckhout},
  title        = {Scale-Model Simulation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {175--178},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3133112},
  doi          = {10.1109/LCA.2021.3133112},
  timestamp    = {Sat, 08 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiuHEAE21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Munoz-MartinezA21,
  author       = {Francisco Mu{\~{n}}oz{-}Mart{\'{\i}}nez and
                  Jos{\'{e}} L. Abell{\'{a}}n and
                  Manuel E. Acacio and
                  Tushar Krishna},
  title        = {{STONNE:} Enabling Cycle-Level Microarchitectural Simulation for {DNN}
                  Inference Accelerators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {122--125},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3097253},
  doi          = {10.1109/LCA.2021.3097253},
  timestamp    = {Wed, 03 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Munoz-MartinezA21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NabavinejadR21,
  author       = {Seyed Morteza Nabavinejad and
                  Sherief Reda},
  title        = {BayesTuner: Leveraging Bayesian Optimization For {DNN} Inference Configuration
                  Selection},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {166--170},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3123695},
  doi          = {10.1109/LCA.2021.3123695},
  timestamp    = {Sat, 08 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/NabavinejadR21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NavarroPS21,
  author       = {Marta Navarro and
                  Lucia Pons and
                  Julio Sahuquillo},
  title        = {Hy-Sched: {A} Simple Hyperthreading-Aware Thread to Core Allocation
                  Strategy},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {26--29},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3051393},
  doi          = {10.1109/LCA.2021.3051393},
  timestamp    = {Tue, 05 Nov 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/NavarroPS21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Perais21,
  author       = {Arthur Perais},
  title        = {A Case for Speculative Strength Reduction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {22--25},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2020.3048694},
  doi          = {10.1109/LCA.2020.3048694},
  timestamp    = {Tue, 02 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Perais21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ReschCK21,
  author       = {Salonik Resch and
                  M. H{\"{u}}srev Cilasun and
                  Ulya R. Karpuzcu},
  title        = {Cryogenic {PIM:} Challenges {\&} Opportunities},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {74--77},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3077536},
  doi          = {10.1109/LCA.2021.3077536},
  timestamp    = {Tue, 13 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ReschCK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ReschTKQ21,
  author       = {Salonik Resch and
                  Swamit S. Tannu and
                  Ulya R. Karpuzcu and
                  Moinuddin K. Qureshi},
  title        = {A Day In the Life of a Quantum Error},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {13--16},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2020.3045628},
  doi          = {10.1109/LCA.2020.3045628},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ReschTKQ21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RuckerSO21,
  author       = {Alexander Rucker and
                  Muhammad Shahbaz and
                  Kunle Olukotun},
  title        = {Chopping off the Tail: Bounded Non-Determinism for Real-Time Accelerators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {110--113},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3102224},
  doi          = {10.1109/LCA.2021.3102224},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RuckerSO21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SarkarSVS21,
  author       = {Arindam Sarkar and
                  Newton Singh and
                  Varun Venkitaraman and
                  Virendra Singh},
  title        = {{DAM:} Deadblock Aware Migration Techniques for STT-RAM-Based Hybrid
                  Caches},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {62--65},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3071717},
  doi          = {10.1109/LCA.2021.3071717},
  timestamp    = {Tue, 13 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SarkarSVS21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShahSSBB21,
  author       = {Parth Shah and
                  Ranjal Gautham Shenoy and
                  Vaidyanathan Srinivasan and
                  Pradip Bose and
                  Alper Buyuktosunoglu},
  title        = {TokenSmart: Distributed, Scalable Power Management in the Many-Core
                  Era},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {42--45},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3064441},
  doi          = {10.1109/LCA.2021.3064441},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ShahSSBB21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShanK21,
  author       = {Mohsin Shan and
                  Omer Khan},
  title        = {Accelerating Concurrent Priority Scheduling Using Adaptive in-Hardware
                  Task Distribution in Multicores},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {17--21},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2020.3045670},
  doi          = {10.1109/LCA.2020.3045670},
  timestamp    = {Tue, 02 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShanK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShoghiBQK21,
  author       = {Nima Shoghi and
                  Andrei Bersatti and
                  Moinuddin K. Qureshi and
                  Hyesoon Kim},
  title        = {SmaQ: Smart Quantization for {DNN} Training by Exploiting Value Clustering},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {126--129},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3108505},
  doi          = {10.1109/LCA.2021.3108505},
  timestamp    = {Wed, 03 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShoghiBQK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SuHJW21,
  author       = {Jiya Su and
                  Linfeng He and
                  Peng Jiang and
                  Rujia Wang},
  title        = {Exploring {PIM} Architecture for High-Performance Graph Pattern Mining},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {114--117},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3103665},
  doi          = {10.1109/LCA.2021.3103665},
  timestamp    = {Mon, 25 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SuHJW21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TanNDLC21,
  author       = {Tian Tan and
                  Eriko Nurvitadhi and
                  Aravind Dasu and
                  Martin Langhammer and
                  Derek Chiou},
  title        = {FlexScore: Quantifying Flexibility},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {58--61},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3076413},
  doi          = {10.1109/LCA.2021.3076413},
  timestamp    = {Tue, 13 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/TanNDLC21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Volos21,
  author       = {Haris Volos},
  title        = {The Case for Replication-Aware Memory-Error Protection in Disaggregated
                  Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {130--133},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3110439},
  doi          = {10.1109/LCA.2021.3110439},
  timestamp    = {Fri, 05 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Volos21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangXZGWKT21,
  author       = {Lei Wang and
                  Xingwang Xiong and
                  Jianfeng Zhan and
                  Wanling Gao and
                  Xu Wen and
                  Guoxin Kang and
                  Fei Tang},
  title        = {{WPC:} Whole-Picture Workload Characterization Across Intermediate
                  Representation, ISA, and Microarchitecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {86--89},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3087828},
  doi          = {10.1109/LCA.2021.3087828},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WangXZGWKT21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WuTSW21,
  author       = {Benjamin Wu and
                  Trishita Tiwari and
                  G. Edward Suh and
                  Aaron B. Wagner},
  title        = {Guessing Outputs of Dynamically Pruned CNNs Using Memory Access Patterns},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {98--101},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3101505},
  doi          = {10.1109/LCA.2021.3101505},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WuTSW21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YooSLKKL21,
  author       = {Mingi Yoo and
                  Jaeyong Song and
                  Jounghoo Lee and
                  Namhyung Kim and
                  Youngsok Kim and
                  Jinho Lee},
  title        = {Making a Better Use of Caches for {GCN} Accelerators with Feature
                  Slicing and Automatic Tile Morphing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {2},
  pages        = {102--105},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3090954},
  doi          = {10.1109/LCA.2021.3090954},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YooSLKKL21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YuLK21,
  author       = {Chao Yu and
                  Sihang Liu and
                  Samira Manabi Khan},
  title        = {MultiPIM: {A} Detailed and Configurable Multi-Stack Processing-In-Memory
                  Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {20},
  number       = {1},
  pages        = {54--57},
  year         = {2021},
  url          = {https://doi.org/10.1109/LCA.2021.3061905},
  doi          = {10.1109/LCA.2021.3061905},
  timestamp    = {Thu, 09 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YuLK21.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BoddunaGSVR20,
  author       = {Rahul Bodduna and
                  Vinod Ganesan and
                  Patanjali SLPSK and
                  Kamakoti Veezhinathan and
                  Chester Rebeiro},
  title        = {Brutus: Refuting the Security Claims of the Cache Timing Randomization
                  Countermeasure Proposed in {CEASER}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {9--12},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2964212},
  doi          = {10.1109/LCA.2020.2964212},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/BoddunaGSVR20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CavusSSU20,
  author       = {Mustafa Cavus and
                  Mohammed Shatnawi and
                  Resit Sendag and
                  Augustus K. Uht},
  title        = {Exploring Prefetching, Pre-Execution and Branch Outcome Streaming
                  for In-Memory Database Lookups},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {5--8},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2019.2959982},
  doi          = {10.1109/LCA.2019.2959982},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/CavusSSU20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CheYAW20,
  author       = {Yuezhi Che and
                  Yuanzhou Yang and
                  Amro Awad and
                  Rujia Wang},
  title        = {A Lightweight Memory Access Pattern Obfuscation Framework for {NVM}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {163--166},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3041484},
  doi          = {10.1109/LCA.2020.3041484},
  timestamp    = {Thu, 11 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/CheYAW20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChoeKA20,
  author       = {Wonkyo Choe and
                  Jonghyeon Kim and
                  Jeongseob Ahn},
  title        = {A Study of Memory Placement on Hardware-Assisted Tiered Memory Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {122--125},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3015613},
  doi          = {10.1109/LCA.2020.3015613},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ChoeKA20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChowdhuryKZMBK20,
  author       = {Zamshed I. Chowdhury and
                  S. Karen Khatamifard and
                  Zhaoyong Zheng and
                  Tali Moreshet and
                  R. Iris Bahar and
                  Ulya R. Karpuzcu},
  title        = {Voltage Noise Mitigation With Barrier Approximation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {155--158},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3040088},
  doi          = {10.1109/LCA.2020.3040088},
  timestamp    = {Thu, 11 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChowdhuryKZMBK20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChuTLXW20,
  author       = {Zhufei Chu and
                  Huiming Tian and
                  Zeqiang Li and
                  Yinshui Xia and
                  Lun{-}Yao Wang},
  title        = {A High-Performance Design of Generalized Pipeline Cellular Array},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {47--50},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2986197},
  doi          = {10.1109/LCA.2020.2986197},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ChuTLXW20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DesaiL20,
  author       = {Harsh Desai and
                  Brandon Lucia},
  title        = {A Power-Aware Heterogeneous Architecture Scaling Model for Energy-Harvesting
                  Computers},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {68--71},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2989440},
  doi          = {10.1109/LCA.2020.2989440},
  timestamp    = {Sat, 19 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/DesaiL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/EyermanHSH20,
  author       = {Stijn Eyerman and
                  Wim Heirman and
                  Sam Van den Steen and
                  Ibrahim Hur},
  title        = {Breaking In-Order Branch Miss Recovery},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {30--33},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2980277},
  doi          = {10.1109/LCA.2020.2980277},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/EyermanHSH20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GolshanBSALS20,
  author       = {Fatemeh Golshan and
                  Mohammad Bakhshalipour and
                  Mehran Shakerinava and
                  Ali Ansari and
                  Pejman Lotfi{-}Kamran and
                  Hamid Sarbazi{-}Azad},
  title        = {Harnessing Pairwise-Correlating Data Prefetching With Runahead Metadata},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {130--133},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3019343},
  doi          = {10.1109/LCA.2020.3019343},
  timestamp    = {Sat, 14 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GolshanBSALS20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GuLHMCX20,
  author       = {Peng Gu and
                  Benjamin S. Lim and
                  Wenqin Huangfu and
                  Krishna T. Malladi and
                  Andrew Chang and
                  Yuan Xie},
  title        = {NMTSim: Transaction-Command Based Simulator for New Memory Technology
                  Devices},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {76--79},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2995167},
  doi          = {10.1109/LCA.2020.2995167},
  timestamp    = {Mon, 18 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/GuLHMCX20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ImKWOKL20,
  author       = {Junsu Im and
                  Hanbyeol Kim and
                  Yumin Won and
                  Jiho Oh and
                  Minjae Kim and
                  Sungjin Lee},
  title        = {Probability-Based Address Translationfor Flash SSDs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {97--100},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3006529},
  doi          = {10.1109/LCA.2020.3006529},
  timestamp    = {Sat, 17 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ImKWOKL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IshiiLNS20,
  author       = {Yasuo Ishii and
                  Jaekyu Lee and
                  Krishnendra Nathella and
                  Dam Sunwoo},
  title        = {Rebasing Instruction Prefetching: An Industry Perspective},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {147--150},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3035068},
  doi          = {10.1109/LCA.2020.3035068},
  timestamp    = {Thu, 11 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/IshiiLNS20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JahanshahiSLW20,
  author       = {Ali Jahanshahi and
                  Hadi Zamani Sabzi and
                  Chester Lau and
                  Daniel Wong},
  title        = {{GPU-NEST:} Characterizing Energy Efficiency of Multi-GPU Inference
                  Servers},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {139--142},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3023723},
  doi          = {10.1109/LCA.2020.3023723},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JahanshahiSLW20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KangPKK20,
  author       = {Ki{-}Dong Kang and
                  Gyeongseo Park and
                  Nam Sung Kim and
                  Daehoon Kim},
  title        = {Network Packet Processing Mode-Aware Power Management for Data Center
                  Servers},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {1--4},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2019.2926079},
  doi          = {10.1109/LCA.2019.2926079},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KangPKK20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKL20,
  author       = {Minsub Kim and
                  Jaeha Kung and
                  Sungjin Lee},
  title        = {Towards Scalable Analytics with Inference-Enabled Solid-State Drives},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {13--17},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2019.2930590},
  doi          = {10.1109/LCA.2019.2930590},
  timestamp    = {Tue, 20 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimKL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KrishnanWBWFWBR20,
  author       = {Srivatsan Krishnan and
                  Zishen Wan and
                  Kshitij Bhardwaj and
                  Paul N. Whatmough and
                  Aleksandra Faust and
                  Gu{-}Yeon Wei and
                  David Brooks and
                  Vijay Janapa Reddi},
  title        = {The Sky Is Not the Limit: {A} Visual Performance Model for Cyber-Physical
                  Co-Design in Autonomous Machines},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {38--42},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2981022},
  doi          = {10.1109/LCA.2020.2981022},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KrishnanWBWFWBR20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KumarCBMJVR20,
  author       = {Chanchal Kumar and
                  Aayush Chaudhary and
                  Shubham Bhawalkar and
                  Utkarsh Mathur and
                  Saransh Jain and
                  Adith Vastrad and
                  Eric Rotenberg},
  title        = {Post-Silicon Microarchitecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {26--29},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2978841},
  doi          = {10.1109/LCA.2020.2978841},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KumarCBMJVR20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LachtarEBM20,
  author       = {Nada Lachtar and
                  Abdulrahman Abu Elkhail and
                  Anys Bacha and
                  Hafiz Malik},
  title        = {A Cross-Stack Approach Towards Defending Against Cryptojacking},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {126--129},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3017457},
  doi          = {10.1109/LCA.2020.3017457},
  timestamp    = {Sat, 14 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LachtarEBM20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LaiCHL20,
  author       = {Bo{-}Cheng Lai and
                  Chun{-}Yen Chen and
                  Yi{-}Da Hsin and
                  Bo{-}Yen Lin},
  title        = {A Two-Directional BigData Sorting Architecture on FPGAs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {72--75},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2993040},
  doi          = {10.1109/LCA.2020.2993040},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LaiCHL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LazarevAXZD20,
  author       = {Nikita Lazarev and
                  Neil Adit and
                  Shaojie Xiang and
                  Zhiru Zhang and
                  Christina Delimitrou},
  title        = {Dagger: Towards Efficient RPCs in Cloud Microservices With Near-Memory
                  Reconfigurable NICs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {134--138},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3020064},
  doi          = {10.1109/LCA.2020.3020064},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LazarevAXZD20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeZRKZK20,
  author       = {Joo Hwan Lee and
                  Hui Zhang and
                  Veronica Lagrange Moutinho dos Reis and
                  Praveen Krishnamoorthy and
                  Xiaodong Zhao and
                  Yang{-}Seok Ki},
  title        = {SmartSSD: {FPGA} Accelerated Near-Storage Data Analytics on {SSD}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {114--117},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3009347},
  doi          = {10.1109/LCA.2020.3009347},
  timestamp    = {Wed, 06 Jul 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LeeZRKZK20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiG20,
  author       = {Congmiao Li and
                  Jean{-}Luc Gaudiot},
  title        = {Challenges in Detecting an "Evasive Spectre"},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {18--21},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2976069},
  doi          = {10.1109/LCA.2020.2976069},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LiG20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiYRSJ20,
  author       = {Shang Li and
                  Zhiyuan Yang and
                  Dhiraj Reddy and
                  Ankur Srivastava and
                  Bruce L. Jacob},
  title        = {DRAMsim3: {A} Cycle-Accurate, Thermal-Capable {DRAM} Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {110--113},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2973991},
  doi          = {10.1109/LCA.2020.2973991},
  timestamp    = {Thu, 17 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiYRSJ20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiuWM20,
  author       = {Zhi Gang Liu and
                  Paul N. Whatmough and
                  Matthew Mattina},
  title        = {Systolic Tensor Array: An Efficient Structured-Sparse {GEMM} Accelerator
                  for Mobile {CNN} Inference},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {34--37},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2979965},
  doi          = {10.1109/LCA.2020.2979965},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LiuWM20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MasonDSG20,
  author       = {Tony Mason and
                  Thaleia Dimitra Doudali and
                  Margo I. Seltzer and
                  Ada Gavrilovska},
  title        = {Unexpected Performance of Intel{\textregistered} Optane{\texttrademark}
                  {DC} Persistent Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {55--58},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2987303},
  doi          = {10.1109/LCA.2020.2987303},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MasonDSG20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Michaud20,
  author       = {Pierre Michaud},
  title        = {Exploiting Thermal Transients With Deterministic Turbo Clock Frequency},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {43--46},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2983920},
  doi          = {10.1109/LCA.2020.2983920},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Michaud20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MikhailenkoNFI20,
  author       = {Darya Mikhailenko and
                  Yujin Nakamoto and
                  Ben Feinberg and
                  Engin Ipek},
  title        = {Adapting In Situ Accelerators for Sparsity with Granular Matrix Reordering},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {143--146},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3031907},
  doi          = {10.1109/LCA.2020.3031907},
  timestamp    = {Thu, 17 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MikhailenkoNFI20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MirosanlouGHP20,
  author       = {Reza Mirosanlou and
                  Danlu Guo and
                  Mohamed Hassan and
                  Rodolfo Pellizzoni},
  title        = {MCsim: An Extensible {DRAM} Memory Controller Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {105--109},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3008288},
  doi          = {10.1109/LCA.2020.3008288},
  timestamp    = {Sun, 06 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MirosanlouGHP20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NewtonSC20,
  author       = {Newton and
                  Virendra Singh and
                  Trevor E. Carlson},
  title        = {PIM-GraphSCC: PIM-Based Graph Processing Using Graph's Community Structures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {151--154},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3039498},
  doi          = {10.1109/LCA.2020.3039498},
  timestamp    = {Thu, 11 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/NewtonSC20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RezaeiMASMD20,
  author       = {Seyyed Hossein Seyyedaghaei Rezaei and
                  Mehdi Modarressi and
                  Rachata Ausavarungnirun and
                  Mohammad Sadrosadati and
                  Onur Mutlu and
                  Masoud Daneshtalab},
  title        = {NoM: Network-on-Memory for Inter-Bank Data Transfer in Highly-Banked
                  Memories},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {80--83},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2990599},
  doi          = {10.1109/LCA.2020.2990599},
  timestamp    = {Thu, 23 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/RezaeiMASMD20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RosJ20,
  author       = {Alberto Ros and
                  Alexandra Jimborean},
  title        = {The Entangling Instruction Prefetcher},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {84--87},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3002947},
  doi          = {10.1109/LCA.2020.3002947},
  timestamp    = {Wed, 31 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RosJ20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SadrediniRS20,
  author       = {Elaheh Sadredini and
                  Reza Rahimi and
                  Kevin Skadron},
  title        = {Enabling In-SRAM Pattern Processing With Low-Overhead Reporting Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {167--170},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3042194},
  doi          = {10.1109/LCA.2020.3042194},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SadrediniRS20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SamaraT20,
  author       = {Ahmed Samara and
                  James Tuck},
  title        = {The Case for Domain-Specialized Branch Predictors for Graph-Processing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {101--104},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3005895},
  doi          = {10.1109/LCA.2020.3005895},
  timestamp    = {Tue, 23 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SamaraT20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SartorKAOM20,
  author       = {Anderson L. Sartor and
                  Anish Krishnakumar and
                  Samet E. Arda and
                  {\"{U}}mit Y. Ogras and
                  Radu Marculescu},
  title        = {HiLITE: Hierarchical and Lightweight Imitation Learning for Power
                  Management of Embedded SoCs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {63--67},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2992182},
  doi          = {10.1109/LCA.2020.2992182},
  timestamp    = {Sat, 19 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SartorKAOM20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SharifiRH20,
  author       = {Ferdous Sharifi and
                  Nezam Rohbani and
                  Shaahin Hessabi},
  title        = {Aging-Aware Context Switching in Multicore Processors Based on Workload
                  Classification},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {159--162},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3040326},
  doi          = {10.1109/LCA.2020.3040326},
  timestamp    = {Thu, 11 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SharifiRH20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SinghRLM20,
  author       = {Rahul Singh and
                  Gokul Subramanian Ravi and
                  Mikko H. Lipasti and
                  Joshua San Miguel},
  title        = {Value Locality Based Approximation With {ODIN}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {88--91},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3002542},
  doi          = {10.1109/LCA.2020.3002542},
  timestamp    = {Sat, 14 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SinghRLM20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SutradharCBDIG20,
  author       = {Purab Ranjan Sutradhar and
                  Mark Connolly and
                  Sathwika Bavikadi and
                  Sai Manoj Pudukotai Dinakarrao and
                  Mark A. Indovina and
                  Amlan Ganguly},
  title        = {pPIM: {A} Programmable Processor-in-Memory Architecture With Precision-Scaling
                  for Deep Learning},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {118--121},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3011643},
  doi          = {10.1109/LCA.2020.3011643},
  timestamp    = {Mon, 25 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SutradharCBDIG20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YanCDYZFX20,
  author       = {Mingyu Yan and
                  Zhaodong Chen and
                  Lei Deng and
                  Xiaochun Ye and
                  Zhimin Zhang and
                  Dongrui Fan and
                  Yuan Xie},
  title        = {Characterizing and Understanding GCNs on {GPU}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {22--25},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2970395},
  doi          = {10.1109/LCA.2020.2970395},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YanCDYZFX20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangKHKKJ20,
  author       = {Jie Zhang and
                  Miryeong Kwon and
                  Sanghyun Han and
                  Nam Sung Kim and
                  Mahmut T. Kandemir and
                  Myoungsoo Jung},
  title        = {FastDrain: Removing Page Victimization Overheads in NVMe Storage Stack},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {2},
  pages        = {92--96},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.3005507},
  doi          = {10.1109/LCA.2020.3005507},
  timestamp    = {Sat, 14 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhangKHKKJ20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangLMMLG20,
  author       = {Zhihui Zhang and
                  Jingwen Leng and
                  Lingxiao Ma and
                  Youshan Miao and
                  Chao Li and
                  Minyi Guo},
  title        = {Architectural Implications of Graph Neural Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {59--62},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2988991},
  doi          = {10.1109/LCA.2020.2988991},
  timestamp    = {Thu, 16 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ZhangLMMLG20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhuBACMKRGL20,
  author       = {Lingjun Zhu and
                  Lennart Bamberg and
                  Anthony Agnesina and
                  Francky Catthoor and
                  Dragomir Milojevic and
                  Manu Komalan and
                  Julien Ryckaert and
                  Alberto Garc{\'{\i}}a{-}Ortiz and
                  Sung Kyu Lim},
  title        = {Heterogeneous 3D Integration for a {RISC-V} System With {STT-MRAM}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {19},
  number       = {1},
  pages        = {51--54},
  year         = {2020},
  url          = {https://doi.org/10.1109/LCA.2020.2992644},
  doi          = {10.1109/LCA.2020.2992644},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ZhuBACMKRGL20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AgrawalDSFH19,
  author       = {Varun Agrawal and
                  Mina Abbasi Dinani and
                  Yuxuan Shui and
                  Michael Ferdman and
                  Nima Honarmand},
  title        = {Massively Parallel Server Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {75--78},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2911287},
  doi          = {10.1109/LCA.2019.2911287},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AgrawalDSFH19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AkinA19,
  author       = {Berkin Akin and
                  Alaa R. Alameldeen},
  title        = {A Case For Asymmetric Processing in Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {22--25},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2894800},
  doi          = {10.1109/LCA.2019.2894800},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AkinA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AnsariLS19,
  author       = {Ali Ansari and
                  Pejman Lotfi{-}Kamran and
                  Hamid Sarbazi{-}Azad},
  title        = {Code Layout Optimization for Near-Ideal Instruction Cache},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {124--127},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2924429},
  doi          = {10.1109/LCA.2019.2924429},
  timestamp    = {Wed, 26 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AnsariLS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ArafaBCSE19,
  author       = {Yehia Arafa and
                  Abdel{-}Hameed A. Badawy and
                  Gopinath Chennupati and
                  Nandakishore Santhi and
                  Stephan J. Eidenbenz},
  title        = {{PPT-GPU:} Scalable {GPU} Performance Modeling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  pages        = {55--58},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2904497},
  doi          = {10.1109/LCA.2019.2904497},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ArafaBCSE19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BalajiSDDKKC19,
  author       = {Adarsha Balaji and
                  Shihao Song and
                  Anup Das and
                  Nikil D. Dutt and
                  Jeff Krichmar and
                  Nagarajan Kandasamy and
                  Francky Catthoor},
  title        = {A Framework to Explore Workload-Specific Performance and Lifetime
                  Trade-offs in Neuromorphic Computing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {149--152},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2951507},
  doi          = {10.1109/LCA.2019.2951507},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BalajiSDDKKC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BarberBZZT19,
  author       = {Kristin Barber and
                  Anys Bacha and
                  Li Zhou and
                  Yinqian Zhang and
                  Radu Teodorescu},
  title        = {Isolating Speculative Data to Prevent Transient Execution Attacks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {178--181},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2916328},
  doi          = {10.1109/LCA.2019.2916328},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BarberBZZT19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BhardwajH0BHW19,
  author       = {Kshitij Bhardwaj and
                  Marton Havasi and
                  Yuan Yao and
                  David M. Brooks and
                  Jos{\'{e}} Miguel Hern{\'{a}}ndez{-}Lobato and
                  Gu{-}Yeon Wei},
  title        = {Determining Optimal Coherency Interface for Many-Accelerator SoCs
                  Using Bayesian Optimization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {119--123},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2910521},
  doi          = {10.1109/LCA.2019.2910521},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BhardwajH0BHW19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DenbyL19,
  author       = {Bradley Denby and
                  Brandon Lucia},
  title        = {Orbital Edge Computing: Machine Inference in Space},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  pages        = {59--62},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2907539},
  doi          = {10.1109/LCA.2019.2907539},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DenbyL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GanQLZ19,
  author       = {Yiming Gan and
                  Yuxian Qiu and
                  Jingwen Leng and
                  Yuhao Zhu},
  title        = {SVSoC: Speculative Vision Systems-on-a-Chip},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {47--50},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2903241},
  doi          = {10.1109/LCA.2019.2903241},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GanQLZ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GolestaniGS19,
  author       = {Hossein Golestani and
                  Gagan Gupta and
                  Rathijit Sen},
  title        = {Performance Modeling and Bottleneck Analysis of {EDGE} Processors
                  Using Dependence Graphs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {79--82},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2911514},
  doi          = {10.1109/LCA.2019.2911514},
  timestamp    = {Sat, 06 Jul 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/GolestaniGS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GuptaMMCO19,
  author       = {Ujjwal Gupta and
                  Sumit K. Mandal and
                  Manqing Mao and
                  Chaitali Chakrabarti and
                  {\"{U}}mit Y. Ogras},
  title        = {A Deep Q-Learning Approach for Dynamic Management of Heterogeneous
                  Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {14--17},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2892151},
  doi          = {10.1109/LCA.2019.2892151},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GuptaMMCO19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IliakisXS19,
  author       = {Konstantinos Iliakis and
                  Sotirios Xydis and
                  Dimitrios Soudris},
  title        = {{LOOG:} Improving {GPU} Efficiency With Light-Weight Out-Of-Order
                  Execution},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {166--169},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2951161},
  doi          = {10.1109/LCA.2019.2951161},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/IliakisXS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JeonEAWE19,
  author       = {Hyeran Jeon and
                  Hodjat Asghari Esfeden and
                  Nael B. Abu{-}Ghazaleh and
                  Daniel Wong and
                  Sindhuja Elango},
  title        = {Locality-Aware {GPU} Register File},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {153--156},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2959298},
  doi          = {10.1109/LCA.2019.2959298},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JeonEAWE19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhanHBPC19,
  author       = {Asif Ali Khan and
                  Fazal Hameed and
                  Robin Bl{\"{a}}sing and
                  Stuart S. P. Parkin and
                  Jer{\'{o}}nimo Castrill{\'{o}}n},
  title        = {RTSim: {A} Cycle-Accurate Simulator for Racetrack Memories},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {43--46},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2899306},
  doi          = {10.1109/LCA.2019.2899306},
  timestamp    = {Mon, 16 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KhanHBPC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimCPJP19,
  author       = {Jiho Kim and
                  Jehee Cha and
                  Jason Jong Kyu Park and
                  Dongsuk Jeon and
                  Yongjun Park},
  title        = {Improving {GPU} Multitasking Efficiency Using Dynamic Resource Sharing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {1--5},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2018.2889042},
  doi          = {10.1109/LCA.2018.2889042},
  timestamp    = {Mon, 07 Feb 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimCPJP19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimJSLL19,
  author       = {Sunwoong Kim and
                  Hyunmin Jung and
                  Woojae Shin and
                  Hyokeun Lee and
                  Hyuk{-}Jae Lee},
  title        = {{HAD-TWL:} Hot Address Detection-Based Wear Leveling for Phase-Change
                  Memory Systems with Low Latency},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {107--110},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2929393},
  doi          = {10.1109/LCA.2019.2929393},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimJSLL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KommareddyZYEA19,
  author       = {Vamsee Reddy Kommareddy and
                  Baogang Zhang and
                  Fan Yao and
                  Rickard Ewetz and
                  Amro Awad},
  title        = {Are Crossbar Memories Secure? New Security Vulnerabilities in Crossbar
                  Memories},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {174--177},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2952111},
  doi          = {10.1109/LCA.2019.2952111},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KommareddyZYEA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KumarSB19,
  author       = {Chanchal Kumar and
                  Sidharth Singh and
                  Gregory T. Byrd},
  title        = {Hybrid Remote Access Protocol},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {30--33},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2896116},
  doi          = {10.1109/LCA.2019.2896116},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KumarSB19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeKK19,
  author       = {Seunghak Lee and
                  Nam Sung Kim and
                  Daehoon Kim},
  title        = {Exploiting OS-Level Memory Offlining for {DRAM} Power Management},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {141--144},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2942914},
  doi          = {10.1109/LCA.2019.2942914},
  timestamp    = {Wed, 26 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LeeKK19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LengBBBR19,
  author       = {Jingwen Leng and
                  Alper Buyuktosunoglu and
                  Ramon Bertran and
                  Pradip Bose and
                  Vijay Janapa Reddi},
  title        = {Asymmetric Resilience for Accelerator-Rich Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {83--86},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2917898},
  doi          = {10.1109/LCA.2019.2917898},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LengBBBR19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiYSJXCFKMG19,
  author       = {Chen Li and
                  Jun Yang and
                  Yifan Sun and
                  Lingling Jin and
                  Lingjie Xu and
                  Zheng Cao and
                  Pengfei Fan and
                  David R. Kaeli and
                  Sheng Ma and
                  Yang Guo},
  title        = {Priority-Based PCIe Scheduling for Multi-Tenant Multi-GPU Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {157--160},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2955119},
  doi          = {10.1109/LCA.2019.2955119},
  timestamp    = {Tue, 23 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiYSJXCFKMG19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LinLPC19,
  author       = {Ting{-}Ru Lin and
                  Yunfan Li and
                  Massoud Pedram and
                  Lizhong Chen},
  title        = {Design Space Exploration of Memory Controller Placement in Throughput
                  Processors with Deep Learning},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {51--54},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2905587},
  doi          = {10.1109/LCA.2019.2905587},
  timestamp    = {Thu, 29 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LinLPC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiuHZ19,
  author       = {He Liu and
                  Jianhui Han and
                  Youhui Zhang},
  title        = {A Unified Framework for Training, Mapping and Simulation of ReRAM-Based
                  Convolutional Neural Network Acceleration},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  pages        = {63--66},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2908374},
  doi          = {10.1109/LCA.2019.2908374},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiuHZ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MarinakisA19,
  author       = {Theodoros Marinakis and
                  Iraklis Anagnostopoulos},
  title        = {Performance and Fairness Improvement on CMPs Considering Bandwidth
                  and Cache Utilization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {145--148},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2944810},
  doi          = {10.1109/LCA.2019.2944810},
  timestamp    = {Wed, 26 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MarinakisA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MasourosXS19,
  author       = {Dimosthenis Masouros and
                  Sotirios Xydis and
                  Dimitrios Soudris},
  title        = {Rusty: Runtime System Predictability Leveraging {LSTM} Neural Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {103--106},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2924622},
  doi          = {10.1109/LCA.2019.2924622},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MasourosXS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MatsuoSA19,
  author       = {Reoma Matsuo and
                  Ryota Shioya and
                  Hideki Ando},
  title        = {Improving the Instruction Fetch Throughput with Dynamically Configuring
                  the Fetch Pipeline},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {170--173},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2952592},
  doi          = {10.1109/LCA.2019.2952592},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MatsuoSA19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NabavinejadHR19,
  author       = {Seyed Morteza Nabavinejad and
                  Hassan Hafez{-}Kolahi and
                  Sherief Reda},
  title        = {Coordinated {DVFS} and Precision Control for Deep Neural Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {136--140},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2942020},
  doi          = {10.1109/LCA.2019.2942020},
  timestamp    = {Wed, 26 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/NabavinejadHR19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NaithaniFAE19,
  author       = {Ajeya Naithani and
                  Josu{\'{e}} Feliu and
                  Almutaz Adileh and
                  Lieven Eeckhout},
  title        = {Precise Runahead Execution},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {71--74},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2910518},
  doi          = {10.1109/LCA.2019.2910518},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/NaithaniFAE19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RanganathASW19,
  author       = {Kiran Ranganath and
                  AmirAli Abdolrashidi and
                  Shuaiwen Leon Song and
                  Daniel Wong},
  title        = {Speeding up Collective Communications Through Inter-GPU Re-Routing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {128--131},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2933842},
  doi          = {10.1109/LCA.2019.2933842},
  timestamp    = {Wed, 26 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/RanganathASW19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RaoADZ19,
  author       = {Jinli Rao and
                  Tianyong Ao and
                  Kui Dai and
                  Xuecheng Zou},
  title        = {{ARCE:} Towards Code Pointer Integrity on Embedded Processors Using
                  Architecture-Assisted Run-Time Metadata Management},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {115--118},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2935445},
  doi          = {10.1109/LCA.2019.2935445},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RaoADZ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RogersSRT19,
  author       = {Samuel Rogers and
                  Joshua Slycord and
                  Ronak Raheja and
                  Hamed Tabkhi},
  title        = {Scalable LLVM-Based Accelerator Modeling in gem5},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {18--21},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2893932},
  doi          = {10.1109/LCA.2019.2893932},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RogersSRT19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SadrediniRVSS19,
  author       = {Elaheh Sadredini and
                  Reza Rahimi and
                  Vaibhav Verma and
                  Mircea Stan and
                  Kevin Skadron},
  title        = {A Scalable and Efficient In-Memory Interconnect Architecture for Automata
                  Processing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {87--90},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2909870},
  doi          = {10.1109/LCA.2019.2909870},
  timestamp    = {Sun, 06 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SadrediniRVSS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShomronHW19,
  author       = {Gil Shomron and
                  Tal Horowitz and
                  Uri C. Weiser},
  title        = {{SMT-SA:} Simultaneous Multithreading in Systolic Arrays},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {99--102},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2924007},
  doi          = {10.1109/LCA.2019.2924007},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShomronHW19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShomronW19,
  author       = {Gil Shomron and
                  Uri C. Weiser},
  title        = {Spatial Correlation and Value Prediction in Convolutional Neural Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {10--13},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2018.2890236},
  doi          = {10.1109/LCA.2018.2890236},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShomronW19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/StowFGIX19,
  author       = {Dylan C. Stow and
                  Amin Farmahini Farahani and
                  Sudhanva Gurumurthi and
                  Michael Ignatowski and
                  Yuan Xie},
  title        = {Power Profiling of Modern Die-Stacked Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {132--135},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2941715},
  doi          = {10.1109/LCA.2019.2941715},
  timestamp    = {Wed, 26 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/StowFGIX19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TanNC19,
  author       = {Tian Tan and
                  Eriko Nurvitadhi and
                  Derek Chiou},
  title        = {Dark Wires and the Opportunities for Reconfigurable Logic},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {67--70},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2909867},
  doi          = {10.1109/LCA.2019.2909867},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/TanNC19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TovletoglouMNK19,
  author       = {Konstantinos Tovletoglou and
                  Lev Mukhanov and
                  Dimitrios S. Nikolopoulos and
                  Georgios Karakonstantis},
  title        = {Shimmer: Implementing a Heterogeneous-Reliability {DRAM} Framework
                  on a Commodity Server},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {26--29},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2893189},
  doi          = {10.1109/LCA.2019.2893189},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/TovletoglouMNK19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangJAWE19,
  author       = {Lu Wang and
                  Magnus Jahre and
                  Almutaz Adileh and
                  Zhiying Wang and
                  Lieven Eeckhout},
  title        = {Modeling Emerging Memory-Divergent {GPU} Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {95--98},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2923618},
  doi          = {10.1109/LCA.2019.2923618},
  timestamp    = {Fri, 02 Oct 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WangJAWE19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangLWZ19,
  author       = {Yicheng Wang and
                  Yang Liu and
                  Peiyun Wu and
                  Zhao Zhang},
  title        = {Detect {DRAM} Disturbance Error by Using Disturbance Bin Counters},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {34--37},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2897299},
  doi          = {10.1109/LCA.2019.2897299},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WangLWZ19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WengLDN19,
  author       = {Jian Weng and
                  Sihao Liu and
                  Vidushi Dadu and
                  Tony Nowatzki},
  title        = {{DAEGEN:} {A} Modular Compiler for Exploring Decoupled Spatial Accelerators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {161--165},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2955456},
  doi          = {10.1109/LCA.2019.2955456},
  timestamp    = {Tue, 12 May 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WengLDN19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XieHGLJX19,
  author       = {Xinfeng Xie and
                  Xing Hu and
                  Peng Gu and
                  Shuangchen Li and
                  Yu Ji and
                  Yuan Xie},
  title        = {NNBench-X: Benchmarking and Understanding Neural Network Workloads
                  for Accelerator Designs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {38--42},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2898196},
  doi          = {10.1109/LCA.2019.2898196},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/XieHGLJX19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XuCWHQL19,
  author       = {Sheng Xu and
                  Xiaoming Chen and
                  Ying Wang and
                  Yinhe Han and
                  Xuehai Qian and
                  Xiaowei Li},
  title        = {PIMSim: {A} Flexible and Detailed Processing-in-Memory Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {1},
  pages        = {6--9},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2018.2885752},
  doi          = {10.1109/LCA.2018.2885752},
  timestamp    = {Tue, 23 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/XuCWHQL19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YasinMB19,
  author       = {Ahmad Yasin and
                  Avi Mendelson and
                  Yosi Ben{-}Asher},
  title        = {Tuning Performance via Metrics with Expectations},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {91--94},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2916408},
  doi          = {10.1109/LCA.2019.2916408},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YasinMB19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhouB19,
  author       = {Huiyang Zhou and
                  Gregory T. Byrd},
  title        = {Quantum Circuits for Dynamic Runtime Assertions in Quantum Computation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {18},
  number       = {2},
  pages        = {111--114},
  year         = {2019},
  url          = {https://doi.org/10.1109/LCA.2019.2935049},
  doi          = {10.1109/LCA.2019.2935049},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhouB19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AjdariPKKK18,
  author       = {Mohammadamin Ajdari and
                  Pyeongsu Park and
                  Dongup Kwon and
                  Joonsung Kim and
                  Jangwoo Kim},
  title        = {A Scalable HW-Based Inline Deduplication for {SSD} Arrays},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {47--50},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2753258},
  doi          = {10.1109/LCA.2017.2753258},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AjdariPKKK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlBarakatGJ18,
  author       = {Laith M. AlBarakat and
                  Paul V. Gratz and
                  Daniel A. Jim{\'{e}}nez},
  title        = {MTB-Fetch: Multithreading Aware Hardware Prefetching for Chip Multiprocessors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {175--178},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2847345},
  doi          = {10.1109/LCA.2018.2847345},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AlBarakatGJ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlmatroodS18,
  author       = {Amjad F. Almatrood and
                  Harpreet Singh},
  title        = {Design of Generalized Pipeline Cellular Array in Quantum-Dot Cellular
                  Automata},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {29--32},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2719021},
  doi          = {10.1109/LCA.2017.2719021},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AlmatroodS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AngstadtWDXKWSS18,
  author       = {Kevin Angstadt and
                  Jack Wadden and
                  Vinh Dang and
                  Ted Xie and
                  Dan Kramp and
                  Westley Weimer and
                  Mircea Stan and
                  Kevin Skadron},
  title        = {MNCaRT: An Open-Source, Multi-Architecture Automata-Processing Research
                  and Execution Ecosystem},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {84--87},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2780105},
  doi          = {10.1109/LCA.2017.2780105},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AngstadtWDXKWSS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BasakHLOX18,
  author       = {Abanti Basak and
                  Xing Hu and
                  Shuangchen Li and
                  Sang Min Oh and
                  Yuan Xie},
  title        = {Exploring Core and Cache Hierarchy Bottlenecks in Graph Processing
                  Workloads},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {197--200},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2864964},
  doi          = {10.1109/LCA.2018.2864964},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BasakHLOX18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChoukseEA18,
  author       = {Esha Choukse and
                  Mattan Erez and
                  Alaa R. Alameldeen},
  title        = {CompressPoints: An Evaluation Methodology for Compressed Memory Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {126--129},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2821163},
  doi          = {10.1109/LCA.2018.2821163},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChoukseEA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChowdhuryHKZLLS18,
  author       = {Zamshed I. Chowdhury and
                  Jonathan D. Harms and
                  S. Karen Khatamifard and
                  Masoud Zabihi and
                  Yang Lv and
                  Andrew Lyle and
                  Sachin S. Sapatnekar and
                  Ulya R. Karpuzcu and
                  Jianping Wang},
  title        = {Efficient In-Memory Processing Using Spintronics},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {42--46},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2751042},
  doi          = {10.1109/LCA.2017.2751042},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ChowdhuryHKZLLS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChristoforidisX18,
  author       = {Eleftherios{-}Iordanis Christoforidis and
                  Sotirios Xydis and
                  Dimitrios Soudris},
  title        = {{CF-TUNE:} Collaborative Filtering Auto-Tuning for Energy Efficient
                  Many-Core Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {25--28},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2716919},
  doi          = {10.1109/LCA.2017.2716919},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChristoforidisX18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DelshadtehraniE18,
  author       = {Leila Delshadtehrani and
                  Schuyler Eldridge and
                  Sadullah Canakci and
                  Manuel Egele and
                  Ajay Joshi},
  title        = {Nile: {A} Programmable Monitoring Coprocessor},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {92--95},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2784416},
  doi          = {10.1109/LCA.2017.2784416},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DelshadtehraniE18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DoD18,
  author       = {Sang Wook Stephen Do and
                  Michel Dubois},
  title        = {Core Reliability: Leveraging Hardware Transactional Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {105--108},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2791433},
  doi          = {10.1109/LCA.2018.2791433},
  timestamp    = {Sat, 04 Dec 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DoD18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DurkovicC18,
  author       = {Srdjan Durkovic and
                  Zoran Cica},
  title        = {Birkhoff-Von Neumann Switch Based on Greedy Scheduling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {13--16},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2707082},
  doi          = {10.1109/LCA.2017.2707082},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DurkovicC18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/EyermanHBH18,
  author       = {Stijn Eyerman and
                  Wim Heirman and
                  Kristof Du Bois and
                  Ibrahim Hur},
  title        = {Multi-Stage {CPI} Stacks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {55--58},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2761751},
  doi          = {10.1109/LCA.2017.2761751},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/EyermanHBH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GanD18,
  author       = {Yu Gan and
                  Christina Delimitrou},
  title        = {The Architectural Implications of Cloud Microservices},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {155--158},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2839189},
  doi          = {10.1109/LCA.2018.2839189},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/GanD18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HadjilambrouDAS18,
  author       = {Zacharias Hadjilambrou and
                  Shidhartha Das and
                  Marco A. Antoniades and
                  Yiannakis Sazeides},
  title        = {Sensing {CPU} Voltage Noise Through Electromagnetic Emanations},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {68--71},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2766221},
  doi          = {10.1109/LCA.2017.2766221},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HadjilambrouDAS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Hoseinzadeh18,
  author       = {Morteza Hoseinzadeh},
  title        = {Flow-Based Simulation Methodology},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {51--54},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2756051},
  doi          = {10.1109/LCA.2017.2756051},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Hoseinzadeh18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IliakisXS18,
  author       = {Konstantinos Iliakis and
                  Sotirios Xydis and
                  Dimitrios Soudris},
  title        = {Decoupled MapReduce for Shared-Memory Multi-Core Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {143--146},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2827929},
  doi          = {10.1109/LCA.2018.2827929},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/IliakisXS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IpekLXY18,
  author       = {Engin Ipek and
                  Florian Longnos and
                  Shihai Xiao and
                  Wei Yang},
  title        = {Bit-Level Load Balancing: {A} New Technique for Improving the Write
                  Throughput of Deeply Scaled {STT-MRAM}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {139--142},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2819979},
  doi          = {10.1109/LCA.2018.2819979},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/IpekLXY18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IpekLXY18a,
  author       = {Engin Ipek and
                  Florian Longnos and
                  Shihai Xiao and
                  Wei Yang},
  title        = {Vertical Writes: Closing the Throughput Gap between Deeply Scaled
                  {STT-MRAM} and {DRAM}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {151--154},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2820027},
  doi          = {10.1109/LCA.2018.2820027},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/IpekLXY18a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JeonPC18,
  author       = {Dong{-}Ik Jeon and
                  Kyeong{-}Bin Park and
                  Ki{-}Seok Chung},
  title        = {{HMC-MAC:} Processing-in Memory Architecture for Multiply-Accumulate
                  Operations with Hybrid Memory Cube},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {5--8},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2700298},
  doi          = {10.1109/LCA.2017.2700298},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JeonPC18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JungLRA18,
  author       = {Daejin Jung and
                  Sunjung Lee and
                  Wonjong Rhee and
                  Jung Ho Ahn},
  title        = {Partitioning Compute Units in {CNN} Acceleration for Statistical Memory
                  Traffic Shaping},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {72--75},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2773055},
  doi          = {10.1109/LCA.2017.2773055},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JungLRA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JungZAKSSKK18,
  author       = {Myoungsoo Jung and
                  Jie Zhang and
                  Ahmed H. M. O. Abulila and
                  Miryeong Kwon and
                  Narges Shahidi and
                  John Shalf and
                  Nam Sung Kim and
                  Mahmut T. Kandemir},
  title        = {SimpleSSD: Modeling Solid State Drives for Holistic System Simulation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {37--41},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2750658},
  doi          = {10.1109/LCA.2017.2750658},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JungZAKSSKK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KaliorakisCPG18,
  author       = {Manolis Kaliorakis and
                  Athanasios Chatzidimitriou and
                  George Papadimitriou and
                  Dimitris Gizopoulos},
  title        = {Statistical Analysis of Multicore CPUs Operation in Scaled Voltage
                  Conditions},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {109--112},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2798604},
  doi          = {10.1109/LCA.2018.2798604},
  timestamp    = {Thu, 21 Jan 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KaliorakisCPG18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhatamifardNGKL18,
  author       = {S. Karen Khatamifard and
                  M. Hassan Najafi and
                  Ali Ghoreyshi and
                  Ulya R. Karpuzcu and
                  David J. Lilja},
  title        = {On Memory System Design for Stochastic Computing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {117--121},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2804926},
  doi          = {10.1109/LCA.2018.2804926},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KhatamifardNGKL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhatamifardWKK18,
  author       = {S. Karen Khatamifard and
                  Longfei Wang and
                  Sel{\c{c}}uk K{\"{o}}se and
                  Ulya R. Karpuzcu},
  title        = {A New Class of Covert Channels Exploiting Power Management Vulnerabilities},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {201--204},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2860006},
  doi          = {10.1109/LCA.2018.2860006},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KhatamifardWKK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhoramZL18,
  author       = {Soroosh Khoram and
                  Yue Zha and
                  Jing Li},
  title        = {An Alternative Analytical Approach to Associative Processing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {113--116},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2789424},
  doi          = {10.1109/LCA.2018.2789424},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KhoramZL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKKH18,
  author       = {Seikwon Kim and
                  Wonsang Kwak and
                  Changdae Kim and
                  Jaehyuk Huh},
  title        = {Zebra Refresh: Value Transformation for Zero-Aware {DRAM} Refresh
                  Reduction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {130--133},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2822808},
  doi          = {10.1109/LCA.2018.2822808},
  timestamp    = {Thu, 02 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimKKH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKPKK18,
  author       = {Jihun Kim and
                  Joonsung Kim and
                  Pyeongsu Park and
                  Jong Kim and
                  Jangwoo Kim},
  title        = {{SSD} Performance Modeling Using Bottleneck Analysis},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {80--83},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2779122},
  doi          = {10.1109/LCA.2017.2779122},
  timestamp    = {Thu, 28 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimKPKK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimL18,
  author       = {Chinam Kim and
                  Hyukjun Lee},
  title        = {A High-Bandwidth PCM-Based Memory System for Highly Available {IP}
                  Routing Table Lookup},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {246--249},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2883461},
  doi          = {10.1109/LCA.2018.2883461},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KlineMJ18,
  author       = {Donald Kline Jr. and
                  Rami G. Melhem and
                  Alex K. Jones},
  title        = {Counter Advance for Reliable Encryption in Phase Change Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {209--212},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2861012},
  doi          = {10.1109/LCA.2018.2861012},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KlineMJ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KondguliH18,
  author       = {Sushant Kondguli and
                  Michael C. Huang},
  title        = {Bootstrapping: Using {SMT} Hardware to Improve Single-Thread Performance},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {205--208},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2859945},
  doi          = {10.1109/LCA.2018.2859945},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KondguliH18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KulkarniQD18,
  author       = {Neeraj Kulkarni and
                  Feng Qi and
                  Christina Delimitrou},
  title        = {Leveraging Approximation to Improve Datacenter Resource Efficiency},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {171--174},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2845841},
  doi          = {10.1109/LCA.2018.2845841},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KulkarniQD18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KwonR18,
  author       = {Youngeun Kwon and
                  Minsoo Rhu},
  title        = {A Case for Memory-Centric {HPC} System Architecture for Training Deep
                  Neural Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {134--138},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2823302},
  doi          = {10.1109/LCA.2018.2823302},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KwonR18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeLSA18,
  author       = {Eojin Lee and
                  Sukhan Lee and
                  G. Edward Suh and
                  Jung Ho Ahn},
  title        = {TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {96--99},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2787674},
  doi          = {10.1109/LCA.2017.2787674},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LeeLSA18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiLDYW18,
  author       = {Zhaoshi Li and
                  Leibo Liu and
                  Yangdong Deng and
                  Shouyi Yin and
                  Shaojun Wei},
  title        = {Breaking the Synchronization Bottleneck with Reconfigurable Transactional
                  Execution},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {147--150},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2828402},
  doi          = {10.1109/LCA.2018.2828402},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiLDYW18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LouJ18,
  author       = {Qian Lou and
                  Lei Jiang},
  title        = {{BRAWL:} {A} Spintronics-Based Portable Basecalling-in-Memory Architecture
                  for Nanopore Genome Sequencing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {241--244},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2882384},
  doi          = {10.1109/LCA.2018.2882384},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LouJ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MashimoSI18,
  author       = {Susumu Mashimo and
                  Ryota Shioya and
                  Koji Inoue},
  title        = {{VMOR:} Microarchitectural Support for Operand Access in an Interpreter},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {217--220},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2866243},
  doi          = {10.1109/LCA.2018.2866243},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MashimoSI18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MiguelGBJ18,
  author       = {Joshua San Miguel and
                  Karthik Ganesan and
                  Mario Badr and
                  Natalie D. Enright Jerger},
  title        = {The {EH} Model: Analytical Exploration of Energy-Harvesting Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {76--79},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2777834},
  doi          = {10.1109/LCA.2017.2777834},
  timestamp    = {Thu, 10 Nov 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MiguelGBJ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MinAHK18,
  author       = {Seungwon Min and
                  Mohammad Alian and
                  Wen{-}Mei Hwu and
                  Nam Sung Kim},
  title        = {Semi-Coherent {DMA:} An Alternative {I/O} Coherency Management for
                  Embedded Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {221--224},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2866568},
  doi          = {10.1109/LCA.2018.2866568},
  timestamp    = {Thu, 23 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MinAHK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MinPAWLPK18,
  author       = {Donghyun Min and
                  DongGyu Park and
                  Jinwoo Ahn and
                  Ryan Walker and
                  Junghee Lee and
                  Sungyong Park and
                  Youngjae Kim},
  title        = {Amoeba: An Autonomous Backup and Recovery {SSD} for Ransomware Attack
                  Defense},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {245--248},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2883431},
  doi          = {10.1109/LCA.2018.2883431},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MinPAWLPK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MourisTM18,
  author       = {Dimitris Mouris and
                  Nektarios Georgios Tsoutsos and
                  Michail Maniatakos},
  title        = {TERMinator Suite: Benchmarking Privacy-Preserving Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {122--125},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2812814},
  doi          = {10.1109/LCA.2018.2812814},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MourisTM18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NematollahiSFBS18,
  author       = {Negin Nematollahi and
                  Mohammad Sadrosadati and
                  Hajar Falahati and
                  Marzieh Barkhordar and
                  Hamid Sarbazi{-}Azad},
  title        = {Neda: Supporting Direct Inter-Core Neighbor Data Exchange in GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {225--229},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2873679},
  doi          = {10.1109/LCA.2018.2873679},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/NematollahiSFBS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/OmarDKK18,
  author       = {Hamza Omar and
                  Halit Dogan and
                  Brian Kahne and
                  Omer Khan},
  title        = {Multicore Resource Isolation for Deterministic, Resilient and Secure
                  Concurrent Execution of Safety-Critical Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {230--234},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2874216},
  doi          = {10.1109/LCA.2018.2874216},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/OmarDKK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PestelSAE18,
  author       = {Sander De Pestel and
                  Sam Van den Steen and
                  Shoaib Akram and
                  Lieven Eeckhout},
  title        = {{RPPM:} Rapid Performance Prediction of Multithreaded Applications
                  on Multicore Hardware},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {183--186},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2849983},
  doi          = {10.1109/LCA.2018.2849983},
  timestamp    = {Mon, 22 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PestelSAE18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PhamHBC18,
  author       = {Binh Pham and
                  Derek Hower and
                  Abhishek Bhattacharjee and
                  Trey Cain},
  title        = {{TLB} Shootdown Mitigation for Low-Power Many-Core Servers with {L1}
                  Virtual Caches},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {17--20},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2712140},
  doi          = {10.1109/LCA.2017.2712140},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PhamHBC18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RakshitM18,
  author       = {Joydeep Rakshit and
                  Kartik Mohanram},
  title        = {{LEO:} Low Overhead Encryption {ORAM} for Non-Volatile Memories},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {100--104},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2795621},
  doi          = {10.1109/LCA.2018.2795621},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/RakshitM18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SahooSSM18,
  author       = {Debiprasanna Sahoo and
                  Swaraj Sha and
                  Manoranjan Satpathy and
                  Madhu Mutyam},
  title        = {ReDRAM: {A} Reconfigurable {DRAM} Cache for GPGPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {213--216},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2865552},
  doi          = {10.1109/LCA.2018.2865552},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SahooSSM18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SciontiMZ18,
  author       = {Alberto Scionti and
                  Somnath Mazumdar and
                  St{\'{e}}phane Zuckerman},
  title        = {Enabling Massive Multi-Threading with Fast Hashing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {1--4},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2697863},
  doi          = {10.1109/LCA.2017.2697863},
  timestamp    = {Tue, 22 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SciontiMZ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShwartzB18,
  author       = {Ofir Shwartz and
                  Yitzhak Birk},
  title        = {Distributed Memory Integrity Trees},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {159--162},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2822705},
  doi          = {10.1109/LCA.2018.2822705},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShwartzB18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SteenE18,
  author       = {Sam Van den Steen and
                  Lieven Eeckhout},
  title        = {Modeling Superscalar Processor Memory-Level Parallelism},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {9--12},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2701370},
  doi          = {10.1109/LCA.2017.2701370},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SteenE18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SwamiM18,
  author       = {Shivam Swami and
                  Kartik Mohanram},
  title        = {{ARSENAL:} Architecture for Secure Non-Volatile Memories},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {192--196},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2863281},
  doi          = {10.1109/LCA.2018.2863281},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SwamiM18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Vakil-GhahaniML18,
  author       = {Armin Vakil{-}Ghahani and
                  Sara Mahdizadeh{-}Shahri and
                  Mohammad{-}Reza Lotfi{-}Namin and
                  Mohammad Bakhshalipour and
                  Pejman Lotfi{-}Kamran and
                  Hamid Sarbazi{-}Azad},
  title        = {Cache Replacement Policy Based on Expected Hit Count},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {64--67},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2762660},
  doi          = {10.1109/LCA.2017.2762660},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Vakil-GhahaniML18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/VijayaraghavanR18,
  author       = {Thiruvengadam Vijayaraghavan and
                  Amit Rajesh and
                  Karthikeyan Sankaralingam},
  title        = {{MPU-BWM:} Accelerating Sequence Alignment},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {179--182},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2849064},
  doi          = {10.1109/LCA.2018.2849064},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/VijayaraghavanR18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YavitsG18,
  author       = {Leonid Yavits and
                  Ran Ginosar},
  title        = {Accelerator for Sparse Machine Learning},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {21--24},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2714667},
  doi          = {10.1109/LCA.2017.2714667},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YavitsG18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YunYKBK18,
  author       = {Jitae Yun and
                  Su{-}Kyung Yoon and
                  Jeong{-}Geun Kim and
                  Bernd Burgstaller and
                  Shin{-}Dug Kim},
  title        = {Regression Prefetcher with Preprocessing for {DRAM-PCM} Hybrid Main
                  Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {163--166},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2841835},
  doi          = {10.1109/LCA.2018.2841835},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YunYKBK18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhaL18,
  author       = {Yue Zha and
                  Jing Li},
  title        = {{CMA:} {A} Reconfigurable Complex Matching Accelerator for Wire-Speed
                  Network Intrusion Detection},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {33--36},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2719023},
  doi          = {10.1109/LCA.2017.2719023},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhaL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangKFMJ18,
  author       = {Jiangwei Zhang and
                  Donald Kline Jr. and
                  Liang Fang and
                  Rami G. Melhem and
                  Alex K. Jones},
  title        = {{RETROFIT:} Fault-Aware Wear Leveling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {167--170},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2840137},
  doi          = {10.1109/LCA.2018.2840137},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhangKFMJ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangS18,
  author       = {Guowei Zhang and
                  Daniel S{\'{a}}nchez},
  title        = {Leveraging Hardware Caches for Memoization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {59--63},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2762308},
  doi          = {10.1109/LCA.2017.2762308},
  timestamp    = {Tue, 11 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ZhangS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhaoCG18,
  author       = {Wenyi Zhao and
                  Quan Chen and
                  Minyi Guo},
  title        = {{KSM:} Online Application-Level Performance Slowdown Prediction for
                  Spatial Multitasking {GPGPU}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {187--191},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2851207},
  doi          = {10.1109/LCA.2018.2851207},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhaoCG18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhengL18,
  author       = {Hao Zheng and
                  Ahmed Louri},
  title        = {EZ-Pass: An Energy {\&} Performance-Efficient Power-Gating Router
                  Architecture for Scalable NoCs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {1},
  pages        = {88--91},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2017.2783918},
  doi          = {10.1109/LCA.2017.2783918},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhengL18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZokaeeZJ18,
  author       = {Farzaneh Zokaee and
                  Hamid R. Zarandi and
                  Lei Jiang},
  title        = {AligneR: {A} Process-in-Memory Architecture for Short Read Alignment
                  in ReRAMs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {17},
  number       = {2},
  pages        = {237--240},
  year         = {2018},
  url          = {https://doi.org/10.1109/LCA.2018.2854700},
  doi          = {10.1109/LCA.2018.2854700},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZokaeeZJ18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AdilehEJE17,
  author       = {Almutaz Adileh and
                  Stijn Eyerman and
                  Aamer Jaleel and
                  Lieven Eeckhout},
  title        = {Mind The Power Holes: Sifting Operating Points in Power-Limited Heterogeneous
                  Multicores},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {56--59},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2616339},
  doi          = {10.1109/LCA.2016.2616339},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AdilehEJE17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AhmadvandG17,
  author       = {Hossein Ahmadvand and
                  Maziar Goudarzi},
  title        = {Using Data Variety for Efficient Progressive Big Data Processing in
                  Warehouse-Scale Computers},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {166--169},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2636293},
  doi          = {10.1109/LCA.2016.2636293},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AhmadvandG17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BadawyY17,
  author       = {Abdel{-}Hameed A. Badawy and
                  Donald Yeung},
  title        = {Guiding Locality Optimizations for Graph Computations via Reuse Distance
                  Analysis},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {119--122},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2695178},
  doi          = {10.1109/LCA.2017.2695178},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BadawyY17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BakhshalipourLS17,
  author       = {Mohammad Bakhshalipour and
                  Pejman Lotfi{-}Kamran and
                  Hamid Sarbazi{-}Azad},
  title        = {An Efficient Temporal Data Prefetcher for {L1} Caches},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {99--102},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2654347},
  doi          = {10.1109/LCA.2017.2654347},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BakhshalipourLS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BeckmannS17,
  author       = {Nathan Beckmann and
                  Daniel S{\'{a}}nchez},
  title        = {Cache Calculus: Modeling Caches through Differential Equations},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {1--5},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2015.2512873},
  doi          = {10.1109/LCA.2015.2512873},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BeckmannS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BoroumandGPHLHM17,
  author       = {Amirali Boroumand and
                  Saugata Ghose and
                  Minesh Patel and
                  Hasan Hassan and
                  Brandon Lucia and
                  Kevin Hsieh and
                  Krishna T. Malladi and
                  Hongzhong Zheng and
                  Onur Mutlu},
  title        = {LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {46--50},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2577557},
  doi          = {10.1109/LCA.2016.2577557},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BoroumandGPHLHM17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CarlsonTJKSK17,
  author       = {Trevor E. Carlson and
                  Kim{-}Anh Tran and
                  Alexandra Jimborean and
                  Konstantinos Koukos and
                  Magnus Sj{\"{a}}lander and
                  Stefanos Kaxiras},
  title        = {Transcending Hardware Limits with Software Out-of-Order Processing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {162--165},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2672559},
  doi          = {10.1109/LCA.2017.2672559},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/CarlsonTJKSK17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChenCWY17,
  author       = {Li{-}Jhan Chen and
                  Hsiang{-}Yun Cheng and
                  Po{-}Han Wang and
                  Chia{-}Lin Yang},
  title        = {Improving {GPGPU} Performance via Cache Locality Aware Thread Block
                  Scheduling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {127--131},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2693371},
  doi          = {10.1109/LCA.2017.2693371},
  timestamp    = {Tue, 04 May 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ChenCWY17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FengLS017,
  author       = {Liang Feng and
                  Hao Liang and
                  Sharad Sinha and
                  Wei Zhang},
  title        = {HeteroSim: {A} Heterogeneous {CPU-FPGA} Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {38--41},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2615617},
  doi          = {10.1109/LCA.2016.2615617},
  timestamp    = {Tue, 05 Mar 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/FengLS017.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GarlandG17,
  author       = {James Garland and
                  David Gregg},
  title        = {Low Complexity Multiply Accumulate Unit for Weight-Sharing Convolutional
                  Neural Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {132--135},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2656880},
  doi          = {10.1109/LCA.2017.2656880},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GarlandG17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GottschoSGSWG17,
  author       = {Mark Gottscho and
                  Mohammed Shoaib and
                  Sriram Govindan and
                  Bikash Sharma and
                  Di Wang and
                  Puneet Gupta},
  title        = {Measuring the Impact of Memory Errors on Application Performance},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {51--55},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2599513},
  doi          = {10.1109/LCA.2016.2599513},
  timestamp    = {Thu, 28 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/GottschoSGSWG17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JeonC17,
  author       = {Dong{-}Ik Jeon and
                  Ki{-}Seok Chung},
  title        = {CasHMC: {A} Cycle-Accurate Simulator for Hybrid Memory Cube},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {10--13},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2600601},
  doi          = {10.1109/LCA.2016.2600601},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JeonC17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JouybariA17,
  author       = {Hoda Naghibi Jouybari and
                  Nael B. Abu{-}Ghazaleh},
  title        = {Covert Channels on GPGPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {22--25},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2590549},
  doi          = {10.1109/LCA.2016.2590549},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JouybariA17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JuddAM17,
  author       = {Patrick Judd and
                  Jorge Albericio and
                  Andreas Moshovos},
  title        = {Stripes: Bit-Serial Deep Neural Network Computing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {80--83},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2597140},
  doi          = {10.1109/LCA.2016.2597140},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JuddAM17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Jung17,
  author       = {Myoungsoo Jung},
  title        = {NearZero: An Integration of Phase Change Memory with Multi-Core Coprocessor},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {136--140},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2694828},
  doi          = {10.1109/LCA.2017.2694828},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Jung17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhanWLAM17,
  author       = {Samira Manabi Khan and
                  Chris Wilkerson and
                  Donghyuk Lee and
                  Alaa R. Alameldeen and
                  Onur Mutlu},
  title        = {A Case for Memory Content-Based Detection and Mitigation of Data-Dependent
                  Failures in {DRAM}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {88--93},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2624298},
  doi          = {10.1109/LCA.2016.2624298},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KhanWLAM17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeGLK17,
  author       = {Junghee Lee and
                  Kalidas Ganesh and
                  Hyuk{-}Jun Lee and
                  Youngjae Kim},
  title        = {FeSSD: {A} Fast Encrypted {SSD} Employing On-Chip Access-Control Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {115--118},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2667639},
  doi          = {10.1109/LCA.2017.2667639},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LeeGLK17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ManivannanPPS17,
  author       = {Madhavan Manivannan and
                  Miquel Peric{\`{a}}s and
                  Vassilis Papaefstathiou and
                  Per Stenstr{\"{o}}m},
  title        = {Runtime-Assisted Global Cache Management for Task-Based Parallel Programs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {145--148},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2606593},
  doi          = {10.1109/LCA.2016.2606593},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ManivannanPPS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MarquezKM17,
  author       = {David A. Gonz{\'{a}}lez M{\'{a}}rquez and
                  Adri{\'{a}}n Cristal Kestelman and
                  Esteban E. Mocskos},
  title        = {Mth: Codesigned Hardware/Software Support for Fine Grain Threads},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {64--67},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2606383},
  doi          = {10.1109/LCA.2016.2606383},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MarquezKM17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MartinezMR17,
  author       = {Jorge A. Mart{\'{\i}}nez and
                  Juan Antonio Maestro and
                  Pedro Reviriego},
  title        = {A Scheme to Improve the Intrinsic Error Detection of the Instruction
                  Set Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {103--106},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2623628},
  doi          = {10.1109/LCA.2016.2623628},
  timestamp    = {Thu, 17 Mar 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MartinezMR17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MirhosseiniAT17,
  author       = {Amirhossein Mirhosseini and
                  Aditya Agrawal and
                  Josep Torrellas},
  title        = {Survive: Pointer-Based In-DRAM Incremental Checkpointing for Low-Cost
                  Data Persistence and Rollback-Recovery},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {153--157},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2646340},
  doi          = {10.1109/LCA.2016.2646340},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MirhosseiniAT17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MittalVJ17,
  author       = {Sparsh Mittal and
                  Jeffrey S. Vetter and
                  Lei Jiang},
  title        = {Addressing Read-Disturbance Issue in {STT-RAM} by Data Compression
                  and Selective Duplication},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {94--98},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2645207},
  doi          = {10.1109/LCA.2016.2645207},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MittalVJ17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MoradSEKW17,
  author       = {Tomer Y. Morad and
                  Gil Shomron and
                  Mattan Erez and
                  Avinoam Kolodny and
                  Uri C. Weiser},
  title        = {Optimizing Read-Once Data Flow in Big-Data Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {68--71},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2520927},
  doi          = {10.1109/LCA.2016.2520927},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MoradSEKW17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PeraisS17,
  author       = {Arthur Perais and
                  Andr{\'{e}} Seznec},
  title        = {Storage-Free Memory Dependency Prediction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {149--152},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2628379},
  doi          = {10.1109/LCA.2016.2628379},
  timestamp    = {Thu, 23 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/PeraisS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PintoPGET17,
  author       = {Sandro Pinto and
                  Jorge Pereira and
                  Tiago Gomes and
                  Mongkol Ekpanyapong and
                  Adriano Tavares},
  title        = {Towards a TrustZone-Assisted Hypervisor for Real-Time Embedded Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {158--161},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2617308},
  doi          = {10.1109/LCA.2016.2617308},
  timestamp    = {Tue, 13 Sep 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/PintoPGET17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RaviL17,
  author       = {Gokul Subramanian Ravi and
                  Mikko H. Lipasti},
  title        = {Timing Speculation in Multi-Cycle Data Paths},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {84--87},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2580501},
  doi          = {10.1109/LCA.2016.2580501},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RaviL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SasakiBVB17,
  author       = {Hiroshi Sasaki and
                  Alper Buyuktosunoglu and
                  Augusto Vega and
                  Pradip Bose},
  title        = {Mitigating Power Contention: {A} Scheduling Based Approach},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {60--63},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2572080},
  doi          = {10.1109/LCA.2016.2572080},
  timestamp    = {Fri, 17 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SasakiBVB17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SasakiSTS17,
  author       = {Hiroshi Sasaki and
                  Fang{-}Hsiang Su and
                  Teruo Tanimoto and
                  Simha Sethumadhavan},
  title        = {Heavy Tails in Program Structure},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {34--37},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2574350},
  doi          = {10.1109/LCA.2016.2574350},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SasakiSTS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SeyedzadehJM17,
  author       = {Seyed Mohammad Seyedzadeh and
                  Alex K. Jones and
                  Rami G. Melhem},
  title        = {Counter-Based Tree Structure for Row Hammering Mitigation in {DRAM}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {18--21},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2614497},
  doi          = {10.1109/LCA.2016.2614497},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SeyedzadehJM17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SonCRLA17,
  author       = {Young Hoon Son and
                  Hyunyoon Cho and
                  Yuhwan Ro and
                  Jae W. Lee and
                  Jung Ho Ahn},
  title        = {{SALAD:} Achieving Symmetric Access Latency with Asymmetric {DRAM}
                  Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {76--79},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2525760},
  doi          = {10.1109/LCA.2016.2525760},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SonCRLA17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SongJALK17,
  author       = {WonJun Song and
                  Hyungjoon Jung and
                  Jung Ho Ahn and
                  Jae W. Lee and
                  John Kim},
  title        = {Evaluation of Performance Unfairness in {NUMA} System Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {26--29},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2602876},
  doi          = {10.1109/LCA.2016.2602876},
  timestamp    = {Thu, 26 Sep 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SongJALK17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TanimotoOIS17,
  author       = {Teruo Tanimoto and
                  Takatsugu Ono and
                  Koji Inoue and
                  Hiroshi Sasaki},
  title        = {Enhanced Dependence Graph Model for Critical Path Analysis on Modern
                  Out-of-Order Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {111--114},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2684813},
  doi          = {10.1109/LCA.2017.2684813},
  timestamp    = {Fri, 17 Apr 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/TanimotoOIS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/VernerMS17,
  author       = {Uri Verner and
                  Avi Mendelson and
                  Assaf Schuster},
  title        = {Extending Amdahl's Law for Multicores with Turbo Boost},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {30--33},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2015.2512982},
  doi          = {10.1109/LCA.2015.2512982},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/VernerMS17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangMZY17,
  author       = {Rujia Wang and
                  Sparsh Mittal and
                  Youtao Zhang and
                  Jun Yang},
  title        = {Decongest: Accelerating Super-Dense {PCM} Under Write Disturbance
                  by Hot Page Remapping},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {107--110},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2675883},
  doi          = {10.1109/LCA.2017.2675883},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WangMZY17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WuLL17,
  author       = {Hao Wu and
                  Fangfei Liu and
                  Ruby B. Lee},
  title        = {Cloud Server Benchmark Suite for Evaluating New Hardware Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {14--17},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2597818},
  doi          = {10.1109/LCA.2016.2597818},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WuLL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YasoubiHM17,
  author       = {Ali Yasoubi and
                  Reza Hojabr and
                  Mehdi Modarressi},
  title        = {Power-Efficient Accelerator Design for Neural Networks Using Computation
                  Reuse},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {72--75},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2521654},
  doi          = {10.1109/LCA.2016.2521654},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YasoubiHM17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YavitsWG17,
  author       = {Leonid Yavits and
                  Uri C. Weiser and
                  Ran Ginosar},
  title        = {Resistive Address Decoder},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {141--144},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2670539},
  doi          = {10.1109/LCA.2017.2670539},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YavitsWG17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhaL17,
  author       = {Yue Zha and
                  Jing Li},
  title        = {{IMEC:} {A} Fully Morphable In-Memory Computing Fabric Enabled by
                  Resistive Crossbar},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {123--126},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2017.2672558},
  doi          = {10.1109/LCA.2017.2672558},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhaL17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhanAKBR17,
  author       = {Xin Zhan and
                  Reza Azimi and
                  Svilen Kanev and
                  David M. Brooks and
                  Sherief Reda},
  title        = {{CARB:} {A} C-State Power Management Arbiter for Latency-Critical
                  Workloads},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {6--9},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2537802},
  doi          = {10.1109/LCA.2016.2537802},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhanAKBR17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangMC17,
  author       = {Dan Zhang and
                  Xiaoyu Ma and
                  Derek Chiou},
  title        = {Worklist-Directed Prefetching},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {2},
  pages        = {170--173},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2627571},
  doi          = {10.1109/LCA.2016.2627571},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhangMC17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhaoLAE17,
  author       = {Xia Zhao and
                  Yuxi Liu and
                  Almutaz Adileh and
                  Lieven Eeckhout},
  title        = {{LA-LLC:} Inter-Core Locality-Aware Last-Level Cache to Exploit Many-to-Many
                  Traffic in GPGPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {16},
  number       = {1},
  pages        = {42--45},
  year         = {2017},
  url          = {https://doi.org/10.1109/LCA.2016.2611663},
  doi          = {10.1109/LCA.2016.2611663},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhaoLAE17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlianKK16,
  author       = {Mohammad Alian and
                  Daehoon Kim and
                  Nam Sung Kim},
  title        = {pd-gem5: Simulation Infrastructure for Parallel/Distributed Computer
                  Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {41--44},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2438295},
  doi          = {10.1109/LCA.2015.2438295},
  timestamp    = {Thu, 23 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AlianKK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CakmakiTNL16,
  author       = {Yaman Cakmaki and
                  Will Toms and
                  Javier Navaridas and
                  Mikel Luj{\'{a}}n},
  title        = {Cyclic Power-Gating as an Alternative to Voltage and Frequency Scaling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {77--80},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2478784},
  doi          = {10.1109/LCA.2015.2478784},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/CakmakiTNL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DayaPC16,
  author       = {Bhavya K. Daya and
                  Li{-}Shiuan Peh and
                  Anantha P. Chandrakasan},
  title        = {Towards High-Performance Bufferless NoCs with {SCEPTER}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {62--65},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2428699},
  doi          = {10.1109/LCA.2015.2428699},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DayaPC16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DelimitrouK16,
  author       = {Christina Delimitrou and
                  Christos Kozyrakis},
  title        = {Security Implications of Data Mining in Cloud Scheduling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {109--112},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2461215},
  doi          = {10.1109/LCA.2015.2461215},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/DelimitrouK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/EkerE16,
  author       = {Abdulaziz Eker and
                  Oguz Ergin},
  title        = {Exploiting Existing Copies in Register File for Soft Error Correction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {17--20},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2435705},
  doi          = {10.1109/LCA.2015.2435705},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/EkerE16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GarciaGMTE16,
  author       = {Paulo Garcia and
                  Tiago Gomes and
                  Jo{\~{a}}o Monteiro and
                  Adriano Tavares and
                  Mongkol Ekpanyapong},
  title        = {On-Chip Message Passing Sub-System for Embedded Inter-Domain Communication},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {33--36},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2419260},
  doi          = {10.1109/LCA.2015.2419260},
  timestamp    = {Thu, 10 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/GarciaGMTE16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GorguesF16,
  author       = {Miguel Gorgues and
                  Jos{\'{e}} Flich},
  title        = {End-Point Congestion Filter for Adaptive Routing with Congestion-Insensitive
                  Performance},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {9--12},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2429130},
  doi          = {10.1109/LCA.2015.2429130},
  timestamp    = {Mon, 18 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GorguesF16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HashemiMCP16,
  author       = {Milad Hashemi and
                  Debbie Marr and
                  Doug Carmean and
                  Yale N. Patt},
  title        = {Efficient Execution of Bursty Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {85--88},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2456013},
  doi          = {10.1109/LCA.2015.2456013},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HashemiMCP16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HuLH16,
  author       = {Qi Hu and
                  Peng Liu and
                  Michael C. Huang},
  title        = {Threads and Data Mapping: Affinity Analysis for Traffic Reduction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {133--136},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2451172},
  doi          = {10.1109/LCA.2015.2451172},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HuLH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Jacob16,
  author       = {Bruce L. Jacob},
  title        = {The Case for {VLIW-CMP} as a Building Block for Exascale},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {54--57},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2424699},
  doi          = {10.1109/LCA.2015.2424699},
  timestamp    = {Fri, 13 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Jacob16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Jacob16a,
  author       = {Bruce L. Jacob},
  title        = {The 2 PetaFLOP, 3 Petabyte, 9 TB/s, 90 kW Cabinet: {A} System Architecture
                  for Exascale and Big Data},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {125--128},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2451652},
  doi          = {10.1109/LCA.2015.2451652},
  timestamp    = {Fri, 13 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Jacob16a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JungLA16,
  author       = {Daejin Jung and
                  Sheng Li and
                  Jung Ho Ahn},
  title        = {Large Pages on Steroids: Small Ideas to Accelerate Big Memory Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {101--104},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2495103},
  doi          = {10.1109/LCA.2015.2495103},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JungLA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KannanQGS16,
  author       = {Sudarsun Kannan and
                  Moinuddin K. Qureshi and
                  Ada Gavrilovska and
                  Karsten Schwan},
  title        = {Energy Aware Persistence: Reducing the Energy Overheads of Persistent
                  Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {89--92},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2472410},
  doi          = {10.1109/LCA.2015.2472410},
  timestamp    = {Thu, 27 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KannanQGS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimYM16,
  author       = {Yoongu Kim and
                  Weikun Yang and
                  Onur Mutlu},
  title        = {Ramulator: {A} Fast and Extensible {DRAM} Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {45--49},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2414456},
  doi          = {10.1109/LCA.2015.2414456},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimYM16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KleanthousSONNH16,
  author       = {Marios Kleanthous and
                  Yiannakis Sazeides and
                  Emre {\"{O}}zer and
                  Chrysostomos Nicopoulos and
                  Panagiota Nikolaou and
                  Zacharias Hadjilambrou},
  title        = {Toward Multi-Layer Holistic Evaluation of System Designs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {58--61},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2445877},
  doi          = {10.1109/LCA.2015.2445877},
  timestamp    = {Thu, 12 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KleanthousSONNH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LaiPK16,
  author       = {Bo{-}Cheng Charles Lai and
                  Luis Garrido Platero and
                  Hsien{-}Kai Kuo},
  title        = {A Quantitative Method to Data Reuse Patterns of {SIMT} Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {73--76},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2491279},
  doi          = {10.1109/LCA.2015.2491279},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LaiPK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiA16,
  author       = {Dongdong Li and
                  Tor M. Aamodt},
  title        = {Inter-Core Locality Aware Memory Scheduling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {25--28},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2435709},
  doi          = {10.1109/LCA.2015.2435709},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiA16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiCWLHSZ16,
  author       = {Minghua Li and
                  Guancheng Chen and
                  Qijun Wang and
                  Yonghua Lin and
                  H. Peter Hofstee and
                  Per Stenstr{\"{o}}m and
                  Dian Zhou},
  title        = {PATer: {A} Hardware Prefetching Automatic Tuner on {IBM} {POWER8}
                  Processor},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {37--40},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2442972},
  doi          = {10.1109/LCA.2015.2442972},
  timestamp    = {Wed, 30 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LiCWLHSZ16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiangYLGW16,
  author       = {Shuang Liang and
                  Shouyi Yin and
                  Leibo Liu and
                  Yike Guo and
                  Shaojun Wei},
  title        = {A Coarse-Grained Reconfigurable Architecture for Compute-Intensive
                  MapReduce Acceleration},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {69--72},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2458318},
  doi          = {10.1109/LCA.2015.2458318},
  timestamp    = {Thu, 22 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiangYLGW16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MaycockS16,
  author       = {Matthew Maycock and
                  Simha Sethumadhavan},
  title        = {Hardware Enforced Statistical Privacy},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {21--24},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2403359},
  doi          = {10.1109/LCA.2015.2403359},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MaycockS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/OlsonSH16,
  author       = {Lena E. Olson and
                  Simha Sethumadhavan and
                  Mark D. Hill},
  title        = {Security Implications of Third-Party Accelerators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {50--53},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2445337},
  doi          = {10.1109/LCA.2015.2445337},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/OlsonSH16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PandaB16,
  author       = {Biswabandan Panda and
                  Shankar Balachandran},
  title        = {Expert Prefetch Prediction: An Expert Predicting the Usefulness of
                  Hardware Prefetchers},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {13--16},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2428703},
  doi          = {10.1109/LCA.2015.2428703},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PandaB16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PuDGV16,
  author       = {Libei Pu and
                  Kshitij A. Doshi and
                  Ellis Giles and
                  Peter J. Varman},
  title        = {Non-Intrusive Persistence with a Backend {NVM} Controller},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {29--32},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2443105},
  doi          = {10.1109/LCA.2015.2443105},
  timestamp    = {Sun, 29 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/PuDGV16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RezaeiMML16,
  author       = {Seyyed Hossein Seyyedaghaei Rezaei and
                  Abbas Mazloumi and
                  Mehdi Modarressi and
                  Pejman Lotfi{-}Kamran},
  title        = {Dynamic Resource Sharing for High-Performance 3-D Networks-on-Chip},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {5--8},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2448532},
  doi          = {10.1109/LCA.2015.2448532},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RezaeiMML16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SenW16,
  author       = {Rathijit Sen and
                  David A. Wood},
  title        = {{GPGPU} Footprint Models to Estimate per-Core Power},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {97--100},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2456909},
  doi          = {10.1109/LCA.2015.2456909},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SenW16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TavakkolMS16,
  author       = {Arash Tavakkol and
                  Pooyan Mehrvarzy and
                  Hamid Sarbazi{-}Azad},
  title        = {{TBM:} Twin Block Management Policy to Enhance the Utilization of
                  Plane-Level Parallelism in SSDs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {121--124},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2461162},
  doi          = {10.1109/LCA.2015.2461162},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/TavakkolMS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TomuskD16,
  author       = {Erik Tomusk and
                  Christophe Dubach},
  title        = {Diversity: {A} Design Goal for Heterogeneous Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {81--84},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2499739},
  doi          = {10.1109/LCA.2015.2499739},
  timestamp    = {Wed, 25 Aug 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/TomuskD16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ValeroMPSJ16,
  author       = {Alejandro Valero and
                  Negar Miralaei and
                  Salvador Petit and
                  Julio Sahuquillo and
                  Timothy M. Jones},
  title        = {Enhancing the {L1} Data Cache Design to Mitigate {HCI}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {93--96},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2460736},
  doi          = {10.1109/LCA.2015.2460736},
  timestamp    = {Mon, 03 Jan 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ValeroMPSJ16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/VerduP16,
  author       = {Javier Verd{\'{u}} and
                  Alex Pajuelo},
  title        = {Performance Scalability Analysis of JavaScript Applications with Web
                  Workers},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {105--108},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2494585},
  doi          = {10.1109/LCA.2015.2494585},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/VerduP16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangYMCZG16,
  author       = {Zhenning Wang and
                  Jun Yang and
                  Rami G. Melhem and
                  Bruce R. Childers and
                  Youtao Zhang and
                  Minyi Guo},
  title        = {Simultaneous Multikernel: Fine-Grained Sharing of GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {113--116},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2477405},
  doi          = {10.1109/LCA.2015.2477405},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WangYMCZG16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WuL16,
  author       = {Wo{-}Tak Wu and
                  Ahmed Louri},
  title        = {A Methodology for Cognitive NoC Design},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {1},
  pages        = {1--4},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2447535},
  doi          = {10.1109/LCA.2015.2447535},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WuL16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XiaoYMY16,
  author       = {He Xiao and
                  Wen Yueh and
                  Saibal Mukhopadhyay and
                  Sudhakar Yalamanchili},
  title        = {Thermally Adaptive Cache Access Mechanisms for 3D Many-Core Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {129--132},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2495125},
  doi          = {10.1109/LCA.2015.2495125},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/XiaoYMY16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangTS16,
  author       = {Chulian Zhang and
                  Hamed Tabkhi and
                  Gunar Schirner},
  title        = {Studying Inter-Warp Divergence Aware Execution on GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {15},
  number       = {2},
  pages        = {117--120},
  year         = {2016},
  url          = {https://doi.org/10.1109/LCA.2015.2478778},
  doi          = {10.1109/LCA.2015.2478778},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ZhangTS16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/0020V15,
  author       = {Jie Chen and
                  Guru Venkataramani},
  title        = {A Hardware-Software Cooperative Approach for Application Energy Profiling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {5--8},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2323711},
  doi          = {10.1109/LCA.2014.2323711},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/0020V15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AzrielMW15,
  author       = {Leonid Azriel and
                  Avi Mendelson and
                  Uri C. Weiser},
  title        = {Peripheral Memory: {A} Technique for Fighting Memory Bandwidth Bottleneck},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {54--57},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2319077},
  doi          = {10.1109/LCA.2014.2319077},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AzrielMW15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CarlsonNHH15,
  author       = {Trevor E. Carlson and
                  Siddharth Nilakantan and
                  Mark Hempstead and
                  Wim Heirman},
  title        = {Epoch Profiles: Microarchitecture-Based Application Analysis and Optimization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {30--33},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2329873},
  doi          = {10.1109/LCA.2014.2329873},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/CarlsonNHH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DiamantopoulosX15,
  author       = {Dionysios Diamantopoulos and
                  Sotirios Xydis and
                  Kostas Siozios and
                  Dimitrios Soudris},
  title        = {Mitigating Memory-Induced Dark Silicon in Many-Accelerator Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {136--139},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2015.2410791},
  doi          = {10.1109/LCA.2015.2410791},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/DiamantopoulosX15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FarahaniAMK15,
  author       = {Amin Farmahini Farahani and
                  Jung Ho Ahn and
                  Katherine Morrow and
                  Nam Sung Kim},
  title        = {{DRAMA:} An Architecture for Accelerated Processing Near Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {26--29},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2333735},
  doi          = {10.1109/LCA.2014.2333735},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/FarahaniAMK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GibertMMC15,
  author       = {Enric Gibert and
                  Ra{\'{u}}l Mart{\'{\i}}nez and
                  Carlos Madriles and
                  Josep M. Codina},
  title        = {Profiling Support for Runtime Managed Code: Next Generation Performance
                  Monitoring Units},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {62--65},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2321398},
  doi          = {10.1109/LCA.2014.2321398},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GibertMMC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GuptaO15,
  author       = {Ujjwal Gupta and
                  {\"{U}}mit Y. Ogras},
  title        = {Constrained Energy Optimizationin Heterogeneous Platforms UsingGeneralized
                  Scaling Models},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {21--25},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2326603},
  doi          = {10.1109/LCA.2014.2326603},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GuptaO15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KangNGK15,
  author       = {Suk Chan Kang and
                  Chrysostomos Nicopoulos and
                  Ada Gavrilovska and
                  Jongman Kim},
  title        = {Subtleties of Run-Time VirtualAddress Stacks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {152--155},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2337299},
  doi          = {10.1109/LCA.2014.2337299},
  timestamp    = {Fri, 10 Jul 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KangNGK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKLJRG15,
  author       = {Seung{-}Hun Kim and
                  Dohoon Kim and
                  Changmin Lee and
                  Won Seob Jeong and
                  Won Woo Ro and
                  Jean{-}Luc Gaudiot},
  title        = {A Performance-Energy Model to Evaluate Single Thread Execution Acceleration},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {99--102},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2368144},
  doi          = {10.1109/LCA.2014.2368144},
  timestamp    = {Fri, 26 Nov 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimKLJRG15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimNQ15,
  author       = {Dae{-}Hyun Kim and
                  Prashant J. Nair and
                  Moinuddin K. Qureshi},
  title        = {Architectural Support for Mitigating Row Hammering in {DRAM} Memories},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {9--12},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2332177},
  doi          = {10.1109/LCA.2014.2332177},
  timestamp    = {Tue, 29 Jun 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimNQ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeKKS15,
  author       = {Junghee Lee and
                  Youngjae Kim and
                  Jongman Kim and
                  Galen M. Shipman},
  title        = {Synchronous {I/O} Scheduling of Independent Write Caches for an Array
                  of SSDs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {79--82},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2298394},
  doi          = {10.1109/LCA.2014.2298394},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LeeKKS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeKM15,
  author       = {Sungjin Lee and
                  Jihong Kim and
                  Arvind Mithal},
  title        = {Refactored Design of {I/O} Architecture for Flash Storage},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {70--74},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2329423},
  doi          = {10.1109/LCA.2014.2329423},
  timestamp    = {Tue, 07 Feb 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LeeKM15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiaoZLX15,
  author       = {Jianwei Liao and
                  Fengxiang Zhang and
                  Li Li and
                  Guoqiang Xiao},
  title        = {Adaptive Wear-Leveling in Flash-Based Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {1--4},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2329871},
  doi          = {10.1109/LCA.2014.2329871},
  timestamp    = {Wed, 08 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LiaoZLX15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiuLSHXZL15,
  author       = {Longjun Liu and
                  Chao Li and
                  Hongbin Sun and
                  Yang Hu and
                  Jingmin Xin and
                  Nanning Zheng and
                  Tao Li},
  title        = {Leveraging Heterogeneous Power for Improving Datacenter Efficiency
                  and Resiliency},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {41--45},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2363084},
  doi          = {10.1109/LCA.2014.2363084},
  timestamp    = {Thu, 23 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LiuLSHXZL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ManatungaLK15,
  author       = {Dilan Manatunga and
                  Joo Hwan Lee and
                  Hyesoon Kim},
  title        = {Hardware Support for Safe Execution of Native Client Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {37--40},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2309601},
  doi          = {10.1109/LCA.2014.2309601},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ManatungaLK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Manohar15,
  author       = {Rajit Manohar},
  title        = {Comparing Stochastic and Deterministic Computing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {119--122},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2015.2412553},
  doi          = {10.1109/LCA.2015.2412553},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Manohar15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MarkovicNUVC15,
  author       = {Nikola Markovic and
                  Daniel Nemirovsky and
                  Osman S. {\"{U}}nsal and
                  Mateo Valero and
                  Adri{\'{a}}n Cristal},
  title        = {Thread Lock Section-Aware Scheduling on Asymmetric Single-ISA Multi-Core},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {160--163},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2357805},
  doi          = {10.1109/LCA.2014.2357805},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MarkovicNUVC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MittalV15,
  author       = {Sparsh Mittal and
                  Jeffrey S. Vetter},
  title        = {{AYUSH:} {A} Technique for Extending Lifetime of {SRAM-NVM} Hybrid
                  Caches},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {115--118},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2355193},
  doi          = {10.1109/LCA.2014.2355193},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MittalV15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MohammadiHAD15,
  author       = {Milad Mohammadi and
                  Song Han and
                  Tor M. Aamodt and
                  William J. Dally},
  title        = {On-Demand Dynamic Branch Prediction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {50--53},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2330820},
  doi          = {10.1109/LCA.2014.2330820},
  timestamp    = {Fri, 20 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MohammadiHAD15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NathanS15,
  author       = {Ralph Nathan and
                  Daniel J. Sorin},
  title        = {Argus-G: Comprehensive, Low-Cost Error Detection for {GPGPU} Cores},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {13--16},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2298391},
  doi          = {10.1109/LCA.2014.2298391},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/NathanS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NowatzkiGS15,
  author       = {Tony Nowatzki and
                  Venkatraman Govindaraju and
                  Karthikeyan Sankaralingam},
  title        = {A Graph-Based Program Representation for Analyzing Hardware Specialization
                  Approaches},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {94--98},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2015.2476801},
  doi          = {10.1109/LCA.2015.2476801},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/NowatzkiGS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/OKSPA15,
  author       = {Seongil O and
                  Sanghyuk Kwon and
                  Young Hoon Son and
                  Yujin Park and
                  Jung Ho Ahn},
  title        = {{CIDR:} {A} Cache Inspired Area-Efficient {DRAM} Resilience Architecture
                  against Permanent Faults},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {17--20},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2324894},
  doi          = {10.1109/LCA.2014.2324894},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/OKSPA15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PekhimenkoBOMMK15,
  author       = {Gennady Pekhimenko and
                  Evgeny Bolotin and
                  Mike O'Connor and
                  Onur Mutlu and
                  Todd C. Mowry and
                  Stephen W. Keckler},
  title        = {Toggle-Aware Compression for GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {164--168},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2015.2430853},
  doi          = {10.1109/LCA.2015.2430853},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/PekhimenkoBOMMK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PoluriL15,
  author       = {Pavan Poluri and
                  Ahmed Louri},
  title        = {A Soft Error Tolerant Network-on-Chip Router Pipeline for Multi-Core
                  Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {107--110},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2360686},
  doi          = {10.1109/LCA.2014.2360686},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PoluriL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PorembaZ015,
  author       = {Matthew Poremba and
                  Tao Zhang and
                  Yuan Xie},
  title        = {NVMain 2.0: {A} User-Friendly Memory Simulator to Model (Non-)Volatile
                  Memory Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {140--143},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2015.2402435},
  doi          = {10.1109/LCA.2015.2402435},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PorembaZ015.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PowerHOHW15,
  author       = {Jason Power and
                  Joel Hestness and
                  Marc S. Orr and
                  Mark D. Hill and
                  David A. Wood},
  title        = {gem5-gpu: {A} Heterogeneous {CPU-GPU} Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {34--36},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2299539},
  doi          = {10.1109/LCA.2014.2299539},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/PowerHOHW15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RodopoulosCS15,
  author       = {Dimitrios Rodopoulos and
                  Francky Catthoor and
                  Dimitrios Soudris},
  title        = {Tackling Performance Variability Due to {RAS} Mechanisms with PID-Controlled
                  {DVFS}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {156--159},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2385713},
  doi          = {10.1109/LCA.2014.2385713},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RodopoulosCS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SeoMLS15,
  author       = {Bon{-}Keun Seo and
                  Seungryoul Maeng and
                  Joonwon Lee and
                  Euiseong Seo},
  title        = {{DRACO:} {A} Deduplicating {FTL} for Tangible Extra Capacity},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {123--126},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2350984},
  doi          = {10.1109/LCA.2014.2350984},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SeoMLS15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SeshadriHBLKMGM15,
  author       = {Vivek Seshadri and
                  Kevin Hsieh and
                  Amirali Boroumand and
                  Donghyuk Lee and
                  Michael A. Kozuch and
                  Onur Mutlu and
                  Phillip B. Gibbons and
                  Todd C. Mowry},
  title        = {Fast Bulk Bitwise {AND} and {OR} in {DRAM}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {127--131},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2015.2434872},
  doi          = {10.1109/LCA.2015.2434872},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SeshadriHBLKMGM15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShiHK15,
  author       = {Qingchuan Shi and
                  Henry Hoffmann and
                  Omer Khan},
  title        = {A Cross-Layer Multicore Architecture to Tradeoff Program Accuracy
                  and Resilience Overheads},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {85--89},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2365204},
  doi          = {10.1109/LCA.2014.2365204},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShiHK15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShoaibW15,
  author       = {Muhammad Shoaib Bin Altaf and
                  David A. Wood},
  title        = {LogCA: {A} Performance Model for Hardware Accelerators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {132--135},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2360182},
  doi          = {10.1109/LCA.2014.2360182},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShoaibW15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SongMY15,
  author       = {William J. Song and
                  Saibal Mukhopadhyay and
                  Sudhakar Yalamanchili},
  title        = {Architectural Reliability: Lifetime Reliability Characterization and
                  Management ofMany-Core Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {103--106},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2340873},
  doi          = {10.1109/LCA.2014.2340873},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SongMY15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/VandierendonckH15,
  author       = {Hans Vandierendonck and
                  Ahmad Hassan and
                  Dimitrios S. Nikolopoulos},
  title        = {On the Energy-Efficiency of Byte-Addressable Non-Volatile Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {144--147},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2355195},
  doi          = {10.1109/LCA.2014.2355195},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/VandierendonckH15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangY0DC15,
  author       = {Zhaoguo Wang and
                  Han Yi and
                  Ran Liu and
                  Mingkai Dong and
                  Haibo Chen},
  title        = {Persistent Transactional Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {58--61},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2329832},
  doi          = {10.1109/LCA.2014.2329832},
  timestamp    = {Fri, 10 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WangY0DC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangZLQ15,
  author       = {Rui Wang and
                  Wangyuan Zhang and
                  Tao Li and
                  Depei Qian},
  title        = {Leveraging Non-Volatile Storage to Achieve Versatile Cache Optimizations},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {46--49},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2298412},
  doi          = {10.1109/LCA.2014.2298412},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WangZLQ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XiaoYZ15,
  author       = {Canwen Xiao and
                  Yue Yang and
                  Jianwen Zhu},
  title        = {A Sufficient Condition for Deadlock-Free Adaptive Routing in Mesh
                  Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {111--114},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2363829},
  doi          = {10.1109/LCA.2014.2363829},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/XiaoYZ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YavitsKMG15,
  author       = {Leonid Yavits and
                  Shahar Kvatinsky and
                  Amir Morad and
                  Ran Ginosar},
  title        = {Resistive Associative Processor},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {148--151},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2374597},
  doi          = {10.1109/LCA.2014.2374597},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YavitsKMG15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YouC15,
  author       = {Daecheol You and
                  Ki{-}Seok Chung},
  title        = {Quality of Service-Aware Dynamic Voltage and Frequency Scaling for
                  Embedded GPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {66--69},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2319079},
  doi          = {10.1109/LCA.2014.2319079},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YouC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YuanJZ15,
  author       = {Fengkai Yuan and
                  Zhenzhou Ji and
                  Suxia Zhu},
  title        = {Set-Granular Regional Distributed Cooperative Caching},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {1},
  pages        = {75--78},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2319258},
  doi          = {10.1109/LCA.2014.2319258},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YuanJZ15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhengWL15,
  author       = {Zhong Zheng and
                  Zhiying Wang and
                  Mikko H. Lipasti},
  title        = {Adaptive Cache and Concurrency Allocation on GPGPUs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {14},
  number       = {2},
  pages        = {90--93},
  year         = {2015},
  url          = {https://doi.org/10.1109/LCA.2014.2359882},
  doi          = {10.1109/LCA.2014.2359882},
  timestamp    = {Wed, 02 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ZhengWL15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ArelakisS14,
  author       = {Angelos Arelakis and
                  Per Stenstr{\"{o}}m},
  title        = {A Case for a Value-Aware Cache},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {1--4},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2012.31},
  doi          = {10.1109/L-CA.2012.31},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ArelakisS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CakmakciE14,
  author       = {Yaman Cakmakci and
                  Oguz Ergin},
  title        = {Exploiting Virtual Addressing for Increasing Reliability},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {29--32},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.2},
  doi          = {10.1109/L-CA.2013.2},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/CakmakciE14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChenGYBL14,
  author       = {Zheng Chen and
                  Huaxi Gu and
                  Yintang Yang and
                  Luying Bai and
                  Hui Li},
  title        = {A Power Efficient and Compact Optical Interconnect for Network-on-Chip},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {5--8},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.5},
  doi          = {10.1109/L-CA.2013.5},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChenGYBL14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChouLCG14,
  author       = {Yu{-}Liang Chou and
                  Shaoshan Liu and
                  Eui{-}Young Chung and
                  Jean{-}Luc Gaudiot},
  title        = {An Energy and Performance Efficient {DVFS} Scheme for Irregular Parallel
                  Divide-and-Conquer Algorithms on the Intel {SCC}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {13--16},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.1},
  doi          = {10.1109/L-CA.2013.1},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChouLCG14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CotaMPCC14,
  author       = {Emilio G. Cota and
                  Paolo Mantovani and
                  Michele Petracca and
                  Mario R. Casu and
                  Luca P. Carloni},
  title        = {Accelerator Memory Reuse in the Dark Silicon Era},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {9--12},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2012.29},
  doi          = {10.1109/L-CA.2012.29},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/CotaMPCC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/EyermanE14,
  author       = {Stijn Eyerman and
                  Lieven Eeckhout},
  title        = {Restating the Case for Weighted-IPC Metrics to Evaluate Multiprogram
                  Workload Performance},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {93--96},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.9},
  doi          = {10.1109/L-CA.2013.9},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/EyermanE14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IlicPS14,
  author       = {Aleksandar Ilic and
                  Frederico Pratas and
                  Leonel Sousa},
  title        = {Cache-aware Roofline model: Upgrading the loft},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {21--24},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.6},
  doi          = {10.1109/L-CA.2013.6},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/IlicPS14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKH14,
  author       = {Daehoon Kim and
                  Hwanju Kim and
                  Jaehyuk Huh},
  title        = {vCache: Providing a Transparent View of the {LLC} in Virtualized Environments},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {109--112},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.20},
  doi          = {10.1109/L-CA.2013.20},
  timestamp    = {Thu, 02 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimKH14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimLKK14,
  author       = {Youngsok Kim and
                  Jaewon Lee and
                  Donggyu Kim and
                  Jangwoo Kim},
  title        = {ScaleGPU: {GPU} Architecture for Memory-Unaware {GPU} Programming},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {101--104},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.19},
  doi          = {10.1109/L-CA.2013.19},
  timestamp    = {Thu, 23 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimLKK14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KvatinskyNEFKW14,
  author       = {Shahar Kvatinsky and
                  Yuval H. Nacson and
                  Yoav Etsion and
                  Eby G. Friedman and
                  Avinoam Kolodny and
                  Uri C. Weiser},
  title        = {Memristor-Based Multithreading},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {41--44},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.3},
  doi          = {10.1109/L-CA.2013.3},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KvatinskyNEFKW14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LavasaniAC14,
  author       = {Maysam Lavasani and
                  Hari Angepat and
                  Derek Chiou},
  title        = {An FPGA-based In-Line Accelerator for Memcached},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {57--60},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.17},
  doi          = {10.1109/L-CA.2013.17},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LavasaniAC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiuJMACV14,
  author       = {Qixiao Liu and
                  V{\'{\i}}ctor Jim{\'{e}}nez and
                  Miquel Moret{\'{o}} and
                  Jaume Abella and
                  Francisco J. Cazorla and
                  Mateo Valero},
  title        = {Per-task Energy Accounting in Computing Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {85--88},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.24},
  doi          = {10.1109/L-CA.2013.24},
  timestamp    = {Tue, 18 May 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LiuJMACV14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MahmoodiLAAHLT14,
  author       = {Hamid Mahmoodi and
                  Sridevi Srinivasan Lakshmipuram and
                  Manish Arora and
                  Yashar Asgarieh and
                  Houman Homayoun and
                  Bill Lin and
                  Dean M. Tullsen},
  title        = {Resistive Computation: {A} Critique},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {89--92},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.23},
  doi          = {10.1109/L-CA.2013.23},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MahmoodiLAAHLT14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MartinsenGI14,
  author       = {Jan Kasper Martinsen and
                  H{\aa}kan Grahn and
                  Anders Isberg},
  title        = {Heuristics for Thread-Level Speculation in Web Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {77--80},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.26},
  doi          = {10.1109/L-CA.2013.26},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MartinsenGI14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MoradMYGW14,
  author       = {Amir Morad and
                  Tomer Y. Morad and
                  Leonid Yavits and
                  Ran Ginosar and
                  Uri C. Weiser},
  title        = {Generalized MultiAmdahl: Optimization of Heterogeneous Multi-Accelerator
                  SoC},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {37--40},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2012.34},
  doi          = {10.1109/L-CA.2012.34},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MoradMYGW14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NandakumarM14,
  author       = {Vivek S. Nandakumar and
                  Malgorzata Marek{-}Sadowska},
  title        = {On Optimal Kernel Size for Integrated CPU-GPUs - {A} Case Study},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {81--84},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.27},
  doi          = {10.1109/L-CA.2013.27},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/NandakumarM14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RotemB14,
  author       = {Nadav Rotem and
                  Yosi Ben{-}Asher},
  title        = {Block Unification IF-conversion for High Performance Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {17--20},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2012.28},
  doi          = {10.1109/L-CA.2012.28},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RotemB14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RotemGWM14,
  author       = {Efraim Rotem and
                  Ran Ginosar and
                  Uri C. Weiser and
                  Avi Mendelson},
  title        = {Energy Aware Race to Halt: {A} Down to EARtH Approach for Platform
                  Energy Management},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {25--28},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2012.32},
  doi          = {10.1109/L-CA.2012.32},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RotemGWM14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SankarG14,
  author       = {Sriram Sankar and
                  Sudhanva Gurumurthi},
  title        = {Soft Failures in Large Datacenters},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {105--108},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.25},
  doi          = {10.1109/L-CA.2013.25},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SankarG14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShimLKD14,
  author       = {Keun Sup Shim and
                  Mieszko Lis and
                  Omer Khan and
                  Srinivas Devadas},
  title        = {Thread Migration Prediction for Distributed Shared Caches},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {53--56},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2012.30},
  doi          = {10.1109/L-CA.2012.30},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShimLKD14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SongYC14,
  author       = {Xiang Song and
                  Jian Yang and
                  Haibo Chen},
  title        = {Architecting Flash-based Solid-State Drive for High-performance {I/O}
                  Virtualization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {61--64},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.22},
  doi          = {10.1109/L-CA.2013.22},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SongYC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WingbermuehleCC14,
  author       = {Joseph G. Wingbermuehle and
                  Ron K. Cytron and
                  Roger D. Chamberlain},
  title        = {Optimization of Application-Specific Memories},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {45--48},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.7},
  doi          = {10.1109/L-CA.2013.7},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WingbermuehleCC14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WolffB14,
  author       = {Sonya R. Wolff and
                  Ronald D. Barnes},
  title        = {Revisiting Using the Results of Pre-Executed Instructions in Runahead
                  Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {97--100},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.21},
  doi          = {10.1109/L-CA.2013.21},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WolffB14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Wu14,
  author       = {Carole{-}Jean Wu},
  title        = {Architectural Thermal Energy Harvesting Opportunities for Sustainable
                  Computing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {65--68},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.16},
  doi          = {10.1109/L-CA.2013.16},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Wu14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XuWGLQ14,
  author       = {Yunlong Xu and
                  Rui Wang and
                  Nilanjan Goswami and
                  Tao Li and
                  Depei Qian},
  title        = {Software Transactional Memory for {GPU} Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {49--52},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.4},
  doi          = {10.1109/L-CA.2013.4},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/XuWGLQ14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YavitsMG14,
  author       = {Leonid Yavits and
                  Amir Morad and
                  Ran Ginosar},
  title        = {Cache Hierarchy Optimization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {69--72},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.18},
  doi          = {10.1109/L-CA.2013.18},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YavitsMG14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YazdanshenasPFP14,
  author       = {Sadegh Yazdanshenas and
                  Marzieh Ranjbar Pirbasti and
                  Mahdi Fazeli and
                  Ahmad Patooghy},
  title        = {Coding Last Level {STT-RAM} Cache for High Endurance and Low Power},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {2},
  pages        = {73--76},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2013.8},
  doi          = {10.1109/L-CA.2013.8},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/YazdanshenasPFP14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhuSLR14,
  author       = {Yuhao Zhu and
                  Aditya Srikanth and
                  Jingwen Leng and
                  Vijay Janapa Reddi},
  title        = {Exploiting Webpage Characteristics for Energy-Efficient Mobile Web
                  Browsing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {13},
  number       = {1},
  pages        = {33--36},
  year         = {2014},
  url          = {https://doi.org/10.1109/L-CA.2012.33},
  doi          = {10.1109/L-CA.2012.33},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhuSLR14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BlemEASB13,
  author       = {Emily R. Blem and
                  Hadi Esmaeilzadeh and
                  Ren{\'{e}}e St. Amant and
                  Karthikeyan Sankaralingam and
                  Doug Burger},
  title        = {Multicore Model from Abstract Single Core Inputs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {2},
  pages        = {59--62},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.27},
  doi          = {10.1109/L-CA.2012.27},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BlemEASB13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DelimitrouK13,
  author       = {Christina Delimitrou and
                  Christos Kozyrakis},
  title        = {The Netflix Challenge: Datacenter Edition},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {1},
  pages        = {29--32},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.10},
  doi          = {10.1109/L-CA.2012.10},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DelimitrouK13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DuongV13,
  author       = {Nam Duong and
                  Alexander V. Veidenbaum},
  title        = {Compiler-Assisted, Selective Out-Of-Order Commit},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {1},
  pages        = {21--24},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.8},
  doi          = {10.1109/L-CA.2012.8},
  timestamp    = {Sun, 22 Oct 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/DuongV13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JianSD013,
  author       = {Xun Jian and
                  John Sartori and
                  Henry Duwe and
                  Rakesh Kumar},
  title        = {High Performance, Energy Efficient Chipkill Correct Memory with Multidimensional
                  Parity},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {2},
  pages        = {39--42},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.21},
  doi          = {10.1109/L-CA.2012.21},
  timestamp    = {Wed, 14 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JianSD013.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JooP13,
  author       = {Yongsoo Joo and
                  Sangsoo Park},
  title        = {A Hybrid {PRAM} and {STT-RAM} Cache Architecture for Extending the
                  Lifetime of {PRAM} Caches},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {2},
  pages        = {55--58},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.24},
  doi          = {10.1109/L-CA.2012.24},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JooP13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Kai0L13,
  author       = {Yi Kai and
                  Yi Wang and
                  Bin Liu},
  title        = {GreenRouter: Reducing Power by Innovating Router's Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {2},
  pages        = {51--54},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.23},
  doi          = {10.1109/L-CA.2012.23},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Kai0L13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KarsliRBEM13,
  author       = {Burak Karsli and
                  Pedro Reviriego and
                  M. Fatih Balli and
                  Oguz Ergin and
                  Juan Antonio Maestro},
  title        = {Enhanced Duplication: a Technique to Correct Soft Errors in Narrow
                  Values},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {1},
  pages        = {13--16},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.6},
  doi          = {10.1109/L-CA.2012.6},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KarsliRBEM13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimKK13,
  author       = {Hanjoon Kim and
                  Yonggon Kim and
                  John Kim},
  title        = {Clumsy Flow Control for High-Throughput Bufferless On-Chip Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {2},
  pages        = {47--50},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.22},
  doi          = {10.1109/L-CA.2012.22},
  timestamp    = {Thu, 26 Sep 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimKK13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LyonsWB13,
  author       = {Michael J. Lyons and
                  Gu{-}Yeon Wei and
                  David M. Brooks},
  title        = {Shrink-Fit: {A} Framework for Flexible Accelerator Sizing},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {1},
  pages        = {17--20},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.7},
  doi          = {10.1109/L-CA.2012.7},
  timestamp    = {Wed, 09 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LyonsWB13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MaddahCM13,
  author       = {Rakan Maddah and
                  Sangyeun Cho and
                  Rami G. Melhem},
  title        = {Data Dependent Sparing to Manage Better-Than-Bad Blocks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {2},
  pages        = {43--46},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.20},
  doi          = {10.1109/L-CA.2012.20},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MaddahCM13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Martinez13,
  author       = {Jos{\'{e}} F. Mart{\'{\i}}nez},
  title        = {A Message from the New Editor-in-Chief and Introduction of New Associate
                  Editors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {1},
  pages        = {2--4},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2013.12},
  doi          = {10.1109/L-CA.2013.12},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Martinez13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Martinez13a,
  author       = {Jos{\'{e}} F. Mart{\'{\i}}nez},
  title        = {Editorial},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {2},
  pages        = {37--38},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2013.32},
  doi          = {10.1109/L-CA.2013.32},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Martinez13a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Michaud13,
  author       = {Pierre Michaud},
  title        = {Demystifying multicore throughput metrics},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {2},
  pages        = {63--66},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.25},
  doi          = {10.1109/L-CA.2012.25},
  timestamp    = {Thu, 23 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Michaud13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/NilakantanBH13,
  author       = {Siddharth Nilakantan and
                  Steven J. Battle and
                  Mark Hempstead},
  title        = {Metrics for Early-Stage Modeling of Many-Accelerator Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {1},
  pages        = {25--28},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.9},
  doi          = {10.1109/L-CA.2012.9},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/NilakantanBH13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Skadron13,
  author       = {Kevin Skadron},
  title        = {Introducing the New Editor-in-Chief of the {IEEE} Computer Architecture
                  Letters},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {1},
  pages        = {1},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2013.15},
  doi          = {10.1109/L-CA.2013.15},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Skadron13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SunCL13,
  author       = {Guang Sun and
                  Chia{-}Wei Chang and
                  Bill Lin},
  title        = {A New Worst-Case Throughput Bound for Oblivious Routing in Odd Radix
                  Mesh Network},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {1},
  pages        = {9--12},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.5},
  doi          = {10.1109/L-CA.2012.5},
  timestamp    = {Mon, 01 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SunCL13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TavakkolAS13,
  author       = {Arash Tavakkol and
                  Mohammad Arjomand and
                  Hamid Sarbazi{-}Azad},
  title        = {Network-on-SSD: {A} Scalable and High-Performance Communication Design
                  Paradigm for SSDs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {1},
  pages        = {5--8},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.4},
  doi          = {10.1109/L-CA.2012.4},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/TavakkolAS13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TembeyVBSB13,
  author       = {Priyanka Tembey and
                  Augusto Vega and
                  Alper Buyuktosunoglu and
                  Dilma Da Silva and
                  Pradip Bose},
  title        = {{SMT} Switch: Software Mechanisms for Power Shifting},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {12},
  number       = {2},
  pages        = {67--70},
  year         = {2013},
  url          = {https://doi.org/10.1109/L-CA.2012.26},
  doi          = {10.1109/L-CA.2012.26},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/TembeyVBSB13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/0020VP12,
  author       = {Jie Chen and
                  Guru Venkataramani and
                  Gabriel Parmer},
  title        = {The Need for Power Debugging in the Multi-Core Environment},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {2},
  pages        = {57--60},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2012.1},
  doi          = {10.1109/L-CA.2012.1},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/0020VP12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DebCG12,
  author       = {Abhishek Deb and
                  Josep M. Codina and
                  Antonio Gonz{\'{a}}lez},
  title        = {A {HW/SW} Co-designed Programmable Functional Unit},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {1},
  pages        = {9--12},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.23},
  doi          = {10.1109/L-CA.2011.23},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DebCG12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DelimitrouSVK12,
  author       = {Christina Delimitrou and
                  Sriram Sankar and
                  Kushagra Vaid and
                  Christos Kozyrakis},
  title        = {Decoupling Datacenter Storage Studies from Access to Large-Scale Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {2},
  pages        = {53--56},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.37},
  doi          = {10.1109/L-CA.2011.37},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DelimitrouSVK12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FinlaysonUWT12,
  author       = {Ian Finlayson and
                  Gang{-}Ryung Uh and
                  David B. Whalley and
                  Gary S. Tyson},
  title        = {An Overview of Static Pipelining},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {1},
  pages        = {17--20},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.26},
  doi          = {10.1109/L-CA.2011.26},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/FinlaysonUWT12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KongLZ12,
  author       = {Ji Kong and
                  Peilin Liu and
                  Yu Zhang},
  title        = {Atomic Streaming: {A} Framework of On-Chip Data Supply System for
                  Task-Parallel MPSoCs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {1},
  pages        = {5--8},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.21},
  doi          = {10.1109/L-CA.2011.21},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KongLZ12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LakshminarayanaLKS12,
  author       = {Nagesh B. Lakshminarayana and
                  Jaekyu Lee and
                  Hyesoon Kim and
                  Jinwoo Shin},
  title        = {{DRAM} Scheduling Policy for {GPGPU} Architectures Based on a Potential
                  Function},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {2},
  pages        = {33--36},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.32},
  doi          = {10.1109/L-CA.2011.32},
  timestamp    = {Fri, 09 Apr 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LakshminarayanaLKS12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiMJ12,
  author       = {Yang Li and
                  Rami G. Melhem and
                  Alex K. Jones},
  title        = {Leveraging Sharing in Second Level Translation-Lookaside Buffers for
                  Chip Multiprocessors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {2},
  pages        = {49--52},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.35},
  doi          = {10.1109/L-CA.2011.35},
  timestamp    = {Tue, 21 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiMJ12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MezaCYMR12,
  author       = {Justin Meza and
                  Jichuan Chang and
                  HanBin Yoon and
                  Onur Mutlu and
                  Parthasarathy Ranganathan},
  title        = {Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity
                  {DRAM} Cache Management},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {2},
  pages        = {61--64},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2012.2},
  doi          = {10.1109/L-CA.2012.2},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MezaCYMR12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MillerTT12,
  author       = {Timothy N. Miller and
                  Renji Thomas and
                  Radu Teodorescu},
  title        = {Mitigating the Effects of Process Variation in Ultra-low Voltage Chip
                  Multiprocessors using Dual Supply Voltages and Half-Speed Units},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {2},
  pages        = {45--48},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.36},
  doi          = {10.1109/L-CA.2011.36},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MillerTT12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PandaGJ12,
  author       = {Reena Panda and
                  Paul V. Gratz and
                  Daniel A. Jim{\'{e}}nez},
  title        = {B-Fetch: Branch Prediction Directed Prefetching for In-Order Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {2},
  pages        = {41--44},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.33},
  doi          = {10.1109/L-CA.2011.33},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PandaGJ12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PiscitelliP12,
  author       = {Roberta Piscitelli and
                  Andy D. Pimentel},
  title        = {A High-Level Power Model for MPSoC on {FPGA}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {1},
  pages        = {13--16},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.24},
  doi          = {10.1109/L-CA.2011.24},
  timestamp    = {Thu, 23 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/PiscitelliP12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SethumadhavanRT12,
  author       = {Simha Sethumadhavan and
                  Ryan Roberts and
                  Yannis P. Tsividis},
  title        = {A Case for Hybrid Discrete-Continuous Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {1},
  pages        = {1--4},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.22},
  doi          = {10.1109/L-CA.2011.22},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SethumadhavanRT12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangCZWCCW12,
  author       = {Yaohua Wang and
                  Shuming Chen and
                  Kai Zhang and
                  Jianghua Wan and
                  Xiaowen Chen and
                  Hu Chen and
                  Haibo Wang},
  title        = {Instruction Shuffle: Achieving MIMD-like Performance on {SIMD} Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {2},
  pages        = {37--40},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.34},
  doi          = {10.1109/L-CA.2011.34},
  timestamp    = {Fri, 24 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WangCZWCCW12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WuKE12,
  author       = {Lisa Wu and
                  Martha A. Kim and
                  Stephen A. Edwards},
  title        = {Cache Impacts of Datatype Acceleration},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {1},
  pages        = {21--24},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2011.25},
  doi          = {10.1109/L-CA.2011.25},
  timestamp    = {Mon, 26 Jun 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WuKE12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZidenbergKW12,
  author       = {Tsahee Zidenberg and
                  Isaac Keslassy and
                  Uri C. Weiser},
  title        = {MultiAmdahl: How Should {I} Divide My Heterogenous Chip?},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {11},
  number       = {2},
  pages        = {65--68},
  year         = {2012},
  url          = {https://doi.org/10.1109/L-CA.2012.3},
  doi          = {10.1109/L-CA.2012.3},
  timestamp    = {Fri, 27 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZidenbergKW12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChoiZYY11,
  author       = {Inseok Choi and
                  Minshu Zhao and
                  Xu Yang and
                  Donald Yeung},
  title        = {Experience with Improving Distributed Shared Cache Performance on
                  Tilera's Tile Processor},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {2},
  pages        = {45--48},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.18},
  doi          = {10.1109/L-CA.2011.18},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChoiZYY11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GouG11,
  author       = {Chunyang Gou and
                  Georgi Gaydadjiev},
  title        = {Exploiting {SPMD} Horizontal Locality},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {1},
  pages        = {20--23},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.5},
  doi          = {10.1109/L-CA.2011.5},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GouG11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HernandezRFSD11,
  author       = {Carles Hern{\'{a}}ndez and
                  Antoni Roca and
                  Jos{\'{e}} Flich and
                  Federico Silla and
                  Jos{\'{e}} Duato},
  title        = {Fault-Tolerant Vertical Link Design for Effective 3D Stacking},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {2},
  pages        = {41--44},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.17},
  doi          = {10.1109/L-CA.2011.17},
  timestamp    = {Mon, 18 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HernandezRFSD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HoSUS11,
  author       = {Chen{-}Han Ho and
                  Garret Staus and
                  Aaron Ullmer and
                  Karu Sankaralingam},
  title        = {Exploring the Interaction Between Device Lifetime Reliability and
                  Security Vulnerabilities},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {2},
  pages        = {37--40},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.16},
  doi          = {10.1109/L-CA.2011.16},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/HoSUS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KhanLSD11,
  author       = {Omer Khan and
                  Mieszko Lis and
                  Yildiz Sinangil and
                  Srinivas Devadas},
  title        = {{DCC:} {A} Dependable Cache Coherence Multicore Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {1},
  pages        = {12--15},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.3},
  doi          = {10.1109/L-CA.2011.3},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KhanLSD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MarsTH11,
  author       = {Jason Mars and
                  Lingjia Tang and
                  Robert Hundt},
  title        = {Heterogeneity in "Homogeneous" Warehouse-Scale Computers: {A} Performance
                  Opportunity},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {2},
  pages        = {29--32},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.14},
  doi          = {10.1109/L-CA.2011.14},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MarsTH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MichelogiannakisJBD11,
  author       = {George Michelogiannakis and
                  Nan Jiang and
                  Daniel Becker and
                  William J. Dally},
  title        = {Packet Chaining: Efficient Single-Cycle Allocation for On-Chip Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {2},
  pages        = {33--36},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.15},
  doi          = {10.1109/L-CA.2011.15},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MichelogiannakisJBD11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PrietoPG11,
  author       = {Pablo Prieto and
                  Valentin Puente and
                  Jos{\'{e}}{-}{\'{A}}ngel Gregorio},
  title        = {Multilevel Cache Modeling for Chip-Multiprocessor Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {2},
  pages        = {49--52},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.20},
  doi          = {10.1109/L-CA.2011.20},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PrietoPG11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RosenfeldCJ11,
  author       = {Paul Rosenfeld and
                  Elliott Cooper{-}Balis and
                  Bruce L. Jacob},
  title        = {DRAMSim2: {A} Cycle Accurate Memory System Simulator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {1},
  pages        = {16--19},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.4},
  doi          = {10.1109/L-CA.2011.4},
  timestamp    = {Fri, 13 Nov 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RosenfeldCJ11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SioziosRS11,
  author       = {Kostas Siozios and
                  Dimitrios Rodopoulos and
                  Dimitrios Soudris},
  title        = {On Supporting Rapid Thermal Analysis},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {2},
  pages        = {53--56},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.19},
  doi          = {10.1109/L-CA.2011.19},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SioziosRS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Skadron11,
  author       = {Kevin Skadron},
  title        = {Editorial: Letter from the Editor-in-Chief},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {1},
  pages        = {1--3},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.13},
  doi          = {10.1109/L-CA.2011.13},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Skadron11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TangLGLG11,
  author       = {Jie Tang and
                  Shaoshan Liu and
                  Zhimin Gu and
                  Chen Liu and
                  Jean{-}Luc Gaudiot},
  title        = {Prefetching in Embedded Mobile Systems Can Be Energy-Efficient},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {1},
  pages        = {8--11},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.2},
  doi          = {10.1109/L-CA.2011.2},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/TangLGLG11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/VandierendonckS11,
  author       = {Hans Vandierendonck and
                  Andr{\'{e}} Seznec},
  title        = {Fairness Metrics for Multi-Threaded Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {1},
  pages        = {4--7},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.1},
  doi          = {10.1109/L-CA.2011.1},
  timestamp    = {Thu, 23 Jun 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/VandierendonckS11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangJFH11,
  author       = {Xiaoqun Wang and
                  Zhen Ji and
                  Chen Fu and
                  Ming Hu},
  title        = {{GCMS:} {A} Global Contention Management Scheme in Hardware Transactional
                  Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {10},
  number       = {1},
  pages        = {24--27},
  year         = {2011},
  url          = {https://doi.org/10.1109/L-CA.2011.6},
  doi          = {10.1109/L-CA.2011.6},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WangJFH11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FangHLLLDM10,
  author       = {Zhen Fang and
                  Erik G. Hallnor and
                  Bin Li and
                  Mike Leddige and
                  Seung Eun Lee and
                  Donglai Dai and
                  Srihari Makineni},
  title        = {Boomerang: Reducing Power Consumption of Response Packets in NoCs
                  with Minimal Performance Impact},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {2},
  pages        = {49--52},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.15},
  doi          = {10.1109/L-CA.2010.15},
  timestamp    = {Thu, 08 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/FangHLLLDM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HammoudCM10,
  author       = {Mohammad Hammoud and
                  Sangyeun Cho and
                  Rami G. Melhem},
  title        = {A Dynamic Pressure-Aware Associative Placement Strategy for Large
                  Scale Chip Multiprocessors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {1},
  pages        = {29--32},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.7},
  doi          = {10.1109/L-CA.2010.7},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HammoudCM10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HiltonR10,
  author       = {Andrew D. Hilton and
                  Amir Roth},
  title        = {SMT-Directory: Efficient Load-Load Ordering for {SMT}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {1},
  pages        = {25--28},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.8},
  doi          = {10.1109/L-CA.2010.8},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HiltonR10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HoangBLZDJ10,
  author       = {Giang Hoang and
                  Chang Bae and
                  Jack Lange and
                  Lide Zhang and
                  Peter A. Dinda and
                  Russ Joseph},
  title        = {A Case for Alternative Nested Paging Models for Virtualized Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {1},
  pages        = {17--20},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.6},
  doi          = {10.1109/L-CA.2010.6},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HoangBLZDJ10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/IqbalLG10,
  author       = {Syed Muhammad Zeeshan Iqbal and
                  Yuchen Liang and
                  H{\aa}kan Grahn},
  title        = {ParMiBench - An Open-Source Benchmark for Embedded Multiprocessor
                  Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {2},
  pages        = {45--48},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.14},
  doi          = {10.1109/L-CA.2010.14},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/IqbalLG10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimG10,
  author       = {Hyungjun Kim and
                  Paul V. Gratz},
  title        = {Leveraging Unused Cache Block Words to Reduce Power in {CMP} Interconnect},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {1},
  pages        = {33--36},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.9},
  doi          = {10.1109/L-CA.2010.9},
  timestamp    = {Tue, 29 Dec 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KimG10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KrimerPEC10,
  author       = {Evgeni Krimer and
                  Robert Pawlowski and
                  Mattan Erez and
                  Patrick Chiang},
  title        = {Synctium: a Near-Threshold Stream Processor for Energy-Constrained
                  Parallel Applications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {1},
  pages        = {21--24},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.5},
  doi          = {10.1109/L-CA.2010.5},
  timestamp    = {Mon, 05 Feb 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/KrimerPEC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LyonsHWB10,
  author       = {Michael J. Lyons and
                  Mark Hempstead and
                  Gu{-}Yeon Wei and
                  David M. Brooks},
  title        = {The Accelerator Store framework for high-performance, low-power accelerator-based
                  systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {2},
  pages        = {53--56},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.16},
  doi          = {10.1109/L-CA.2010.16},
  timestamp    = {Wed, 09 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LyonsHWB10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ManevichCKW10,
  author       = {Ran Manevich and
                  Israel Cidon and
                  Avinoam Kolodny and
                  Isask'har Walter},
  title        = {Centralized Adaptive Routing for NoCs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {2},
  pages        = {57--60},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.17},
  doi          = {10.1109/L-CA.2010.17},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ManevichCKW10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ParkSSML10,
  author       = {Seon{-}Yeong Park and
                  Euiseong Seo and
                  Ji{-}Yong Shin and
                  Seungryoul Maeng and
                  Joonwon Lee},
  title        = {Exploiting Internal Parallelism of Flash-based SSDs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {1},
  pages        = {9--12},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.3},
  doi          = {10.1109/L-CA.2010.3},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ParkSSML10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PatilL10,
  author       = {Shruti R. Patil and
                  David J. Lilja},
  title        = {Using Resampling Techniques to Compute Confidence Intervals for the
                  Harmonic Mean of Rate-Based Performance Metrics},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {1},
  pages        = {1--4},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.1},
  doi          = {10.1109/L-CA.2010.1},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PatilL10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Seznec10,
  author       = {Andr{\'{e}} Seznec},
  title        = {A Phase Change Memory as a Secure Main Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {1},
  pages        = {5--8},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.2},
  doi          = {10.1109/L-CA.2010.2},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Seznec10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Skadron10,
  author       = {Kevin Skadron},
  title        = {Editorial: Letter from the Editor-in-Chief},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {2},
  pages        = {37--44},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.27},
  doi          = {10.1109/L-CA.2010.27},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Skadron10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SubramoniPAP10,
  author       = {Hari Subramoni and
                  Fabrizio Petrini and
                  Virat Agarwal and
                  Davide Pasetto},
  title        = {Intra-Socket and Inter-Socket Communication in Multi-core Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {1},
  pages        = {13--16},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.4},
  doi          = {10.1109/L-CA.2010.4},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SubramoniPAP10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangLS10,
  author       = {Meng Zhang and
                  Alvin R. Lebeck and
                  Daniel J. Sorin},
  title        = {Fractal Consistency: Architecting the Memory System to Facilitate
                  Verification},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {9},
  number       = {2},
  pages        = {61--64},
  year         = {2010},
  url          = {https://doi.org/10.1109/L-CA.2010.18},
  doi          = {10.1109/L-CA.2010.18},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhangLS10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AhnLSJ09,
  author       = {Jung Ho Ahn and
                  Jacob Leverich and
                  Robert S. Schreiber and
                  Norman P. Jouppi},
  title        = {Multicore {DIMM:} an Energy Efficient Memory Module with Independently
                  Controlled DRAMs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {1},
  pages        = {5--8},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2008.13},
  doi          = {10.1109/L-CA.2008.13},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AhnLSJ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Antelo09,
  author       = {Elisardo Antelo},
  title        = {A Comment on "Beyond Fat-tree: Unidirectional Load-Balanced Multistage
                  Interconnection Network"},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {1},
  pages        = {33--34},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.6},
  doi          = {10.1109/L-CA.2009.6},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Antelo09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BaldassinKAAC09,
  author       = {Alexandro Baldassin and
                  Felipe Klein and
                  Guido Araujo and
                  Rodolfo Azevedo and
                  Paulo Centoducatte},
  title        = {Characterizing the Energy Consumption of Software Transactional Memory},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {2},
  pages        = {56--59},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.47},
  doi          = {10.1109/L-CA.2009.47},
  timestamp    = {Wed, 07 Dec 2022 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BaldassinKAAC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BalfourHD09,
  author       = {James D. Balfour and
                  R. C. Halting and
                  William J. Dally},
  title        = {Operand Registers and Explicit Operand Forwarding},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {2},
  pages        = {60--63},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.45},
  doi          = {10.1109/L-CA.2009.45},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BalfourHD09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BarnesVL09,
  author       = {Christopher Barnes and
                  Pranav Vaidya and
                  Jaehwan John Lee},
  title        = {An XML-Based {ADL} Framework for Automatic Generation of Multithreaded
                  Computer Architecture Simulators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {1},
  pages        = {13--16},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.2},
  doi          = {10.1109/L-CA.2009.2},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/BarnesVL09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChiouAPS09,
  author       = {Derek Chiou and
                  Hari Angepat and
                  Nikhil A. Patil and
                  Dam Sunwoo},
  title        = {Accurate Functional-First Multicore Simulators},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {2},
  pages        = {64--67},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.44},
  doi          = {10.1109/L-CA.2009.44},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChiouAPS09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DesaiS09,
  author       = {Aniruddha Desai and
                  Jugdutt Singh},
  title        = {Architecture Independent Characterization of Embedded Java Workloads},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {1},
  pages        = {29--32},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.7},
  doi          = {10.1109/L-CA.2009.7},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DesaiS09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Gaudiot09,
  author       = {Jean{-}Luc Gaudiot},
  title        = {Introducing the New Editor-in-Chief of {IEEE} Computer Architecture
                  Letters},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {2},
  pages        = {37--38},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.60},
  doi          = {10.1109/L-CA.2009.60},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Gaudiot09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GuzBKKMW09,
  author       = {Zvika Guz and
                  Evgeny Bolotin and
                  Idit Keidar and
                  Avinoam Kolodny and
                  Avi Mendelson and
                  Uri C. Weiser},
  title        = {Many-Core vs. Many-Thread Machines: Stay Away From the Valley},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {1},
  pages        = {25--28},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.4},
  doi          = {10.1109/L-CA.2009.4},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GuzBKKMW09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeverichMTRK09,
  author       = {Jacob Leverich and
                  Matteo Monchiero and
                  Vanish Talwar and
                  Parthasarathy Ranganathan and
                  Christos Kozyrakis},
  title        = {Power Management of Datacenter Workloads Using Per-Core Power Gating},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {2},
  pages        = {48--51},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.46},
  doi          = {10.1109/L-CA.2009.46},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LeverichMTRK09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LuqueMCGBV09,
  author       = {Carlos Luque and
                  Miquel Moret{\'{o}} and
                  Francisco J. Cazorla and
                  Roberto Gioiosa and
                  Alper Buyuktosunoglu and
                  Mateo Valero},
  title        = {{CPU} Accounting in {CMP} Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {1},
  pages        = {17--20},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.3},
  doi          = {10.1109/L-CA.2009.3},
  timestamp    = {Sun, 25 Jul 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LuqueMCGBV09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Musoll09,
  author       = {Enric Musoll},
  title        = {A Process-Variation Aware Technique for Tile-Based, Massive Multicore
                  Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {2},
  pages        = {52--55},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.48},
  doi          = {10.1109/L-CA.2009.48},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Musoll09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RamanujamL09,
  author       = {Rohit Sunkam Ramanujam and
                  Bill Lin},
  title        = {Weighted Random Routing on Torus Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {1},
  pages        = {1--4},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2008.14},
  doi          = {10.1109/L-CA.2008.14},
  timestamp    = {Mon, 01 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/RamanujamL09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Skadron09,
  author       = {Kevin Skadron},
  title        = {Letter from the Editor},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {2},
  pages        = {39},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.61},
  doi          = {10.1109/L-CA.2009.61},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Skadron09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SoteriouRLP09,
  author       = {Vassos Soteriou and
                  Rohit Sunkam Ramanujam and
                  Bill Lin and
                  Li{-}Shiuan Peh},
  title        = {A High-Throughput Distributed Shared-Buffer NoC Router},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {1},
  pages        = {21--24},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.5},
  doi          = {10.1109/L-CA.2009.5},
  timestamp    = {Mon, 01 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SoteriouRLP09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SudarsanamKD09,
  author       = {Arvind Sudarsanam and
                  Ramachandra Kallam and
                  Aravind Dasu},
  title        = {{PRR-PRR} Dynamic Relocation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {2},
  pages        = {44--47},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.49},
  doi          = {10.1109/L-CA.2009.49},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SudarsanamKD09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WangCYC09,
  author       = {Po{-}Han Wang and
                  Yen{-}Ming Chen and
                  Chia{-}Lin Yang and
                  Yu{-}Jung Cheng},
  title        = {A Predictive Shutdown Technique for {GPU} Shader Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {1},
  pages        = {9--12},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.1},
  doi          = {10.1109/L-CA.2009.1},
  timestamp    = {Tue, 04 May 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/WangCYC09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XinJ09,
  author       = {Jing Xin and
                  Russ Joseph},
  title        = {Exploiting Locality to Improve Circuit-Level Timing Speculation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {8},
  number       = {2},
  pages        = {40--43},
  year         = {2009},
  url          = {https://doi.org/10.1109/L-CA.2009.50},
  doi          = {10.1109/L-CA.2009.50},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/XinJ09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BalfourDBPP07,
  author       = {James D. Balfour and
                  William J. Dally and
                  David Black{-}Schaffer and
                  Vishal Parikh and
                  JongSoo Park},
  title        = {An Energy-Efficient Processor Architecture for Embedded Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {1},
  pages        = {29--32},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.1},
  doi          = {10.1109/L-CA.2008.1},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BalfourDBPP07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BiswasREM07,
  author       = {Arijit Biswas and
                  Paul Racunas and
                  Joel S. Emer and
                  Shubhendu S. Mukherjee},
  title        = {Computing Accurate AVFs using {ACE} Analysis on Performance Models:
                  {A} Rebuttal},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {1},
  pages        = {21--24},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2007.19},
  doi          = {10.1109/L-CA.2007.19},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BiswasREM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Black-SchafferBDPP08,
  author       = {David Black{-}Schaffer and
                  James D. Balfour and
                  William J. Dally and
                  Vishal Parikh and
                  JongSoo Park},
  title        = {Hierarchical Instruction Register Organization},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {2},
  pages        = {41--44},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.7},
  doi          = {10.1109/L-CA.2008.7},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Black-SchafferBDPP08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChoM07,
  author       = {Sangyeun Cho and
                  Rami G. Melhem},
  title        = {Corollaries to Amdahl's Law for Energy},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {1},
  pages        = {25--28},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2007.18},
  doi          = {10.1109/L-CA.2007.18},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChoM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DasOMZC07a,
  author       = {Abhishek Das and
                  Serkan Ozdemir and
                  Gokhan Memik and
                  Joseph Zambreno and
                  Alok N. Choudhary},
  title        = {Microarchitectures for Managing Chip Revenues under Process Variations},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {1},
  pages        = {5--8},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.3},
  doi          = {10.1109/L-CA.2008.3},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DasOMZC07a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FideJ08,
  author       = {Sevin Fide and
                  Stephen F. Jenks},
  title        = {Proactive Use of Shared {L3} Caches to Enhance Cache Communications
                  in Multi-Core Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {2},
  pages        = {57--60},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.10},
  doi          = {10.1109/L-CA.2008.10},
  timestamp    = {Sun, 05 Sep 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/FideJ08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/FlichD07,
  author       = {Jos{\'{e}} Flich and
                  Jos{\'{e}} Duato},
  title        = {Logic-Based Distributed Routing for NoCs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {1},
  pages        = {13--16},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2007.16},
  doi          = {10.1109/L-CA.2007.16},
  timestamp    = {Sun, 12 Nov 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/FlichD07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GolanderWR08,
  author       = {Amit Golander and
                  Shlomo Weiss and
                  Ronny Ronen},
  title        = {{DDMR:} Dynamic and Scalable Dual Modular Redundancy with Short Validation
                  Intervals},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {2},
  pages        = {65--68},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.12},
  doi          = {10.1109/L-CA.2008.12},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GolanderWR08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GomezVGLD08,
  author       = {Crisp{\'{\i}}n G{\'{o}}mez Requena and
                  Francisco Gilabert Villam{\'{o}}n and
                  Mar{\'{\i}}a Engracia G{\'{o}}mez and
                  Pedro L{\'{o}}pez and
                  Jos{\'{e}} Duato},
  title        = {Beyond Fat-tree: Unidirectional Load--Balanced Multistage Interconnection
                  Network},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {2},
  pages        = {49--52},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.8},
  doi          = {10.1109/L-CA.2008.8},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/GomezVGLD08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JoaoMKP07a,
  author       = {Jos{\'{e}} A. Joao and
                  Onur Mutlu and
                  Hyesoon Kim and
                  Yale N. Patt},
  title        = {Dynamic Predication of Indirect Jumps},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {1},
  pages        = {1--4},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.2},
  doi          = {10.1109/L-CA.2008.2},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JoaoMKP07a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeX08,
  author       = {Jaehwan John Lee and
                  Xiang Xiao},
  title        = {A Parallel Deadlock Detection Algorithm with {O(1)} Overall Run-time
                  Complexity},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {2},
  pages        = {45--48},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.4},
  doi          = {10.1109/L-CA.2008.4},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/LeeX08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiZSDS08,
  author       = {Zheng Li and
                  Changyun Zhu and
                  Li Shang and
                  Robert P. Dick and
                  Yihe Sun},
  title        = {Transaction-Aware Network-on-Chip Resource Reservation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {2},
  pages        = {53--56},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.9},
  doi          = {10.1109/L-CA.2008.9},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiZSDS08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PaoLL08,
  author       = {Derek Chi{-}Wai Pao and
                  Wei Lin and
                  Bin Liu},
  title        = {Pipelined Architecture for Multi-String Matching},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {2},
  pages        = {33--36},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.5},
  doi          = {10.1109/L-CA.2008.5},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PaoLL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RamanujamL08,
  author       = {Rohit Sunkam Ramanujam and
                  Bill Lin},
  title        = {Randomized Partially-Minimal Routing on Three-Dimensional Mesh Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {2},
  pages        = {37--40},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.6},
  doi          = {10.1109/L-CA.2008.6},
  timestamp    = {Mon, 01 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/RamanujamL08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Roth07,
  author       = {Amir Roth},
  title        = {Physical Register Reference Counting},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {1},
  pages        = {9--12},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2007.15},
  doi          = {10.1109/L-CA.2007.15},
  timestamp    = {Wed, 14 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/Roth07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/WalterCK08,
  author       = {Isask'har Walter and
                  Israel Cidon and
                  Avinoam Kolodny},
  title        = {BENoC: {A} Bus-Enhanced Network on-Chip for a Power Efficient {CMP}},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {2},
  pages        = {61--64},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2008.11},
  doi          = {10.1109/L-CA.2008.11},
  timestamp    = {Thu, 18 Feb 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/WalterCK08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YoonNSKKMC07,
  author       = {Jinhyuk Yoon and
                  Eyee Hyun Nam and
                  Yoon Jae Seong and
                  Hongseok Kim and
                  Bryan Suk Kim and
                  Sang Lyul Min and
                  Yookun Cho},
  title        = {Chameleon: {A} High Performance Flash/FRAM Hybrid Solid State Disk
                  Architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {7},
  number       = {1},
  pages        = {17--20},
  year         = {2008},
  url          = {https://doi.org/10.1109/L-CA.2007.17},
  doi          = {10.1109/L-CA.2007.17},
  timestamp    = {Sat, 09 Apr 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YoonNSKKMC07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AugustCGPMPTV07,
  author       = {David I. August and
                  Jonathan Chang and
                  Sylvain Girbal and
                  Daniel Gracia P{\'{e}}rez and
                  Gilles Mouchard and
                  David A. Penry and
                  Olivier Temam and
                  Neil Vachharajani},
  title        = {{UNISIM:} An Open Simulation Environment and Library for Complex Architecture
                  Design and Collaborative Development},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {2},
  pages        = {45--48},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.12},
  doi          = {10.1109/L-CA.2007.12},
  timestamp    = {Sun, 06 Oct 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/AugustCGPMPTV07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DasOMZC07,
  author       = {Abhishek Das and
                  Serkan Ozdemir and
                  Gokhan Memik and
                  Joseph Zambreno and
                  Alok N. Choudhary},
  title        = {Microarchitectures for Managing Chip Revenues under Process Variations},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {2},
  pages        = {29--32},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.8},
  doi          = {10.1109/L-CA.2007.8},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DasOMZC07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DieterKD07,
  author       = {William R. Dieter and
                  A. Kaveti and
                  Henry G. Dietz},
  title        = {Low-Cost Microarchitectural Support for Improved Floating-Point Accuracy},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {1},
  pages        = {13--16},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.1},
  doi          = {10.1109/L-CA.2007.1},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DieterKD07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/EtsionF07,
  author       = {Yoav Etsion and
                  Dror G. Feitelson},
  title        = {Probabilistic Prediction of Temporal Locality},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {1},
  pages        = {17--20},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.5},
  doi          = {10.1109/L-CA.2007.5},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/EtsionF07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GuzKKW07,
  author       = {Zvika Guz and
                  Idit Keidar and
                  Avinoam Kolodny and
                  Uri C. Weiser},
  title        = {Nahalal: Cache Organization for Chip Multiprocessors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {1},
  pages        = {21--24},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.6},
  doi          = {10.1109/L-CA.2007.6},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GuzKKW07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JergerLP07,
  author       = {Natalie D. Enright Jerger and
                  Mikko H. Lipasti and
                  Li{-}Shiuan Peh},
  title        = {Circuit-Switched Coherence},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {1},
  pages        = {5--8},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.2},
  doi          = {10.1109/L-CA.2007.2},
  timestamp    = {Tue, 07 May 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/JergerLP07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JoaoMKP07,
  author       = {Jos{\'{e}} A. Joao and
                  Onur Mutlu and
                  Hyesoon Kim and
                  Yale N. Patt},
  title        = {Dynamic Predication of Indirect Jumps},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {2},
  pages        = {25--28},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.7},
  doi          = {10.1109/L-CA.2007.7},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JoaoMKP07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KimBD07,
  author       = {John Kim and
                  James D. Balfour and
                  William J. Dally},
  title        = {Flattened Butterfly Topology for On-Chip Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {2},
  pages        = {37--40},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.10},
  doi          = {10.1109/L-CA.2007.10},
  timestamp    = {Thu, 26 Sep 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KimBD07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KodakaraKLHHY07,
  author       = {Sreekumar V. Kodakara and
                  Jinpyo Kim and
                  David J. Lilja and
                  Douglas M. Hawkins and
                  Wei{-}Chung Hsu and
                  Pen{-}Chung Yew},
  title        = {{CIM:} {A} Reliable Metric for Evaluating Program Phase Classifications},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {1},
  pages        = {9--12},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.4},
  doi          = {10.1109/L-CA.2007.4},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KodakaraKLHHY07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MoretoCRV07,
  author       = {Miquel Moret{\'{o}} and
                  Francisco J. Cazorla and
                  Alex Ram{\'{\i}}rez and
                  Mateo Valero},
  title        = {Explaining Dynamic Cache Partitioning Speed Ups},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {1},
  pages        = {1--4},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.3},
  doi          = {10.1109/L-CA.2007.3},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MoretoCRV07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SendagYC07,
  author       = {Resit Sendag and
                  Joshua J. Yi and
                  Peng{-}fei Chuang},
  title        = {Branch Misprediction Prediction: Complementary Branch Predictors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {2},
  pages        = {49--52},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.13},
  doi          = {10.1109/L-CA.2007.13},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SendagYC07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/XiaoL07,
  author       = {Xiang Xiao and
                  Jaehwan John Lee},
  title        = {A Novel Parallel Deadlock Detection Algorithm and Hardware for Multiprocessor
                  System-on-a-Chip},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {2},
  pages        = {41--44},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.11},
  doi          = {10.1109/L-CA.2007.11},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/XiaoL07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/YalcinE07,
  author       = {Gulay Yalcin and
                  Oguz Ergin},
  title        = {Using Tag-Match Comparators for Detecting Soft Errors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {2},
  pages        = {53--56},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.14},
  doi          = {10.1109/L-CA.2007.14},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/YalcinE07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZebchukM07,
  author       = {Jason Zebchuk and
                  Andreas Moshovos},
  title        = {A Building Block for Coarse-Grain Optimizations in the On-Chip Memory
                  Hierarchy},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {6},
  number       = {2},
  pages        = {33--36},
  year         = {2007},
  url          = {https://doi.org/10.1109/L-CA.2007.9},
  doi          = {10.1109/L-CA.2007.9},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZebchukM07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AhnD06,
  author       = {Jung Ho Ahn and
                  William J. Dally},
  title        = {Data parallel address architecture},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {30--33},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.4},
  doi          = {10.1109/L-CA.2006.4},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AhnD06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/BracyDJ06,
  author       = {Anne Bracy and
                  Kshitij Doshi and
                  Quinn Jacobson},
  title        = {Disintermediated Active Communication},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {2},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.15},
  doi          = {10.1109/L-CA.2006.15},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/BracyDJ06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/DonaldM06,
  author       = {James Donald and
                  Margaret Martonosi},
  title        = {An Efficient, Practical Parallelization Methodology for Multicore
                  Architecture Simulation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {2},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.14},
  doi          = {10.1109/L-CA.2006.14},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/DonaldM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/EisleyPS06,
  author       = {Noel Eisley and
                  Li{-}Shiuan Peh and
                  Li Shang},
  title        = {In-network cache coherence},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {34--37},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.9},
  doi          = {10.1109/L-CA.2006.9},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/EisleyPS06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ErginUVG06,
  author       = {Oguz Ergin and
                  Osman S. Unsal and
                  Xavier Vera and
                  Antonio Gonz{\'{a}}lez},
  title        = {Exploiting Narrow Values for Soft Error Tolerance},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {2},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.12},
  doi          = {10.1109/L-CA.2006.12},
  timestamp    = {Thu, 14 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/ErginUVG06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GaudiotPS06,
  author       = {Jean{-}Luc Gaudiot and
                  Yale N. Patt and
                  Kevin Skadron},
  title        = {Foreword},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {2},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.11},
  doi          = {10.1109/L-CA.2006.11},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GaudiotPS06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GuptaD06,
  author       = {Amit K. Gupta and
                  William J. Dally},
  title        = {Topology optimization of interconnection networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {10--13},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.8},
  doi          = {10.1109/L-CA.2006.8},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GuptaD06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LeeLLM06,
  author       = {Moon{-}Sang Lee and
                  Sang{-}Kwon Lee and
                  Joonwon Lee and
                  Seung Ryoul Maeng},
  title        = {Adopting system call based address translation into user-level communication},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {26--29},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.2},
  doi          = {10.1109/L-CA.2006.2},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LeeLLM06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LiMK06,
  author       = {Wentong Li and
                  Saraju P. Mohanty and
                  Krishna M. Kavi},
  title        = {A Page-based Hybrid (Software-Hardware) Dynamic Memory Allocator},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {2},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.13},
  doi          = {10.1109/L-CA.2006.13},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LiMK06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MallikLMDD06,
  author       = {Arindam Mallik and
                  Bin Lin and
                  Gokhan Memik and
                  Peter A. Dinda and
                  Robert P. Dick},
  title        = {User-Driven Frequency Scaling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {2},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.16},
  doi          = {10.1109/L-CA.2006.16},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MallikLMDD06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MartinBL06,
  author       = {Milo M. K. Martin and
                  Colin Blundell and
                  E Christopher Lewis},
  title        = {Subtleties of Transactional Memory Atomicity Semantics},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {2},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.18},
  doi          = {10.1109/L-CA.2006.18},
  timestamp    = {Mon, 29 Aug 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/MartinBL06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MoradWKVA06,
  author       = {Tomer Y. Morad and
                  Uri C. Weiser and
                  A. Kolodnyt and
                  Mateo Valero and
                  Eduard Ayguad{\'{e}}},
  title        = {Performance, power efficiency and scalability of asymmetric cluster
                  chip multiprocessors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {14--17},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.6},
  doi          = {10.1109/L-CA.2006.6},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MoradWKVA06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/OttoniRSBA06,
  author       = {Guilherme Ottoni and
                  Ram Rangan and
                  Adam Stoler and
                  Matthew J. Bridges and
                  David I. August},
  title        = {From sequential programs to concurrent threads},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {6--9},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.5},
  doi          = {10.1109/L-CA.2006.5},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/OttoniRSBA06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/PriceV06,
  author       = {Graham D. Price and
                  Manish Vachharajani},
  title        = {A Case for Compressing Traces with BDDs},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {2},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.17},
  doi          = {10.1109/L-CA.2006.17},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/PriceV06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RileyZ06,
  author       = {Nicholas Riley and
                  Craig B. Zilles},
  title        = {Probabilistic counter updates for predictor hysteresis and bias},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {18--21},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.7},
  doi          = {10.1109/L-CA.2006.7},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RileyZ06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SrinivasanCL06,
  author       = {Ram Srinivasan and
                  Jeanine E. Cook and
                  Olaf M. Lubeck},
  title        = {Performance modeling using Monte Carlo simulation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {38--41},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.10},
  doi          = {10.1109/L-CA.2006.10},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SrinivasanCL06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Zhang06,
  author       = {Chuanjun Zhang},
  title        = {Balanced instruction cache: reducing conflict misses of direct-mapped
                  caches through balanced subarray accesses},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {2--5},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.3},
  doi          = {10.1109/L-CA.2006.3},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Zhang06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Zhou06,
  author       = {Huiyang Zhou},
  title        = {A case for fault tolerance and performance enhancement using chip
                  multi-processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {5},
  number       = {1},
  pages        = {22--25},
  year         = {2006},
  url          = {https://doi.org/10.1109/L-CA.2006.1},
  doi          = {10.1109/L-CA.2006.1},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Zhou06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MutluKSP05,
  author       = {Onur Mutlu and
                  Hyesoon Kim and
                  Jared Stark and
                  Yale N. Patt},
  title        = {On Reusing the Results of Pre-Executed Instructions in a Runahead
                  Execution Processor},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {4},
  number       = {1},
  pages        = {2},
  year         = {2005},
  url          = {https://doi.org/10.1109/L-CA.2005.1},
  doi          = {10.1109/L-CA.2005.1},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MutluKSP05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SazeidesKTC05,
  author       = {Yiannakis Sazeides and
                  Rakesh Kumar and
                  Dean M. Tullsen and
                  Theofanis Constantinou},
  title        = {The Danger of Interval-Based Power Efficiency Metrics: When Worst
                  Is Best},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {4},
  number       = {1},
  pages        = {1},
  year         = {2005},
  url          = {https://doi.org/10.1109/L-CA.2005.2},
  doi          = {10.1109/L-CA.2005.2},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/SazeidesKTC05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CezeSTRT04,
  author       = {Luis Ceze and
                  Karin Strauss and
                  James Tuck and
                  Jose Renau and
                  Josep Torrellas},
  title        = {{CAVA:} Hiding {L2} Misses with Checkpoint-Assisted Value Prediction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {3},
  year         = {2004},
  url          = {https://doi.org/10.1109/L-CA.2004.3},
  doi          = {10.1109/L-CA.2004.3},
  timestamp    = {Tue, 23 Jan 2024 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/CezeSTRT04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Citron04,
  author       = {Daniel Citron},
  title        = {Exploiting Low Entropy to Reduce Wire Delay},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {3},
  year         = {2004},
  url          = {https://doi.org/10.1109/L-CA.2004.7},
  doi          = {10.1109/L-CA.2004.7},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Citron04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/GomezDFLRNLS04,
  author       = {Mar{\'{\i}}a Engracia G{\'{o}}mez and
                  Jos{\'{e}} Duato and
                  Jos{\'{e}} Flich and
                  Pedro L{\'{o}}pez and
                  Antonio Robles and
                  Nils Agne Nordbotten and
                  Olav Lysne and
                  Tor Skeie},
  title        = {An Efficient Fault-Tolerant Routing Methodology for Meshes and Tori},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {3},
  year         = {2004},
  url          = {https://doi.org/10.1109/L-CA.2004.1},
  doi          = {10.1109/L-CA.2004.1},
  timestamp    = {Mon, 18 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/GomezDFLRNLS04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/HollowayS04,
  author       = {Allison L. Holloway and
                  Gurindar S. Sohi},
  title        = {Characterization of Problem Stores},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {3},
  year         = {2004},
  url          = {https://doi.org/10.1109/L-CA.2004.4},
  doi          = {10.1109/L-CA.2004.4},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/HollowayS04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/LuoJ04,
  author       = {Yue Luo and
                  Lizy K. John},
  title        = {Efficiently Evaluating Speedup Using Sampled Processor Simulation},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {3},
  year         = {2004},
  url          = {https://doi.org/10.1109/L-CA.2004.6},
  doi          = {10.1109/L-CA.2004.6},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/LuoJ04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/RobatmiliYSN04,
  author       = {Behnam Robatmili and
                  Nasser Yazdani and
                  Somayeh Sardashti and
                  Mehrdad Nourani},
  title        = {Thread-Sensitive Instruction Issue for {SMT} Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {3},
  year         = {2004},
  url          = {https://doi.org/10.1109/L-CA.2004.9},
  doi          = {10.1109/L-CA.2004.9},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/RobatmiliYSN04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SinghD04,
  author       = {Arjun Singh and
                  William J. Dally},
  title        = {Buffer and Delay Bounds in High Radix Interconnection Networks},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {3},
  year         = {2004},
  url          = {https://doi.org/10.1109/L-CA.2004.2},
  doi          = {10.1109/L-CA.2004.2},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SinghD04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SinghDTG04,
  author       = {Arjun Singh and
                  William J. Dally and
                  Brian Towles and
                  Amit K. Gupta},
  title        = {Globally Adaptive Load-Balanced Routing on Tori},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {3},
  year         = {2004},
  url          = {https://doi.org/10.1109/L-CA.2004.8},
  doi          = {10.1109/L-CA.2004.8},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SinghDTG04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/StineC04,
  author       = {Jeffrey M. Stine and
                  Nicholas P. Carter and
                  Jos{\'{e}} Flich},
  title        = {Comparing Adaptive Routing and Dynamic Voltage Scaling for Link Power
                  Reduction},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {3},
  year         = {2004},
  url          = {https://doi.org/10.1109/L-CA.2004.5},
  doi          = {10.1109/L-CA.2004.5},
  timestamp    = {Mon, 18 Dec 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/StineC04.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CohenFMRR03,
  author       = {Aviad Cohen and
                  Lev Finkelstein and
                  Avi Mendelson and
                  Ronny Ronen and
                  Dmitry Rudoy},
  title        = {On Estimating Optimal Performance of {CPU} Dynamic Thermal Management},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {2},
  year         = {2003},
  url          = {https://doi.org/10.1109/L-CA.2003.5},
  doi          = {10.1109/L-CA.2003.5},
  timestamp    = {Fri, 26 Mar 2021 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/CohenFMRR03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/CristalMLV03,
  author       = {Adri{\'{a}}n Cristal and
                  Jos{\'{e}} F. Mart{\'{\i}}nez and
                  Josep Llosa and
                  Mateo Valero},
  title        = {A Case for Resource-conscious Out-of-order Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {2},
  year         = {2003},
  url          = {https://doi.org/10.1109/L-CA.2003.4},
  doi          = {10.1109/L-CA.2003.4},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/CristalMLV03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/KumarFJRT03,
  author       = {Rakesh Kumar and
                  Keith I. Farkas and
                  Norman P. Jouppi and
                  Parthasarathy Ranganathan and
                  Dean M. Tullsen},
  title        = {Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core
                  Architectures},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {2},
  year         = {2003},
  url          = {https://doi.org/10.1109/L-CA.2003.6},
  doi          = {10.1109/L-CA.2003.6},
  timestamp    = {Sat, 30 Sep 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/KumarFJRT03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/MilenkovicM03,
  author       = {Aleksandar Milenkovic and
                  Milena Milenkovic},
  title        = {Stream-Based Trace Compression},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {2},
  year         = {2003},
  url          = {https://doi.org/10.1109/L-CA.2003.7},
  doi          = {10.1109/L-CA.2003.7},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/MilenkovicM03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SendagCL03,
  author       = {Resit Sendag and
                  Peng{-}fei Chuang and
                  David J. Lilja},
  title        = {Address Correlation: Exceeding the Limits of Locality},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {2},
  year         = {2003},
  url          = {https://doi.org/10.1109/L-CA.2003.3},
  doi          = {10.1109/L-CA.2003.3},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SendagCL03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SihnLC03,
  author       = {Kue{-}Hwan Sihn and
                  Joonwon Lee and
                  Jung{-}Wan Cho},
  title        = {A Speculative Coherence Scheme using Decoupling Synchronization for
                  Multiprocessor Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {2},
  year         = {2003},
  url          = {https://doi.org/10.1109/L-CA.2003.1},
  doi          = {10.1109/L-CA.2003.1},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SihnLC03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ZhangVYN03,
  author       = {Chuanjun Zhang and
                  Frank Vahid and
                  Jun Yang and
                  Walid A. Najjar},
  title        = {A Way-Halting Cache for Low-Energy High-Performance Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {2},
  year         = {2003},
  url          = {https://doi.org/10.1109/L-CA.2003.2},
  doi          = {10.1109/L-CA.2003.2},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ZhangVYN03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/AlvarezCSV02,
  author       = {Carlos {\'{A}}lvarez and
                  Jes{\'{u}}s Corbal and
                  Esther Salam{\'{\i}} and
                  Mateo Valero},
  title        = {Initial Results on Fuzzy Floating Point Computation for Multimedia
                  Processors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.6},
  doi          = {10.1109/L-CA.2002.6},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/AlvarezCSV02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ChoiLJKW02,
  author       = {Jin{-}Hyuck Choi and
                  Jung{-}Hoon Lee and
                  Seh{-}Woong Jeong and
                  Shin{-}Dug Kim and
                  Charles C. Weems},
  title        = {A Low Power {TLB} Structure for Embedded Systems},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.1},
  doi          = {10.1109/L-CA.2002.1},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ChoiLJKW02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/Gordon-RossCV02,
  author       = {Ann Gordon{-}Ross and
                  Susan Cotterell and
                  Frank Vahid},
  title        = {Exploiting Fixed Programs in Embedded Systems: {A} Loop Cache Example},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.4},
  doi          = {10.1109/L-CA.2002.4},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/Gordon-RossCV02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/JuangDKSHMC02,
  author       = {Philo Juang and
                  Phil Diodato and
                  Stefanos Kaxiras and
                  Kevin Skadron and
                  Zhigang Hu and
                  Margaret Martonosi and
                  Douglas W. Clark},
  title        = {Implementing Decay Techniques using 4T Quasi-Static Memory Cells},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.5},
  doi          = {10.1109/L-CA.2002.5},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/JuangDKSHMC02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/OsowskiL02,
  author       = {A. J. KleinOsowski and
                  David J. Lilja},
  title        = {MinneSPEC: {A} New {SPEC} Benchmark Workload for Simulation-Based
                  Computer Architecture Research},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.8},
  doi          = {10.1109/L-CA.2002.8},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/OsowskiL02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShangPJ02,
  author       = {Li Shang and
                  Li{-}Shiuan Peh and
                  Niraj K. Jha},
  title        = {Power-efficient Interconnection Networks: Dynamic Voltage Scaling
                  with Links},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.10},
  doi          = {10.1109/L-CA.2002.10},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShangPJ02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/ShawD02,
  author       = {Kelly A. Shaw and
                  William J. Dally},
  title        = {Migration in Single Chip Multiprocessors},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.7},
  doi          = {10.1109/L-CA.2002.7},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/ShawD02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/SohnJM02,
  author       = {Young Chul Sohn and
                  N. H. Jung and
                  Seung Ryoul Maeng},
  title        = {Request Reordering to Enhance the Performance of Strict Consistency
                  Models},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.11},
  doi          = {10.1109/L-CA.2002.11},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/SohnJM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TambatV02,
  author       = {Siddhartha V. Tambat and
                  Sriram Vajapeyam},
  title        = {Page-Level Behavior of Cache Contention},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.9},
  doi          = {10.1109/L-CA.2002.9},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/TambatV02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/TowlesD02,
  author       = {Brian Towles and
                  William J. Dally},
  title        = {Worst-case Traffic for Oblivious Routing Functions},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.12},
  doi          = {10.1109/L-CA.2002.12},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/TowlesD02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/UnsalKKM02,
  author       = {Osman S. Unsal and
                  Israel Koren and
                  C. Mani Krishna and
                  Csaba Andras Moritz},
  title        = {Cool-Fetch: Compiler-Enabled Power-Aware Fetch Throttling},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.3},
  doi          = {10.1109/L-CA.2002.3},
  timestamp    = {Mon, 28 Aug 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/cal/UnsalKKM02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/cal/VandierendonckB02,
  author       = {Hans Vandierendonck and
                  Koenraad De Bosschere},
  title        = {An Address Transformation Combining Block- and Word-Interleaving},
  journal      = {{IEEE} Comput. Archit. Lett.},
  volume       = {1},
  year         = {2002},
  url          = {https://doi.org/10.1109/L-CA.2002.2},
  doi          = {10.1109/L-CA.2002.2},
  timestamp    = {Sun, 15 Mar 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/cal/VandierendonckB02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}