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Publication search results
found 1,836 matches
- 2024
- Mingzhen Li, Changxi Liu, Jianjin Liao, Xuegui Zheng, Hailong Yang, Rujun Sun, Jun Xu, Lin Gan, Guangwen Yang, Zhongzhi Luan, Depei Qian:
Towards optimized tensor code generation for deep learning on sunway many-core processor. Frontiers Comput. Sci. 18(2): 182101 (2024) - Alessandro Ottaviano, Robert Balas, Giovanni Bambini, Antonio del Vecchio, Maicol Ciani, Davide Rossi, Luca Benini, Andrea Bartolini:
ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation. Int. J. Parallel Program. 52(1): 93-123 (2024) - Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, Hoi-Jun Yoo:
C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture. IEEE J. Solid State Circuits 59(1): 157-172 (2024) - Ole Richter, Chenxi Wu, Adrian M. Whatley, German Köstinger, Carsten Nielsen, Ning Qiao, Giacomo Indiveri:
DYNAP-SE2: a scalable multi-core dynamic neuromorphic asynchronous spiking neural network processor. Neuromorph. Comput. Eng. 4(1): 14003 (2024) - Yi-Chien Lin, Yuyang Chen, Sameh Gobriel, Nilesh Jain, Gopi Krishna Jha, Viktor K. Prasanna:
ARGO: An Auto-Tuning Runtime System for Scalable GNN Training on Multi-Core Processor. CoRR abs/2402.03671 (2024) - 2023
- Mohammad Ahmed Alomari, Hazleen Aris, Mukhtar Ghaleb, Yahya Almurtadha, Gamal Abdulnaser Alkawsi, Ismail Ahmad Al-Qasem Al-Hadi, Yahia Baashar, Khairulmizam Samsudin:
Embedded Devices Security: Design and Implementation of a Light RDBMS Encryption Utilizing Multi-Core Processors. IEEE Access 11: 19836-19848 (2023) - Mirco Mannino, Biagio Peccerillo, Andrea Mondelli, Sandro Bartolini:
Analysis and Optimization of Direct Convolution Execution on Multi-Core Processors. IEEE Access 11: 57514-57528 (2023) - Ionel Zagan, Vasile Gheorghita Gaitan:
Custom Soft-Core RISC Processor Validation Based on Real-Time Event Handling Scheduler FPGA Implementation. IEEE Access 11: 36264-36280 (2023) - Fangfang Liu, Wenjing Ma, Yuwen Zhao, Daokun Chen, Yi Hu, Qinglin Lu, Wanwang Yin, Xinhui Yuan, Lijuan Jiang, Hao Yan, Min Li, Hongsen Wang, Xinyu Wang, Chao Yang:
xMath2.0: a high-performance extended math library for SW26010-Pro many-core processor. CCF Trans. High Perform. Comput. 5(1): 56-71 (2023) - Fangfang Liu, Wenjing Ma, Yuwen Zhao, Daokun Chen, Yi Hu, Qinglin Lu, Wanwang Yin, Xinhui Yuan, Lijuan Jiang, Hao Yan, Min Li, Hongsen Wang, Xinyu Wang, Chao Yang:
Publisher Correction: xMath2.0: a high-performance extended math library for SW26010-Pro many-core processor. CCF Trans. High Perform. Comput. 5(1): 97 (2023) - Yongtao Luo, Bo Yang, Jie Liu, Ruibo Wang, Jinmin Wen, Tiaojie Xiao, Xuguang Chen, Chunye Gong:
MT-office: parallel password recovery program for office on domestic heterogeneous multi-core processor. CCF Trans. High Perform. Comput. 5(3): 231-244 (2023) - Smail Bariko, Assia Arsalane, Abdessamad Klilou, Abdelouahed Abounada:
Efficient parallel implementation of Gaussian Mixture Model background subtraction algorithm on an embedded multi-core Digital Signal Processor. Comput. Electr. Eng. 110: 108827 (2023) - Cheongjun Lee, Jaehwan Lee, Donghun Koo, Chungyong Kim, Jiwoo Bang, Eun-Kyu Byun, Hyeonsang Eom:
Towards enhanced I/O performance of a highly integrated many-core processor by empirical analysis. Clust. Comput. 26(5): 2643-2655 (2023) - Aboul-Karim Mohamed El Maarouf, Luc Giraud, Abdou Guermouche, Thomas Guignon:
Combining reduction with synchronization barrier on multi-core processors. Concurr. Comput. Pract. Exp. 35(1) (2023) - Osama Ahmed Khashan, Nour Mahmoud Khafajah, Waleed Alomoush, Mohammad Alshinwan, Sultan Alamri, Samer Atawneh, Mutasem K. Alsmadi:
Dynamic Multimedia Encryption Using a Parallel File System Based on Multi-Core Processors. Cryptogr. 7(1): 12 (2023) - Yuan Yao:
Game-of-Life Temperature-Aware DVFS Strategy for Tile-Based Chip Many-Core Processors. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 58-72 (2023) - Khai-Minh Ma, Duc-Hung Le, Cong-Kha Pham, Trong-Thuc Hoang:
Design of an SoC Based on 32-Bit RISC-V Processor with Low-Latency Lightweight Cryptographic Cores in FPGA. Future Internet 15(5): 186 (2023) - Prashant S. Titare, D. G. Khairnar:
MPSoC design and implementation using microblaze soft core processor architecture for faster execution of arithmetic application. Int. J. High Perform. Syst. Archit. 11(3): 156-168 (2023) - Satyabrata Sarangi, Bevan M. Baas:
Energy-efficient canonical Huffman decoders on many-core processor arrays and FPGAs. Integr. 88: 156-165 (2023) - HyungTae Kim, Duk-Yeon Lee, Dongwoon Choi, Jaehyeon Kang, Dong-Wook Lee:
Parallel Implementations of Digital Focus Indices Based on Minimax Search Using Multi-Core Processors. KSII Trans. Internet Inf. Syst. 17(2): 542-558 (2023) - Mahdi Shafiei, Hassan Daryanavard, Ahmad Hatam:
Scalable and custom-precision floating-point hardware convolution core for using in AI edge processors. J. Real Time Image Process. 20(5): 94 (2023) - Gregory K. Chen, Phil C. Knag, Carlos Tokunaga, Ram K. Krishnamurthy:
An Eight-Core RISC-V Processor With Compute Near Last Level Cache in Intel 4 CMOS. IEEE J. Solid State Circuits 58(4): 1117-1128 (2023) - Sumeet Singh Nagi, Uneeb Rathore, Krutikesh Sahoo, Tim Ling, Subramanian S. Iyer, Dejan Markovic:
A 16-nm 784-Core Digital Signal Processor Array, Assembled as a 2 × 2 Dielet With 10-μm Pitch Interdielet I/O for Runtime Multiprogram Reconfiguration. IEEE J. Solid State Circuits 58(1): 111-123 (2023) - Shreyas Kolala Venkataramanaiah, Jian Meng, Han-Sok Suh, Injune Yeo, Jyotishman Saikia, Sai Kiran Cherupally, Yichi Zhang, Zhiru Zhang, Jae-Sun Seo:
A 28-nm 8-bit Floating-Point Tensor Core-Based Programmable CNN Training Processor With Dynamic Structured Sparsity. IEEE J. Solid State Circuits 58(7): 1885-1897 (2023) - V. Uma, Ramalatha Marimuthu:
D-wash - A dynamic workload aware adaptive cache coherance protocol for multi-core processor system. Microelectron. J. 132: 105675 (2023) - Jiang Zheng, Jiazhi Jiang, Jiangsu Du, Dan Huang, Yutong Lu:
Optimizing massively parallel sparse matrix computing on ARM many-core processor. Parallel Comput. 117: 103035 (2023) - Ionel Zagan, Vasile Gheorghita Gaitan:
Soft-core processor integration based on different instruction set architectures and field programmable gate array custom datapath implementation. PeerJ Comput. Sci. 9: e1300 (2023) - Jiazhi Jiang, Zijiang Huang, Dan Huang, Jiangsu Du, Lin Chen, Ziguan Chen, Yutong Lu:
Hierarchical Model Parallelism for Optimizing Inference on Many-core Processor via Decoupled 3D-CNN Structure. ACM Trans. Archit. Code Optim. 20(3): 42:1-42:21 (2023) - Xuyang Duan, Yufan Chen, Menghan Li, Yitong Rong, Ruiqi Xie, Jun Han:
UArch: A Super-Resolution Processor With Heterogeneous Triple-Core Architecture for Workloads of U-Net Networks. IEEE Trans. Biomed. Circuits Syst. 17(3): 633-647 (2023) - An Zou, Yehan Ma, Karthik Garimella, Benjamin Lee, Christopher D. Gill, Xuan Zhang:
F-LEMMA: Fast Learning-Based Energy Management for Multi-/Many-Core Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 616-629 (2023)
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