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Publication search results
found 62 matches
- 2003
- Luigi Accardi, Masanori Ohya:
A Stochastic Limit Approach to the SAT Problem. VLSI 2003: 208-216 - Hussain Al-Asaad, Alireza Sarvi:
Fault Tolerance for Multiprocessor Systems Via Time Redundant Task Scheduling. VLSI 2003: 51-57 - Andris Ambainis, Uldis Barbans, Agnese Belousova, Aleksandrs Belovs, Ilze Dzelme, Girts Folkmanis, Rusins Freivalds, Peteris Ledins, Rihards Opmanis, Agnis Skuskovniks:
Size of Quantum Versus Deterministic Finite Automata. VLSI 2003: 303-308 - Fred L. Anderson IV, José G. Delgado-Frias:
A Reconfigurable Switch for a DSP Array. VLSI 2003: 3-6 - Satish K. Bandapati, Scott C. Smith:
Design and Characterization of NULL Convention Arithmetic Logic Units. VLSI 2003: 178-184 - Nathaniel Bird, Ethan S. Miller, Paul J. Pfeiffer, Srinivasa Vemuru:
Channel Routing with Crosstalk Consideration. VLSI 2003: 119-124 - Daniel R. Blum, José G. Delgado-Frias:
A Fault-Tolerant Memory-Based Cell for a Reconfigurable DSP Processor. VLSI 2003: 58-64 - Khia-Ho Chang, Bah-Hwee Gwee, Joseph Sylvester Chang:
A Low Voltage Micropower 16-Word by 16-Bit 3-Port Asynchronous Register File. VLSI 2003: 166-172 - Robert Chun, Linda Yang:
Reuse of Firmware Tests in System-On-Chip Design Verification. VLSI 2003: 70-78 - Thomas Eschbach, Wolfgang Günther, Bernd Becker:
Cross Reduction for Orthogonal Circuit Visualization. VLSI 2003: 107-113 - Sumeer Goel, Mohamed A. Elgamel, Magdy A. Bayoumi:
Energy Efficient and Noise-Tolerant XOR-XNOR Circuit Design. VLSI 2003: 125-130 - Jiyi Gu, Majid Ahmadi, William C. Miller:
A Low-Voltage Low-Power Digital-Audio Sigma-Delta Modulator in 0.18-µm CMOS. VLSI 2003: 79-82 - Jie Han, Pieter Jonker:
A Study on Fault-Tolerant Circuits Using Redundancy. VLSI 2003: 65-69 - Rita M. Hare, Bryant A. Julstrom:
A Genetic Algorithm for Restricted Cases of the Rectilinear Steiner Problem with Obstacles. VLSI 2003: 292-297 - Satoshi Ikeda, Izumi Kubo, Masafumi Yamashita:
Reducing the Hitting and the Cover Times of Random Walks on Finite Graphs by Local Topological Information. VLSI 2003: 203-207 - Gene Eu Jan, Lokar J. Y. Lin, W. R. Liou, Y. Y. Chen:
The Design and Implementation of a 2048-Bit RSA Encryption/Decryption Chip. VLSI 2003: 329-338 - Gene Eu Jan, Chiou-Min Shen, Shao-Wei Leu, Cheng-Hung Li:
The Design and Analysis of an Elliptic Curve Cryptosystem. VLSI 2003: 324-328 - Evandro de Araújo Jardini, Dilvan de Abreu Moreira:
Multithreaded parallel VLSI Leaf Cell Generator Using Agents 2. VLSI 2003: 190-196 - Hirotsuga Kajisaki, Takakazu Kurokawa:
SEBSW-2: SEcret-Key Block Cipher SWitcher. VLSI 2003: 317-323 - Sankalp Kallakuri, Alex Doboli, Simona Doboli:
Applying Stochastic Modeling to Bus Arbitration for Network-On-Chip Systems. VLSI 2003: 261-265 - J. K. Kim, S. H. Won, Ki-Seok Chung, H. D. Cho, T. W. Kang, T. S. Nam, C. S. Kang, C. H. Yi, D. S. Kim:
Properties of A1/BaTa2O6/GaN MIS Structure. VLSI 2003: 240-243 - Youngsoo Kim, Janghong Yoon, Sungok Kim:
An Improved Circuit Design for Parallel Sequence Generation. VLSI 2003: 162-165 - L. Kalyan Kumar, Aditya S. Ramani, Amol J. Mupid, V. Kamakoti, Sivaprakasam Suresh:
On-Line Location of Multiple Faults in LUT Based Reconfigurable Systems. VLSI 2003: 224-232 - Lelde Lace, Rusins Freivalds:
Lower Bounds for Query Complexity of Some Graph Problems. VLSI 2003: 309-316 - Seung Wook Lee, Jong Tae Kim:
Universal Reed-Solomon Decoder Using Hardware/Software Co-Design Method. VLSI 2003: 279-284 - Jam Wem Lee, Yiming Li, Howard Tang:
Silicide Optimization for Electrostatic Discharge Protection Devices in Sub-100 nm CMOS Circuit Design. VLSI 2003: 251-260 - YunKyung Lee, YoungSu Park:
High Speed, Small Area AES Block Cipher Coprocessor Design for USIM Card. VLSI 2003: 366-372 - Yiming Li, Shao-Ming Yu, Hsiao-Mei Lu:
Intelligent Device Parameter Extraction for Nanoscale MOSFETs Era. VLSI 2003: 233-239 - Shih-Ching Lo, Jyun-Hwei Tsai, Jer-Ming Hsu, Yiming Li:
Quantum Mechanical Gate Current Simulation in MOSFETs with Ultrathin Oxides. VLSI 2003: 244-250 - Adnan M. Lokhandwala, Sudip K. Mazumder:
A Novel Smart Power ASIC (SPIC) for Integrated Control of Cascaded Power Converters. VLSI 2003: 155-161
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