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Publication search results
found 19 matches
- 2016
- Marcelo Brandalero, Antonio Carlos Schneider Beck:
Potential analysis of a superscalar core employing a reconfigurable array for improving instruction-level parallelism. Des. Autom. Embed. Syst. 20(2): 155-169 (2016) - Rangeen Basu Roy Chowdhury, Anil K. Kannepalli, Sungkwan Ku, Eric Rotenberg:
AnyCore: A synthesizable RTL model for exploring and fabricating adaptive superscalar cores. ISPASS 2016: 214-224 - 2015
- Ricardo A. Velásquez, Pierre Michaud, André Seznec:
BADCO: Behavioral Application-Dependent Superscalar Core Models. Int. J. Parallel Program. 43(1): 130-157 (2015) - Pierre Michaud, Andrea Mondelli, André Seznec:
Revisiting Clustered Microarchitecture for Future Superscalar Cores: A Case for Wide Issue Clusters. ACM Trans. Archit. Code Optim. 12(3): 28:1-28:22 (2015) - 2014
- Marcelo Brandalero, Antonio Carlos Schneider Beck:
Potential of Using a Reconfigurable System on a Superscalar Core for ILP Improvements. SBESC 2014: 43-48 - 2013
- Ricardo Andrés Velásquez Vélez:
Behavioral Application-dependent Superscalar Core Modeling (Modélisation comportementale dépend de l'application pour cœurs superscalairesBehavioral Application-dependent superscolor core modeling). University of Rennes 1, France, 2013 - Sudarshan Srinivasan, Rance Rodrigues, Arunachalam Annamalai, Israel Koren, Sandip Kundu:
On dynamic polymorphing of a superscalar core for improving energy efficiency. ICCD 2013: 495-498 - 2012
- Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay A. Shah, Hiran Mayukh, Jayneel Gandhi, Brandon H. Dwiel, Sandeep Navada, Hashem Hashemi Najaf-abadi, Eric Rotenberg:
FabScalar: Automating Superscalar Core Design. IEEE Micro 32(3): 48-59 (2012) - Ricardo A. Velásquez, Pierre Michaud, André Seznec:
BADCO: Behavioral Application-Dependent Superscalar Core model. ICSAMOS 2012: 58-67 - Niket K. Choudhary, Brandon H. Dwiel, Eric Rotenberg:
A physical design study of fabscalar-generated superscalar cores. VLSI-SoC 2012: 165-170 - 2011
- Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay A. Shah, Hiran Mayukh, Jayneel Gandhi, Brandon H. Dwiel, Sandeep Navada, Hashem Hashemi Najaf-abadi, Eric Rotenberg:
FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template. ISCA 2011: 11-22 - 2010
- Gyu Sang Choi, Chita R. Das:
A Superscalar software architecture model for Multi-Core Processors (MCPs). J. Syst. Softw. 83(10): 1823-1837 (2010) - 2009
- Krzysztof Marcinek, Arkadiusz W. Luczyk, Witold A. Pleskacz:
Enhanced LEON3 core for superscalar processing. DDECS 2009: 238-241 - 2008
- Wlodzimierz Funika, Piotr Machner, Marian Bubak, Rosa M. Badia, Raül Sirvent:
Performance Monitoring of GRID superscalar: Summing up. CoreGRID Workshop on Grid Middleware 2008: 1-13 - 2007
- Ani Anciaux-Sedrakian, Rosa M. Badia, Raül Sirvent, Josep M. Pérez, Thilo Kielmann, André Merzky:
GRID superscalar and job mapping on the reliable grid resources. CoreGRID Workshop - Making Grids Work 2007: 77-88 - Rosa M. Badia, Raül Sirvent, Marian Bubak, Wlodzimierz Funika, Piotr Machner:
Performance monitoring of GRID superscalar with OCM-G/G-PM: improvements. CoreGRID Workshop - Making Grids Work 2007: 273-283 - 2006
- Yasuo Sugure, Seiji Takeuchi, Yuichi Abe, Hiromichi Yamada, Kazuya Hirayanagi, Akihiko Tomita, Kesami Hagiwara, Takeshi Kataoka, Takanori Shimura:
Low-Latency Superscalar and Small-Code-Size Microcontroller Core for Automotive, Industrial, and PC-Peripheral Applications. IEICE Trans. Electron. 89-C(6): 844-850 (2006) - Rosa M. Badia, Raül Sirvent, Marian Bubak, Wlodzimierz Funika, Piotr Machner:
Performance monitoring of GRID superscalar with OCM-G/G-PM: integration issues. CoreGRID Integration Workshop 2006: 193-205 - Raül Sirvent, Rosa M. Badia, Natalia Currle-Linde, Michael M. Resch:
GRID Superscalar and GriCoL: Integrating Different Programming Approaches. CoreGRID Integration Workshop 2006: 139-150
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retrieved on 2024-04-24 12:55 CEST from data curated by the dblp team
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