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Publication search results
found 52 matches
- 2009
- Ahmed Chiheb Ammari
, Abderrazek Jemai
:
Multiprocessor platform-based design for multimedia. IET Comput. Digit. Tech. 3(1): 52-61 (2009) - Ian D. L. Anderson, Mohammed A. S. Khalid:
SC Build: a computer-aided design tool for design space exploration of embedded central processing unit cores for field-programmable gate arrays. IET Comput. Digit. Tech. 3(1): 24-32 (2009) - Alessandro Bardine, Manuel Comparetti, Pierfrancesco Foglia
, Giacomo Gabrielli, Cosimo Antonio Prete:
Impact of on-chip network parameters on nuca cache performances. IET Comput. Digit. Tech. 3(5): 501-512 (2009) - Davide Bertozzi, Kees Goossens:
Networks on chips [editorial]. IET Comput. Digit. Tech. 3(5): 395-397 (2009) - Frank P. Burns, Julian P. Murphy, Albert Koelmans, Alexandre Yakovlev
:
Efficient advanced encryption standard implementation using lookup and normal basis. IET Comput. Digit. Tech. 3(3): 270-280 (2009) - Rajat Subhra Chakraborty, Somnath Paul, Yu Zhou, Swarup Bhunia
:
Low-power hybrid complementary metaloxide- semiconductor-nano-electro-mechanical systems field programmable gate array: circuit level analysis and defect-aware mapping. IET Comput. Digit. Tech. 3(6): 609-624 (2009) - Nelson Yen-Chung Chang, Ying-Ze Liao, Tian-Sheuan Chang
:
Analysis of shared-link AXI. IET Comput. Digit. Tech. 3(4): 373-383 (2009) - Chichyang Chen:
Error analysis of LNS addition/subtraction with direct-computation implementation. IET Comput. Digit. Tech. 3(4): 329-337 (2009) - Hamed F. Dadgour, Kaustav Banerjee:
Hybrid NEMS-CMOS integrated circuits: A novel strategy for energy-efficient designs. IET Comput. Digit. Tech. 3(6): 593-608 (2009) - Masoud Daneshtalab, Masoumeh Ebrahimi, Siamak Mohammadi
, Ali Afzali-Kusha:
Low-distance path-based multicast routing algorithm for network-on-chips. IET Comput. Digit. Tech. 3(5): 430-442 (2009) - Ahmet Onur Durahim, Erkay Savas, Berk Sunar, Thomas Brochmann Pedersen, Övünç Kocabas:
Transparent code authentication at the processor level. IET Comput. Digit. Tech. 3(4): 354-372 (2009) - Aiman H. El-Maleh
, Mustafa Imran Ali, Ahmad A. Al-Yamani:
Reconfigurable broadcast scan compression using relaxation-based test vector decomposition. IET Comput. Digit. Tech. 3(2): 143-161 (2009) - Aiman H. El-Maleh
, Bashir M. Al-Hashimi, Aissa Melouki, Farhan Khan
:
Defect-tolerant n2-transistor structure for reliable nanoelectronic designs. IET Comput. Digit. Tech. 3(6): 570-580 (2009) - Suhaib A. Fahmy
, Peter Y. K. Cheung, Wayne Luk:
High-throughput one-dimensional median and weighted median filters on FPGA. IET Comput. Digit. Tech. 3(4): 384-394 (2009) - Mahdi Fazeli
, Seyed Ghassem Miremadi, Alireza Ejlali
, Ahmad Patooghy
:
Low energy single event upset/single event transient-tolerant latch for deep subMicron technologies. IET Comput. Digit. Tech. 3(3): 289-303 (2009) - Sílvio R. F. de Fernandes, Bruno Cruz de Oliveira, M. Costa, Ivan Saraiva Silva:
Processing while routing: a network-on-chipbased parallel system. IET Comput. Digit. Tech. 3(5): 525-538 (2009) - Benjamin Gojman, Harika Manem, Garrett S. Rose
, André DeHon:
Inversion schemes for sublithographic programmable logic arrays. IET Comput. Digit. Tech. 3(6): 625-642 (2009) - Andreas Hansson, Maarten Wiggers, Arno Moonen, Kees Goossens, Marco Bekooij:
Enabling application-level performance guarantees in network-based systems on chip by applying dataflow analysis. IET Comput. Digit. Tech. 3(5): 398-412 (2009) - Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seungjin Lee, Hoi-Jun Yoo:
Memory-centric network-on-chip for power efficient execution of task-level pipeline on a multi-core processor. IET Comput. Digit. Tech. 3(5): 513-524 (2009) - Nikolas Kroupis, Dimitrios Soudris
:
High-level estimation methodology for designing the instruction cache memory of programmable embedded platforms. IET Comput. Digit. Tech. 3(2): 205-221 (2009) - Kyoung-Hwan Lim, YongHwan Kim, Taewhan Kim:
Interconnect and communication synthesis for distributed register-file microarchitecture. IET Comput. Digit. Tech. 3(2): 162-174 (2009) - Shijun Lin, Li Su, Haibo Su, Guofei Zhou, Depeng Jin, Lieguang Zeng:
Design networks-on-chip with latency/ bandwidth guarantees. IET Comput. Digit. Tech. 3(2): 184-194 (2009) - Yang Liu, Christos-Savvas Bouganis
, Peter Y. K. Cheung:
Hardware architectures for eigenvalue computation of real symmetric matrices. IET Comput. Digit. Tech. 3(1): 72-84 (2009) - Qiang Liu, George A. Constantinides, Konstantinos Masselos, Peter Y. K. Cheung:
Data-reuse exploration under an on-chip memory constraint for low-power FPGA-based systems. IET Comput. Digit. Tech. 3(3): 235-246 (2009) - Ya-Shuai Lü, Li Shen, Libo Huang, Zhiying Wang, Nong Xiao:
Optimal subgraph covering for customisable VLIW processors. IET Comput. Digit. Tech. 3(1): 14-23 (2009) - Vincent Mao, V. Thusu, Chris Dwyer, Krishnendu Chakrabarty
:
Connecting fabrication defects to fault models and SPICE simulations for DNA self-assembled nanoelectronics. IET Comput. Digit. Tech. 3(6): 553-569 (2009) - Jimson Mathew, Abusaleh M. Jabir, Hafizur Rahaman
, Dhiraj K. Pradhan:
Single error correctable bit parallel multipliers over GF(2m). IET Comput. Digit. Tech. 3(3): 281-288 (2009) - Athanasios Milidonis, Vasileios Porpodas, Nikolaos Alachiotis
, Athanasios P. Kakarountas
, Harris E. Michail, George A. Panagiotakopoulos, Costas E. Goutis:
Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse. IET Comput. Digit. Tech. 3(1): 109-123 (2009) - Debasis Mitra, Susmita Sur-Kolay, Bhargab B. Bhattacharya:
Droop sensitivity of stuck-at fault tests. IET Comput. Digit. Tech. 3(2): 175-193 (2009) - Maurizio Palesi, Shashi Kumar, Vincenzo Catania:
Bandwidth-aware routing algorithms for networks-on-chip platforms. IET Comput. Digit. Tech. 3(5): 413-429 (2009)
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