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Publication search results
found 22 matches
- 1996
- Samson Belayneh, David R. Kaeli:
A discussion on non-blocking/lockup-free caches. SIGARCH Comput. Archit. News 24(3): 18-25 (1996) - Samson Belayneh, David R. Kaeli:
A discussion on non-blocking/lockup-free caches. SIGARCH Comput. Archit. News 24(4): 16 (1996) - Brad Carlile:
Interpreting benchmarks. SIGARCH Comput. Archit. News 24(4): 20-21 (1996) - Jesús Carretero, Fernando Pérez, Pedro de Miguel, Francisco García, L. Alonso:
A massively parallel and distributed I/O subsystem. SIGARCH Comput. Archit. News 24(3): 1-8 (1996) - David Chase:
Register windows. SIGARCH Comput. Archit. News 24(4): 21 (1996) - Adrian Cockcroft:
I/O potholes. SIGARCH Comput. Archit. News 24(4): 18-19 (1996) - Paul W. DeMone:
Register windows and delay slots. SIGARCH Comput. Archit. News 24(4): 21-22 (1996) - Zahir Ebrahim:
I/O potholes. SIGARCH Comput. Archit. News 24(4): 19-20 (1996) - Susan Flynn Hummel:
Efficient data sharing with conditional remote memory transfers. SIGARCH Comput. Archit. News 24(5): 9-17 (1996) - Oh-Young Kwon, Gi-Ho Park, Tack-Don Han:
A compiler optimization to reduce execution time of loop nest. SIGARCH Comput. Archit. News 24(1): 6-11 (1996) - Walter B. Ligon III, Daniel C. Stanzione Jr.:
Distributing and load-balancing for loops in scientific applications. SIGARCH Comput. Archit. News 24(3): 9-17 (1996) - Philip Machanick:
The case for SRAM main memory. SIGARCH Comput. Archit. News 24(5): 23-30 (1996) - John R. Mashey:
Architectural potholes. SIGARCH Comput. Archit. News 24(4): 18 (1996) - Trevor N. Mudge:
Report on the panel: "how can computer architecture researchers avoid becoming the society for irreproducible results?". SIGARCH Comput. Archit. News 24(1): 1-5 (1996) - Gerard Páez-Monzón, Charles Páez-Monzón:
The RISC processor DMN-6: a unified data-control flow architecture. SIGARCH Comput. Archit. News 24(4): 3-10 (1996) - Juan Antonio Gómez Pulido, Juan M. Sánchez-Pérez, José Antonio Moreno Zamora:
An educational tool for testing hierarchical multilevel caches. SIGARCH Comput. Archit. News 24(4): 11-15 (1996) - Charlton D. Rose, J. Kelly Flanagan:
Constructing instruction traces from cache-filtered address traces (CITCAT). SIGARCH Comput. Archit. News 24(5): 1-8 (1996) - Mark Rosenbaum:
Architectural potholes. SIGARCH Comput. Archit. News 24(4): 17-18 (1996) - Daniel Tabak:
Book Review: Alpha Implementations and Architecture by Dileep P. Bhandarkar. SIGARCH Comput. Archit. News 24(1): 17-18 (1996) - Mark Thorson:
Internet Nuggets. SIGARCH Comput. Archit. News 24(1): 12-16 (1996) - Mark Thorson:
Internet Nuggets. SIGARCH Comput. Archit. News 24(3): 26-32 (1996) - Larry Widigen, Elliot Sowadsky, Kevin McGrath:
Eliminating operand read latency. SIGARCH Comput. Archit. News 24(5): 18-22 (1996)
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retrieved on 2024-11-17 10:24 CET from data curated by the dblp team
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