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Publication search results
found 47 matches
- 2016
- Engin Afacan, Gönenç Berkol, Günhan Dündar, Ali Emre Pusane, I. Faik Baskaya:
A lifetime-aware analog circuit sizing tool. Integr. 55: 349-356 (2016) - Amir Albeck, Shmuel Wimer:
Energy efficient computing by multi-mode addition. Integr. 55: 176-182 (2016) - H. C. Bandala-Hernandez, José Miguel Rocha-Pérez, Alejandro Díaz-Sánchez, Javier Lemus-López, Héctor Vázquez-Leal, Alejandra Díaz-Armendariz, Jaime Ramírez-Angulo:
Weighted median filters: An analog implementation. Integr. 55: 227-231 (2016) - M. Mohamed Asan Basiri, Sk. Noor Mahammad:
Multi-mode parallel and folded VLSI architectures for 1D-fast Fourier transform. Integr. 55: 43-56 (2016) - Cinzia Bernardeschi, Luca Cassano, Andrea Domenici, Luca Sterpone:
UA2TPG: An untestability analyzer and test pattern generator for SEUs in the configuration memory of SRAM-based FPGAs. Integr. 55: 85-97 (2016) - Giulia Di Capua, Nicola Femia, Gianpaolo Lisi:
Impact of losses and mismatches on power and efficiency of Wireless Power Transfer Systems with controlled secondary-side rectifier. Integr. 55: 384-392 (2016) - Anthony Coyette, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen:
Automatic generation of test infrastructures for analog integrated circuits by controllability and observability co-optimization. Integr. 55: 393-400 (2016) - Günhan Dündar, Nuno Horta, Francisco V. Fernández:
Introduction to the special issue on SMACD 2015. Integr. 55: 293-294 (2016) - Hui Geng, Jianming Liu, Jinglan Liu, Pei-Wen Luo, Liang-Chia Cheng, Steven L. Grant, Yiyu Shi:
Selective body biasing for post-silicon tuning of sub-threshold designs: A semi-infinite programming approach with Incremental Hypercubic Sampling. Integr. 55: 465-473 (2016) - Álvaro Gómez-Pau, Luz Balado, Joan Figueras:
Indirect test of M-S circuits using multiple specification band guarding. Integr. 55: 415-424 (2016) - Victor R. Gonzalez-Diaz, Luis Abraham Sánchez-Gaspariano, Carlos Muñiz-Montero, Jose J. Alvarado-Pulido:
Improving linearity in MOS varactor based VCOs by means of the output quiescent bias point. Integr. 55: 274-280 (2016) - Kourosh Hassanli, Sayed Masoud Sayedi, Rasoul Dehghani, Armin Jalili, J. Jacob Wikner:
A low-power wide tuning-range CMOS current-controlled oscillator. Integr. 55: 57-66 (2016) - Zeinab Hojati, Mohammad Yavari:
An NTF-enhanced incremental ΣΔ modulator using a SAR quantizer. Integr. 55: 212-219 (2016) - Qicheng Huang, Xiao Li, Chenlei Fang, Fan Yang, Yangfeng Su, Xuan Zeng:
An aggregating based model order reduction method for power grids. Integr. 55: 449-454 (2016) - Xin Huang, Valeriy Sukharev, Jun-Ho Choy, Marko Chew, Taeyoung Kim, Sheldon X.-D. Tan:
Electromigration assessment for power grid networks considering temperature and thermal stress effects. Integr. 55: 307-315 (2016) - Wasim Hussain, Olivier Valorge, Yves Blaquière, Yvon Savaria:
A novel spatially configurable differential interface for an electronic system prototyping platform. Integr. 55: 129-137 (2016) - Fanshu Jiao, Alex Doboli:
Causal reasoning mining approach to analog circuit verification. Integr. 55: 376-383 (2016) - Arezoo Kamran, Zainalabedin Navabi:
Stochastic testing of processing cores in a many-core architecture. Integr. 55: 183-193 (2016) - O. Bellaaj Kchaou, Amel Garbaya, Mouna Kotti, Pedro Pereira, Mourad Fakhfakh, M. Helena Fino:
Sensitivity aware NSGA-II based Pareto front generation for the optimal sizing of analog circuits. Integr. 55: 220-226 (2016) - Jian Kuang, Evangeline F. Y. Young:
Row-structure stencil planning approaches for E-beam lithography with overlapped characters. Integr. 55: 232-245 (2016) - T. Nandha Kumar, Haider A. F. Almurib, Fabrizio Lombardi:
Design of a memristor-based look-up table (LUT) for low-energy operation of FPGAs. Integr. 55: 1-11 (2016) - Gildas Léger, Manuel J. Barragán:
Brownian distance correlation-directed search: A fast feature selection technique for alternate test. Integr. 55: 401-414 (2016) - He Li, Qiang Liu, Jiliang Zhang:
A survey of hardware Trojan threat and defense. Integr. 55: 426-437 (2016) - Xin Li, Sheldon X.-D. Tan, Yu Wang:
Editorial: Special Issue on The 14th International Conference on Computer-Aided Design and Computer Graphics (CAD/Graphics 2015). Integr. 55: 425 (2016) - Bao Liu, Gang Qu:
VLSI supply chain security risks and mitigation techniques: A survey. Integr. 55: 438-448 (2016) - Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Povoa, Nuno Horta:
AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation. Integr. 55: 316-329 (2016) - Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta:
Current-flow and current-density-aware multi-objective optimization of analog IC placement. Integr. 55: 295-306 (2016) - Mahdi Mosaffa, Siamak Mohammadi, Saeed Safari:
Statistical analysis of asynchronous pipelines in presence of process variation using formal models. Integr. 55: 98-117 (2016) - Lior Moyal, Itamar Levi, Adam Teman, Alexander Fish:
Synthesis of Dual Mode Logic. Integr. 55: 246-253 (2016) - Uros Nahtigal, Drago Strle:
Design, simulation, and implementation of an integrated, hybrid photocurrent-to-digital converter in CMOS technology. Integr. 55: 254-264 (2016)
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