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Publication search results
found 99 matches
- 2011
- M. T. S. Ab-Aziz, Arjuna Marzuki, Z. A. A. Aziz:
12-Bit Pseudo-Differential Current-Source resistor-String Hybrid DAC. J. Circuits Syst. Comput. 20(4): 709-725 (2011) - Za'er Salim Abo-Hammour, Othman M.-K. Alsmadi, Adnan M. Al-Smadi:
Multi-Time-Scale Systems Model Order Reduction via Genetic Algorithms with Eigenvalue Preservation. J. Circuits Syst. Comput. 20(7): 1403-1418 (2011) - Choon Ki Ahn:
Design of State Estimator for Switched Hopfield Neural Networks with Time-Delay. J. Circuits Syst. Comput. 20(4): 657-666 (2011) - Halil Alpaslan, Erkan Yüce:
Bandwidth Expansion Methods of inductance Simulator Circuits and voltage-Mode biquads. J. Circuits Syst. Comput. 20(3): 557-572 (2011) - Davide Anguita, Luca Carlino, Alessandro Ghio, Sandro Ridella:
A FPGA Core Generator for Embedded Classification Systems. J. Circuits Syst. Comput. 20(2): 263-282 (2011) - George E. Antoniou, Panagiota A. Katsalis:
On the 1D and 2D Rogers-Ramanujan Continued Fractions. J. Circuits Syst. Comput. 20(4): 573-585 (2011) - Smail Bachir, Nicusor Calinoiu, Claude Duvanaud:
Linearization of RF Power amplifiers Using Adaptive Kalman Filtering Algorithm. J. Circuits Syst. Comput. 20(6): 1001-1018 (2011) - Mohamad Reza Banaei, E. Salary:
Analysis of a Generalized Symmetrical Multilevel inverter. J. Circuits Syst. Comput. 20(2): 299-311 (2011) - Labros Bisdounis:
Analytical Modeling of Overshooting Effect in Sub-100 nm CMOS inverters. J. Circuits Syst. Comput. 20(7): 1303-1321 (2011) - Abdelhafid Bouhraoua, Muhammad E. S. Elrabaa:
Improved Modified Fat-Tree Topology Network-on-Chip. J. Circuits Syst. Comput. 20(4): 757-780 (2011) - Inés del Campo, Javier Echanobe, Koldo Basterretxea, Guillermo Bosque:
Scalable Architecture for High-Speed Multidimensional Fuzzy Inference Systems. J. Circuits Syst. Comput. 20(3): 375-400 (2011) - Yawgeng A. Chau, Chen-Feng Chen:
On the Design of Adaptive-Bandwidth All-Digital Phase-Locked Loops. J. Circuits Syst. Comput. 20(6): 1037-1049 (2011) - Hua-Pin Chen:
Versatile voltage-Mode DDCC-Based Universal Filter. J. Circuits Syst. Comput. 20(4): 681-696 (2011) - Qingqing Chen, György Csaba, Paolo Lugli, Ulf Schlichtmann, Martin Stutzmann, Ulrich Rührmair:
Circuit-Based Approaches to Simpl Systems. J. Circuits Syst. Comput. 20(1): 107-123 (2011) - Ze-Wang Chen, Jian-Hua Su, You-Ren Wang:
An Effective Test Algorithm and Diagnostic Implementation for Embedded Static Random Access Memories. J. Circuits Syst. Comput. 20(7): 1389-1402 (2011) - Zhiming Chen, Yuanjin Zheng, Xiaojun Yuan:
Cmos Low-Power Analogue Baseband Circuits for a Non-Coherent Low Data Rate IR-UWB Receiver. J. Circuits Syst. Comput. 20(1): 45-55 (2011) - Hyun Sang Cho, Takekazu Kato, Tatsuya Yamazaki, Minsoo Hahn:
A Power Consumption Activity Based Heterogeneous SOA Framework for Context-Aware Home Services. J. Circuits Syst. Comput. 20(7): 1211-1230 (2011) - Marko A. Dimitrijevic, Vanco B. Litovski:
Power Factor and Distortion Measuring for Small Loads Using USB Acquisition Module. J. Circuits Syst. Comput. 20(5): 867-880 (2011) - Xiaofeng Ding, Chris Mi:
Modeling of Eddy Current Loss and temperature of the magnets in Permanent magnet Machines. J. Circuits Syst. Comput. 20(7): 1287-1301 (2011) - Hyun-Lark Do:
Isolated High Step-up Zero-voltage-Switching DC-DC converter with a Continuous Input Current. J. Circuits Syst. Comput. 20(8): 1619-1635 (2011) - Stavros P. Dokouzyannis, Argiris P. Mokios:
A New Platform for the Implementation of Regular Iterative Algorithms into FPGAs. J. Circuits Syst. Comput. 20(6): 975-999 (2011) - Kei Eguchi:
Design of a Dual-Input Serial DC-DC converter Realizing Individual Switching Modes. J. Circuits Syst. Comput. 20(6): 1075-1094 (2011) - Elie Elaaraj, Iyad Ouaiss:
A Novel Register-Binding Approach to Reduce Spurious Switching Activity in High-Level Synthesis. J. Circuits Syst. Comput. 20(5): 943-973 (2011) - Rihem Farkh, Kaouther Laabidi, Mekki Ksouri:
Robust Control for Uncertain Delay System. J. Circuits Syst. Comput. 20(3): 479-499 (2011) - Edson Pedro Ferlin, Heitor Silvério Lopes, Carlos Raimundo Erig Lima, Mauricio Perretto:
A FPGA-Based Reconfigurable Parallel Architecture for High-Performance Numerical Computation. J. Circuits Syst. Comput. 20(5): 849-865 (2011) - Giuseppe Ferri, Vincenzo Stornelli, Alessia di Simone:
A CCII-Based High Impedance Input Stage for Biomedical Applications. J. Circuits Syst. Comput. 20(8): 1441-1447 (2011) - David Fitrio, Suhardi Tjoa, Anand Mohan, Ronny Veljanovski, Andrew Berry, Goran Panjkovic:
A CMOS Analog Integrated Circuit for Pixel X-Ray Detector. J. Circuits Syst. Comput. 20(1): 71-87 (2011) - Zwe-Lee Gaing, Gai-Neng Lin:
Unit Commitment with Security Assessment Using Chaotic PSO Algorithm. J. Circuits Syst. Comput. 20(7): 1357-1376 (2011) - Mahdiar Hosein Ghadiry, Abu Khari A'Ain, Mahdieh Nadi Senjani:
Design and Analysis of a Novel Low PDP Full Adder Cell. J. Circuits Syst. Comput. 20(3): 439-445 (2011) - Behnam Ghavami, Hossein Pedram, Arezoo Salarpour:
Leakage Power Reduction of Asynchronous Pipelines. J. Circuits Syst. Comput. 20(2): 207-222 (2011)
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