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Pepijn J. de Langen

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2000 – 2009

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2009
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Pepijn J. de Langen, Ben H. H. Juurlink:
Leakage-Aware Multiprocessor Scheduling. J. Signal Process. Syst. 57(1): 73-88 (2009)
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Pepijn J. de Langen, Ben H. H. Juurlink:
Limiting the number of dirty cache lines. DATE 2009: 670-675
2008
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Pepijn J. de Langen, Ben H. H. Juurlink:
Memory copies in multi-level memory systems. ASAP 2008: 281-286
2007
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Pepijn J. de Langen, Ben H. H. Juurlink:
Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors. SAMOS 2007: 75-85
2006
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Pepijn J. de Langen, Ben H. H. Juurlink:
Leakage-aware multiprocessor scheduling for low power. IPDPS 2006
2004
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Ben H. H. Juurlink, Pepijn J. de Langen:
Dynamic techniques to reduce memory traffic in embedded systems. Conf. Computing Frontiers 2004: 192-201
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Pepijn J. de Langen, Ben H. H. Juurlink:
Reducing traffic generated by conflict misses in caches. Conf. Computing Frontiers 2004: 235-239

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