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ARVLSI 2001: Salt Lake City, UT, USA
- 19th Conference on Advanced Research in VLSI (ARVLSI 2001), 14-16 March 2001, Salt Lake City, UT, USA. IEEE Computer Society 2001, ISBN 0-7695-1037-X

- Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee:

Building a Distributed Asynchronous Control Unit through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG. 2-15 - Rajit Manohar, Mika Nyström, Alain J. Martin:

Precise Exceptions in Asynchronous Processors. 16-28 - V. A. Bartlett, Eckhard Grass:

A Low-Power Asynchronous VLSI FIR Filter. 29-41 - Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthymiou:

Design, Verification, and Test of a True Single-Phase 8-bit Adiabatic Multiplier. 42-58 - Seongmoo Heo, Ronny Krashinsky, Krste Asanovic:

Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy. 59-74 - K. Joseph Hass, Jack Venbrux, Prakash Bhatia:

Logic Design Considerations for 0.5-Volt CMOS. 75-87 - Thaddeus Gabara:

Phantom Mode Signaling in VLSI Systems. 88-100 - Claude R. Gauthier, Jayakumaran Sivagnaname, Richard B. Brown:

Dynamic Receiver Biasing For Inter-Chip Communication. 101-111 - Rajit Manohar:

Width-Adaptive Data Word Architectures. 112-131 - Chris Winstead, Jie Dai, Woo Jin Kim, Scott Little, Yong-Bin Kim, Chris J. Myers

, Christian Schlegel:
Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS. 132-147 - Matt Kucic, Paul E. Hasler, Jeff Dugger, David V. Anderson:

Programmable and Adaptive Analog Filters using Arrays of Floating-Gate Circuits. 148-162 - Vincent F. Koosh, Rodney M. Goodman:

Dynamic Charge Restoration of Floating Gate Subthreshold MOS Translinear Circuits. 163-171 - Sree Ganesan, Ranga Vemuri

:
Analog-Digital Partitioning for Field-Programmable Mixed Signal Systems. 172-187 - Kip C. Killpack, Eric Mercer, Chris J. Myers:

A Standard-Cell Self-Timed Multiplier for Energy and Area Critical Synchronous Systems. 188-201 - Chan-Ho Park, Byung-Soo Choi

, Dong-Ik Lee, Ho-Yong Choi:
Asynchronous Array Multiplier with an Asymmetric Parallel Array Structure. 202-212 - Sheng Sun, Larry McMurchie, Carl Sechen:

A High-Performance 64-bit Adder Implemented in Output Prediction Logic. 213-223 - Marc Cohen, Gert Cauwenberghs

, Mikhail A. Vorontsov, Gary Carhart:
Focal-Plane Image and Beam Quality Sensors for Adaptive Optics. 224-237 - Alberto Pesavento, Christof Koch

:
Methods and Circuits for Focal-Plane Computation of Features in CMOS Visual Sensors. 238-248 - Oliver Landolt, Ania Mitros, Christof Koch

:
Visual Sensor with Resolution Enhancement by Mechanical Vibrations. 249-264

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