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ORCID16th FDL 2013: Paris, France
- Proceedings of the 2013 Forum on specification and Design Languages, FDL 2013, Paris, France, September 24-26, 2013. IEEE 2013, ISBN 978-2-9530504-8-6
AFM: Application of Formal Methods for Design Space Exploration and Refinement
- Dominique Borrione, Ashraf M. Salem:
Application of formal methods for design space exploration and refinement. 1 - Matthias Sauppe, Thomas Horn, Erik Markert, Ulrich Heinkel, Hans-Werner Sahm, Klaus-Holger Otto:
Optimal component selection for energy-efficient systems. 1-8 - Hocine Mokrani, Rabéa Ameur-Boulifa, Emmanuelle Encrenaz-Tiphène:
Assisting refinement in System-on-Chip design. 1-6 - Benny Höckner, Petra Hofstedt, Sascha Kaltschmidt, Peter Sauer, Thilo Vörtler:
Design space exploration for cyber physical system design using constraint solving. 1-4 - Christoph Grimm, Emmanuelle Encrenaz:
Verification of heterogeneous systems: Theory and industrial experiences. 1
AFM/EAMS: Verification of Heterogeneous Systems: Theory and Industrial Experiences
- Dhanashree Kulkarni, Andrew N. Fisher, Chris J. Myers:
A new assertion property language for analog/mixed-signal circuits. 1-8 - Dogan Ulus, Alper Sen, I. Faik Baskaya:
Integrating circuit analyses for assertion-based verification of programmable AMS circuits. 1-8 - Arnaud Laroche, Jérôme Kirscher:
How to survive the verification of the latest generation of automotive system on chip. 1-7 - Moustafa Kassem, Marianne Michel, Mohamed Abdelsalam, Ashraf Salem:
A novel approach for assertion based verification of DDR memory protocols. 1-4 - Tom J. Kazmierski, Torsten Maehne:
Modeling communication and circuit's behavior. 1
EAMS 1: Modeling Communication and Circuit's Behavior
- Joachim Haase, André Lange:
Hybrid dynamical systems for memristor modelling an approach avoiding the terminal-state problem. 1-6 - Serge Garcia Sabiro:
Event-driven (RN) modeling for AMS circuits. 1-8 - Ruomin Wang, Julien Denoulet, Sylvain Feruglio, Farouk Vallette, Patrick Garda:
Modeling of signal integrity in bus communications with timed data flow SystemC-AMS. 1-6 - Jan Haase, François Pêcheux:
Model generation for embedded analog/mixed-signal systems. 1
EAMS 2: Model Generation for Embedded Analog/Mixed-Signal Systems
- Daniel Chaves Cafe, Filipe Vinci dos Santos, Cécile Hardebolle, Christophe Jacquet, Frédéric Boulanger:
Multi-paradigm semantics for simulating SysML models using SystemC-AMS. 1-8 - Franco Fummi, Michele Lora, Francesco Stefanni, Sara Vinco:
Code generation alternatives to reduce heterogeneous embedded systems to homogeneity. 1-4 - Cristian Ferent, Alex Doboli:
Modeling the analog circuit design feature variety. 1-7 - Julio L. Medina, Gjalt de Jong:
Modeling languages extensions and best practices. 1
MDE 1: Modeling Languages Extensions and Best Practices
- Mouna Ben Said, Yessine Hadj Kacem, Nader Ben Amor, Mickaël Kerboeuf, Mohamed Abid:
Fine-grain adaptation for real time embedded systems using UML/MARTE profile. 1-8 - Konstantinos Triantafyllidis, Egor Bondarev, Peter H. N. de With:
Performance analysis method for RT systems: Promartes for autonomous robot. 1-8 - Ansgar Radermacher, Arnaud Cuccuru, Sebastien Gerard, Brahim Hamid:
Split of composite components for distributed applications. 1-6 - Gjalt de Jong, Julio L. Medina:
Model driven engineering at work. 1
MDE 2: Model Driven Engineering at Work
- Samir Ouchani, Otmane Aït Mohamed, Mourad Debbabi:
A formal verification framework for Bluespec System Verilog. 1-7 - Andriamampianina Aina Randrianarisaina, Olivier Pasquier, Pascal Chargé:
A function approach for simple wireless sensor node energy consumption modeling. 1-8 - G. Botturi, Emad Samuel Malki Ebeid, Franco Fummi, Davide Quaglia:
Model-driven design for the development of multi-platform smartphone applications. 1-8 - Peter Flake, Frank Oppenheimer:
Systemc infrastructure and extensions. 1
DES 1: SystemC Infrastructure and Extensions
- Bastian Haetzer, Martin Radetzki:
Systemc transaction level modeling with transaction events. 1-6 - Anirudh M. Kaushik, Hiren D. Patel:
Systemc-clang: An open-source framework for analyzing mixed-abstraction SystemC models. 1-8 - Wei Hong, Jyoti Joshi, Alexander Viehl, Nico Bannow, Angela Kramer, Hendrik Post, Oliver Bringmann, Wolfgang Rosenstiel:
Advanced features for industry-level logging and tracing of C-based designs. 1-6 - Jean-Philippe Babau, Martin Radetzki:
Platform based design. 1
DES 2: Platform Based Design
- Seyed-Hosein Attarzadeh-Niaki, Marcus Mikulcak, Ingo Sander:
Rapid virtual prototyping of real-time systems using predictable platform characterizations. 1-8 - Yasser Shoukry, Ajay Kumar, M. Watheq El-Kharashi, Gahda Bahig, Sherif Hammad:
Graph-based approach for software allocation in automotive networked embedded systems: A partition-and-map algorithm. 1-6 - Christian Zebelein, Christian Haubelt, Joachim Falk, Tobias Schwarzer, Jürgen Teich:
Representing mapping and scheduling decisions within dataflow graphs. 1-8 - Frank Oppenheimer, Martin Radetzki:
Simulation analysis and validation. 1
DES 3: Simulation, Analysis and Validation
- Marcus Eggenberger, Martin Radetzki:
Fine grained adaptive simulation with application to NoCs. 1-8 - Fernando Herrera, Ingo Sander:
Combining analytical and simulation-based design space exploration for time-critical systems. 1-8 - Liyuan Zhang, Michael Glaß, Nils Ballmann, Jürgen Teich:
Bridging algorithm and ESL design: Matlab/Simulink model transformation and validation. 1-8 - Kaiming Ho:
SystemVerilog: The new standard. 1
SystemVerilog: the New Standard
- Peter Flake:
Why SystemVeriog? 1-6 - Dave Rich:
The unique challenges of debugging design and verification code jointly in SystemVerilog. 1-7 - Jonathan Bromley:
If SystemVerilog is so good, why do we need the UVM? Sharing responsibilities between libraries and the core language. 1-7
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