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35th ISMVL 2005: Calgary, Canada
- 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 18-21 May 2005, Calgary, Canada. IEEE Computer Society 2005, ISBN 0-7695-2336-6
- Message from the Symposium Chairs.
- Message from the Program Chair.
- Organizing Committee.
- List of Reviewers.
- Two New Awards.
Session 1: Keynote Address
- Barry C. Sanders:
Classical vs Quantum Fingerprinting. 2-5
Session 2A: Algebra I
- Ivo G. Rosenberg, Dan A. Simovici:
An Abstract Axiomatization of the Notion of Entropy. 8-13 - Seiki Akama, Yasunori Nagata:
On Prior's Three-Valued Modal Logic Q. 14-19 - Walter Alexandre Carnielli:
Polynomial Ring Calculus for Many-Valued Logics. 20-25 - Michiro Kondo, Mayuka F. Kawaguchi:
Partially Ordered Set with Residuated t-norm. 26-29
Session 2B: Circuits I
- Katsuhiko Degawa, Takafumi Aoki, Hiroshi Inokawa, Tatsuo Higuchi, Yasuo Takahashi:
A Two-Bit-per-Cell Content-Addressable Memory Using Single-Electron Transistors. 32-38 - Marina Alexandra Lyshevski:
Multi-Valued DNA-Based Electronic Nanodevices. 39-42 - Keisuke Eguchi, Masaru Chibashi, Takao Waho:
A Design of 10-GHz Delta-Sigma Modulator using a 4-Level Differential Resonant-Tunneling Quantizer. 43-47 - Sergey Edward Lyshevski:
Multi-Valued Nanoelectronics With Fullerenes. 48-53 - Henning Gundersen, Renè Jensen, Yngvar Berg:
A Novel Ternary Switching Element Using CMOS Recharge Semi Floating-Gate Devices. 54-58
Session 3: Tutorial on Clones
Session 4A: Logic Design I
- Marek A. Perkowski, Jacob D. Biamonte, Martin Lukac:
Test Generation and Fault Localization for Quantum Circuits. 62-68 - Bernd Steinbach, Christian Lang:
Complete Bi-Decomposition of Multiple-Valued Functions Using MIN and MAX Gates. 69-74 - Yukihiro Iguchi, Tsutomu Sasao:
Hardware to Compute Walsh Coefficients. 75-81 - Sergey Edward Lyshevski:
Three Dimensional Multi-Valued Design in Nanoscale Integrated Circuits. 82-87 - Nabil Abu-Khader, Pepe Siy:
Multiple-Valued Logic Approach for a Systolic^2 AB Circuit in Galois Field. 88-93
Session 4B: Clones and Algebraic Aspects
- Jovanka Pantovic, Gradimir Vojvodic:
On the Partial Hyperclone Lattice. 96-100 - Lucien Haddad, Ivo G. Rosenberg:
Partial Clones Determined by Concatenated Relations. 101-106 - Masahiro Miyakawa, Ivo G. Rosenberg, Hisayuki Tatsumi:
Semirigid Equivalence Relations - A New Proof Method. 107-112
Session 5A: Circuits II
- Tomoaki Hasegawa, Yuya Homma, Michitaka Kameyama:
Multiple-Valued VLSI Architecture for Intra-Chip Packet Data Transfer. 114-119 - Haque Mohammad Munirul, Tomoaki Hasegawa, Michitaka Kameyama:
Implementation and Evaluation of a Fine-Grain Multiple-Valued Field Programmable VLSI Based on Source-Coupled Logic. 120-125 - Emre Özer, Resit Sendag, David Gregg:
Multiple-Valued Caches for Power-Efficient Embedded Systems. 126-131 - Chris Winstead:
Analog Soft Decoding for Multi-Level Memories. 132-137 - Naoya Onizawa, Akira Mochizuki, Takahiro Hanyu:
Multiple-Valued Duplex Asynchronous Data Transfer Scheme for Interleaving in LDPC Decoders. 138-143 - Hideki Fukuda:
Signed-digit CMOS (SD-CMOS) Logic Circuits with Dynamic Operation. 144-151
Session 5B: Fuzzy Logic and Neural Networks
- Phil Serchuk:
The Alleged Limitations of Fuzzy Control. 154-159 - Claudio Moraga, Rodrigo Salas:
A New Aspect for the Optimization of Fuzzy If-Then Rules. 160-165
Session 6: Invited Address
- Michael P. Frank:
Approaching the Physical Limits of Computing. 168-185
Session 7A: Spectral Transforms
- Radomir S. Stankovic, Claudio Moraga, Jaakko Astola:
Remarks on the Structure of Matrix-Valued Spectral Transforms on Finite Non-Abelian Groups. 188-193 - Mitchell A. Thornton:
The Karhunen-Loève Transform of Discrete MVL Functions. 194-199 - Cheng Fu, Bogdan J. Falkowski:
Properties and Relations of Quaternary Linearly Independent Helix Transformations. 200-205 - Bogdan J. Falkowski, Cheng Fu:
Classes of Fastest Quaternary Linearly Independent Transformations. 206-211
Session 7B: Algebra II
- Zoran Majkic:
Many-Valued Intuitionistic Implication and Inference Closure in a Bilattice-Based Logic. 214-220 - Michel Serfati:
A Note on Triangulation of PostAlgebras and "Leibnizian" Lattices. 221-226 - Hajime Machida, Ivo G. Rosenberg:
Centralizers of Monoids Containing the Symmetric Group. 227-233
Session 8: Invited Address
- Marek A. Perkowski, Tsutomu Sasao, Jong-Hwan Kim, Martin Lukac, Jeff Allen, Stefan Gebauer:
Hahoe KAIST Robot Theatre: Learning Rules of Interactive Robot Behavior as a Multiple-Valued Logic Synthesis Problem. 236-248
Session 9A: Logic Design II
- Sebastian Kinder, Görschwin Fey, Rolf Drechsler:
Controlling the Memory During Manipulation of Word-Level Decision Diagrams. 250-255 - Tsutomu Sasao:
Radix Converters: Complexity and Implementation by LUT Cascades. 256-263 - Elena N. Zaitseva, Vitaly G. Levashenko, Karol Matiasko, Seppo Puuronen:
Dynamic Reliability Indices for k-out-of-n Multi-State System. 264-269 - Jacqueline E. Rice, Jon C. Muzio:
A Characterization of Antisymmetry in Boolean and Multi-Valued Functions. 270-275 - Daniel H.-Y. Teng, Ronald J. Bolton:
Estimation of Average Multiple-Valued Logic Circuit Size Using Monte Carlo Simulation Technique. 276-281
Session 9B: Algebra III
- Stefano Aguzzoli, Brunella Gerla:
Normal Forms for the One-Variable Fragment of Hájek's Basic Logic. 284-289 - Carlos Ansótegui, Felip Manyà:
Mapping Many-Valued CNF Formulas to Boolean CNF Formulas. 290-295 - Arnon Avron, Anna Zamansky:
Quantification in Non-Deterministic Multi-Valued Structures. 296-301
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