default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID36th LCPC 2023: Lexington, KY, USA
- Henry G. Dietz
:
Languages and Compilers for Parallel Computing - 36th International Workshop, LCPC 2023, Lexington, KY, USA, October 11-13, 2023, Revised Selected Papers. Lecture Notes in Computer Science 14480, Springer 2026, ISBN 978-3-032-02435-0 - Pedro Valero-Lara, Jeffrey S. Vetter:
SEER: An On-node Performance-Portable C++ Library for Heterogeneous Systems. 1-19 - Pedro Valero-Lara, Alexis Huante, Mustafa Al Lail, William F. Godoy, Keita Teranishi, Prasanna Balaprakash, Jeffrey S. Vetter:
Comparing Llama-2 and GPT-3 LLMs for HPC Kernels Generation. 20-32 - Zheming Jin, Jeffrey S. Vetter:
Benchmarking Operators in Deep Neural Networks for Improving Performance Portability of SYCL. 33-45 - Akshay Bhosale, Rudolf Eigenmann:
COMPASS: A Combined Parallel Subscripted Subscript Benchmark Suite. 46-63 - Maksim Berezov, Corinne Ancourt, Mikhail Kashchenko:
Tiling Parameters Prediction Using Machine Learning Techniques. 64-77 - Yuqing Wang, Andronicus Rajasukumar, Tianshuo Su, Marziyeh Nourian, Jose M. Monsalve Diaz, Ahsan Pervaiz, Jerry Ding, Charles Colley, Wenyi Wang, Yanjing Li, David F. Gleich, Hank Hoffmann, Andrew A. Chien:
Efficiently Exploiting Irregular Parallelism Using Keys at Scale. 78-95 - Fumiaki Onishi, Ryosei Otaka, Kazuki Fujita, Tomoki Suetsugu, Tohma Kawasumi, Toshiaki Kitamura, Hironori Kasahara, Keiji Kimura:
Automatic Deep Learning Parallelization for Vector Multicore Chips with the OSCAR Parallelizing and the TVM Open-Source Deep Learning Compiler. 96-110 - Timo Stadler, Spyro Nita, Jan Dünnweber:
A Parallel Hybrid Genetic Search for the Capacitated VRP with Pickup and Delivery. 111-125 - Mahesh Lakshminarasimhan, Mahesh Ravishankar, Mary W. Hall, P. Sadayappan:
Performance-Portable Tensor Transpositions in MLIR. 126-141 - Movahhed Sadeghi, Soheil Khadirsharbiyani, Mahmut Taylan Kandemir:
Quantum Circuit Resizing via Serial Execution. 142-159 - Pavlo Pastaryev, Charith Mendis, Lawrence Rauchwerger:
Generating Memory Allocators from the Ground Up. 160-173 - Aniket Shivam, Alexandru Nicolau, Alexander V. Veidenbaum:
A Multiple Compiler Framework for Improved Performance. 174-194 - Amir Mohammad Tavakkoli, Sameeran Joshi, Shreya Singh, Yufan Xu, P. Sadayappan, Mary W. Hall:
PEAK: Generating High-Performance Schedules in MLIR. 195-211 - Raphael A. Finkel:
Answer-Set Programming - An Introduction Based on Sudoku and (Thomas G.) Room Arrangements. 212-222
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-12-04 01:25 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
