default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDVLSI-SoC 2008: Rhodes Island, Greece - Selected Papers
- Christian Piguet, Ricardo Reis, Dimitrios Soudris:
VLSI-SoC: Design Methodologies for SoC and SiP - 16th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2008, Rhodes Island, Greece, October 13-15, 2008, Revised Selected Papers. IFIP Advances in Information and Communication Technology 313, Springer 2010, ISBN 978-3-642-12266-8 - Vasilis F. Pavlidis, Eby G. Friedman:
Physical Design Issues in 3-D Integrated Technologies. 1-21 - Tilo Meister
, Jens Lienig, Gisbert Thomke:
Universal Methodology to Handle Differential Pairs during Pin Assignment. 22-42 - Vasilios Kalenteridis, Konstantinos Papathanasiou, Stylianos Siskos:
Analysis and Design of Charge Pumps for Telecommunication Applications. 43-60 - Enrico Dallago, Daniele Miatton, Giuseppe Venchi, Valeria Bottarel, Giovanni Frattini, Giulio Ricotti, Monica Schipani:
Comparison of Two Autonomous AC-DC Converters for Piezoelectric Energy Scavenging Systems. 61-80 - Christophe Escriba, Remy Fulcrand, Philippe Artillan, David Jugieu, Aurélien Bancaud, Ali Boukabache, Anne Marie Gué, Jean-Yves Fourniols:
Trapping Biological Species in a Lab-on-Chip Microsystem: Micro Inductor Optimization Design and SU8 Process. 81-96 - Ian O'Connor, Ilham Hassoune, David Navarro:
Fine-Grain Reconfigurable Logic Cells Based on Double-Gate MOSFETs. 97-113 - Laura Frigerio, Kellie Marks, Argy Krikelis:
Timed Coloured Petri Nets for Performance Evaluation of DSP Applications: The 3GPP LTE Case Study. 114-132 - Vassilios Vonikakis, Chryssanthi Iakovidou, Ioannis Andreadis:
Real-Time Biologically-Inspired Image Exposure Correction. 133-153 - Andre Guntoro, Manfred Glesner:
A Lifting-Based Discrete Wavelet Transform and Discrete Wavelet Packet Processor with Support for Higher Order Wavelet Filters. 154-173 - Gian Carlo Cardarilli, Alberto Nannarelli, Marco Re:
On the Comparison of Different Number Systems in the Implementation of Complex FIR Filters. 174-190 - Alessandro Cilardo, Nicola Mazzocca:
Time Efficient Dual-Field Unit for Cryptography-Related Processing. 191-210 - Kostas Siozios, Dimitrios Soudris:
A Temperature-Aware Placement and Routing Algorithm Targeting 3D FPGAs. 211-231 - Vincenzo Rana, David Atienza, Marco D. Santambrogio, Donatella Sciuto, Giovanni De Micheli:
A Reconfigurable Network-on-Chip Architecture for Optimal Multi-Processor SoC Communication. 232-250 - Nikolas Kroupis, Dimitrios Soudris:
Fast Instruction Memory Hierarchy Power Exploration for Embedded Systems. 251-270 - Andreas Floros, Yiorgos Tsiatouhas, Xrysovalantis Kavousianos:
Timing Error Detection and Correction by Time Dilation. 271-285
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-12-04 22:07 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
