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ORCIDRicardo Augusto da Luz Reis
Ricardo A. L. Reis – Ricardo Reis 0001
Person information
- affiliation: Federal University of Rio Grande do Sul, Porto Alegre, Brazil
Other persons with the same name
- Ricardo Reis 0002
![[0000-0002-9103-4091]](https://dblp.dagstuhl.de/img/orcid-mark.12x12.png "0000-0002-9103-4091")
— INESC TEC, Porto, Portugal
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2020 – today
- 2024
[c296]Rafael da Silva, Mateus Grellert, Ricardo Reis:
Energy-Efficient Design of Approximate VVC Interpolation Filters Units. ISVLSI 2024: 63-68- [c295]Alex Hanneman, Jonas Gava, Paulo Vancin, Aqsa Kk Kaim-Khani, Sam Amiri, Rafael Garibotti, Fernando Moraes, Ney Calazans, Ricardo Reis, Luciano Ost:
Soft Error Assessment of UAV Control Algorithms Running in Resource-Constrained Microprocessors. ISVLSI 2024: 694-698 - [c294]Geancarlo Abich, Ricardo Augusto da Luz Reis, Luciano Ost:
Early Soft Error Reliability Assessment of Convolutional Neural Networks Executing on Resource-constrained IoT Edge Devices. ITC 2024: 207-216 - [c293]Elias de Almeida Ramos, Ricardo Reis:
Comparing the Effects of Process Variability in FinFETs and CNFETs. LASCAS 2024: 1-5 - [c292]Luis Enrique Murillo Vizcardo, Ricardo Reis:
NEATRouter: A New Method for 2D Global Routing. VLSI-SoC 2024: 1-6 - 2023
- [j51]Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Frédéric Darracq, Frédéric Fauquet, Ricardo Reis, François Rivet:
A Proof-of-Concept of a Multiple-Cell Upsets Detection Method for SRAMs in Space Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 4877-4887 (2023) - [c291]Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Ricardo Reis, François Rivet:
A Tool for Automatic Radiation-Hardened SRAM Layout Generation. ICECS 2023: 1-4 - [c290]Bernardo Borges Sandoval, Leonardo Heitich Brendler, Fernanda Lima Kastensmidt, Ricardo Reis, Alexandra L. Zimpeck, Rafael B. Schvittz, Cristina Meinhardt:
Impact on Radiation Robustness of Gate Mapping in FinFET Circuits under Work-function Fluctuation. ISCAS 2023: 1-5 - [c289]Geancarlo Abich, Anderson Ignacio da Silva, José Eduardo Thums, Rafael da Silva, Altamiro Amadeu Susin, Ricardo Reis, Luciano Ost:
Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices. ISVLSI 2023: 1-6 - [c288]Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Ricardo Reis, François Rivet:
A MCU-robust Interleaved Data/Detection SRAM for Space Environments. ISVLSI 2023: 1-6 - [c287]Elias de Almeida Ramos, Ricardo Reis:
Using Lyapunov Exponents and Entropy to Estimate Sensitivity to Process Variability. ISVLSI 2023: 1-6 - [c286]Rodrigo N. Wuerdig, Vitor Hugo F. Maciel, Ricardo Reis, Sergio Bampi:
LEX - A Cell Switching Arcs Extractor: A Simple SPICE-Input Interface for Electrical Characterization. ISVLSI 2023: 1-6 - [c285]Elias de Almeida Ramos, Ricardo Reis:
Using Lyapunov Exponents to Estimate Sensitivity to Process Variability. LASCAS 2023: 1-4 - [c284]Geancarlo Abich, Anderson Ignacio da Silva, Jonas Gava, Altamiro Amadeu Susin, Ricardo Augusto da Luz Reis, Luciano Ost:
Power and Performance Costs of Radiation-Hardened ML Inference Models Running on Edge Devices. SBCCI 2023: 1-6 - [c283]Rafael da Silva, Mateus Grellert, Ricardo Reis:
An Energy-Efficient Interpolation Unit Targeting VVC Encoders with Approximate Adder. SBCCI 2023: 1-5 - [c282]Alex Hanneman, Jonas Gava, Vitor V. Bandeira, Rafael Garibotti, Ricardo Reis, Luciano Ost:
DeBaTE-FI: A Debugger-Based Fault Injector Infrastructure for IoT Soft Error Reliability Assessment. WF-IoT 2023: 1-6 - 2022
- [j50]Fábio G. R. G. da Silva, Rafael N. M. Oliveira, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis:
Exploring XOR-based Full Adders and decoupling cells to variability mitigation at FinFET technology. Integr. 87: 137-146 (2022) - [j49]Jonas Gava, Vitor V. Bandeira, Felipe Rosa, Rafael Garibotti, Ricardo Reis, Luciano Ost:
SOFIA: An automated framework for early soft error assessment, identification, and mitigation. J. Syst. Archit. 131: 102710 (2022) - [j48]Geancarlo Abich, Rafael Garibotti, Ricardo Reis, Luciano Ost:
The Impact of Soft Errors in Memory Units of Edge Devices Executing Convolutional Neural Networks. IEEE Trans. Circuits Syst. II Express Briefs 69(3): 679-683 (2022) - [c281]Jonas Gava, Guilherme Dorneles, Ricardo Reis, Rafael Garibotti, Luciano Ost:
Soft Error Assessment of CNN Inference Models Running on a RISC-V Processor. ICECS 2022 2022: 1-4 - [c280]Ricardo Reis:
Research Experience as a Way to Improve Retention and Graduation Rates. ISCAS 2022: 110-113 - [c279]Vinícius Da Rocha, Nicolas Moura, Jonas Gava, Vitor V. Bandeira, Luciano Ost, Ricardo Augusto da Luz Reis, Rafael Garibotti:
Soft Error Reliability Assessment of Lightweight Cryptographic Algorithms for IoT Edge Devices. ISCAS 2022: 457-460 - [c278]Ricardo Augusto da Luz Reis:
A Lifetime of Physical Design Automation and EDA Education: ISPD 2022 Lifetime Achievement Award Bio. ISPD 2022: 137-138 - [c277]Ricardo Augusto da Luz Reis:
Physical Design Optimization, From Past to Future. ISPD 2022: 145-148 - [c276]Geancarlo Abich, Rafael Garibotti, Jonas Gava, Ricardo Reis, Luciano Ost:
Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks. LASCAS 2022: 1-4 - [c275]Rafael N. M. Oliveira, Fábio G. R. G. da Silva, Ricardo Reis, Rafael B. Schvittz, Cristina Meinhardt:
Improving Soft Error Robustness of Full Adder Circuits with Decoupling Cell and Transistor Sizing. SBCCI 2022: 1-6 - [c274]Jonas Gava, Ricardo Reis, Luciano Ost:
Investigation of Hybrid Soft Error Mitigation Techniques for Applications running on Resource-constrained devices. VLSI-SoC 2022: 1-2 - [e23]Victor Grimblatt, Chip-Hong Chang, Ricardo Reis, Anupam Chattopadhyay, Andrea Calimera:
VLSI-SoC: Technology Advancement on SoC Design - 29th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2021, Singapore, October 4-8, 2021, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 661, Springer 2022, ISBN 978-3-031-16817-8 [contents] - 2021
- [j47]Geancarlo Abich, Rafael Garibotti, Vitor V. Bandeira, Felipe da Rosa, Jonas Gava, Felipe T. Bortolon, Guilherme Medeiros, Fernando Moraes, Ricardo Reis, Luciano Ost:
Evaluation of the soft error assessment consistency of a JIT-based virtual platform simulator. IET Comput. Digit. Tech. 15(2): 125-142 (2021) - [j46]Geancarlo Abich, Jonas Gava, Rafael Garibotti, Ricardo Reis, Luciano Ost:
Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 68(11): 4772-4782 (2021) - [j45]Vitor V. Bandeira, Isadora Oliveira, Felipe Rosa, Ricardo Reis, Luciano Ost:
An Extensive Soft Error Reliability Analysis of a Real Autonomous Vehicle Software Stack. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 446-450 (2021) - [c273]Gerson D. Andrade, Ricardo A. L. Reis, Eduardo A. C. da Costa, Alexandra L. Zimpeck:
Sensitivity of FinFET Adders to PVT Variations and Sleep Transistor as a Mitigation Strategy. APCCAS 2021: 37-40 - [c272]Geancarlo Abich, Ricardo Reis, Luciano Ost:
The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network. LASCAS 2021: 1-4 - [c271]Leonardo Heitich Brendler, Alexandra L. Zimpeck, Fernanda Lima Kastensmidt, Cristina Meinhardt, Ricardo A. L. Reis:
Voltage Scaling Influence on the Soft Error Susceptibility of a FinFET-based Circuit. LASCAS 2021: 1-4 - [c270]Leonardo B. Moraes, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis:
Current Behavior on Process Variability Aware FinFET Inverter Designs. LASCAS 2021: 1-4 - [c269]Isadora Oliveira, Marcelo Danigno, Paulo F. Butzen, Ricardo Reis:
Benchmarking Open Access VLSI Partitioning Tools. LASCAS 2021: 1-4 - [c268]Rafael N. M. Oliveira, Fábio G. R. G. da Silva, Ricardo Reis, Cristina Meinhardt:
SET Mitigation Techniques on Mirror Full Adder at 7 nm FinFET Technology. LATS 2021: 1-2 - [c267]Bernardo Borges Sandoval, Leonardo Heitich Brendler, Alexandra L. Zimpeck, Fernanda Lima Kastensmidt, Ricardo Reis, Cristina Meinhardt:
Exploring Gate Mapping and Transistor Sizing to Improve Radiation Robustness: A C17 Benchmark Case-study. LATS 2021: 1-6 - [c266]Vitor Hugo F. Maciel, Germano Girondi, Elias de Almeida Ramos, Ricardo Reis:
Exploring a New Tool for Automatic Layout Synthesis for FDSOI 28 nm. VLSI-SoC 2021: 1-2 - [e22]Andrea Calimera, Pierre-Emmanuel Gaillardon, Kunal Korgaonkar, Shahar Kvatinsky, Ricardo Reis:
VLSI-SoC: Design Trends - 28th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2020, Salt Lake City, UT, USA, October 6-9, 2020, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 621, Springer 2021, ISBN 978-3-030-81640-7 [contents] - 2020
- [b1]Felipe Rocha da Rosa, Luciano Ost, Ricardo Reis:
Soft Error Reliability Using Virtual Platforms - Early Evaluation of Multicore Systems. Springer 2020, ISBN 978-3-030-55703-4, pp. 1-136 - [j44]Mateus Fogaça, Andrew B. Kahng, Eder Monteiro, Ricardo Reis, Lutong Wang, Mingyu Woo:
On the superiority of modularity-based clustering for determining placement-relevant clusters. Integr. 74: 32-44 (2020) - [j43]Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Augusto da Luz Reis:
Multi-Level Design Influences on Robustness Evaluation of 7nm FinFET Technology. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 553-564 (2020) - [c265]Daiane Freitas, Rafael da Silva, Ícaro Siqueira, Cláudio Machado Diniz, Ricardo A. L. Reis, Mateus Grellert:
Hardware Architecture for the Regular Interpolation Filter of the AV1 Video Coding Standard. EUSIPCO 2020: 560-564 - [c264]Mateus Fogaça, Eder Monteiro, Marcelo Danigno, Isadora Oliveira, Paulo F. Butzen, Ricardo Reis:
Contributions to OpenROAD from Abroad: Experiences and Learnings : Invited Paper. ICCAD 2020: 113:1-113:8 - [c263]Geancarlo Abich, Jonas Gava, Ricardo Reis, Luciano Ost:
Soft Error Reliability Assessment of Neural Networks on Resource-constrained IoT Devices. ICECS 2020: 1-4 - [c262]Rafael N. M. Oliveira, Fábio G. R. G. da Silva, Ricardo Reis, Cristina Meinhardt:
Mirror Full Adder SET Susceptibility on 7nm FinFET Technology. ICECS 2020: 1-4 - [c261]Leonardo B. Moraes, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis:
Pros and Cons of ST and SIG FinFET Inverters for Low Power Designs. ISCAS 2020: 1-5 - [c260]Juliano C. Zanelli, Carolina Metzler, Ricardo Augusto da Luz Reis:
Gate Sizing for Power-Delay Optimization at Transistor-level Monolithic 3D-Integrated Circuits. LASCAS 2020: 1-4 - [c259]Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Augusto da Luz Reis:
Work-Function Fluctuation Impact on the SET Response of FinFET-based Majority Voters. LATS 2020: 1-6 - [c258]Ricardo A. L. Reis, Cristina Meinhardt, Alexandra L. Zimpeck, Leonardo Heitich Brendler, Leonardo B. Moraes:
Circuit Level Design Methods to Mitigate Soft Errors. LATS 2020: 1-3 - [c257]Fabio G. Rossato G. da Silva, Cristina Meinhardt, Ricardo Reis:
Mitigation Effects of Decoupling Cells on Full Adders Process Variability. MWSCAS 2020: 317-320 - [c256]Vitor V. Bandeira, Mateus Fogaça, Eder Matheus Monteiro, Isadora Oliveira, Mingyu Woo, Ricardo Augusto da Luz Reis:
Fast and Scalable I/O Pin Assignment with Divide-and-Conquer and Hungarian Matching. NEWCAS 2020: 74-77 - [c255]Jonas Gava, Ricardo Augusto da Luz Reis, Luciano Ost:
RAT: A Lightweight System-level Soft Error Mitigation Technique. VLSI-SOC 2020: 165-170 - [c254]Jonas Gava, Ricardo Reis, Luciano Ost:
RAT: A Lightweight Architecture Independent System-Level Soft Error Mitigation Technique. VLSI-SoC (Selected Papers) 2020: 235-253 - [c253]Calebe Micael de Oliveira Conceição, Ricardo Augusto da Luz Reis:
Security Issues in the Design of Chips for IoT. WF-IoT 2020: 1-5 - [e21]Carolina Metzler, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Carlos Silva Cárdenas, Ricardo Reis:
VLSI-SoC: New Technology Enabler - 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 586, Springer 2020, ISBN 978-3-030-53272-7 [contents]
2010 – 2019
- 2019
- [j42]Rafael Garibotti, Luciano Ost, Anastasiia Butko, Ricardo Reis, Abdoulaye Gamatié, Gilles Sassatelli:
Exploiting memory allocations in clusterised many-core architectures. IET Comput. Digit. Tech. 13(4): 302-311 (2019) - [j41]Felipe Rocha da Rosa, Rafael Garibotti, Luciano Ost, Ricardo Reis:
Using Machine Learning Techniques to Evaluate Multicore Soft Error Reliability. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(6): 2151-2164 (2019) - [j40]Elias de Almeida Ramos, Guilherme Bontorin, Ricardo Reis:
A New Nonlinear Global Placement for FPGAs: The Chaotic Place. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(6): 2165-2174 (2019) - [j39]Calebe Micael de Oliveira Conceição, Ricardo Augusto da Luz Reis:
Transistor Count Reduction by Gate Merging. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(6): 2175-2187 (2019) - [c252]Mateus Fogaça, Andrew B. Kahng, Ricardo Reis, Lutong Wang:
Finding placement-relevant clusters with fast modularity-based clustering. ASP-DAC 2019: 569-576 - [c251]Jorge Ferreira, Paulo F. Butzen, Cristina Meinhardt, Ricardo A. L. Reis:
FBM: A Simple and Fast Algorithm for Placement Legalization. ICECS 2019: 209-212 - [c250]Alexandra L. Zimpeck, Cristina Meinhardt, Laurent Artola, Guillaume Hubert, Fernanda Lima Kastensmidt, Ricardo Augusto da Luz Reis:
Sleep Transistors to Improve the Process Variability and Soft Error Susceptibility. ICECS 2019: 582-585 - [c249]Marcelo Danigno, Paulo F. Butzen, Jorge Ferreira, André Oliveira, Eder Monteiro, Mateus Fogaça, Ricardo Augusto da Luz Reis:
Proposal and Evaluation of Pin Access Algorithms for Detailed Routing. ICECS 2019: 602-605 - [c248]Fabio G. Rossato G. da Silva, Cristina Meinhardt, Ricardo Augusto da Luz Reis:
FinFET Variability and Near-threshold operation: Impact on Full Adders design using XOR Blocks. ICECS 2019: 638-641 - [c247]Ricardo Reis:
Challenges in the Design of Integrated Systems for IoT. IFIPIoT 2019: 179-196 - [c246]Jonas Gava, Vitor V. Bandeira, Ricardo Reis, Luciano Ost:
Evaluation of Compilers Effects on OpenMP Soft Error Resiliency. ISVLSI 2019: 259-264 - [c245]Henrique Placido, Ricardo Reis:
Tackling the Drawbacks of a Lagrangian Relaxation Based Discrete Gate Sizing Algorithm. ISVLSI 2019: 284-289 - [c244]Samuel Presa Toledo, Ricardo Reis, Cristina Meinhardt:
Process Variability Challenges for Radiation Mitigation Techniques on 16nm. LASCAS 2019: 69-72 - [c243]Andre Saldanha Oliveira, Julia Casarin Puget, Carolina Metzler, Ricardo Reis:
Clip Clustering for Early Lithographic Hotspot Classification. LASCAS 2019: 149-152 - [c242]Leonardo B. Moraes, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Augusto da Luz Reis:
Exploring Schmitt Trigger Circuits for Process Variability Mitigation. NEWCAS 2019: 1-4 - [c241]Elias de Almeida Ramos, João Carlos Britto Filho, Ricardo A. L. Reis:
Cryptography by Synchronization of Hopfield Neural Networks that Simulate Chaotic Signals Generated by the Human Body. NEWCAS 2019: 1-4 - [c240]Leonardo B. Moraes, Alexandra Lackmann Zimpeck, Cristina Meinhardt, Ricardo A. L. Reis:
Robust FinFET Schmitt Trigger Designs for Low Power Applications. VLSI-SoC (Selected Papers) 2019: 45-68 - [c239]Leonardo B. Moraes, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Augusto da Luz Reis:
Minimum Energy FinFET Schmitt Trigger Design Considering Process Variability. VLSI-SoC 2019: 88-93 - [c238]Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis:
Process Variability Impact on the SET Response of FinFET Multi-level Design. VLSI-SoC (Selected Papers) 2019: 89-113 - [c237]Vitor V. Bandeira, Felipe Rosa, Ricardo Reis, Luciano Ost:
Efficient Soft Error Vulnerability Analysis Using Non-intrusive Fault Injection Techniques. VLSI-SoC (Selected Papers) 2019: 115-137 - [c236]Vitor V. Bandeira, Felipe Rosa, Ricardo Augusto da Luz Reis, Luciano Ost:
Non-intrusive Fault Injection Techniques for Efficient Soft Error Vulnerability Analysis. VLSI-SoC 2019: 123-128 - [c235]Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo A. L. Reis:
Evaluation of SET under Process Variability on FinFET Multi-level Design. VLSI-SoC 2019: 179-184 - [c234]Calebe Micael de Oliveira Conceição, Ricardo Augusto da Luz Reis:
Netlist Optimization by Gate Merging. VLSI-SoC 2019: 236-237 - [c233]Alexandra L. Zimpeck, Cristina Meinhardt, Laurent Artola, Guillaume Hubert, Fernanda Lima Kastensmidt, Ricardo Augusto da Luz Reis:
Circuit-Level Techniques to Mitigate Process Variability and Soft Errors in FinFET Designs. VLSI-SoC 2019: 240-241 - [c232]Leonardo B. Moraes, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Augusto da Luz Reis:
Robustness and Minimum Energy-Oriented FinFET Design. VLSI-SoC 2019: 247-248 - [c231]Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo A. L. Reis:
Impact of Process Variability and Single Event Transient on FinFET Technology. VLSI-SoC 2019: 249-250 - [c230]Isadora Oliveira, Vitor V. Bandeira, Ricardo A. L. Reis, Luciano Ost:
Exploration of Techniques to Assess Soft Errors in Multicore Architectures. VLSI-SoC 2019: 251-252 - [c229]Vitor V. Bandeira, Isadora Oliveira, Felipe da Rosa, Ricardo A. L. Reis, Luciano Ost:
Soft Error Reliability Analysis of Autonomous Vehicles Software Stack. VLSI-SoC 2019: 253-254 - [c228]Kevin A. Cáceres Albinagorta, Calebe Conceição, Carlos Silva Cárdenas, Ricardo A. L. Reis:
Exploring area and total wirelength using a cell merging technique. VLSI-SoC 2019: 329-334 - [e20]Michail Maniatakos, Ibrahim Abe M. Elfadel, Matteo Sonza Reorda, H. Fatih Ugurdag, José Monteiro, Ricardo Reis:
VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 500, Springer 2019, ISBN 978-3-030-15662-6 [contents] - [e19]Nicola Bombieri, Graziano Pravadelli, Masahiro Fujita, Todd M. Austin, Ricardo Reis:
VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms - 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018, Revised and Extended Selected Papers. IFIP Advances in Information and Communication Technology 561, Springer 2019, ISBN 978-3-030-23424-9 [contents] - 2018
- [j38]Alexandra L. Zimpeck, Cristina Meinhardt, Laurent Artola, Guillaume Hubert, Fernanda Lima Kastensmidt, Ricardo Augusto da Luz Reis:
Impact of different transistor arrangements on gate variability. Microelectron. Reliab. 88-90: 111-115 (2018) - [j37]Leonardo B. Moraes, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Augusto da Luz Reis:
Evaluation of variability using Schmitt trigger on full adders layout. Microelectron. Reliab. 88-90: 116-121 (2018) - [j36]Roberto B. Almeida, Cleiton Magano Marques, Paulo F. Butzen, Fábio G. R. G. da Silva, Ricardo A. L. Reis, Cristina Meinhardt:
Analysis of 6 T SRAM cell in sub-45 nm CMOS and FinFET technologies. Microelectron. Reliab. 88-90: 196-202 (2018) - [c227]Felipe da Rosa, Vitor V. Bandeira, Ricardo Reis, Luciano Ost:
Extensive evaluation of programming models and ISAs impact on multicore soft error reliability. DAC 2018: 178:1-178:6 - [c226]Fabio G. Rossato G. da Silva, Cristina Meinhardt, Ricardo Reis:
Impact of Near-Threshold and Variability on 7nm FinFET XOR Circuits. ICECS 2018: 573-576 - [c225]Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis:
Exploring Multi-level Design to Mitigate Variability and Radiation Effects on 7nm FinFET Logic Cells. ICECS 2018: 581-584 - [c224]Ricardo Reis:
Strategies for Reducing Power Consumption and Increasing Reliability in IoT. IFIPIoT@WCC 2018: 76-88 - [c223]Felipe T. Bortolon, Geancarlo Abich, Sergio Bampi, Ricardo Reis, Fernando Moraes, Luciano Ost:
Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems. ISCAS 2018: 1-5 - [c222]Samuel Presa Toledo, Alexandra L. Zimpeck, Ricardo Reis, Cristina Meinhardt:
Pros and Cons of Schmitt Trigger Inverters to Mitigate PVT Variability on Full Adders. ISCAS 2018: 1-5 - [c221]Lucas de Paris, Ricardo Reis:
An automated methodology to fix electromigration violations on a customized design flow. LASCAS 2018: 1-4 - [c220]Elias de Almeida Ramos, Guilherme Bontorin, Ricardo Reis:
A nonlinear placement for FPGAs: The chaotic place. LASCAS 2018: 1-4 - [c219]Felipe Rocha da Rosa, Ricardo Reis, Luciano Ost:
gem5-FIM: a flexible and scalable multicore soft error assessment framework to early reliability design space explorations. LASCAS 2018: 1-4 - [c218]Luciana Mendes da Silva, Guilherme Bontorin, Ricardo Reis:
Reducing the amount of transistors by gate merging. LASCAS 2018: 1-4 - [c217]Jean Carlo Hamerski, Geancarlo Abich, Ricardo Reis, Luciano Ost, Alexandre M. Amory:
A Design Patterns-Based Middleware for Multiprocessor Systems-on-Chip. SBCCI 2018: 1-6 - [c216]Guilherme E. Medeiros, Felipe T. Bortolon, Ricardo Reis, Luciano Ost:
Evaluation of Compiler Optimization Flags Effects on Soft Error Resiliency. SBCCI 2018: 1-6 - [c215]Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis:
Evaluating the Impact of Process Variability and Radiation Effects on Different Transistor Arrangements. VLSI-SoC 2018: 71-76 - 2017
- [j35]Walter E. Calienes Bartra, Y. Q. de Aguiar, Cristina Meinhardt, Andrei Vladimirescu, Ricardo Augusto da Luz Reis:
Evaluation of heavy-ion impact in bulk and FDSOI devices under ZTC condition. Microelectron. Reliab. 76-77: 655-659 (2017) - [j34]Y. Q. de Aguiar, Laurent Artola, Guillaume Hubert, Cristina Meinhardt, Fernanda Lima Kastensmidt, Ricardo Augusto da Luz Reis:
Evaluation of radiation-induced soft error in majority voters designed in 7 nm FinFET technology. Microelectron. Reliab. 76-77: 660-664 (2017) - [c214]Julia Casarin Puget, Andre Saldanha Oliveira, Jorge Seelen, Ricardo Reis:
UFRGSPlace: Routability driven FPGA placement algorithm for heterogeneous FPGAs. ICECS 2017: 38-41 - [c213]Calebe Conceição, Gisell Moura, Filipe Pisoni, Ricardo Reis:
A cell clustering technique to reduce transistor count. ICECS 2017: 186-189 - [c212]Ygor Q. Aguiar, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo A. L. Reis:
Temperature dependence and ZTC bias point evaluation of sub 20nm bulk multigate devices. ICECS 2017: 270-273 - [c211]