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Microprocessing and Microprogramming, Volume 31
Volume 31, Numbers 1-5, April 1991
- Lorenzo Mezzalira:

Letter from the short-note editor, euromicro 90. iv - Zoltán Papp:

Scheduler architecture for knowledge based measuring systems. 3-8 - Peter Milligan, Lionel C. Waring, A. S. C. Lee:

BIFS: A filing system for multiprocessor based systems. 9-12 - Viljan Mahnic:

Using grid files for a relational database management system. 13-18 - Semra Tunali, Emrah Orhun:

A prototype rule-based system to schedule production for a job-shop. 19-23 - G. D. Tziallas, S. Karkanis, K. Tsoutsou:

A knowledge-based approach for the development of concurrent software. 25-29 - Stephen J. Flavell, Stephen C. Winter, Derek R. Wilson:

Matching region adjacency graphs. 31-33 - Jacqueline Signorini:

Integrated design tools for very large scale cellular architectures. 37-42 - Mats Larsson:

Mixed static and dynamic reasoning in a formal system. 43-46 - Vincenzo Piuri, Renato Stefanelli:

Concurrent error detection in parallel multipliers and complex arithmetic structures: Remarks on the use of the 3n code. 47-52 - Dimitrios J. Soudris

, Michael K. Birbas, Costas E. Goutis:
Mapping iterative algorithims on regular processor arrays without using uniform recurrent equations. 53-58 - József Györkös

, Ivan Rozman, Tatjana Welzer:
Activation and validation of the system specifications. 59-64 - Wojciech E. Kozlowski:

Hybrid fault diagnosability using the comparison-based approach. 65-69 - Zebo Peng:

Design of clocking schemes in high-level synthesis. 71-74 - Gabi Dreo, Niko Cizek, Bogomir Horvat, Viljem Zumer:

Cost analysis of interconnection networks. 77-80 - Martin A. Musicante, Rafael Dueire Lins:

GM-C: A graph multi-combinator machine. 81-84 - J.-F. Perotto, Christian Piguet, A. Kägi:

Multiprocess architecture for watch applications. 85-87 - Tetsuya Higuchi, Tatsumi Furuya, Ken'ichi Handa, Akio Kokubu:

Initial evaluation of a parallel associative processor IXM2. 89-92 - Hallo Ahmed:

A dataflow model based on a vector queueing scheme. 93-96 - Dong C. Shin, Song C. Moon:

An efficient log-based crash recovery scheme for nested transactions. 99-104 - Gautam Dewan, Prasenjit Biswas:

A snooping cache coherency protocol for hierarchically organized multiprocessors. 105-111 - Joshua Etkin, John H. Choi:

Architecture and implementation method of real-time recovery in distributed systems. 113-116 - Rumen Stainov:

An asynchronous checkpointing service. 117-120 - Björn Fjellborg:

A petri net model for pipeline scheduling. 121-124 - Anna Antola, M. Tellarini:

Definition and evaluation of a transputer-based architecture for image compression and reconstruction. 127-131 - Paolo Ghisotti, Andrea Zanna:

New techniques in mapping applications on transputer networks. 133-136 - E. Harms, S. Kounias, Louis J. Vroomen, Paul J. Zsombor-Murray:

A binary-decision/transputer network for the control of a planar three degree of freedom parallel robotic manipulator. 137-142

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