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ORCIDMicroelectronics Journal, Volume 67
Volume 67, September 2017
- Himanshu Thapliyal
, Azhar Mohammad, S. Dinesh Kumar, Fazel Sharifi:
Energy-efficient magnetic 4-2 compressor. 1-9 - Khader Mohammad, Aziz Qaroush, Mahdi Washha, Baker Mohammad:
Low-power content addressable memory (CAM) array for mobile devices. 10-18 - Qiwei Huang, Chenchang Zhan, Jinwook Burm:
A low-complexity locking-accelerated digital PLL with multi-output bang-bang phase detector. 19-24 - Mahmood Seifouri, Parviz Amiri, Iman Dadras:
A transimpedance amplifier for optical communication network based on active voltage-current feedback. 25-31 - Paulino Ruiz-de-Clavijo, Enrique Ostúa, Manuel Jesús Bellido Díaz, Jorge Juan, Julian Viejo, David Guerrero Martos:
Minimalistic SDHC-SPI hardware reader module for boot loader applications. 32-37 - N. Vinodhkumar, R. Srinivasan:
SET and SEU performance of single, double, triple and quadruple-gate junctionlessFETs using numerical simulations. 38-42 - Milica Orlandic, Kjetil Svarstad:
An efficient hardware architecture of CAVLC encoder based on stream processing. 43-49 - Pritha Banerjee, Anup Sarkar, Subir Kumar Sarkar:
Exploring the short channel characteristics and performance analysis of DMDG SON MOSFET. 50-56 - M. B. Ghaznavi-Ghoushchi, S. A. H. Ejtahed:
MTCML: Analysis, design and optimization of an alternative shallow-depth multiple-tail current mode logic. 57-70 - Chen-Nong Lee:
Independently tunable plus-type DDCC-based voltage-mode universal biquad filter with MISO and SIMO types. 71-81 - Gunjan Mittal Roy, Sandeep Kumar, Binod Kumar Kanaujia, Hanjun Song:
Bandwidth enlargement of CMOS TIA using on-chip T-network for patient diagnosis in biomedical application. 82-87 - Pradeep Kumar Biswal, Santosh Biswas:
On-Line Testing of digital VLSI circuits at Register Transfer Level using High Level Decision Diagrams. 88-100 - Leila Safari, Erkan Yüce, Shahram Minaei:
A new ICCII based resistor-less current-mode first-order universal filter with electronic tuning capability. 101-110 - V. Midili, Virginie Nodjiadjim, Tom K. Johansen, Michele Squartecchia, Muriel Riet, Jean-Yves Dupuy, Agnieszka Konczykowska:
InP DHBT technology for power amplifiers at mm-wave frequencies. 111-119 - Hasan Molaei, Khosrow Hajsadeghi:
A 1.6 ps 7 b time to digital converter in 0.18 µm CMOS technology. 120-127 - Chung-Yi Li, Bo-Xun Wu:
Zeroing of power supply noise sensitivity for ring oscillators operating from 1 to 4 GHz. 128-134 - Roya Jafarnejad, Abumoslem Jannesari, Jafar Sobhi:
A sub-2-dB noise figure linear wideband low noise amplifier in 0.18 µm CMOS. 135-142 - Mohammad Reza Rohanipoor, Behnam Ghavami, Mohsen Raji:
Soft error tolerant design of combinational circuits based on a local logic substitution scheme. 143-154 - Shady A. Mohammed, Hakan Dogan, Mehmet Tamer Ozgun:
An 85%-efficiency reconfigurable multiphase switched capacitor DC-DC converter utilizing frequency, switch size, and interleaving scaling techniques. 155-161 - Ahmed A. M. Emara, Mohamed M. Aboudina, Hossam A. H. Fahmy:
Adaptive and optimum multiport readout of non-gated crossbar memory arrays. 162-168 - Gang Li, Pengjun Wang, Yuejun Zhang, Huihong Zhang:
A multi-port low-power current mode PUF using MOSFET current-division deviation in 65 nm technology. 169-175 - Ihsan F. I. Albittar, Hakan Dogan:
A novel technique for duty cycle correction for reference clocks in frequency synthesizers. 176-182
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