default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSIGARCH Computer Architecture News, Volume 44
Volume 44, Number 1, May 2016
- Hadi Asgharimoghaddam, Nam Sung Kim:
SpinWise: A Practical Energy-Efficient Synchronization Technique for CMPs. 1-8 - Lena E. Olson, Mark D. Hill:
Probabilistic Directed Writebacks for Exclusive Caches. 9-18
- Mark Thorson:
Internet Nuggets. 19-22
Volume 44, Number 2, May 2016
- Tom Conte
, Yuanyuan Zhou:
Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2016, Atlanta, GA, USA, April 2-6, 2016. ACM 2016, ISBN 978-1-4503-4091-5 [contents]
Volume 44, Number 3, June 2016
- 43rd ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2016, Seoul, South Korea, June 18-22, 2016. IEEE Computer Society 2016, ISBN 978-1-4673-8947-1 [contents]
Volume 44, Number 4, September 2016
Special Issue
- Jiayi Sheng, Qingqing Xiong, Chen Yang, Martin C. Herbordt:
Collective Communication on FPGA Clusters with Static Scheduling. 2-7 - Susumu Mashimo, Thiem Van Chu, Kenji Kise:
Cost-Effective and High-Throughput Merge Network: Architecture for the Fastest FPGA Sorting Accelerator. 8-13 - Cuong Pham-Quoc, Biet Nguyen, Tran Ngoc Thinh:
FPGA-based Multicore Architecture for Integrating Multiple DDoS Defense Mechanisms. 14-19 - Fatemeh Eslami, Steven J. E. Wilton:
An Improved Overlay and Mapping Algorithm Supporting Rapid Triggering for FPGA Debug. 20-25 - Ryohei Kobayashi, Tomohiro Misono, Kenji Kise:
A High-speed Verilog HDL Simulation Method using a Lightweight Translator. 26-31 - Shohei Sassa, Kenji Kanazawa, Shaowei Cai, Moritoshi Yasunaga:
An FPGA Solver for Partial MaxSAT Problems Based on Stochastic Local Search. 32-37 - Ernst Joachim Houtgast, Vlad Mihai Sima, Koen Bertels, Zaid Al-Ars:
An Efficient GPUAccelerated Implementation of Genomic Short Read Mapping with BWAMEM. 38-43 - Hiroki Nakahara, Hiroyuki Nakanishi, Kazumasa Iwai, Tsutomu Sasao:
An FFT Circuit for a Spectrometer of a Radio Telescope using the Nested RNS including the Constant Division. 44-49 - Vinod Pangracious, Mulhim Al-Doori:
Novel Three-Dimensional Embedded FPGA Technology and Achitecture. 50-55 - Oliver Knodel, Paul R. Genssler, Rainer G. Spallek:
Migration of long-running Tasks between Reconfigurable Resources using Virtualization. 56-61 - Jubee Tada, Maiki Hosokawa, Ryusuke Egawa, Hiroaki Kobayashi:
Effects of Stacking Granularity on 3-D Stacked Floating-point Fused Multiply Add Units. 62-67 - Jiang Su, Jianxiong Liu, David B. Thomas, Peter Y. K. Cheung:
Neural Network Based Reinforcement Learning Acceleration on FPGA Platforms. 68-73 - Erik H. D'Hollander:
High-Level Synthesis Optimization for Blocked Floating-Point Matrix Multiplication. 74-79 - Chengzhe Li, Lai Yoong Yee, Hiroshi Maruyama, Yoshiki Yamaguchi:
FPGA-based Volleyball Player Tracker. 80-86 - Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi:
A Study of Heterogeneous Computing Design Method based on Virtualization Technology. 86-91 - Colin Yu Lin, Zhenghong Jiang, Cheng Fu, Hayden Kwok-Hay So, Haigang Yang:
FPGA High-level Synthesis versus Overlay: Comparisons on Computation Kernels. 92-97
Volume 44, Number 5, December 2016
- Xusheng Zhan, Yungang Bao, Christian Bienia, Kai Li:
PARSEC3.0: A Multicore Benchmark Suite with Network Stacks and SPLASH-2X. 1-16
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-12-05 22:25 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
