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ORCIDACM Transactions on Embedded Computing Systems, Volume 24
Volume 24, Number 1, January 2025
- Junqiang Jiang
, Shengjie Jin, Zhifang Sun, Jinxue Duan, Lizhi Liu, Li Pan, Zebo Peng:
An Efficient Approach for Improving Message Acceptance Rate and Link Utilization in Time-Sensitive Networking. 1:1-1:25 - Sofiya Semenova, Steven Y. Ko, Yu David Liu, Lukasz Ziarek, Karthik Dantu:
A Comprehensive Study of Systems Challenges in Visual Simultaneous Localization and Mapping Systems. 2:1-2:31 - Zhuoqun Xia, Ziyu Wang, Xiao Liu:
Trust Based Active Game Data Collection Scheme in Smart Cities. 3:1-3:23 - Gao-Yu Lin, Po-Yuan Wang, Shin-Ming Cheng, Hahn-Ming Lee:
Improving Robustness in IoT Malware Detection through Execution Order Analysis. 4:1-4:17 - Thomas Garbay, Khalil Hachicha, Petr Dobiás, Andréa Pinna, Karim Hocine, Wilfried Dron, Pedro Lusich, Imane Khalis, Bertrand Granado:
ZIP-CNN: Design Space Exploration for CNN Implementation within a MCU. 5:1-5:26 - Mohammad Rafiuzzaman, Sathish Gopalakrishnan, Karthik Pattabiraman:
Co-Approximator: Enabling Performance Prediction in Colocated Applications. 6:1-6:28 - Kam-Yiu Lam, Xiaofei Zhao, Chunjiang Zhu, Tei-Wei Kuo:
MVLevelDB+: Meeting Relative Consistency Requirements of Temporal Queries in Sensor Stream Databases. 7:1-7:26 - Thilo Leon Fischer, Heiko Falk:
Towards Analysing Cache-Related Preemption Delay in Non-Inclusive Cache Hierarchies. 8:1-8:37 - Yann Argotti, Yasmine Kenfaoui, Claude Baron, Alain Abran, Philippe Esteban:
An Operational Quality Model of Embedded Software Aligned with ISO 25000. 9:1-9:41 - Suparna Kundu, Quinten Norga, Angshuman Karmakar, Shreya Gangopadhyay, Jose Maria Bermudo Mera, Ingrid Verbauwhede:
Scabbard: An Exploratory Study on Hardware Aware Design Choices of Learning with Rounding-based Key Encapsulation Mechanisms. 10:1-10:40 - Shikha Goel, Rajesh Kedia, Rijurekha Sen, M. Balakrishnan:
EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator. 11:1-11:31 - Mahendra Rathor:
ALOHA-FP2I: Efficient Algorithms and Hardware for Multi-Mode Rounding of Floating Point to Integer. 12:1-12:26 - Héctor Pérez Tijero, José Javier Gutiérrez García, Diego García-Prieto:
Application-Level Evaluation of IEEE 802.1AS Synchronized Time and Linux for Distributed Real-Time Systems. 13:1-13:16 - Abdullah M. Zyarah, Dhireesha Kudithipudi:
Time-Series Forecasting and Sequence Learning Using Memristor-based Reservoir System. 14:1-14:17 - Suhap Sahin, Oguz Narli, Bahadir Turkoglu, Hikmetcan Ozcan:
Hardware Area Efficient and Real-Time FPGA Implementation of PHMMRGB. 15:1-15:20 - Pengzhou He, Yazheng Tu, Tianyou Bao, Çetin Çetin Koç, Jiafeng Xie:
HSPA: High-Throughput Sparse Polynomial Multiplication for Code-based Post-Quantum Cryptography. 16:1-16:24 - Sezana Fahmida, Aakriti Jain, Venkata Prashant Modekurthy, Dali Ismail, Abusayeed Saifullah:
RTPL: A Real-Time Communication Protocol for LoRa Network. 17:1-17:31 - Liangliang Chang, Serhan Gener, Joshua Mack, Hasan Umut Suluhan, Ali Akoglu, Chaitali Chakrabarti:
Coarse-Grained Task Parallelization by Dynamic Profiling for Heterogeneous SoC-Based Embedded System. 18:1-18:32 - Soonhoi Ha, Eunjin Jeong:
Software Optimization and Design Methodology for Low Power Computer Vision Systems. 19:1-19:31 - Joshua Mack, Anish Krishnakumar, Ümit Y. Ogras, Ali Akoglu:
Tutorial: A Novel Runtime Environment for Accelerator-Rich Heterogeneous Architectures. 20:1-20:24 - Xiangzhong Luo, Di Liu, Hao Kong, Shuo Huai, Hui Chen, Guochu Xiong, Weichen Liu:
Efficient Deep Learning Infrastructures for Embedded Computing Systems: A Comprehensive Survey and Future Envision. 21:1-21:100 - Mario Günzel, Harun Teper, Georg von der Brüggen, Jian-Jia Chen:
End-To-End Latency of Cause-Effect Chains: A Tutorial. 22:1-22:18
Volume 24, Number 2, March 2025
- Chen-Fong Hsu, Hong-Sheng Zheng, Yu-Yuan Liu, Tsung Tai Yeh:
StreamNet++: Memory-Efficient Streaming TinyML Model Compilation on Microcontrollers. 23:1-23:26 - Shihang Zhou, Alejandra C. Hernández, Clara Gómez, Wenjie Yin, Mårten Björkman:
SmartTBD: Smart Tracking for Resource-constrained Object Detection. 24:1-24:19 - Ziying Ni, Ayesha Khalid, Weiqiang Liu, Máire O'Neill:
A Highly Hardware Efficient ML-KEM Accelerator with Optimised Architectural Layers. 25:1-25:24 - Zhengyuan Shi, Cheng Chen, Gangqiang Yang, Hongchao Zhou, Hailiang Xiong, Zhiguo Wan:
Customized FPGA Implementation of Authenticated Lightweight Cipher Fountain for IoT Systems. 26:1-26:26 - Kevin Hutto, Vincent J. Mooney:
Implementing Privacy Homomorphism with Random Encoding and Computation Controlled by a Remote Secure Server. 27:1-27:27 - Sagar Dev Achar, Thejaswini P, Sukumar Nandi, Sunit Nandi:
LiteHash: Hash Functions for Resource-Constrained Hardware. 28:1-28:17 - Shih-Wen Hsu, Yen-Ting Chen, Kam-Yiu Lam, Yuan-Hao Chang, Wei-Kuan Shih, Han-Chieh Chao:
APB-tree: An Adaptive Pre-built Tree Indexing Scheme for NVM-based IoT Systems. 29:1-29:31 - Jungyoon Kwon, Hyemi Min, Bernhard Egger:
SENNA: Unified Hardware/Software Space Exploration for Parametrizable Neural Network Accelerators. 30:1-30:26 - Francesco Ratti, Johannes Knödtel, Marc Reichenbach:
HeterogeneousRTOS: A CPU-FPGA Real-Time OS for Fault Tolerance on COTS at Near-Zero Timing Cost. 31:1-31:50 - Saeed Aghapour, Kasra Ahmadi, Mila Anastasova, Reza Azarderakhsh, Mehran Mozaffari Kermani:
PUF-Dilithium: Design of a PUF-Based Dilithium Architecture Benchmarked on ARM Processors. 32:1-32:20 - Daniel Dobkin, Nimrod Cever, Itamar Levi:
RAD-FS: Remote Timing and Power SCA Security in DVFS-augmented Ultra-Low-Power Embedded Systems. 33:1-33:27 - Jong-Yeon Park, Seonggyeom Kim, Wonil Lee, Bo Gyeong Kang, Il-Jong Song, Jaekeun Oh, Kouichi Sakurai:
A Compact and Parallel Swap-Based Shuffler Based on Butterfly Network and Its Complexity Against Side Channel Analysis. 34:1-34:40 - Yang Liu, Zihan Wang, Mengchi Cai, Qing Xu, Keqiang Li:
A Hybrid Target Selection Model of Functional Safety Compliance for Autonomous Driving System. 35:1-35:27 - Konstantin Lübeck, Alexander Louis-Ferdinand Jung, Felix Wedlich, Mika Markus Müller, Federico Nicolás Peccia, Felix Thömmes, Jannik Steinmetz, Valentin Biermaier, Adrian Frischknecht, Paul Palomero Bernardo, Oliver Bringmann:
Automatic Generation of Fast and Accurate Performance Models for Deep Neural Network Accelerators. 36:1-36:32
Volume 24, Number 3, May 2025
- Wangyang Yu, Qi Guo, Yumeng Cheng, Lu Liu, Fei Hao, Xiaojun Zhai, Minsi Chen:
Formal Modeling of Hybrid System Based on Semi-continuous Colored Petri Net: A Case Study of Adaptive Cruise Control System. 37:1-37:21 - Jingjing Chang, Peining Zhen, Xiaotao Yan, Yixin Yang, Ziyang Gao, Haibao Chen:
MemATr: An Efficient and Lightweight Memory-augmented Transformer for Video Anomaly Detection. 38:1-38:26 - Zain Taufique, Anil Kanduri, Antonio Miele, Amir M. Rahmani, Cristiana Bolchini, Nikil D. Dutt, Pasi Liljeberg:
Exploiting Approximation for Run-time Resource Management of Embedded HMPs. 39:1-39:30 - Qiong Chang, Xinyuan Chen, Xiang Li, Weimin Wang, Jun Miyazaki:
Faster than Fast: Accelerating Oriented FAST Feature Detection on Low-end Embedded GPUs. 40:1-40:22 - Zahra Ramezani, Kenan Sehic, Luigi Nardi, Knut Åkesson:
Falsification of Cyber-physical Systems Using Bayesian Optimization. 41:1-41:23 - Zhiyong Tao, Zhelun Wang, Ying Liu, Yuqing He, Yikai Wang:
Wireless Perceptual Space Modeling Method for Cross-Domain Human Activity Recognition. 42:1-42:20 - Bokyung Kim, Shiyu Li, Brady Taylor, Yiran Chen:
Efficient and Robust Edge AI: Software, Hardware, and the Co-design. 43:1-43:34
- Jens Brandt, Indranil Saha, Lijun Zhang:
Introduction to the Special Issue on Formal Methods and Models for System Design. 44:1-44:3 - Alexandre Honorat, Hai Nam Tran, Thierry Gautier, Loïc Besnard, Shuvra S. Bhattacharyya, Jean-Pierre Talpin:
Real-time Fixed Priority Scheduling Synthesis Using Affine DataFlow Graphs: from Theory to Practice. 45:1-45:31 - Bastien Sultan, Leon Frenot, Ludovic Apvrille, Philippe Jaillon, Sophie Coudert:
AMULET: A Mutation Language Enabling Automatic Enrichment of SysML Models. 46:1-46:28 - Sung Woo Choi, Mykhailo Ivashchenko, Luan Viet Nguyen, Hoang-Dung Tran:
Reachability Analysis of Sigmoidal Neural Networks. 47:1-47:25 - Anup Das:
Design Flow for Scheduling Spiking Deep Convolutional Neural Networks on Heterogeneous Neuromorphic System-on-chip. 48:1-48:30 - Navin Kumar, Sandeep K. Sood, Munish Saini:
IoV-Fog-Assisted Framework for Accident Detection and Classification. 49:1-49:19 - Abhinandan Panda, Srinivas Pinisetty, Partha S. Roop:
Securing Pacemakers Using Runtime Monitors over Physiological Signals. 50:1-50:41 - Hugo Valente, Miguel A. de Miguel, Ángel-Grover Pérez-Muñoz, Alejandro Alonso, Juan Zamorano, Juan Antonio de la Puente:
Model-based Toolchain for Core Flight System (cFS) Embedded Systems. 51:1-51:28 - Ruiqi Hu, Kairong Liu, Zhikun She:
Evolution Function Based Reach-Avoid Verification for Time-varying Systems with Disturbances. 52:1-52:30
Volume 24, Number 4, July 2025
- Yiwen Zhang, Rong-Kun Chen:
Energy-Efficient Partitioned-RM Scheduling for Shared Resources Imprecise Mixed-Criticality Tasks. 53:1-53:30 - Chunlin Li, Sen Liu, Kun Jiang, Mengjie Yang, Zihao Zhang, Bingxin Wang, Liang Zhao, Chen Chen, Shaohua Wan:
DNN Inference Acceleration Based on Adaptive Task Partitioning and Offloading in Embedded VEC. 54:1-54:35 - Zihao Zhao, Yanhong Wang, Xu Jin, Haotian Zheng, Maohua Nie, Longfei Gou, Junmin He, Yongchuan Dong, Qiaosha Zou, Yiyun Zhang, C.-J. Richard Shi:
A Workload-Balance-Aware Accelerator Enabling Dense-to-Arbitrary-Sparse Neural Networks. 55:1-55:25 - Renshuang Jiang, Pan Dong, Yan Ding, Ran Wei, Zhe Jiang:
Thetis-lathe: Guidance on Reducing Residual Safety Obstacle in System Software from Rust Source Codes. 56:1-56:25 - Karan Pathak, Joshua Alexander Harrison Klein, Giovanni Ansaloni, Said Hamdioui, Georgi Gaydadjiev, Marina Zapater, David Atienza:
Towards Accurate RISC-V Full System Simulation via Component-Level Calibration. 57:1-57:19 - Marco Angioli, Marcello Barbirotta, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Mauro Olivieri:
Efficient Implementation of LinearUCB through Algorithmic Improvements and Vector Computing Acceleration for Embedded Learning Systems. 58:1-58:23 - Cuiping Shao, Wenzhe Li, Huiyun Li, Zhimin Tang, Jianing Liang:
A Novel Lattice-Based Fault Injection Attack Targeting the Nonce in the SM2 Digital Signature Algorithm. 59:1-59:21 - Joan Miquel Solé, Roger Pueyo Centelles, Felix Freitag, Roc Meseguer, Roger Baig:
Middleware for Distributed Applications in a LoRa Mesh Network. 60:1-60:26 - Ying Liu, Zhiyang Cao, Jiaqi Cai, Yuqing He, Mingzhe Hu:
Wi-GPD Identification System Based on Gait Point Density. 61:1-61:24 - Qingbin Wang, Yuchen Pei, Wai Chon Wong, Xuefeng Mu, Yan Zhang, Yutao Ma:
Activation Map-based Knowledge Distillation for Real-time Cervical OCT Image Classification. 62:1-62:27 - Owen Le Gonidec, Guillaume Bouffard, Jean-Christophe Prévotet, Maria Mndez Real:
Do Not Trust Power Management: A Survey on Internal Energy-based Attacks Circumventing Trusted Execution Environments Security Properties. 63:1-63:35
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