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ORCIDBibTeX records: Rajendra Bishnoi
@article{DBLP:journals/access/DiwareCJHB24,
author = {Sumit Diware and
Koteswararao Chilakala and
Rajiv V. Joshi and
Said Hamdioui and
Rajendra Bishnoi},
title = {Reliable and Energy-Efficient Diabetic Retinopathy Screening Using
Memristor-Based Neural Networks},
journal = {{IEEE} Access},
volume = {12},
pages = {47469--47482},
year = {2024},
url = {https://doi.org/10.1109/ACCESS.2024.3383014},
doi = {10.1109/ACCESS.2024.3383014},
timestamp = {Mon, 15 Apr 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/access/DiwareCJHB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/DiwareYGJHB24,
author = {Sumit Diware and
Mohammad Amin Yaldagard and
Anteneh Gebregiorgis and
Rajiv V. Joshi and
Said Hamdioui and
Rajendra Bishnoi},
title = {Dynamic Detection and Mitigation of Read-disturb for Accurate Memristor-based
Neural Networks},
booktitle = {6th {IEEE} International Conference on {AI} Circuits and Systems,
{AICAS} 2024, Abu Dhabi, United Arab Emirates, April 22-25, 2024},
pages = {393--397},
publisher = {{IEEE}},
year = {2024},
url = {https://doi.org/10.1109/AICAS59952.2024.10595966},
doi = {10.1109/AICAS59952.2024.10595966},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aicas/DiwareYGJHB24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/cf/SiddiqiVLKGRBHS24,
author = {Muhammad Ali Siddiqi and
David Vrijenhoek and
Lennart P. L. Landsmeer and
Job van der Kleij and
Anteneh Gebregiorgis and
Vincenzo Romano and
Rajendra Bishnoi and
Said Hamdioui and
Christos Strydis},
title = {A Lightweight Architecture for Real-Time Neuronal-Spike Classification},
booktitle = {Proceedings of the 21st {ACM} International Conference on Computing
Frontiers, {CF} 2024, Ischia, Italy, May 7-9, 2024},
publisher = {{ACM}},
year = {2024},
url = {https://doi.org/10.1145/3649153.3649186},
doi = {10.1145/3649153.3649186},
timestamp = {Fri, 19 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/cf/SiddiqiVLKGRBHS24.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2404-00125,
author = {Muhammad Ali Siddiqi and
Jan Andr{\'{e}}s Galvan Hern{\'{a}}ndez and
Anteneh Gebregiorgis and
Rajendra Bishnoi and
Christos Strydis and
Said Hamdioui and
Mottaqiallah Taouil},
title = {Memristor-Based Lightweight Encryption},
journal = {CoRR},
volume = {abs/2404.00125},
year = {2024},
url = {https://doi.org/10.48550/arXiv.2404.00125},
doi = {10.48550/ARXIV.2404.00125},
eprinttype = {arXiv},
eprint = {2404.00125},
timestamp = {Wed, 08 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2404-00125.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tbcas/DiwareDGJSHB23,
author = {Sumit Diware and
Sudeshna Dash and
Anteneh Gebregiorgis and
Rajiv V. Joshi and
Christos Strydis and
Said Hamdioui and
Rajendra Bishnoi},
title = {Severity-Based Hierarchical {ECG} Classification Using Neural Networks},
journal = {{IEEE} Trans. Biomed. Circuits Syst.},
volume = {17},
number = {1},
pages = {77--91},
year = {2023},
url = {https://doi.org/10.1109/TBCAS.2023.3242683},
doi = {10.1109/TBCAS.2023.3242683},
timestamp = {Sat, 29 Apr 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tbcas/DiwareDGJSHB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tetci/DiwareSGJHB23,
author = {Sumit Diware and
Abhairaj Singh and
Anteneh Gebregiorgis and
Rajiv V. Joshi and
Said Hamdioui and
Rajendra Bishnoi},
title = {Accurate and Energy-Efficient Bit-Slicing for RRAM-Based Neural Networks},
journal = {{IEEE} Trans. Emerg. Top. Comput. Intell.},
volume = {7},
number = {1},
pages = {164--177},
year = {2023},
url = {https://doi.org/10.1109/TETCI.2022.3191397},
doi = {10.1109/TETCI.2022.3191397},
timestamp = {Sat, 25 Feb 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tetci/DiwareSGJHB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/DiwareGJHB23,
author = {Sumit Diware and
Anteneh Gebregiorgis and
Rajiv V. Joshi and
Said Hamdioui and
Rajendra Bishnoi},
title = {Mapping-aware Biased Training for Accurate Memristor-based Neural
Networks},
booktitle = {5th {IEEE} International Conference on Artificial Intelligence Circuits
and Systems, {AICAS} 2023, Hangzhou, China, June 11-13, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/AICAS57966.2023.10168661},
doi = {10.1109/AICAS57966.2023.10168661},
timestamp = {Mon, 24 Jul 2023 15:56:17 +0200},
biburl = {https://dblp.org/rec/conf/aicas/DiwareGJHB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/SinghBKDJH23,
author = {Abhairaj Singh and
Rajendra Bishnoi and
Ali Kaichouhi and
Sumit Diware and
Rajiv V. Joshi and
Said Hamdioui},
title = {A 115.1 TOPS/W, 12.1 TOPS/mm\({}^{\mbox{2}}\) Computation-in-Memory
using Ring-Oscillator based {ADC} for Edge {AI}},
booktitle = {5th {IEEE} International Conference on Artificial Intelligence Circuits
and Systems, {AICAS} 2023, Hangzhou, China, June 11-13, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/AICAS57966.2023.10168647},
doi = {10.1109/AICAS57966.2023.10168647},
timestamp = {Mon, 24 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aicas/SinghBKDJH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/YaldagardDJHB23,
author = {Mohammad Amin Yaldagard and
Sumit Diware and
Rajiv V. Joshi and
Said Hamdioui and
Rajendra Bishnoi},
title = {Read-disturb Detection Methodology for RRAM-based Computation-in-Memory
Architecture},
booktitle = {5th {IEEE} International Conference on Artificial Intelligence Circuits
and Systems, {AICAS} 2023, Hangzhou, China, June 11-13, 2023},
pages = {1--5},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/AICAS57966.2023.10168638},
doi = {10.1109/AICAS57966.2023.10168638},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aicas/YaldagardDJHB23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GomonyPGPMJHSGGVZGBSDDGJEBSBACKGC23,
author = {Manil Dev Gomony and
Floran de Putter and
Anteneh Gebregiorgis and
Gianna Paulin and
Linyan Mei and
Vikram Jain and
Said Hamdioui and
Victor Sanchez and
Tobias Grosser and
Marc Geilen and
Marian Verhelst and
Friedemann Zenke and
Frank K. G{\"{u}}rkaynak and
Barry de Bruin and
Sander Stuijk and
Simon Davidson and
Sayandip De and
Mounir Ghogho and
Alexandra Jimborean and
Sherif Eissa and
Luca Benini and
Dimitrios Soudris and
Rajendra Bishnoi and
Sam Ainsworth and
Federico Corradi and
Ouassim Karrakchou and
Tim G{\"{u}}neysu and
Henk Corporaal},
title = {PetaOps/W edge-AI {\textdollar}{\textbackslash}mu{\textdollar} Processors:
Myth or reality?},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2023, Antwerp, Belgium, April 17-19, 2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.23919/DATE56975.2023.10136926},
doi = {10.23919/DATE56975.2023.10136926},
timestamp = {Tue, 23 Jul 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GomonyPGPMJHSGGVZGBSDDGJEBSBACKGC23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/dsd/SiddiqiHGBSHT23,
author = {Muhammad Ali Siddiqi and
Jan Andr{\'{e}}s Galvan Hern{\'{a}}ndez and
Anteneh Gebreziorgis and
Rajendra Bishnoi and
Christos Strydis and
Said Hamdioui and
Mottaqiallah Taouil},
title = {Memristor-Based Lightweight Encryption},
booktitle = {26th Euromicro Conference on Digital System Design, {DSD} 2023, Golem,
Albania, September 6-8, 2023},
pages = {634--641},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/DSD60849.2023.00092},
doi = {10.1109/DSD60849.2023.00092},
timestamp = {Tue, 02 Apr 2024 21:06:08 +0200},
biburl = {https://dblp.org/rec/conf/dsd/SiddiqiHGBSHT23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/GomonyGFGSRBAAGTCH23,
author = {Manil Dev Gomony and
Anteneh Gebregiorgis and
Moritz Fieback and
Marc Geilen and
Sander Stuijk and
Jan Richter{-}Brockmann and
Rajendra Bishnoi and
Sven Argo and
Lara Arche Andradas and
Tim G{\"{u}}neysu and
Mottaqiallah Taouil and
Henk Corporaal and
Said Hamdioui},
title = {Dependability of Future Edge-AI Processors: Pandora's Box},
booktitle = {{IEEE} European Test Symposium, {ETS} 2023, Venezia, Italy, May 22-26,
2023},
pages = {1--6},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ETS56758.2023.10174180},
doi = {10.1109/ETS56758.2023.10174180},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/GomonyGFGSRBAAGTCH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/icm2/BishnoiDGTMDMBDOAH23,
author = {Rajendra Bishnoi and
Sumit Diware and
Anteneh Gebregiorgis and
Simon Thomann and
Sara Mannaa and
Bastien Deveautour and
C{\'{e}}dric Marchand and
Alberto Bosio and
Damien Deleruyelle and
Ian O'Connor and
Hussam Amrouch and
Said Hamdioui},
title = {Energy-efficient Computation-In-Memory Architecture using Emerging
Technologies},
booktitle = {International Conference on Microelectronics, {ICM} 2023, Abu Dhabi,
United Arab Emirates, December 17-20, 2023},
pages = {325--334},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/ICM60448.2023.10378889},
doi = {10.1109/ICM60448.2023.10378889},
timestamp = {Fri, 09 Feb 2024 20:38:52 +0100},
biburl = {https://dblp.org/rec/conf/icm2/BishnoiDGTMDMBDOAH23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/AzizaZHDBG23,
author = {Hassen Aziza and
Cristian Zambelli and
Said Hamdioui and
Sumit Diware and
Rajendra Bishnoi and
Anteneh Gebregiorgis},
title = {On the Reliability of RRAM-Based Neural Networks},
booktitle = {31st {IFIP/IEEE} International Conference on Very Large Scale Integration,
VLSI-SoC 2023, Dubai, United Arab Emirates, October 16-18, 2023},
pages = {1--8},
publisher = {{IEEE}},
year = {2023},
url = {https://doi.org/10.1109/VLSI-SoC57769.2023.10321859},
doi = {10.1109/VLSI-SOC57769.2023.10321859},
timestamp = {Wed, 06 Dec 2023 13:14:06 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/AzizaZHDBG23.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2311-04808,
author = {Muhammad Ali Siddiqi and
David Vrijenhoek and
Lennart P. L. Landsmeer and
Job van der Kleij and
Anteneh Gebregiorgis and
Vincenzo Romano and
Rajendra Bishnoi and
Said Hamdioui and
Christos Strydis},
title = {A Lightweight Architecture for Real-Time Neuronal-Spike Classification},
journal = {CoRR},
volume = {abs/2311.04808},
year = {2023},
url = {https://doi.org/10.48550/arXiv.2311.04808},
doi = {10.48550/ARXIV.2311.04808},
eprinttype = {arXiv},
eprint = {2311.04808},
timestamp = {Tue, 14 Nov 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/corr/abs-2311-04808.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/MayahiniaSBWLMW22,
author = {Mahta Mayahinia and
Abhairaj Singh and
Christopher Bengel and
Stefan Wiefels and
Muath Abu Lebdeh and
Stephan Menzel and
Dirk J. Wouters and
Anteneh Gebregiorgis and
Rajendra Bishnoi and
Rajiv V. Joshi and
Said Hamdioui},
title = {A Voltage-Controlled, Oscillation-Based {ADC} Design for Computation-in-Memory
Architectures Using Emerging ReRAMs},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {18},
number = {2},
pages = {32:1--32:25},
year = {2022},
url = {https://doi.org/10.1145/3451212},
doi = {10.1145/3451212},
timestamp = {Sun, 04 Aug 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/MayahiniaSBWLMW22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/FiebackMWABTH22,
author = {Moritz Fieback and
Guilherme Cardoso Medeiros and
Lizhou Wu and
Hassen Aziza and
Rajendra Bishnoi and
Mottaqiallah Taouil and
Said Hamdioui},
title = {Defects, Fault Modeling, and Test Development Framework for RRAMs},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {18},
number = {3},
pages = {52:1--52:26},
year = {2022},
url = {https://doi.org/10.1145/3510851},
doi = {10.1145/3510851},
timestamp = {Thu, 22 Sep 2022 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/FiebackMWABTH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/GebregiorgisNYB22,
author = {Anteneh Gebregiorgis and
Hoang Anh Du Nguyen and
Jintao Yu and
Rajendra Bishnoi and
Mottaqiallah Taouil and
Francky Catthoor and
Said Hamdioui},
title = {A Survey on Memory-centric Computer Architectures},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {18},
number = {4},
pages = {79:1--79:50},
year = {2022},
url = {https://doi.org/10.1145/3544974},
doi = {10.1145/3544974},
timestamp = {Mon, 05 Dec 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jetc/GebregiorgisNYB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/neuromorphic/BengelMWSGBHWWM22,
author = {Christopher Bengel and
Johannes Mohr and
Stefan Wiefels and
Abhairaj Singh and
Anteneh Gebregiorgis and
Rajendra Bishnoi and
Said Hamdioui and
Rainer Waser and
Dirk J. Wouters and
Stephan Menzel},
title = {Reliability aspects of binary vector-matrix-multiplications using
ReRAM devices},
journal = {Neuromorph. Comput. Eng.},
volume = {2},
number = {3},
pages = {34001},
year = {2022},
url = {https://doi.org/10.1088/2634-4386/ac6d04},
doi = {10.1088/2634-4386/AC6D04},
timestamp = {Mon, 28 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/neuromorphic/BengelMWSGBHWWM22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/SinghZSGGKJCBH22,
author = {Abhairaj Singh and
Mahdi Zahedi and
Taha Shahroodi and
Mohit Gupta and
Anteneh Gebregiorgis and
Manu Komalan and
Rajiv V. Joshi and
Francky Catthoor and
Rajendra Bishnoi and
Said Hamdioui},
title = {CIM-based Robust Logic Accelerator using 28 nm {STT-MRAM} Characterization
Chip Tape-out},
booktitle = {4th {IEEE} International Conference on Artificial Intelligence Circuits
and Systems, {AICAS} 2022, Incheon, Republic of Korea, June 13-15,
2022},
pages = {451--454},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/AICAS54282.2022.9869993},
doi = {10.1109/AICAS54282.2022.9869993},
timestamp = {Thu, 27 Jul 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/aicas/SinghZSGGKJCBH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SinghBJH22,
author = {Abhairaj Singh and
Rajendra Bishnoi and
Rajiv V. Joshi and
Said Hamdioui},
editor = {Cristiana Bolchini and
Ingrid Verbauwhede and
Ioana Vatajelu},
title = {Referencing-in-Array Scheme for RRAM-based {CIM} Architecture},
booktitle = {2022 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2022, Antwerp, Belgium, March 14-23, 2022},
pages = {1413--1418},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.23919/DATE54114.2022.9774571},
doi = {10.23919/DATE54114.2022.9774571},
timestamp = {Wed, 25 May 2022 22:56:19 +0200},
biburl = {https://dblp.org/rec/conf/date/SinghBJH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/SinghFBBGJH22,
author = {Abhairaj Singh and
Moritz Fieback and
Rajendra Bishnoi and
Filip Bradaric and
Anteneh Gebregiorgis and
Rajiv V. Joshi and
Said Hamdioui},
title = {Accelerating {RRAM} Testing with a Low-cost Computation-in-Memory
based {DFT}},
booktitle = {{IEEE} International Test Conference, {ITC} 2022, Anaheim, CA, USA,
September 23-30, 2022},
pages = {400--409},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/ITC50671.2022.00085},
doi = {10.1109/ITC50671.2022.00085},
timestamp = {Tue, 21 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/SinghFBBGJH22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vlsi/GebregiorgisSDB22,
author = {Anteneh Gebregiorgis and
Abhairaj Singh and
Sumit Diware and
Rajendra Bishnoi and
Said Hamdioui},
title = {Dealing with Non-Idealities in Memristor Based Computation-In-Memory
Designs},
booktitle = {30th {IFIP/IEEE} 30th International Conference on Very Large Scale
Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022},
pages = {1--6},
publisher = {{IEEE}},
year = {2022},
url = {https://doi.org/10.1109/VLSI-SoC54400.2022.9939618},
doi = {10.1109/VLSI-SOC54400.2022.9939618},
timestamp = {Mon, 14 Nov 2022 17:06:23 +0100},
biburl = {https://dblp.org/rec/conf/vlsi/GebregiorgisSDB22.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/corr/abs-2212-00873,
author = {Manil Dev Gomony and
Floran de Putter and
Anteneh Gebregiorgis and
Gianna Paulin and
Linyan Mei and
Vikram Jain and
Said Hamdioui and
Victor Sanchez and
Tobias Grosser and
Marc Geilen and
Marian Verhelst and
Frank K. Zenke and
Frank K. G{\"{u}}rkaynak and
Barry de Bruin and
Sander Stuijk and
Simon Davidson and
Sayandip De and
Mounir Ghogho and
Alexandra Jimborean and
Sherif Eissa and
Luca Benini and
Dimitrios Soudris and
Rajendra Bishnoi and
S. Ainsworth and
Federico Corradi and
Ouassim Karrakchou and
Tim G{\"{u}}neysu and
Henk Corporaal},
title = {{CONVOLVE:} Smart and seamless design of smart edge processors},
journal = {CoRR},
volume = {abs/2212.00873},
year = {2022},
url = {https://doi.org/10.48550/arXiv.2212.00873},
doi = {10.48550/ARXIV.2212.00873},
eprinttype = {arXiv},
eprint = {2212.00873},
timestamp = {Tue, 07 May 2024 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2212-00873.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/pieee/GirardCVZBT21,
author = {Patrick Girard and
Yuanqing Cheng and
Arnaud Virazel and
Wei Zhao and
Rajendra Bishnoi and
Mehdi B. Tahoori},
title = {A Survey of Test and Reliability Solutions for Magnetic Random Access
Memories},
journal = {Proc. {IEEE}},
volume = {109},
number = {2},
pages = {149--169},
year = {2021},
url = {https://doi.org/10.1109/JPROC.2020.3029600},
doi = {10.1109/JPROC.2020.3029600},
timestamp = {Tue, 23 Mar 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/pieee/GirardCVZBT21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcasI/SinghLGBJH21,
author = {Abhairaj Singh and
Muath Abu Lebdeh and
Anteneh Gebregiorgis and
Rajendra Bishnoi and
Rajiv V. Joshi and
Said Hamdioui},
title = {{SRIF:} Scalable and Reliable Integrate and Fire Circuit {ADC} for
Memristor-Based {CIM} Architectures},
journal = {{IEEE} Trans. Circuits Syst. {I} Regul. Pap.},
volume = {68},
number = {5},
pages = {1917--1930},
year = {2021},
url = {https://doi.org/10.1109/TCSI.2021.3061214},
doi = {10.1109/TCSI.2021.3061214},
timestamp = {Mon, 03 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcasI/SinghLGBJH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aicas/DiwareGJHB21,
author = {Sumit Diware and
Anteneh Gebregiorgis and
Rajiv V. Joshi and
Said Hamdioui and
Rajendra Bishnoi},
title = {Unbalanced Bit-slicing Scheme for Accurate Memristor-based Neural
Network Architecture},
booktitle = {3rd {IEEE} International Conference on Artificial Intelligence Circuits
and Systems, {AICAS} 2021, Washington, DC, USA, June 6-9, 2021},
pages = {1--4},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/AICAS51828.2021.9458443},
doi = {10.1109/AICAS51828.2021.9458443},
timestamp = {Fri, 25 Jun 2021 11:56:02 +0200},
biburl = {https://dblp.org/rec/conf/aicas/DiwareGJHB21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iscas/SinghDGBCJH21,
author = {Abhairaj Singh and
Sumit Diware and
Anteneh Gebregiorgis and
Rajendra Bishnoi and
Francky Catthoor and
Rajiv V. Joshi and
Said Hamdioui},
title = {Low-Power Memristor-Based Computing for Edge-AI Applications},
booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2021,
Daegu, South Korea, May 22-28, 2021},
pages = {1--5},
publisher = {{IEEE}},
year = {2021},
url = {https://doi.org/10.1109/ISCAS51556.2021.9401226},
doi = {10.1109/ISCAS51556.2021.9401226},
timestamp = {Fri, 02 Jul 2021 12:26:54 +0200},
biburl = {https://dblp.org/rec/conf/iscas/SinghDGBCJH21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/RasheedHBBAT20,
author = {Farhan Rasheed and
Michael Hefenbrock and
Rajendra Bishnoi and
Michael Beigl and
Jasmin Aghassi{-}Hagmann and
Mehdi Baradaran Tahoori},
title = {Crossover-aware Placement and Routing for Inkjet Printed Circuits},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {16},
number = {2},
pages = {19:1--19:22},
year = {2020},
url = {https://doi.org/10.1145/3375461},
doi = {10.1145/3375461},
timestamp = {Mon, 08 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/jetc/RasheedHBBAT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jetc/SayedBT20,
author = {Nour Sayed and
Rajendra Bishnoi and
Mehdi B. Tahoori},
title = {Approximate Spintronic Memories},
journal = {{ACM} J. Emerg. Technol. Comput. Syst.},
volume = {16},
number = {4},
pages = {43:1--43:22},
year = {2020},
url = {https://doi.org/10.1145/3404980},
doi = {10.1145/3404980},
timestamp = {Sat, 08 Jan 2022 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jetc/SayedBT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/DodoBT20,
author = {Samir Ben Dodo and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Secure {STT-MRAM} Bit-Cell Design Resilient to Differential Power
Analysis Attacks},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {28},
number = {1},
pages = {263--272},
year = {2020},
url = {https://doi.org/10.1109/TVLSI.2019.2940449},
doi = {10.1109/TVLSI.2019.2940449},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/DodoBT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ErozanWBAT20,
author = {Ahmet Turan Erozan and
Guan Ying Wang and
Rajendra Bishnoi and
Jasmin Aghassi{-}Hagmann and
Mehdi Baradaran Tahoori},
title = {A Compact Low-Voltage True Random Number Generator Based on Inkjet
Printing Technology},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {28},
number = {6},
pages = {1485--1495},
year = {2020},
url = {https://doi.org/10.1109/TVLSI.2020.2975876},
doi = {10.1109/TVLSI.2020.2975876},
timestamp = {Tue, 16 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ErozanWBAT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ErozanWRBAT20,
author = {Ahmet Turan Erozan and
Dennis D. Weller and
Farhan Rasheed and
Rajendra Bishnoi and
Jasmin Aghassi{-}Hagmann and
Mehdi Baradaran Tahoori},
title = {A Novel Printed-Lookup-Table-Based Programmable Printed Digital Circuit},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {28},
number = {6},
pages = {1496--1504},
year = {2020},
url = {https://doi.org/10.1109/TVLSI.2020.2980931},
doi = {10.1109/TVLSI.2020.2980931},
timestamp = {Tue, 16 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tvlsi/ErozanWRBAT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MunchBT20,
author = {Christopher M{\"{u}}nch and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Tolerating Retention Failures in Neuromorphic Fabric based on Emerging
Resistive Memories},
booktitle = {25th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2020, Beijing, China, January 13-16, 2020},
pages = {393--400},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ASP-DAC47756.2020.9045339},
doi = {10.1109/ASP-DAC47756.2020.9045339},
timestamp = {Mon, 30 Mar 2020 12:39:40 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/MunchBT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TahooriNBTSPBPP20,
author = {Mehdi Baradaran Tahoori and
Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Lionel Torres and
Sophiane Senni and
Guillaume Patrigeon and
Pascal Benoit and
Gregory di Pendina and
Guillaume Prenat},
title = {A Universal Spintronic Technology based on Multifunctional Standardized
Stack},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {394--399},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116321},
doi = {10.23919/DATE48585.2020.9116321},
timestamp = {Fri, 26 Feb 2021 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/TahooriNBTSPBPP20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NairBVT20,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Arunkumar Vijayan and
Mehdi Baradaran Tahoori},
title = {Dynamic Faults based Hardware Trojan Design in {STT-MRAM}},
booktitle = {2020 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2020, Grenoble, France, March 9-13, 2020},
pages = {933--938},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.23919/DATE48585.2020.9116471},
doi = {10.23919/DATE48585.2020.9116471},
timestamp = {Thu, 25 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/NairBVT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/FiebackNBTTH20,
author = {Moritz Fieback and
Surya Nagarajan and
Rajendra Bishnoi and
Mehdi B. Tahoori and
Mottaqiallah Taouil and
Said Hamdioui},
title = {Testing Scouting Logic-Based Computation-in-Memory Architectures},
booktitle = {{IEEE} European Test Symposium, {ETS} 2020, Tallinn, Estonia, May
25-29, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/ETS48528.2020.9131604},
doi = {10.1109/ETS48528.2020.9131604},
timestamp = {Sat, 05 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/ets/FiebackNBTTH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/irps/NairBTZCGKC20,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mehdi B. Tahoori and
Houman Zahedmanesh and
Kristof Croes and
Kevin Garello and
Gouri Sankar Kar and
Francky Catthoor},
title = {Physics based modeling of bimodal electromigration failure distributions
and variation analysis for {VLSI} interconnects},
booktitle = {2020 {IEEE} International Reliability Physics Symposium, {IRPS} 2020,
Dallas, TX, USA, April 28 - May 30, 2020},
pages = {1--5},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/IRPS45951.2020.9128313},
doi = {10.1109/IRPS45951.2020.9128313},
timestamp = {Thu, 14 Oct 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/irps/NairBTZCGKC20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/BishnoiWFMNTWLH20,
author = {Rajendra Bishnoi and
Lizhou Wu and
Moritz Fieback and
Christopher M{\"{u}}nch and
Sarath Mohanachandran Nair and
Mehdi Baradaran Tahoori and
Ying Wang and
Huawei Li and
Said Hamdioui},
title = {Special Session - Emerging Memristor Based Memory and {CIM} Architecture:
Test, Repair and Yield Analysis},
booktitle = {38th {IEEE} {VLSI} Test Symposium, {VTS} 2020, San Diego, CA, USA,
April 5-8, 2020},
pages = {1--10},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VTS48691.2020.9107595},
doi = {10.1109/VTS48691.2020.9107595},
timestamp = {Mon, 15 May 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/BishnoiWFMNTWLH20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/NairBT20,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Mitigating Read Failures in {STT-MRAM}},
booktitle = {38th {IEEE} {VLSI} Test Symposium, {VTS} 2020, San Diego, CA, USA,
April 5-8, 2020},
pages = {1--6},
publisher = {{IEEE}},
year = {2020},
url = {https://doi.org/10.1109/VTS48691.2020.9107605},
doi = {10.1109/VTS48691.2020.9107605},
timestamp = {Thu, 25 Jun 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/vts/NairBT20.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/GebregiorgisBT19,
author = {Anteneh Gebregiorgis and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {A Comprehensive Reliability Analysis Framework for {NTC} Caches: {A}
System to Device Approach},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {38},
number = {3},
pages = {439--452},
year = {2019},
url = {https://doi.org/10.1109/TCAD.2018.2818691},
doi = {10.1109/TCAD.2018.2818691},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/GebregiorgisBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/todaes/SayedMBT19,
author = {Nour Sayed and
Longfei Mao and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Compiler-Assisted and Profiling-Based Analysis for Fast and Efficient
{STT-MRAM} On-Chip Cache Design},
journal = {{ACM} Trans. Design Autom. Electr. Syst.},
volume = {24},
number = {4},
pages = {41:1--41:25},
year = {2019},
url = {https://doi.org/10.1145/3321693},
doi = {10.1145/3321693},
timestamp = {Sun, 22 Oct 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/todaes/SayedMBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/SayedBT19,
author = {Nour Sayed and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Fast and Reliable {STT-MRAM} Using Nonuniform and Adaptive Error Detecting
and Correcting Scheme},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {6},
pages = {1329--1342},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2019.2903592},
doi = {10.1109/TVLSI.2019.2903592},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/SayedBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/NairBT19,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {A Comprehensive Framework for Parametric Failure Modeling and Yield
Analysis of {STT-MRAM}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {7},
pages = {1697--1710},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2019.2904197},
doi = {10.1109/TVLSI.2019.2904197},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/NairBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/DodoBNT19,
author = {Samir Ben Dodo and
Rajendra Bishnoi and
Sarath Mohanachandran Nair and
Mehdi Baradaran Tahoori},
title = {A Spintronics Memory {PUF} for Resilience Against Cloning Counterfeit},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {27},
number = {11},
pages = {2511--2522},
year = {2019},
url = {https://doi.org/10.1109/TVLSI.2019.2931481},
doi = {10.1109/TVLSI.2019.2931481},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/DodoBNT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/MunchBT19,
author = {Christopher M{\"{u}}nch and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
editor = {Toshiyuki Shibuya},
title = {Reliable in-memory neuromorphic computing using spintronics},
booktitle = {Proceedings of the 24th Asia and South Pacific Design Automation Conference,
{ASPDAC} 2019, Tokyo, Japan, January 21-24, 2019},
pages = {230--236},
publisher = {{ACM}},
year = {2019},
url = {https://doi.org/10.1145/3287624.3288745},
doi = {10.1145/3287624.3288745},
timestamp = {Sun, 20 Jan 2019 16:08:16 +0100},
biburl = {https://dblp.org/rec/conf/aspdac/MunchBT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/RasheedHBBAT19,
author = {Farhan Rasheed and
Michael Hefenbrock and
Rajendra Bishnoi and
Michael Beigl and
Jasmin Aghassi{-}Hagmann and
Mehdi Baradaran Tahoori},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Predictive Modeling and Design Automation of Inorganic Printed Electronics},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {30--35},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8715159},
doi = {10.23919/DATE.2019.8715159},
timestamp = {Sun, 25 Oct 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/RasheedHBBAT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/ErozanBAT19,
author = {Ahmet Turan Erozan and
Rajendra Bishnoi and
Jasmin Aghassi{-}Hagmann and
Mehdi Baradaran Tahoori},
editor = {J{\"{u}}rgen Teich and
Franco Fummi},
title = {Inkjet-Printed True Random Number Generator based on Additive Resistor
Tuning},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2019, Florence, Italy, March 25-29, 2019},
pages = {1361--1366},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.23919/DATE.2019.8715071},
doi = {10.23919/DATE.2019.8715071},
timestamp = {Fri, 27 Dec 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/ErozanBAT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/iolts/NairBTGT19,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori and
Hayk T. Grigoryan and
Grigor Tshagharyan},
editor = {Dimitris Gizopoulos and
Dan Alexandrescu and
Panagiota Papavramidou and
Michail Maniatakos},
title = {Variation-aware Fault Modeling and Test Generation for {STT-MRAM}},
booktitle = {25th {IEEE} International Symposium on On-Line Testing and Robust
System Design, {IOLTS} 2019, Rhodes, Greece, July 1-3, 2019},
pages = {80--83},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IOLTS.2019.8854376},
doi = {10.1109/IOLTS.2019.8854376},
timestamp = {Tue, 31 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/iolts/NairBTGT19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/irps/NairBTZCGKC19,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori and
Houman Zahedmanesh and
Kristof Croes and
Kevin Garello and
Gouri Sankar Kar and
Francky Catthoor},
title = {Variation-Aware Physics-Based Electromigration Modeling and Experimental
Calibration for {VLSI} Interconnects},
booktitle = {{IEEE} International Reliability Physics Symposium, {IRPS} 2019, Monterey,
CA, USA, March 31 - April 4, 2019},
pages = {1--6},
publisher = {{IEEE}},
year = {2019},
url = {https://doi.org/10.1109/IRPS.2019.8720559},
doi = {10.1109/IRPS.2019.8720559},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/irps/NairBTZCGKC19.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/NairBGOHT18,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mohammad Saber Golanbari and
Fabian Oboril and
Fazal Hameed and
Mehdi Baradaran Tahoori},
title = {{VAET-STT:} Variation Aware {STT-MRAM} Analysis and Design Space Exploration
Tool},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {37},
number = {7},
pages = {1396--1407},
year = {2018},
url = {https://doi.org/10.1109/TCAD.2017.2760861},
doi = {10.1109/TCAD.2017.2760861},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tcad/NairBGOHT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/ErozanMGBDAT18,
author = {Ahmet Turan Erozan and
Gabriel Cadilha Marques and
Mohammad Saber Golanbari and
Rajendra Bishnoi and
Simone Dehm and
Jasmin Aghassi{-}Hagmann and
Mehdi Baradaran Tahoori},
title = {Inkjet-Printed EGFET-Based Physical Unclonable Function - Design,
Evaluation, and Fabrication},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {26},
number = {12},
pages = {2935--2946},
year = {2018},
url = {https://doi.org/10.1109/TVLSI.2018.2866188},
doi = {10.1109/TVLSI.2018.2866188},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/ErozanMGBDAT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/SayedNBT18,
author = {Nour Sayed and
Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
editor = {Youngsoo Shin},
title = {Process variation and temperature aware adaptive scrubbing for retention
failures in {STT-MRAM}},
booktitle = {23rd Asia and South Pacific Design Automation Conference, {ASP-DAC}
2018, Jeju, Korea (South), January 22-25, 2018},
pages = {203--208},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ASPDAC.2018.8297306},
doi = {10.1109/ASPDAC.2018.8297306},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/SayedNBT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GebregiorgisBT18,
author = {Anteneh Gebregiorgis and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Spintronic normally-off heterogeneous system-on-chip design},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {113--118},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8341989},
doi = {10.23919/DATE.2018.8341989},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/GebregiorgisBT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NairBT18,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Parametric failure modeling and yield analysis for {STT-MRAM}},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {265--268},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342016},
doi = {10.23919/DATE.2018.8342016},
timestamp = {Tue, 24 Apr 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/NairBT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SayedBOT18,
author = {Nour Sayed and
Rajendra Bishnoi and
Fabian Oboril and
Mehdi Baradaran Tahoori},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {A cross-layer adaptive approach for performance and power optimization
in {STT-MRAM}},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {791--796},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342114},
doi = {10.23919/DATE.2018.8342114},
timestamp = {Tue, 24 Apr 2018 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/SayedBOT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/TahooriNBSMMTBG18,
author = {Mehdi Baradaran Tahoori and
Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Sophiane Senni and
Jad Mohdad and
Fr{\'{e}}d{\'{e}}rick Mailly and
Lionel Torres and
Pascal Benoit and
Abdoulaye Gamati{\'{e}} and
Pascal Nouet and
Frederic Ouattara and
Gilles Sassatelli and
Kotb Jabeur and
Pierre Vanhauwaert and
A. Atitoaie and
I. Firastrau and
Gregory di Pendina and
Guillaume Prenat},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Using multifunctional standardized stack as universal spintronic technology
for IoT},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {931--936},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342143},
doi = {10.23919/DATE.2018.8342143},
timestamp = {Tue, 26 Feb 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/TahooriNBSMMTBG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/MunchBT18,
author = {Christopher M{\"{u}}nch and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
editor = {Jan Madsen and
Ayse K. Coskun},
title = {Multi-bit non-volatile spintronic flip-flop},
booktitle = {2018 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2018, Dresden, Germany, March 19-23, 2018},
pages = {1229--1234},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.23919/DATE.2018.8342203},
doi = {10.23919/DATE.2018.8342203},
timestamp = {Sun, 20 Jan 2019 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/date/MunchBT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/GolanbariKBT18,
author = {Mohammad Saber Golanbari and
Saman Kiamehr and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Reliable memory {PUF} design for low-power applications},
booktitle = {19th International Symposium on Quality Electronic Design, {ISQED}
2018, Santa Clara, CA, USA, March 13-14, 2018},
pages = {207--213},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISQED.2018.8357289},
doi = {10.1109/ISQED.2018.8357289},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/GolanbariKBT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/ErozanGBAT18,
author = {Ahmet Turan Erozan and
Mohammad Saber Golanbari and
Rajendra Bishnoi and
Jasmin Aghassi{-}Hagmann and
Mehdi Baradaran Tahoori},
title = {Design and evaluation of physical unclonable function for inorganic
printed electronics},
booktitle = {19th International Symposium on Quality Electronic Design, {ISQED}
2018, Santa Clara, CA, USA, March 13-14, 2018},
pages = {419--424},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/ISQED.2018.8357323},
doi = {10.1109/ISQED.2018.8357323},
timestamp = {Sat, 30 Sep 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/isqed/ErozanGBAT18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/NairBTTGHZ18,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori and
Grigor Tshagharyan and
Hayk T. Grigoryan and
Gurgen Harutyunyan and
Yervant Zorian},
title = {Defect injection, Fault Modeling and Test Algorithm Generation Methodology
for {STT-MRAM}},
booktitle = {{IEEE} International Test Conference, {ITC} 2018, Phoenix, AZ, USA,
October 29 - Nov. 1, 2018},
pages = {1--10},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/TEST.2018.8624725},
doi = {10.1109/TEST.2018.8624725},
timestamp = {Tue, 31 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/NairBTTGHZ18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/TshagharyanHZGG18,
author = {Grigor Tshagharyan and
Gurgen Harutyunyan and
Yervant Zorian and
Anteneh Gebregiorgis and
Mohammad Saber Golanbari and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Modeling and Testing of Aging Faults in FinFET Memories for Automotive
Applications},
booktitle = {{IEEE} International Test Conference, {ITC} 2018, Phoenix, AZ, USA,
October 29 - Nov. 1, 2018},
pages = {1--10},
publisher = {{IEEE}},
year = {2018},
url = {https://doi.org/10.1109/TEST.2018.8624890},
doi = {10.1109/TEST.2018.8624890},
timestamp = {Tue, 31 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/itc/TshagharyanHZGG18.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@phdthesis{DBLP:phd/basesearch/Bishnoi17,
author = {Rajendra Bishnoi},
title = {Reliable Low-Power High Performance Spintronic Memories},
school = {Karlsruhe University, Germany},
year = {2017},
url = {https://publikationen.bibliothek.kit.edu/1000070974},
doi = {10.5445/IR/1000070974},
urn = {urn:nbn:de:swb:90-709749},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/phd/basesearch/Bishnoi17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BishnoiOT17,
author = {Rajendra Bishnoi and
Fabian Oboril and
Mehdi Baradaran Tahoori},
title = {Design of Defect and Fault-Tolerant Nonvolatile Spintronic Flip-Flops},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {25},
number = {4},
pages = {1421--1432},
year = {2017},
url = {https://doi.org/10.1109/TVLSI.2016.2630315},
doi = {10.1109/TVLSI.2016.2630315},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/BishnoiOT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/SayedEBT17,
author = {Nour Sayed and
Mojtaba Ebrahimi and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
editor = {David Atienza and
Giorgio Di Natale},
title = {Opportunistic write for fast and reliable {STT-MRAM}},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {554--559},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927049},
doi = {10.23919/DATE.2017.7927049},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/SayedEBT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/NairBGOT17,
author = {Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Mohammad Saber Golanbari and
Fabian Oboril and
Mehdi Baradaran Tahoori},
editor = {David Atienza and
Giorgio Di Natale},
title = {{VAET-STT:} {A} variation aware estimator tool for {STT-MRAM} based
memories},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2017, Lausanne, Switzerland, March 27-31, 2017},
pages = {1456--1461},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.23919/DATE.2017.7927221},
doi = {10.23919/DATE.2017.7927221},
timestamp = {Mon, 14 Aug 2017 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/NairBGOT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/ets/SayedOSBT17,
author = {Nour Sayed and
Fabian Oboril and
Azadeh Shirvanian and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Exploiting {STT-MRAM} for approximate computing},
booktitle = {22nd {IEEE} European Test Symposium, {ETS} 2017, Limassol, Cyprus,
May 22-26, 2017},
pages = {1--6},
publisher = {{IEEE}},
year = {2017},
url = {https://doi.org/10.1109/ETS.2017.7968217},
doi = {10.1109/ETS.2017.7968217},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/ets/SayedOSBT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/MittalBOWTJV17,
author = {Sparsh Mittal and
Rajendra Bishnoi and
Fabian Oboril and
Haonan Wang and
Mehdi Baradaran Tahoori and
Adwait Jog and
Jeffrey S. Vetter},
title = {Architecting {SOT-RAM} Based {GPU} Register File},
booktitle = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,
Bochum, Germany, July 3-5, 2017},
pages = {38--44},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ISVLSI.2017.17},
doi = {10.1109/ISVLSI.2017.17},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/MittalBOWTJV17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isvlsi/TahooriNBSMMTBN17,
author = {Mehdi Baradaran Tahoori and
Sarath Mohanachandran Nair and
Rajendra Bishnoi and
Sophiane Senni and
Jad Mohdad and
Fr{\'{e}}d{\'{e}}rick Mailly and
Lionel Torres and
Pascal Benoit and
Pascal Nouet and
Rui Ma and
Martin Krei{\ss}ig and
Frank Ellinger and
Kotb Jabeur and
Pierre Vanhauwaert and
Gregory di Pendina and
Guillaume Prenat},
title = {{GREAT:} HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional
Standardized sTack},
booktitle = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,
Bochum, Germany, July 3-5, 2017},
pages = {344--349},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/ISVLSI.2017.67},
doi = {10.1109/ISVLSI.2017.67},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/isvlsi/TahooriNBSMMTBN17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/vts/SayedOBT17,
author = {Nour Sayed and
Fabian Oboril and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Leveraging Systematic Unidirectional Error-Detecting Codes for fast
{STT-MRAM} cache},
booktitle = {35th {IEEE} {VLSI} Test Symposium, {VTS} 2017, Las Vegas, NV, USA,
April 9-12, 2017},
pages = {1--6},
publisher = {{IEEE} Computer Society},
year = {2017},
url = {https://doi.org/10.1109/VTS.2017.7928937},
doi = {10.1109/VTS.2017.7928937},
timestamp = {Fri, 24 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/SayedOBT17.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/EbrahimiABT16,
author = {Mojtaba Ebrahimi and
Hossein Asadi and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
title = {Layout-Based Modeling and Mitigation of Multiple Event Transients},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {35},
number = {3},
pages = {367--379},
year = {2016},
url = {https://doi.org/10.1109/TCAD.2015.2459053},
doi = {10.1109/TCAD.2015.2459053},
timestamp = {Fri, 14 May 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/EbrahimiABT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tmscs/PrenatJVPOBELBG16,
author = {Guillaume Prenat and
Kotb Jabeur and
Pierre Vanhauwaert and
Gregory di Pendina and
Fabian Oboril and
Rajendra Bishnoi and
Mojtaba Ebrahimi and
Nathalie Lamard and
Olivier Boulle and
Kevin Garello and
Juergen Langer and
Berthold Ocker and
Marie Claire Cyrille and
Pietro Gambardella and
Mehdi Baradaran Tahoori and
Gilles Gaudin},
title = {Ultra-Fast and High-Reliability {SOT-MRAM:} From Cache Replacement
to Normally-Off Computing},
journal = {{IEEE} Trans. Multi Scale Comput. Syst.},
volume = {2},
number = {1},
pages = {49--60},
year = {2016},
url = {https://doi.org/10.1109/TMSCS.2015.2509963},
doi = {10.1109/TMSCS.2015.2509963},
timestamp = {Tue, 29 Aug 2023 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tmscs/PrenatJVPOBELBG16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tvlsi/BishnoiOET16,
author = {Rajendra Bishnoi and
Fabian Oboril and
Mojtaba Ebrahimi and
Mehdi Baradaran Tahoori},
title = {Self-Timed Read and Write Operations in {STT-MRAM}},
journal = {{IEEE} Trans. Very Large Scale Integr. Syst.},
volume = {24},
number = {5},
pages = {1783--1793},
year = {2016},
url = {https://doi.org/10.1109/TVLSI.2015.2496363},
doi = {10.1109/TVLSI.2015.2496363},
timestamp = {Wed, 11 Mar 2020 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/tvlsi/BishnoiOET16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BishnoiOT16,
author = {Rajendra Bishnoi and
Fabian Oboril and
Mehdi Baradaran Tahoori},
title = {Non-Volatile Non-Shadow flip-flop using Spin Orbit Torque for efficient
normally-off computing},
booktitle = {21st Asia and South Pacific Design Automation Conference, {ASP-DAC}
2016, Macao, Macao, January 25-28, 2016},
pages = {769--774},
publisher = {{IEEE}},
year = {2016},
url = {https://doi.org/10.1109/ASPDAC.2016.7428104},
doi = {10.1109/ASPDAC.2016.7428104},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BishnoiOT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/GebregiorgisKOB16,
author = {Anteneh Gebregiorgis and
Saman Kiamehr and
Fabian Oboril and
Rajendra Bishnoi and
Mehdi Baradaran Tahoori},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {A cross-layer analysis of Soft Error, aging and process variation
in Near Threshold Computing},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {205--210},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459305/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/GebregiorgisKOB16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BishnoiOT16,
author = {Rajendra Bishnoi and
Fabian Oboril and
Mehdi Baradaran Tahoori},
editor = {Luca Fanucci and
J{\"{u}}rgen Teich},
title = {Fault Tolerant Non-Volatile spintronic flip-flop},
booktitle = {2016 Design, Automation {\&} Test in Europe Conference {\&}
Exhibition, {DATE} 2016, Dresden, Germany, March 14-18, 2016},
pages = {261--264},
publisher = {{IEEE}},
year = {2016},
url = {https://ieeexplore.ieee.org/document/7459317/},
timestamp = {Mon, 09 Aug 2021 01:00:00 +0200},
biburl = {https://dblp.org/rec/conf/date/BishnoiOT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/glvlsi/BishnoiOT16,
author = {Rajendra Bishnoi and
Fabian Oboril and
Mehdi Baradaran Tahoori},
editor = {Ayse K. Coskun and
Martin Margala and
Laleh Behjat and
Jie Han},
title = {Low-Power Multi-Port Memory Architecture based on Spin Orbit Torque
Magnetic Devices},
booktitle = {Proceedings of the 26th edition on Great Lakes Symposium on VLSI,
{GLVLSI} 2016, Boston, MA, USA, May 18-20, 2016},
pages = {409--414},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2902961.2903022},
doi = {10.1145/2902961.2903022},
timestamp = {Wed, 10 Mar 2021 14:55:38 +0100},
biburl = {https://dblp.org/rec/conf/glvlsi/BishnoiOT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/islped/OborilHBANT16,
author = {Fabian Oboril and
Fazal Hameed and
Rajendra Bishnoi and
Ali Ahari and
Helia Naeimi and
Mehdi Baradaran Tahoori},
title = {Normally-OFF {STT-MRAM} Cache with Zero-Byte Compression for Energy
Efficient Last-Level Caches},
booktitle = {Proceedings of the 2016 International Symposium on Low Power Electronics
and Design, {ISLPED} 2016, San Francisco Airport, CA, USA, August
08 - 10, 2016},
pages = {236--241},
publisher = {{ACM}},
year = {2016},
url = {https://doi.org/10.1145/2934583.2934629},
doi = {10.1145/2934583.2934629},
timestamp = {Mon, 05 Feb 2024 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/islped/OborilHBANT16.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/tcad/OborilBET15,
author = {Fabian Oboril and
Rajendra Bishnoi and
Mojtaba Ebrahimi and
Mehdi Baradaran Tahoori},
title = {Evaluation of Hybrid Memory Technologies Using {SOT-MRAM} for On-Chip
Cache Hierarchy},
journal = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
volume = {34},
number = {3},
pages = {367--380},
year = {2015},
url = {https://doi.org/10.1109/TCAD.2015.2391254},
doi = {10.1109/TCAD.2015.2391254},
timestamp = {Thu, 24 Sep 2020 01:00:00 +0200},
biburl = {https://dblp.org/rec/journals/tcad/OborilBET15.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/aspdac/BishnoiEOT14,
author = {Rajendra Bishnoi and
Mojtaba Ebrahimi and
Fabian Oboril and
Mehdi Baradaran Tahoori},
title = {Architectural aspects in design and analysis of SOT-based memories},
booktitle = {19th Asia and South Pacific Design Automation Conference, {ASP-DAC}
2014, Singapore, January 20-23, 2014},
pages = {700--707},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ASPDAC.2014.6742972},
doi = {10.1109/ASPDAC.2014.6742972},
timestamp = {Wed, 16 Oct 2019 14:14:52 +0200},
biburl = {https://dblp.org/rec/conf/aspdac/BishnoiEOT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/date/BishnoiEOT14,
author = {Rajendra Bishnoi and
Mojtaba Ebrahimi and
Fabian Oboril and
Mehdi Baradaran Tahoori},
editor = {Gerhard P. Fettweis and
Wolfgang Nebel},
title = {Asynchronous Asymmetrical Write Termination {(AAWT)} for a low power
{STT-MRAM}},
booktitle = {Design, Automation {\&} Test in Europe Conference {\&} Exhibition,
{DATE} 2014, Dresden, Germany, March 24-28, 2014},
pages = {1--6},
publisher = {European Design and Automation Association},
year = {2014},
url = {https://doi.org/10.7873/DATE.2014.193},
doi = {10.7873/DATE.2014.193},
timestamp = {Wed, 16 Oct 2019 14:14:53 +0200},
biburl = {https://dblp.org/rec/conf/date/BishnoiEOT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/isqed/BishnoiOET14,
author = {Rajendra Bishnoi and
Fabian Oboril and
Mojtaba Ebrahimi and
Mehdi Baradaran Tahoori},
title = {Avoiding unnecessary write operations in {STT-MRAM} for low power
implementation},
booktitle = {Fifteenth International Symposium on Quality Electronic Design, {ISQED}
2014, Santa Clara, CA, USA, March 3-5, 2014},
pages = {548--553},
publisher = {{IEEE}},
year = {2014},
url = {https://doi.org/10.1109/ISQED.2014.6783375},
doi = {10.1109/ISQED.2014.6783375},
timestamp = {Wed, 16 Oct 2019 14:14:55 +0200},
biburl = {https://dblp.org/rec/conf/isqed/BishnoiOET14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/BishnoiEOT14,
author = {Rajendra Bishnoi and
Mojtaba Ebrahimi and
Fabian Oboril and
Mehdi Baradaran Tahoori},
title = {Read disturb fault detection in {STT-MRAM}},
booktitle = {2014 International Test Conference, {ITC} 2014, Seattle, WA, USA,
October 20-23, 2014},
pages = {1--7},
publisher = {{IEEE} Computer Society},
year = {2014},
url = {https://doi.org/10.1109/TEST.2014.7035342},
doi = {10.1109/TEST.2014.7035342},
timestamp = {Thu, 23 Mar 2023 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/BishnoiEOT14.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
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