G. S. Visweswaran

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Anuj Grover

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Publications

2017
[j5]
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Anuj Grover, G. S. Visweswaran, Chittoor R. Parthasarathy, Mohammad Daud, David Turgis, Bastien Giraud, Jean-Philippe Noel, Ivan Miro Panades, Guillaume Moritz, Edith Beigné, Philippe Flatresse, Promod Kumar, Shamsi Azmi:
A 32 kb 0.35-1.2 V, 50 MHz-2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(9): 2438-2447 (2017)
2016
[c20]
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  - conf/socc/BatraKGHVG16
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Nidhi Batra, Shashwat Kaushik, Anil Kumar Gundu, Mohammad S. Hashmi, G. S. Visweswaran, Anuj Grover:
A method to estimate effectiveness of weak bit test: Comparison of weak pMOS and WL boost based test - 28nm FDSOI implementation. SoCC 2016: 47-51
[c19]
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  - conf/socc/GuptaVNG16
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Prakhar Raj Gupta, G. S. Visweswaran, Gaurav Narang, Anuj Grover:
Heterogeneous memory assembly exploration using a floorplan and interconnect aware framework. SoCC 2016: 290-295
[c18]
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  - conf/vdat/BatraGHVG16
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Nidhi Batra, Anil Kumar Gundu, Mohammad S. Hashmi, G. S. Visweswaran, Anuj Grover:
An effective test methodology enabling detection of weak bits in SRAMs: Case study in 28nm FDSOI. VDAT 2016: 1-6
2015
[c14]
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  - conf/icicdt/GroverKDVPNTGM15
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Anuj Grover, Promod Kumar, Mohammad Daud, G. S. Visweswaran, Chittoor R. Parthasarathy, Jean-Philippe Noel, David Turgis, Bastien Giraud, Guillaume Moritz:
Low Standby Power Capacitively Coupled Sense Amplifier for wide voltage range operation of dual rail SRAMs. ICICDT 2015: 1-4

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