Ney Laert Vilar Calazans

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Aline Vieira de Mello

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Publications

2007
[c27]
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Aline Mello, Ney Calazans, Fernando Moraes:
QoS in Networks-on-Chip - Beyond Priority and Circuit Switching Techniques. VLSI-SoC (Selected Papers) 2007: 1-22
[c26]
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Aline Mello, Ney Laert Vilar Calazans:
Rate-based scheduling policy for QoS flows in networks on chip. VLSI-SoC 2007: 140-145
[i1]
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  - journals/corr/abs-0710-4843
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Aline Mello, Leandro Möller, Ney Calazans, Fernando Moraes:
MultiNoC: A Multiprocessing System Enabled by a Network on Chip. CoRR abs/0710.4843 (2007)
2006
[c24]
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  - conf/issoc/MelloTCM06
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Aline Mello, Leonel Tedesco, Ney Calazans, Fernando Moraes:
Evaluation of current QoS Mechanisms in Networks on Chip. SoC 2006: 1-4
[c22]
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  - conf/sbcci/TedescoMGCM06
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Leonel Tedesco, Aline Mello, Leonardo Giacomet, Ney Calazans, Fernando Gehm Moraes:
Application driven traffic modeling for NoCs. SBCCI 2006: 62-67
2005
[c21]
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  - conf/aspdac/OstMPMC05
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Luciano Ost, Aline Mello, José Palma, Fernando Gehm Moraes, Ney Calazans:
MAIA: a framework for networks on chip generation and verification. ASP-DAC 2005: 49-52
[c17]
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Aline Mello, Leonel Tedesco, Ney Calazans, Fernando Moraes:
Virtual channels in networks on chip: implementation and evaluation on hermes NoC. SBCCI 2005: 178-183
[c16]
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Leonel Tedesco, Aline Mello, Diego Garibotti, Ney Calazans, Fernando Moraes:
Traffic generation and performance evaluation for mesh-based NoCs. SBCCI 2005: 184-189
2004
[j3]
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  - journals/integration/MoraesCMMO04
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Fernando Gehm Moraes, Ney Calazans, Aline Mello, Leandro Möller, Luciano Ost:
HERMES: an infrastructure for low area overhead packet-switching networks on chip. Integr. 38(1): 69-93 (2004)
[c13]
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Aline Mello, Leandro Möller, Ney Calazans, Fernando Gehm Moraes:
MultiNoC: A Multiprocessing System Enabled by a Network on Chip. DATE 2004: 234-239
2003
[c7]
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Fernando Gehm Moraes, Aline Mello, Leandro Möller, Luciano Ost, Ney Laert Vilar Calazans:
A Low Area Overhead Packet-switched Network on Chip: Architecture and Prototyping. VLSI-SOC 2003: 318-323
2002
[c4]
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José Carlos S. Palma, Aline Vieira de Mello, Leandro Möller, Fernando Moraes, Ney Calazans:
Core Communication Interface for FPGAs. SBCCI 2002: 183-190

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