Yves Blaquière

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Safa Berrima

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Publications

2021
[j14]
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Safa Berrima, Yves Blaquière, Yvon Savaria:
Ring-Oscillator-Based High Accuracy Low Complexity Multichannel Time-to-Digital Converter Architecture for Field-Programmable Gate Arrays. IEEE Trans. Instrum. Meas. 70: 1-10 (2021)
2020
[j12]
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Safa Berrima, Yves Blaquière, Yvon Savaria:
Fine resolution delay tuning method to improve the linearity of an unbalanced time-to-digital converter on a Xilinx FPGA. IET Circuits Devices Syst. 14(8): 1243-1252 (2020)
2018
[j10]
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  - journals/integration/BerrimaBS18
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Safa Berrima, Yves Blaquière, Yvon Savaria:
Diagnosis algorithms for a reconfigurable and defect tolerant JTAG scan chain in large area integrated circuits. Integr. 62: 159-169 (2018)
2017
[c25]
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  - conf/iscas/BerrimaBS17
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Safa Berrima, Yves Blaquière, Yvon Savaria:
A multi-measurements RO-TDC implemented in a Xilinx field programmable gate array. ISCAS 2017: 1-4
[c24]
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  - conf/mwscas/BerrimaBS17
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Safa Berrima, Yves Blaquière, Yvon Savaria:
Sub-ps resolution programmable delays implemented in a Xilinx FPGA. MWSCAS 2017: 918-921
2014
[c19]
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  - conf/iscas/BlaquiereBBS14
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Yves Blaquière, Yan Basile-Bellavance, Safa Berrima, Yvon Savaria:
Design and validation of a novel reconfigurable and defect tolerant JTAG scan chain. ISCAS 2014: 2559-2562

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