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ORCIDISCAS 2014: Melbourne, Victoria, Australia
- IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 2014. IEEE 2014, ISBN 978-1-4799-3431-7
A1L-A: Image and Video Coding
- Shuyuan Zhu, Bing Zeng, Moncef Gabbouj
:
Adaptive reweighted compressed sensing for image compression. 1-4 - Chuang Zhu, Huizhu Jia, Jie Liu, Xianghu Ji, Hao Lv, Xiaodong Xie, Wen Gao:
Multi-level low-complexity coefficient discarding scheme for video encoder. 5-8 - Do-Kyoung Kwon, Madhukar Budagavi:
Fast intra block copy (IntraBC) search for HEVC screen content coding. 9-12 - Li Zhang, Ying Chen, Xiang Li, Shanhua Xue:
Low-complexity advanced residual prediction design in 3D-HEVC. 13-16 - Li Zhang, Ying Chen, Vijayaraghavan Thirumalai, Jian-Liang Lin, Yi-Wen Chen, Jicheng An, Shawmin Lei, Laurent Guillo, Thomas Guionnet, Christine Guillemot:
Inter-view motion prediction in 3D-HEVC. 17-20
A1L-B: Circuits for Bio Applications I
- Xin Meng, Wei Li, Gabor C. Temes:
A fully-differential input amplifier with band-pass filter for biosensors. 21-24 - Mark M. R. Ibrahim, Peter M. Levine:
CMOS transimpedance amplifier for biosensor signal acquisition. 25-28 - Masayuki Takihi, Kiichi Niitsu, Kazuo Nakazato:
Charge-conserved analog-to-time converter for a large-scale CMOS biosensor array. 33-36 - Mohammadreza Sohbati, Christofer Toumazou:
A temperature insensitive continuous time ΔpH to digital converter. 37-40
A1L-C: Sensory Systems for Vision
- Andreas Steiner, Rico Moeckel, Reto Thurer, Dario Floreano, Tobi Delbrück, Shih-Chii Liu:
1kHz 2D silicon retina motion sensor platform. 41-44 - Arthur Spivak, Orly Yadid-Pecht:
Design of A 128 × 128 CMOS APS with extended noise suppression for high and low light imaging applications. 45-48 - Dipan Kumar Mandal, Jagadeesh Sankaran, Akshay Gupta, Kyle Castille, Shraddha Gondkar, Sanmati Kamath, Pooja Sundar, Alan Phipps:
An Embedded Vision Engine (EVE) for automotive vision processing. 49-52 - Josep Maria Margarit, Lluís Terés, Enric Cabruja, Francisco Serra-Graells:
A 10kfps 32×32 integrated test platform for electrical characterization of imagers. 53-56 - Kyeongryeol Bong, Gyeonghoon Kim, Injoon Hong, Hoi-Jun Yoo:
An 1.61mW mixed-signal column processor for BRISK feature extraction in CMOS image sensor. 57-60 - Igor M. Filanovsky:
On feedback systems built around cut-inserted ideal transformer. 61-64 - Jeffrey Harrison:
Analytic bounds on amplifier gain-bandwidth product from complex power flow. 65-68 - Qinfeng Zhang, Fengyi Huang:
A study on linear single-loop feedback systems using geometric vectors. 69-72 - Robert D'Angelo, Sameer R. Sonkusale:
A time-mode translinear principle for implementing analog multiplication. 73-76 - Amir Babaie-Fishani, Maarten De Bock, Pieter Rombouts:
Analyzing distortion in ASDMs with loop delay. 77-80
A1L-E: Data Convertors I
- Cencen Gao, Dong Wu, Hui Liu, Nan Xie, Liyang Pan:
An ultra-low-power extended counting ADC For large scale sensor arrays. 81-84 - Kristof Blutman, Jan A. Angevare, Amir Zjajo, Nick van der Meijs:
A 0.1pJ Freeze Vernier time-to-digital converter in 65nm CMOS. 85-88 - Nuno Pereira, João Goes, Luís Bica Oliveira, Rui Dinis:
Analog-to-Digital Converters with embedded IF mixing using variable reference voltages. 89-92 - James S. Tandon, Takahiro J. Yamaguchi, Satoshi Komatsu, Kunihiro Asada:
A subsampling stochastic coarse-fine ADC with SNR 55.3dB and >5.8TS/s effective sample rate for an on-chip signal analyzer. 93-96 - Fabio Alex Rabuske, Taimur Gibran Rabuske, Jorge R. Fernandes:
A sub-ranging 2-Step 7-bit self-calibrated comparator-based binary-search ADC. 97-100
A1L-F: Power Converter Circuits
- Hsiang-Yuan Lee, Tsorng-Juu Liang, Jiann-Fuh Chen, Kai-Hui Chen:
Design and implementation of a bidirectional SEPIC-Zeta DC-DC Converter. 101-104 - Yutaro Minami, Hirotaka Koizumi:
Class DE current driven low di/dt rectifier. 105-108 - Sho Takeuchi, Naoki Yamashita, Hirotaka Koizumi:
A design method for single phase Z-source inverter. 109-112 - Tomoharu Nagashima, Kazuhide Inoue, Xiuqin Wei, Elisenda Bou, Eduard Alarcón, Marian K. Kazimierczuk, Hiroo Sekiya:
Analytical design procedure for resonant inductively coupled wireless power transfer system with class-E2 DC-DC converter. 113-116 - T. Ramanathan, R. Ramesh, C. K. Subramaniam, K. Ganesan:
Pseudorandom carrier based subharmonic PWM for cascaded multilevel inverters. 117-120
A1L-G: Audio and Speech Processing
- Tak-Wai Shen, Daniel Pak-Kong Lun:
Speech enhancement based on L1 regularization in the cepstral domain. 121-124 - Pranab Kumar Dhar, Tetsuya Shimamura:
A blind LWT-based audio watermarking using fast Walsh Hadamard transform and singular value decomposition. 125-128 - Koji Seto, Tokunbo Ogunfunmi:
Packet-loss robust scalable speech coding using the discrete wavelet transform. 129-132 - Mahdi Parchami, Wei-Ping Zhu, Benoît Champagne:
Microphone array based speech spectral amplitude estimators with phase estimation. 133-136 - Sharifa Sultana, Celia Shahnaz, Shaikh Anowarul Fattah, Istak Ahmmed, Wei-Ping Zhu, M. Omair Ahmad:
Speech emotion recognition based on entropy of enhanced wavelet coefficients. 137-140
A1L-H: Digital VLSI Circuits
- Masashi Imai, Tomohiro Yoneda:
Multiple-clock multiple-edge-triggered multiple-bit flip-flops for two-phase handshaking asynchronous circuits. 141-144 - Samiran Dasgupta, Devraj Rajagopal:
A 1.8/2.5/3.3V BiCMOS I/O driver with VCC=5V. 145-148 - Yang Lin, Mark Zwolinski:
A cost-efficient self-checking register architecture for radiation hardened designs. 149-152 - Rong Zhou, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph S. Chang, Weng-Geng Ho:
Synthesis of asynchronous QDI circuits using synchronous coding specifications. 153-156 - Chang-Hung Tsai, Hui-Hsuan Lee, Wan-Ju Yu, Chen-Yi Lee:
A 2 GOPS quad-mean shift processor with early termination for machine learning applications. 157-160
A1L-J: Computer-Aided Network Design I
- Chenglong Xiao, Emmanuel Casseau:
Improving high-level synthesis effectiveness through custom operator identification. 161-164 - Mohamed Ben Hammouda, Philippe Coussy, Loïc Lagadec:
A design approach to automatically synthesize ANSI-C assertions during High-Level Synthesis of hardware accelerators. 165-168 - Michael Rathmair, Florian Schupfer, Christian Krieg:
Applied formal methods for hardware Trojan detection. 169-172 - Mehedi Sarwar, James E. Stine:
Enhancing the Unified Logical Effort algorithm for branching and load distribution. 173-176 - Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya:
A new VLSI IC design automation methodology with reduced NRE costs and time-to-market using the NPN class Representation and functional symmetry. 177-180 - Long Chen, Tao Xia, Ying Guo, Huailin Liao:
A SAW-less 0.5-2.5 GHz receiver front-end with 80 dB 3rd order harmonic rejection ratio. 181-184 - Raheleh Eslampanah, Lance Linton, Shabbir Ahmed, Robabeh Amirkhanzadeh, Mohammadreza Pourakbar, Jean-Michel Redoute, Mike Faulkner:
Active duplexing for Software Defined Radio. 185-188 - Abhishek Kumar, Sankaran Aniruddhan:
Ground-bounce reduction in narrow-band RF front-ends. 189-192 - Chenxin Zhang, Hemanth Prabhu, Liang Liu, Ove Edfors, Viktor Öwall:
Energy efficient SQRD processor for LTE-A using a group-sort update scheme. 193-196 - Junqing Guan, Xuan Anh Nghiem, Renato Negra:
Iterative characterisation approach using realistic excitation signals for linearisation of transmitters. 197-200
A1L-L: Special Session: FEC for Next Generation Storage and Communication Systems
- Zhiqiang Cui, Zhongfeng Wang, Xinming Huang:
Multilevel error correction scheme for MLC flash memory. 201-204 - Bo Yuan, Keshab K. Parhi:
Architectures for polar BP decoders using folding. 205-208 - Chuan Zhang, Xiaohu You, Jin Sha:
Hardware architecture for list successive cancellation polar decoder. 209-212 - Mao-Ruei Li, Hsueh-Chih Chou, Yeong-Luh Ueng, Yun Chen:
A low-complexity LDPC decoder for NAND flash applications. 213-216
A2L-A: Special Session: Microsystems for Biochemical Sensing
- Scott MacKay, Jie Chen:
Biosensor systems and applications in genomics, proteomics and metabolomics: A review. 217-220 - Yang Choon Lim, Abbas Z. Kouzani, Wei Duan, Xiujuan J. Dai, Akif Kaynak, Douglas Mair:
Design and evaluation of a microcantilever aptasensor. 221-224 - Yushan Zheng, Mohamad Sawan:
A microsystem for magnetic immunoassay towards protein toxins detection. 225-228 - Sahil Shah, Karen S. Anderson, Jennifer Blain Christen, Jennifer Hasler:
Floating gate ISFET for therapeutic drug screening of breast cancer cells. 229-232 - Ghazal Nabovati, Ebrahim Ghafar-Zadeh, Maryam Mirzaei, Giancarlo Ayala-Charca, Falah R. Awwad, Mohamad Sawan:
Fully integrated CMOS capacitive sensor for Lab-on-Chip applications. 233-236
A2L-B: Circuits for Bio Applications II
- Kuan-Yu Lin, Ming-Dou Ker, Chun-Yu Lin:
A high-voltage-tolerant stimulator realized in the low-voltage CMOS process for cochlear implant. 237-240 - Mohammad Hossein Maghami, Amir M. Sodagar, Mohamad Sawan:
Biphasic, energy-efficient, current-controlled stimulation back-end for retinal visual prosthesis. 241-244 - Mohammed Al-Rawhani, James Beeley, David R. S. Cumming:
Power management system for a capsule endoscope using autofluorescence imaging. 245-248 - Panagiotis Kassanos, Iasonas F. Triantis:
A CMOS multi-sine signal generator for multi-frequency bioimpedance measurements. 249-252 - Shuang Song, Michael Johannes Rooijakkers, Pieter Harpe, Chiara Rabotti, Massimo Mischi, Arthur H. M. van Roermund, Eugenio Cantatore:
A multiple-channel frontend system with current reuse for fetal monitoring applications. 253-256
A2L-C: Neural Networks and Systems I
- Luis A. Camuñas-Mesa, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco, Sio-Hoi Ieng, Ryad Benosman:
Event-driven stereo vision with orientation filters. 257-260 - Yilda Irizarry-Valle, Alice Cline Parker:
Astrocyte on neuronal phase synchrony in CMOS. 261-264 - Vasilis N. Thanasoulis, Bernhard Vogginger, Johannes Partzsch, René Schüffny:
A pulse communication flow ready for accelerated neuromorphic experiments. 265-268 - Federico Corradi, Chris Eliasmith, Giacomo Indiveri:
Mapping arbitrary mathematical functions and dynamical systems to neuromorphic VLSI circuits for spike-based neural computation. 269-272 - Ming Gu, Shantanu Chakrabartty:
A bias-scalable current-mode analog support vector machine based on margin propagation. 273-276
A2L-D: Analog Circuit Testing & Verification
- Sotirios P. Pouros, Vassilios D. Vassios, Dimitrios K. Papakostas, Alkis A. Hatzopoulos:
Input stimulus comparison using an adaptive FPGA-based testing system. 277-280 - You Li, Degang Chen:
Efficient analog verification against Trojan states using divide and contraction method. 281-284 - Xiankun Jin, Nan Sun:
Low-cost high-quality constant offset injection for SEIR-based ADC built-in-self-test. 285-288 - Zhiqiang Liu, You Li, Yan Duan, Randall L. Geiger, Degang Chen:
Identification and break of positive feedback loops in Trojan States Vulnerable Circuits. 289-292 - Ricardo Povoa, Ricardo Lourenco, Nuno Lourenço, António Canelas, Ricardo Martins, Nuno Horta:
LC-VCO automatic synthesis using multi-objective evolutionary techniques. 293-296
A2L-E: SAR Converters
- Arindam Sanyal, Nan Sun:
A low frequency-dependence, energy-efficient switching technique for bottom-plate sampled SAR ADC. 297-300 - Ling Du, Shuangyi Wu, Min Jiang, Ning Ning, Qi Yu, Yang Liu:
A 10-bit 100MS/s subrange SAR ADC with time-domain quantization. 301-304 - Anh Trong Huynh, Hoa Thai Duong, Hoang Viet Le, Efstratios Skafidas:
Design and implementation of an 11-bit 50-MS/s split SAR ADC in 65 nm CMOS. 305-308 - Xiaoyang Wang, Qiang Li:
A 10-bit 150MS/s SAR ADC with parallel segmented DAC in 65nm CMOS. 309-312 - Nick Martin, Stephen O'Driscoll:
Match enhancement in SAR ADCs by algorithmic unit capacitor assignment. 313-316
A2L-F: Communication Circuits and Systems I
- Cecilia Gimeno, Erick Guerrero, Carlos Sánchez-Azqueta, Concepción Aldea, Cristina Azcona, Santiago Celma:
A double loop continuous-time adaptive equalizer. 317-320 - Gijs Meuleman, Pieter Harpe, Xiongchuan Huang, Arthur H. M. van Roermund:
A 19 µW 20 MHz All-Digital PLL for 2-tone envelope detection radios. 321-324 - Jing Li, Richard Hagelauer, Thomas Mayer, Stefan Tertinek, Christian Wicpalek, Burkhard Neurauter:
An overall gain estimation algorithm for all digital phase locked loops. 325-328 - Matt Bergeron, Alan N. Willson Jr.:
A 1-GHz direct digital frequency synthesizer in an FPGA. 329-332 - Robabeh Amirkhanzadeh, Henrik Sjöland, Jean-Michel Redoute, Dan Nobbe, Mike Faulkner:
L-band 180° passive phase shifter employing auto-transformer in an SOS process. 333-336
A2L-G: Image and Video Analysis
- Chun-Rong Huang, Yi-I Chiu, Pau-Choo Chung, Yu-Chiao Hung:
Occluded object tracking based on trajectory links in surveillance videos. 337-340 - Lai Wei, Golrokh Mirzaei, Mohammad Wadood Majid, Mohsin M. Jamali, Jeremy Ross, Peter V. Gorsevski, Verner P. Bingman:
Birds/bats movement tracking with IR camera for wind farm applications. 341-344 - Zhengqiang Yu, Luc Claesen, Yun Pan, Andy Motten, Yimu Wang, Xiaolang Yan:
SoC processor for real-time object labeling in life camera streams with low line level latency. 345-348 - Fanman Meng, Bing Luo, Chao Huang, Liangzhi Tang, Bing Zeng, Nini Rao:
Favorite object extraction using web images. 349-352 - Fanman Meng, Hongliang Li, King Ngi Ngan, Bing Zeng, Nini Rao:
Cosegmentation from similar backgrounds. 353-356
A2L-H: VLSI Datapath & Arithmetic Circuits I
- Ye Cheng, Jianhao Hu:
Random error analysis and reduction for stochastic computation based on autocorrelation sequence. 357-360 - Son Bui, James E. Stine:
Additional optimizations for parallel squarer units. 361-364 - Jiangyun Zhou, Jianhao Hu, Jienan Chen:
High performance absolute value calculator based on stochastic computing. 365-368 - Pramod Kumar Meher, Sang Yoon Park:
A novel DA-based architecture for efficient computation of inner-product of variable vectors. 369-372 - Keshab K. Parhi, Yin Liu:
Architectures for IIR digital filters using stochastic computing. 373-376
A2L-J: Computer-Aided Network Design II
- Wei Song, Jim D. Garside, Doug A. Edwards:
Automatic data path extraction in large-scale register-transfer level designs. 377-380 - Hsing-Han Tseng, Shiou-Wen Wang, Jian-Yu Chen, Chien-Nan Jimmy Liu:
A novel design space reduction method for efficient simulation-based optimization. 381-384 - Augusto Neutzling, Mayler G. A. Martins, Renato P. Ribas, André Inácio Reis:
A constructive approach for threshold logic circuit synthesis. 385-388 - Chao Deng, Yici Cai, Qiang Zhou:
A register clustering algorithm for low power clock tree synthesis. 389-392 - Jin-Tai Yan, Yu-Jen Tseng, Chia-Heng Yen:
Feasible region assignment of routing nets in single-layer routing. 393-396
A2L-K: Error Correction Codes
- Yichao Lu, Guifen Tian, Satoshi Goto:
An efficient decoder architecture for cyclic non-binary LDPC codes. 397-400 - Chuan Zhang, Keshab K. Parhi:
Interleaved successive cancellation polar decoders. 401-404 - Leixin Zhou, Jin Sha, Yun Chen, Chuan Zhang, Zhongfeng Wang:
Efficient symbol reliability based decoding for QCNB-LDPC codes. 405-408 - Chih-Wen Yang, Xin-Ru Lee, Chih-Lung Chen, Hsie-Chia Chang, Chen-Yi Lee:
Area-efficient TFM-based stochastic decoder design for non-binary LDPC codes. 409-412 - Chuan Zhang, Xiaohu You, Zhongfeng Wang:
Efficient column-layered decoders for single block-row quasi-cyclic LDPC codes. 413-416
A2L-L: Special Session: 3D Resistive Devices & CMOS Integration
- Jinfeng Kang, Bin Gao, Bing Chen, Peng Huang, F. F. Zhang, Xiaoyan Liu, Hong-Yu Chen, Zizhen Jiang, H.-S. Philip Wong, Shimeng Yu:
Scaling and operation characteristics of HfOx based vertical RRAM for 3D cross-point architecture. 417-420 - Shimeng Yu, Yexin Deng, Bin Gao, Peng Huang, Bing Chen, Xiaoyan Liu, Jinfeng Kang, Hong-Yu Chen, Zizhen Jiang, H.-S. Philip Wong:
Design guidelines for 3D RRAM cross-point architecture. 421-424 - Shuang Pi, Peng Lin, Hao Jiang, Can Li, Qiangfei Xia:
Device engineering and CMOS integration of nanoscale memristors. 425-427 - Euijun Cha, Jiyong Woo, Daeseok Lee, Sangheon Lee, Hyunsang Hwang:
Selector devices for 3-D cross-point ReRAM. 428-431 - Katrina A. Morgan, Ruomeng Huang, Stuart Pearce, C. H. De Groot:
The effect of atomic layer deposition temperature on switching properties of HfOx resistive RAM devices. 432-435
A3P-N: Live Demonstrations of Circuits and Systems
- Wei Xu, Xiyan Li, Wuxi Li, Hang Yuan, Guoxing Wang:
Live demonstration: An optimization software and a design case of a novel dual band wireless power and data transmission system. 436 - José M. de la Rosa:
Live demonstration: Using SIMULINK S-functions for the efficient modeling and simulation of analog integrated circuits and systems. 437 - Ming-Chun Liang, Cheng-Han Hsieh, Jia-Hua Hong, Shih-Yu Chang Chien, Shuenn-Yuh Lee:
Live demonstration: A wearable wireless ECG acquisition and specification system. 438 - Lutz Nielen, Stefan Tappertzhofen, Eike Linn, Omid Kavehei, Stan Skafidas, Ilia Valov, Rainer Waser:
Live demonstration: An associative capacitive network based on nanoscale complementary resistive switches. 439 - Christian Brandli, Raphael Berner, Minhao Yang, Shih-Chii Liu, V. Villeneuva, Tobi Delbrück:
Live demonstration: The "DAVIS" Dynamic and Active-Pixel Vision Sensor. 440 - Alexantrou Serb, Radu Berdan, Ali Khiat, Christos Papavassiliou, Themistoklis Prodromakis:
Live demonstration: A versatile, low-cost platform for testing large ReRAM cross-bar arrays. 441 - Wendi Yang, Kai Yang, Hanjun Jiang, Zhihua Wang, Qingliang Lin, Wen Jia:
Fetal heart rate monitoring system with mobile internet. 443-446 - Stephen J. Carey, David Robert Wallace Barr, Bin Wang, Alexey Lopich, Piotr Dudek:
Live demonstration: A sensor-processor array integrated circuit for high-speed real-time machine vision. 447 - Zhongpai Gao, Guangtao Zhai, Xiongkuo Min:
Information security display system based on temporal psychovisual modulation. 449-452 - Chun-Hsiang Peng, Ching-Hwa Cheng:
A panoramic endoscope design and implementation for Minimally Invasive Surgery. 453-456