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Hans-Joachim Stolberg
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2000 – 2009
- 2008
- [c13]Young-Hun Kluge, Hans-Joachim Stolberg:
V-MP2000: A flexible multi-core platform for multi-standard video applications. ICME 2008: 1609-1610 - 2005
- [j8]Hans-Joachim Stolberg, Mladen Berekovic
, Sören Moch, Lars Friebe, Mark Bernd Kulaczewski, Sebastian Flügel, Heiko Klußmann, Andreas Dehnhardt, Peter Pirsch:
HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing. J. VLSI Signal Process. 41(1): 9-20 (2005) - [j7]Hans-Joachim Stolberg, Mladen Berekovic
, Peter Pirsch:
A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications. J. VLSI Signal Process. 41(2): 139-151 (2005) - [c12]Andreas Dehnhardt, Mark Bernd Kulaczewski, Lars Friebe, Sören Moch, Peter Pirsch, Hans-Joachim Stolberg, Carsten Reuter:
A multi-core SoC design for advanced image and video compression. ICASSP (5) 2005: 665-668 - 2004
- [j6]Sören Moch, Mladen Berekovic, Hans-Joachim Stolberg, Lars Friebe, Mark Bernd Kulaczewski, Andreas Dehnhardt, Peter Pirsch:
HIBRID-SOC: a multi-core architecture for image and video applications. SIGARCH Comput. Archit. News 32(3): 55-61 (2004) - [c11]Carsten Reuter, Javier Martín-Langerwerf, Hans-Joachim Stolberg, Peter Pirsch:
Performance Estimation of Streaming Media Applications for Reconfigurable Platforms. SAMOS 2004: 69-77 - 2003
- [c10]Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Sebastian Flügel, Xun Mao, Mark Bernd Kulaczewski, Heiko Klußmann, Peter Pirsch:
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications. DATE 2003: 20008-20013 - [c9]Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Sebastian Flügel, Mark Bernd Kulaczewski, Peter Pirsch:
HiBRID-SoC: a multi-core architecture for image and video applications. ICIP (3) 2003: 101-104 - [c8]Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Mark Bernd Kulaczewski, Peter Pirsch:
HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing. VLSI-SOC 2003: 155-160 - 2002
- [j5]Mladen Berekovic
, Hans-Joachim Stolberg, Peter Pirsch:
Multicore system-on-chip architecture for MPEG-4 streaming video. IEEE Trans. Circuits Syst. Video Technol. 12(8): 688-699 (2002) - [c7]Hans-Joachim Stolberg, Mladen Berekovic, Peter Pirsch:
A platform-independent methodology for performance estimation of streaming media applications. ICME (2) 2002: 105-108 - 2001
- [j4]Peter Pirsch, Carsten Reuter, Jens Peter Wittenburg, Mark Bernd Kulaczewski, Hans-Joachim Stolberg:
Architecture Concepts for Multimedia Signal Processing. J. VLSI Signal Process. 29(3): 157-165 (2001) - [c6]Mladen Berekovic, Hans-Joachim Stolberg, Peter Pirsch, Holger Runge:
A programmable co-porcessor for MPEG-4 video. ICASSP 2001: 1021-1024 - [c5]Hans-Joachim Stolberg, Mladen Berekovic
, Peter Pirsch, Holger Runge:
Implementing The MPEG-4 Advanced Simple Profile For Streaming Video Applications. ICME 2001 - 2000
- [c4]Hans-Joachim Stolberg, Mladen Berekovic
, Peter Pirsch, Holger Runge, Henning Möller, Johannes Kneip:
The M-PIRE MPEG-4 codec DSP and its macroblock engine. ISCAS 2000: 192-195
1990 – 1999
- 1999
- [j3]Mladen Berekovic
, Hans-Joachim Stolberg, Mark Bernd Kulaczewski, Peter Pirsch, Henning Möller, Holger Runge, Johannes Kneip, Benno Stabernack:
Instruction Set Extensions for MPEG-4 Video. J. VLSI Signal Process. 23(1): 27-49 (1999) - [c3]Hans-Joachim Stolberg, Martin Ohmacht
, Peter Pirsch:
Cellular Multiprocessor Arrays with Adaptive Resource Utilization. ACPC 1999: 480-489 - 1998
- [j2]Peter Pirsch, Hans-Joachim Stolberg:
VLSI implementations of image and video multimedia processing systems. IEEE Trans. Circuits Syst. Video Technol. 8(7): 878-891 (1998) - [c2]Peter Pirsch, Hans-Joachim Stolberg:
VLSI architectures for multimedia. ICECS 1998: 3-11 - 1997
- [j1]Peter Pirsch, Hans-Joachim Stolberg, Yan-Kuang Chen, Sun-Yuan Kung:
Implementation of media processors. IEEE Signal Process. Mag. 14(4): 48-51 (1997) - [c1]Hans-Joachim Stolberg, Masao Ikekawa, Ichiro Kuroda:
Code positioning to reduce instruction cache misses in signal processing applications on multimedia RISC processors. ICASSP 1997: 699-702
Coauthor Index
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