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ORCIDPalash Das 0001
Person information
- affiliation: Indian Institute of Technology Jodhpur, Department of Computer Science and Engineering, Jodhpur, India
Other persons with the same name
- Palash Das — disambiguation page
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Journal Articles
- 2023
[j5]Atul Kumar
, Dipika Deb, Shirshendu Das, Palash Das:
edAttack: Hardware Trojan Attack on On-Chip Packet Compression. IEEE Des. Test 40(6): 125-135 (2023)- [j4]Palash Das, Shashank Sharma, Hemangee K. Kapoor:
ALAMNI: Adaptive LookAside Memory Based Near-Memory Inference Engine for Eliminating Multiplications in Real-Time. IEEE Trans. Computers 72(3): 693-706 (2023) - 2021
- [j3]Palash Das, Hemangee K. Kapoor:
CLU: A Near-Memory Accelerator Exploiting the Parallelism in Convolutional Neural Networks. ACM J. Emerg. Technol. Comput. Syst. 17(2): 22:1-22:25 (2021) - [j2]Palash Das, Hemangee K. Kapoor:
nZESPA: A Near-3D-Memory Zero Skipping Parallel Accelerator for CNNs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40(8): 1573-1585 (2021) - 2014
- [j1]Bikromadittya Mondal, Palash Das, Pradyut Sarkar, Susanta Chakraborty:
A comprehensive fault diagnosis technique for reversible logic circuits. Comput. Electr. Eng. 40(7): 2259-2272 (2014)
Conference and Workshop Papers
- 2025
- [c8]Akshansh Yadav, Anadi Goyal, Palash Das:
Hybrid Token Selector based Accelerator for ViTs. DATE 2025: 1-7 - 2023
- [c7]Palash Das, Hemangee K. Kapoor:
NDIE: A Near DRAM Inference Engine Exploiting DIMM's Parallelism. APCCAS 2023: 333-337 - 2022
- [c6]Palash Das, Ajay Joshi, Hemangee K. Kapoor:
Hydra: A near hybrid memory accelerator for CNN inference. DATE 2022: 1017-1022 - [c5]Imlijungla Longchar, Palash Das, Hemangee K. Kapoor:
ZaLoBI: Zero avoiding Load Balanced Inference accelerator. VLSI-SoC 2022: 1-6 - 2020
- [c4]Chirag Joshi, Palash Das, Ashwini A. Kulkarni, Hemangee K. Kapoor:
Dimming Hybrid Caches to Assist in Temperature Control of Chip MultiProcessors. ACM Great Lakes Symposium on VLSI 2020: 487-492 - 2018
- [c3]Palash Das, Hemangee K. Kapoor:
Towards Near-Data Processing of Compare Operations in 3D-Stacked Memory. ACM Great Lakes Symposium on VLSI 2018: 243-248 - [c2]Palash Das, Shivam Lakhotia, Prabodh Shetty, Hemangee K. Kapoor:
Towards Near Data Processing of Convolutional Neural Networks. VLSID 2018: 380-385 - 2014
- [c1]Palash Das, Bikromadittya Mondal:
Signature analysis for synthesis of reversible circuit. VDAT 2014: 1-2
Coauthor Index
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