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Tohru Kaneko
Person information
- affiliation: Tokyo Institute of Technology, Japan
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Journal Articles
- 2021
- [j8]Zheng Sun
, Hanli Liu
, Hongye Huang
, Dexian Tang, Dingxin Xu, Tohru Kaneko, Zheng Li, Jian Pang
, Rui Wu
, Wei Deng
, Atsushi Shirane
, Kenichi Okada
:
A 0.85mm2 BLE Transceiver Using an On-Chip Harmonic-Suppressed RFIO Circuitry With T/R Switch. IEEE Trans. Circuits Syst. I Regul. Pap. 68(1): 196-209 (2021) - 2019
- [j7]Jian Pang
, Shotaro Maki, Seitarou Kawai
, Noriaki Nagashima, Yuuki Seo, Masato Dome, Hisashi Kato, Makihiko Katsuragi, Kento Kimura
, Satoshi Kondo, Yuki Terashima, Hanli Liu
, Teerachot Siriburanon
, Aravind Tharayil Narayanan
, Nurul Fajri, Tohru Kaneko, Toru Yoshioka, Bangan Liu
, Yun Wang
, Rui Wu
, Ning Li, Korkut Kaan Tokgoz
, Masaya Miyahara, Atsushi Shirane
, Kenichi Okada
:
A 50.1-Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay With Calibration of LO Feedthrough and I/Q Imbalance. IEEE J. Solid State Circuits 54(5): 1375-1390 (2019) - 2018
- [j6]Tohru Kaneko, Yuya Kimura, Masaya Miyahara
, Akira Matsuzawa:
A 72.4dB-SNDR 20MHz-Bandwidth Continuous-Time ΔΣ ADC with High-Linearity Gm-Cells. IEICE Trans. Electron. 101-C(4): 197-205 (2018) - [j5]Tohru Kaneko, Koji Hirose, Akira Matsuzawa:
A Consideration of Threshold Voltage Mismatch Effects and a Calibration Technique for Current Mirror Circuits. IEICE Trans. Electron. 101-C(4): 224-232 (2018) - [j4]Hanli Liu
, Zheng Sun, Dexian Tang, Hongye Huang
, Tohru Kaneko, Zhijie Chen, Wei Deng, Rui Wu
, Kenichi Okada
:
A DPLL-Centric Bluetooth Low-Energy Transceiver With a 2.3-mW Interference-Tolerant Hybrid-Loop Receiver in 65-nm CMOS. IEEE J. Solid State Circuits 53(12): 3672-3687 (2018) - 2017
- [j3]Tohru Kaneko, Yuya Kimura, Masaya Miyahara
, Akira Matsuzawa:
A Wide Bandwidth Current Mode Filter Technique Using High Power Efficiency Current Amplifiers with Complementary Input. IEICE Trans. Electron. 100-C(6): 539-547 (2017) - 2016
- [j2]Teerachot Siriburanon
, Satoshi Kondo, Kento Kimura, Tomohiro Ueno, Satoshi Kawashima, Tohru Kaneko, Wei Deng, Masaya Miyahara, Kenichi Okada
, Akira Matsuzawa:
A 2.2 GHz -242dB-FOM 4.2 mW ADC-PLL Using Digital Sub-Sampling Architecture. IEEE J. Solid State Circuits 51(6): 1385-1397 (2016) - 2015
- [j1]Tohru Kaneko, Masaya Miyahara
, Akira Matsuzawa:
A Circuit Technique for Enhancing Gain of Complementary Input Operational Amplifier with High Power Efficiency. IEICE Trans. Electron. 98-C(4): 315-321 (2015)
Conference and Workshop Papers
- 2018
- [c5]Zheng Sun, Hanli Liu, Dexian Tang, Hongye Huang
, Tohru Kaneko, Rui Wu, Wei Deng, Kenichi Okada
:
A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver. ESSCIRC 2018: 310-313 - [c4]Hanli Liu, Zheng Sun, Dexian Tang, Hongye Huang
, Tohru Kaneko, Wei Deng, Rui Wu, Kenichi Okada
, Akira Matsuzawa:
An ADPLL-centric bluetooth low-energy transceiver with 2.3mW interference-tolerant hybrid-loop receiver and 2.9mW single-point polar transmitter in 65nm CMOS. ISSCC 2018: 444-446 - 2017
- [c3]Jian Pang, Shotaro Maki, Seitarou Kawai, Noriaki Nagashima, Yuuki Seo, Masato Dome, Hisashi Kato, Makihiko Katsuragi, Kento Kimura, Satoshi Kondo, Yuki Terashima, Hanli Liu, Teerachot Siriburanon
, Aravind Tharayil Narayanan
, Nurul Fajri, Tohru Kaneko, Toru Yoshioka, Bangan Liu, Yun Wang, Rui Wu, Ning Li, Korkut Kaan Tokgoz
, Masaya Miyahara, Kenichi Okada
, Akira Matsuzawa:
24.9 A 128-QAM 60GHz CMOS transceiver for IEEE802.11ay with calibration of LO feedthrough and I/Q imbalance. ISSCC 2017: 424-425 - 2016
- [c2]Tohru Kaneko, Yuya Kimura, Koji Hirose, Masaya Miyahara, Akira Matsuzawa:
A 76-dB-DR 6.8-mW 20-MHz bandwidth CT ΔΣ ADC with a high-linearity Gm-C filter. ESSCIRC 2016: 253-256 - 2015
- [c1]Teerachot Siriburanon
, Satoshi Kondo, Kento Kimura, Tomohiro Ueno, Satoshi Kawashima, Tohru Kaneko, Wei Deng, Masaya Miyahara, Kenichi Okada
, Akira Matsuzawa:
25.2 A 2.2GHz -242dB-FOM 4.2mW ADC-PLL using digital sub-sampling architecture. ISSCC 2015: 1-3
Coauthor Index
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