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2020 – today
- 2021
[j6]Abhishek Mukherjee
, Miguel Gandara, Xiangxing Yang, Linxiao Shen, Xiyuan Tang, Chen-Kai Hsu, Nan Sun:
A 74.5-dB Dynamic Range 10-MHz BW CT-ΔΣ ADC With Distributed-Input VCO and Embedded Capacitive-π Network in 40-nm CMOS. IEEE J. Solid State Circuits 56(2): 476-487 (2021)- [j5]Chen-Kai Hsu, Xiyuan Tang, Jiaxin Liu, Rui Xu, Wenda Zhao, Abhishek Mukherjee, Timothy R. Andeen, Nan Sun:
A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping. IEEE J. Solid State Circuits 56(3): 739-749 (2021) - [j4]Jiaxin Liu, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang, Chen-Kai Hsu, Nan Sun:
A 90-dB-SNDR Calibration-Free Fully Passive Noise-Shaping SAR ADC With 4× Passive Gain and Second-Order DAC Mismatch Error Shaping. IEEE J. Solid State Circuits 56(11): 3412-3423 (2021) - 2020
- [j3]Chen-Kai Hsu, Timothy R. Andeen, Nan Sun:
A Pipeline SAR ADC With Second-Order Interstage Gain Error Shaping. IEEE J. Solid State Circuits 55(4): 1032-1042 (2020) - [j2]Xiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, Shaolan Li, David Z. Pan, Nan Sun:
A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier. IEEE J. Solid State Circuits 55(12): 3248-3259 (2020) - [c7]Chen-Kai Hsu, Xiyuan Tang, Wenda Zhao, Rui Xu, Abhishek Mukherjee, Timothy R. Andeen, Nan Sun:
A 77.1-dB 6.25-MHz-BW Pipeline SAR ADC with Enhanced Interstage Gain Error Shaping and Quantization Error Shaping. CICC 2020: 1-4 - [c6]Xiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, David Z. Pan, Nan Sun:
9.5 A 13.5b-ENOB Second-Order Noise-Shaping SAR with PVT-Robust Closed-Loop Dynamic Amplifier. ISSCC 2020: 162-164
2010 – 2019
- 2019
- [j1]Jiaxin Liu, Chen-Kai Hsu, Xiyuan Tang, Shaolan Li, Guangjun Wen, Nan Sun:
Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1342-1354 (2019) - [c5]Linxiao Shen, Yi Shen, Xiyuan Tang, Chen-Kai Hsu, Wei Shi, Shaolan Li, Wenda Zhao, Abhishek Mukherjee, Nan Sun:
A 0.01mm2 25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor. ISSCC 2019: 64-66 - [c4]Chen-Kai Hsu, Nan Sun:
A 75.8dB-SNDR Pipeline SAR ADC with 2nd-order Interstage Gain Error Shaping. VLSI Circuits 2019: 68- - 2016
- [c3]Wen-Chin Li, Graham R. Braithwaite, Matthew Greaves, Chen-Kai Hsu, Shu-Chiang Lin:
The evaluation of military pilot's attention distributions on the flight deck. HCI-Aero 2016: 15:1-15:6 - 2015
- [c2]Chen-Kai Hsu, Tai-Cheng Lee:
A single-channel 10-b 400-MS/s 8.7-mW pipeline ADC in a 90-nm technology. A-SSCC 2015: 1-4 - [c1]Chen-Kai Hsu, Shu-Chiang Lin, Wen-Chin Li:
Visual Movement and Mental-Workload for Pilot Performance Assessment. HCI (6) 2015: 356-364
Coauthor Index
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