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Takuya Arafune
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2010 – 2019
- 2017
- [c7]Yuki Ozawa, Takuya Arafune, Nobukazu Tsukiji, Haruo Kobayashi, Ryoji Shiota:
Study of jitter generators for high-speed I/O interface jitter tolerance testing. ISPACS 2017: 468-473 - [c6]Dan Yao, Yifei Sun, Masashi Higashino, Shaiful Nizam Bin Mohyar, Tomonori Yanagida, Takuya Arafune, Nobukazu Tsukiji, Haruo Kobayashi:
DAC linearity improvement with layout technique using magic and latin squares. ISPACS 2017: 616-621 - [c5]Hirotaka Arai, Takuya Arafune, Shohei Shibuya, Yutaro Kobayashi, Koji Asami, Haruo Kobayashi:
Fibonacci sequence weighted SAR ADC as golden section search. ISPACS 2017: 657-662 - [c4]Yasunori Kobori, Nobukazu Tsukiji, Takuya Arafune, Manimel Wadu Sahan, Dulara Yifei Sun, Nobukazu Takai, Haruo Kobayashi:
Noise spread spectrum with adjustable notch frequency in complex pulse coding controlled DC-DC converters. ISPACS 2017: 752-757 - 2015
- [c3]Takuya Arafune, Yutaro Kobayashi, Shohei Shibuya, Haruo Kobayashi:
Fibonacci sequence weighted SAR ADC algorithm and its DAC topology. ASICON 2015: 1-4 - [c2]Yasunori Kobori, Takuya Arafune, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi:
Selectable notch frequencies of EMI spread spectrum using pulse modulation in switching converter. ASICON 2015: 1-4 - [c1]Yutaro Kobayashi, Shohei Shibuya, Takuya Arafune, Shu Sasaki, Haruo Kobayashi:
SAR ADC design using Golden ratio weight algorithm. ISCIT 2015: 303-306
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