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11th ASICON 2015: Chengdu, China
- 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015. IEEE 2015, ISBN 978-1-4799-8483-1
- Xiangliang Jin, Manfang Tian, Zhenyu Jiang, Han Wang:
A physical model of novel UV and blue-extended photodetector based on CMOS process. 1-4 - Chong Guo, Hong Zhang, Zhouyi Ma, Jie Zhang, Jie Lin, Ruizhi Zhang:
An inductive wireless telemetry circuit with OOK modulation for implantable cardiac pacemakers. 1-4 - Carol Rouying Zhan, Changsoo Hong, Jean-Philippe Laine, Patrice Besse:
Development of high-voltage ESD protection devices on smart power technologies for automotive applications. 1-4 - Tukasa Ikeda, Makoto Ikeda:
Comprehensive study on higher order radix RSA cryptography engine. 1-4 - Jintao Li, Ming Liu, Hong Chen, Zhihua Wang:
A 0.3V-to-1.1V standard cell library in 40nm CMOS. 1-4 - Xiang Liang, Ligang Hou, Jinhui Wang, Chunhui Yang, Deyang Gao, Lin Zhu:
Transaction level model of HDMI transmitter based on System Verilog. 1-4 - Yong Lian
:
Challenges in the design of self-powered wearable wireless sensors for healthcare Internet-of-Things. 1-4 - Jipan Huang, Fang Gao, Xin'an Wang, Hongying Chen:
Ultra low power circuits design based on III-V group heterojunction tunnel field effect transistor. 1-4 - Yang Li, Hang Zhou, Pengfei Xu, Yujie Chen, Yanfeng Zhang, Siyuan Yu:
Design consideration of uni-traveling carrier photodiode: Influence of doping profile and buffer layer. 1-4 - Sujuan Liu, Haixiao Ma, Jiashuai Cui:
Adaptive semiblind background calibration of timing mismatches in an M-channel time-interleaved analog-to-digital converter. 1-4 - Jincheng Yang, Zhao Zhang, Peng Feng, Liyuan Liu, Nanjian Wu:
A 1-V 5.2-5.7 GHz low noise sub-sampling phase locked loop in 0.18 μm CMOS. 1-4 - Hongyi Wang, Yanjiao Du, Xu Jia, Youyou Fan:
A low-power continuous-time comparator with enhanced bias current at the flip point. 1-4 - Dan Liu, Feng Gao, Liguang Hao:
Low noise design of 32-channel snapshot X-ray readout IC. 1-4 - Xi Tan, Sizheng Chen, Zhibin Xiao, Feng Chen, Junyu Wang:
A low power potentiostat for implantable glucose sensor tag. 1-4 - Tao Wu:
Elliptic curve GF (p) point multiplier by dual arithmetic cores. 1-4 - Zong Yang, Hui Xu, Nan Li, Zhaolin Sun:
FPGA logic design of SATA3.0 physical layer. 1-4 - Chen Zhao, Kuizhi Mei, Fei Wang, Nanning Zheng:
A high-efficient floating point coprocessor for SPARC Leon2 embedded processor. 1-4 - Peng Siew Chew, Kiat Seng Yeo
, Kaixue Ma, Zhi-Hui Kong:
A 57 to 66 GHz novel six-port correlator. 1-4 - Bing Lyu, Yun Yin, Xiaobao Yu, Baoyong Chi:
A 0.1-1.5G SDR transmitter with two-stage harmonic rejection power mixer in 65-nm CMOS. 1-4 - Yongsheng Wang, Min Wang, Huaixin Xian, Yunfei Du, Bei Cao, Xiaowei Liu:
Influence of substrate coupling noise to clock and data recovery. 1-4 - Zhi Zeng, Kaidi Zhang, Wei Wang, Weijiang Xu, Jia Zhou:
Smartphone-controlled electro-wetting on dielectric microfluidics. 1-4 - Yunhui Ling, Fang Liu, Ying Zhang:
Realization of intelligent optimization algorithm on IP cores partition for NoC testing. 1-4 - Guangxing Wan, Tianli Duan, Shuxiang Zhang, Lingli Jiang, Bo Tang, Chao Zhao, Huilong Zhu, Hongyu Yu:
Overshoot stress impact on HfO2 high-κ layer dynamic SILC. 1-4 - D. J. Yu, Qi Yu, Ning Ning, Y. Liu, Z. Y. Shi:
Hybrid LED driver for multi-channel output with high consistency. 1-4 - Weizhen Wang, Jun Han, Jielin Wang, Xiaoyang Zeng:
A SIMD multiplier-accumulator design for pairing cryptography. 1-4 - Chuangwei Li, Jiancheng Li, Jianfei Wu, Yu Xiao:
Investigation on the immunity of microcontroller to electrical fast transients. 1-4 - Heyi Hu, Chun Zhang, Yongming Li:
A new method for demodulation of FSK signal with severe impulse interference. 1-4 - Zhong-Shan Zheng, Zhen-Tao Li, Ning Qiao, Kai Zhao, Fang Yu, Jia-Jun Luo
:
Comparison of decoupling resistors and capacitors for increasing the single event upset resistance of SRAM cells. 1-3 - Tian Wang, Xiaoxin Cui, Kai Liao, Nan Liao, Yewen Ni, Dunshan Yu, Xiaole Cui:
Employing the mixed FBB/RBB in the design of FinFET logic gates. 1-4 - Ligang Hou, Jingyan Fu, Jinhui Wang, Na Gong, Wei Zhao, Shuqin Geng:
A thermal-aware distribution method of TSV in 3D IC. 1-3 - Guangxi Hu, Shuyan Hu, Jianhua Feng, Ran Liu, Lingli Wang, Li-Rong Zheng:
Analytical models for threshold voltage, drain induced barrier lowering effect of junctionless triple-gate FinFETs. 1-4 - Pan Xue, Yilei Shen, Yang Zhao, Zhiliang Hong:
An all-digital quadrature RF transmitter with 8-bit ΣΔ modulation. 1-4 - Jiangzheng Cai, Jia Yuan, Liming Chen, Yong Hei:
A design of subthreshold SRAM cell based on RSCE and RNCE. 1-4 - Yefei Zhang, Zunchao Li, Qingzhi Meng, Yunhe Guan, Dongxu Luo:
Performance evaluation and influence of device parameters on threshold voltage of dual-material strained gate-all-around MOSFET. 1-4 - Yiou Chen, Xiang Ling, Jianhao Hu:
A dynamic and low latency wireless NoC architecture. 1-3 - Rundao Lu, Zhijian Lu, Dongpo Chen, Tingting Mo:
A 4th-order N-path filter in 40nm CMOS with tunable Gm-C stage and reduced center-frequency offset. 1-4 - Sai Hu, Qin Wang, Zheng Guo, Jing Xie, Zhigang Mao:
Fault detection and redundancy design for TSVs in 3D ICs. 1-4 - Shyue-Kung Lu, Hao-Wei Lin, Masaki Hashizume:
An enhanced built-in self-repair technique for yield and reliability improvement of embedded memories. 1-4 - Bonan Yan, Yaojun Zhang, Enes Eken, Wujie Wen, Weisheng Zhao, Yiran Chen:
Recent progresses of STT memory design and applications. 1-4 - Ryosuke Kitayama, Takashi Takenaka, Masao Yanagisawa, Nozomu Togawa
:
Small-sized and noise-reducing power analyzer design for low-power IoT devices. 1-4 - Xuemin Lv, Moucheng Yang, Xuegong Zhou, Lingli Wang:
An automated test framework for SRAM-based FPGA. 1-4 - Ming Li, Haibin Yin, Peiyuan Wan:
A digitally calibrated low-power ring oscillator. 1-4 - Junli Sheng, Bingjian Jiang, Zhangwen Tang:
A high PSR SOI current-mode bandgap reference. 1-4 - Hongjiao Yang, Xiangliang Jin, Lizhen Tang, Weihui Liu, Jia Yang:
Simulation and analysis of P+/N SPAD for 3D imaging. 1-4 - Xiaoxu Kang
, Qingyun Zuo, Chao Yuan, Weijun Wang, Meng Gao, Liangliang Jiang, Yongxing Zhou, Yong Wang, Shoumian Chen, Yuhang Zhao, Jia Liu, Wenjie Sheng, Jia Zhou:
Humidity sensor with graphene oxide as sensing material. 1-3 - Shuaining He, Jiangyun Zhou, Jianhao Hu, Jienan Chen:
A low complexity MCMC algorithm for MIMO system with bias technique. 1-4 - Yun Liang, Shuo Wang:
Quantitative performance and power analysis of LTE using high level synthesis. 1-4 - Keita Igarashi, Masao Yanagisawa, Nozomu Togawa
:
Image synthesis circuit design using selector-logic-based alpha blending and its FPGA implementation. 1-4 - Sachin Kumar, Chip-Hong Chang
:
A high-speed and area-efficient sign detector for three moduli set RNS {2n, 2n-1, 2n+1}. 1-4 - Shuo Li, Nan Qi, Vahid Behravan, Zhiliang Hong, Patrick Yin Chiang:
A 20 μW dual-channel analog front-end in 65nm CMOS for portable ECG monitoring system. 1-4 - Shohei Shibuya, Yutaro Kobayashi, Haruo Kobayashi:
High-frequency low-distortion signal generation algorithm with arbitrary waveform generator. 1-4 - Wu Dan, Wei Li:
A programmable divider with wide division range applied in an FMCW frequency synthesizer. 1-4 - Jieqiong Cheng, Qingqing Yang, Xiaofang Zhou:
Design of a high parallelism high throughput HSPA+ Turbo decoder. 1-4 - Weiguo Zheng, Min Cai, Xiao-Yong He, Ken Xu, Zhijian Chen:
Analysis and design of quickly starting crystal oscillator. 1-4 - Yudong Li, Bo Tang, Jiang Yan:
A simulation analysis of back gate effects for FDSOI devices. 1-4 - Xiao Liang, Chuan Zhang, Shugong Xu
, Xiaohu You:
Coefficient adjustment matrix inversion approach and architecture for massive MIMO systems. 1-4 - Long Zhao, Chenxi Deng, Hongming Chen, Guan Wang, Yuhua Cheng:
A 1-V 23-μW 88-dB DR Sigma-Delta ADC for high-accuracy and low-power applications. 1-4 - Haozhi Ma, Zhongyi Gao, Liyang Pan, Jun Xu:
Data pre-emphasis based retention reliability enhance scheme for MLC NAND Flash memories. 1-4 - Yoshiki Niki, Shu Sasaki, Nobu Yamaguchi, Jian Kang, Takashi Kitahara, Haruo Kobayashi:
Flat passband gain design algorithm for 2nd-order RC polyphase filter. 1-4 - Yan-Ming Li, Hao Zhang, Hong Chai, Kai-Kai Wu, Chang-Bao Wen:
A novel start-up circuit for boost DC-DC converter with synchronous power-switch current-limit. 1-3 - Benqing Guo, Jun Chen, Yao Wang, Haiyan Jin, Guangjun Wen:
A 8.1 mW 0.1∼2 GHz inductorless CMOS LNTA for software-defined radio applications. 1-4 - Zhan Shi, Zhenan Tang, Fan Yang, Jiarui Wu:
Improvement of the charge pump for Maneatis PLLs. 1-3 - Lei Zhu, Qi Cheng, Jianghui Deng, Jianping Guo, Dihu Chen, Xidong Ding:
A 3.5-A buck DC-DC regulator with wire drop compensation for remote-loading applications. 1-4 - Linghan Zhang, Yunzhou Wang, Yicong Liu, Xusheng Tang:
A new intrinsic parameter extraction approach for small-signal model of AlGaN/GaN devices. 1-4 - Liang Zhu, Qian Ren, Neo Tan, Zhibo Ai:
3D resist modeling for OPC correction and verification. 1-4 - Yongsheng Wang, Hongying Wang, Fengchang Lai, Bei Cao, Yang Liu, Xiaowei Liu:
A 16-bit low-power double-sampled delta sigma modulator for audio applications. 1-4 - Ji Chen, Jen-Chung Lou, Kuan-Chang Chang, Ting-Chang Chang, Tsung-Ming Tsai, Chih-Hung Pan:
Influence of nitrogen buffering on oxygen in indium-tin-oxide capped resistive random access memory with NH3 treatment. 1-4 - Chengsen Wang, Hao Yuan, Qingwen Song, XiaoYan Tang, Renxu Jia, Yuming Zhang, Yimen Zhang, Yidong Shen:
Fabrication of 3.1kV/10A 4H-SiC Junction Barrier Schottky Diodes. 1-3 - Tianhong Ye, Kuan W. A. Chee:
Low on-resistance power MOSFET design for automotive applications. 1-4 - Jiun-Wei Horng, Tung-Hsien Chan, Toung-Yi Li:
Tunable voltage-mode four inputs universal biquad using three DVCCs. 1-4 - Cong Hao, Jianmo Ni, Hui-Tong Wang, Takeshi Yoshimura:
Simultaneous scheduling and binding for resource usage and interconnect complexity reduction in high-level synthesis. 1-4 - Shijie Zhang, Xiaole Cui, Qiang Zhang, Yufeng Jin:
A TSV repair method for clustered faults. 1-4 - Miho Arai, Isao Shimizu, Haruo Kobayashi, Keita Kurihara, Shu Sasaki, Shohei Shibuya, Kiichi Niitsu
, Kazuyoshi Kubo:
Finite aperture time effects in sampling circuit. 1-4 - Fangfa Fu, Jun Liao, Tao Li, Jinxiang Wang:
A deterministic optimal task migration algorithm design in NoC-based multi-core system. 1-4 - Xiaoyan Jia, Liji Wu, Beibei Wang, Xiangmin Zhang:
A novel oscillator-based TRNG for smart IC card. 1-4 - Bo Liu, Dongming Zhang, Wei-qi Ge, Yu Gong:
A novel routing structure of coarse-grained reconfigurable architecture for radar application. 1-4 - Yi Wang, Zhiqian Hong, Jun Li
, Shaobo Luo, Yajun Ha:
Challenges and future trends for embedded security in electric vehicular communications. 1-4 - Victor Nshunguyimfura, Jie Yang, Liyuan Liu, Nanjian Wu:
An efficient layered ABV methodology for vision system on chip based on heterogeneous parallel processors. 1-4 - Ke Liu, Renwei Zhang, Zhankun Du, Li Shao, Xiao Ma:
A low cost readout and processing circuit for integrated CMOS geomagnetic sensors. 1-4 - Guanyu Chen, Feng Lin, Yongliang Gao, Chunxu Li, Duowu Wen, Zhe Zhang:
The data retention improvement with 2T structure OTP on 0.18um CMOS technology. 1-4 - Kun Wang, Li Li, Feng Han, Hongbing Pan, Fan Feng, Xiao Yu:
A high performance parallel VLSI design of matrix inversion. 1-4 - Zhiyuan Li, Qingkun Li, Dianzhong Wen:
SPICE model for dual-extended memristor. 1-4 - Jiangyun Zhou, Jianhao Hu, Jienan Chen, Shuaining He:
Biased MMSE soft-output detection based on conjugate gradient in massive MIMO. 1-4 - Xian Gu, XiuJu He, Fule Li:
A calibration technique for SAR ADC based on code density test. 1-4 - Junteng Zhang, Jinhui Wang, Ligang Hou, Na Gong:
Reusable IO technique for improved utility of IC test circuit area. 1-5 - Panpan Yu, Ying Zhou, Ling Sun, Jianjun Gao:
A simple semi-analytical parameter extraction method for 40nm gatelength MOSFET. 1-4 - Tianchan Guan, Jun Han, Xiaoyang Zeng:
Exploration for energy-efficient ECC decoder of WBAN. 1-4 - Hui Shi, Zheng Sun, Yong Xu, Cheng Hu, Shan Luo, Wei Ding:
Design of the 1.0V bandgap reference on chip. 1-4 - Wei Ni, Xiaotian Wang:
Functional coverage-driven UVM-based UART IP verification. 1-4 - Junwei Li, Zibin Dai, Wei Li, Tao Chen, Yufei Zhu:
Study and implementation of cluster hierarchical memory system of multicore cryptographic processor. 1-4 - Chua-Chin Wang, Min-Yu Tseng:
10 Mbps high-voltage digital transciever on single die for 50 V voltage swing. 1-4 - Xiwei Huang, Yu Jiang, Yang Shang, Hao Yu, Lingling Sun:
A CMOS THz-sensing system towards label-free DNA sequencing. 1-4 - Yan Zhang, Qi Fang, Robert K. F. Teng, Lun Gao:
An FPGA acceleration system of exact helical CBCT image reconstruction. 1-4 - Jian Cao, Zhenxu Ye, Yuan Wang
, Guangyi Lu, Xing Zhang:
A low-leakage power clamp ESD protection circuit with prolonged ESD discharge time and compact detection network. 1-4 - Jianli Chen, Zheng Peng, Wenxing Zhu:
A VLSI global placement solver based on proximal alternating direction method. 1-4 - Liang Wen, Li Li, Haibo Wen, Xiaoyang Zeng:
Energy-efficient sub-threshold level shifter. 1-4 - Haibin Shao, Ke Lin, Bo Wang, Chen Chen, Fang Gao, Feng Huang, Xin'an Wang:
A high-performance charge pump with improved static and dynamic matching characteristic. 1-4 - Jinn-Yann Liu, Shi-Yu Huang, Ta-Shun Chu:
Cell-based programmable phase shifter design for pulsed radar SoC. 1-4 - Yi He, Gensheng Chen:
An inclusive fault model for Network-on-Chip. 1-4 - ZengFa Peng, Jianbin Zheng, AiLin Zhang:
A method of automatic sizing logic driver of 16nm Fin-FET. 1-5 - Nobukazu Tsukiji, Hitoshi Aoki, Masaki Kazumi, Takuya Totsuka, Masashi Higashino, Haruo Kobayashi:
A study on HCI induced gate leakage current model used for reliability simulations in 90nm n-MOSFETs. 1-4 - Qian Chen, Fazhi An, Guangyao Zhou, Shunli Ma, Fan Ye, Junyan Ren:
A 39 GHz-80 GHz millimeter-wave frequency doubler with low power consumption in 65nm CMOS tehnology. 1-4 - Xiaoqing Wen:
Power supply noise and its reduction in at-speed scan testing. 1-4 - Yi Wang, Liji Wu, Zhi-Yuan Tu, Xiangmin Zhang, Wen Jia:
A 125KHz low frequency power recovery circuit for battery-less TPMS SoC. 1-4 - Yafei Liu, Xiangyu Li:
Low voltage adaptive delay clock buffer design. 1-4 - Ziqiang Li, Yun Chen, Xiaoyang Zeng:
OFDM synchronization implementation based on Chisel platform for 5G research. 1-4 - Huan Li, Xingbi Chen:
Deep trench junction termination employing variable-K dielectric for high voltage devices. 1-4 - Xiao Pang, Jing Wang, Chenxu Wang, Xinsheng Wang:
A DPA resistant dual rail Préchargé logic cell. 1-4 - Siliang Hua, Donghui Wang, Leiou Wang, Yan Liu, Jiarui Li:
A PVT-insensitive all digital CMOS time-to-digital converter based on looped delay-line with extension scheme. 1-4 - Ping Luo, Songlin Fu, Xiang Zhang, Yi Bao, Dongjun Wang:
An adaptive voltage scaling circuit based on dominate pole compensation. 1-4 - Guodong Zhu, Junfeng Zhang, Yang Xu, Zehong Zhang, Baoyong Chi:
A 1/2/4MHz multi-mode reconfigurable lowpass/complex bandpass CT ΣΔ modulator for short range wireless receiver. 1-4 - Xiao Wang, Zelin Shi, Baoshu Xu:
Noise analysis of a CDS circuit with offset canceling. 1-4 - Xiaoying Qiu, Leilei Miao, Runbin Shi, Zhiwei Wang, Liang Liu, Di Wu:
A programmable baseband processor for massive MIMO uplink multi-user detection. 1-4 - Khawar Sarfraz, Mansun Chan:
Nanoscale register file circuit design - Challenges and opportunities. 1-4 - Jianing Su, Jun Han:
Design of energy efficient LDPC decoders with low-voltage strategy. 1-4 - Fazhi An, Shunli Ma, Qian Chen, Guangyao Zhou, Fan Ye, Junyan Ren:
A wide-division-ratio 100MHz-to-5GHz multi-modulus divider chain for wide-band PLL. 1-4 - Wei Zhang, Qi Chen, Ming Xia
, Rui Ma, Fei Lu, Chenkun Wang, Albert Z. Wang, Ya-Hong Xie:
TLP evaluation of ESD protection capability of graphene micro-ribbons for ICs. 1-4 - Xu-Guang Li, Dong Yan, Haipeng Fu, Jianguo Ma:
Survey and statistical analysis of THz detectors. 1-4 - Fangxu Lv, Xuqiang Zheng, Ziqiang Wang, Jianye Wang, Fule Li:
A 50Gb/s low power PAM4 SerDes transmitter with 4-tap FFE and high linearity output voltage in 65nm CMOS technology. 1-4