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Victor Silva 0001

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affiliation: Technical University of Lisbon, INESC-ID IST UTL, Portugal

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2010 – 2019

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2013
[c5]
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Victor Silva, Jorge R. Fernandes, Mário P. Véstias, Horácio C. Neto:
A reconfigurable computing architecture using magnetic tunneling junction memories. FPL 2013: 1-2
2012
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Victor Silva, Mário P. Véstias, Horácio C. Neto, Jorge R. Fernandes:
Non-volatile memory circuits for FIMS and TAS writing techniques on magnetic tunnelling junctions. ICECS 2012: 809-812
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Victor Silva, Jorge R. Fernandes, Mário P. Véstias, Horácio C. Neto:
A High-Performance Reconfigurable Computing architecture using a magnetic configuration memory. ReConFig 2012: 1-6
2010
[c2]
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Victor Silva, Jorge R. Fernandes, Horácio C. Neto:
Reconfigurable Circuits Using Magnetic Tunneling Junction Memories. DoCEIS 2010: 549-558

2000 – 2009

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2009
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Victor Silva, Luís Bica Oliveira, Jorge R. Fernandes, Mário P. Véstias, Horácio C. Neto:
Run-Time Reconfigurable Array Using Magnetic RAM. DSD 2009: 74-81

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