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ORCID19th ICECS 2012: Seville, Spain
- 19th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2012, Seville, Spain, December 9-12, 2012. IEEE 2012, ISBN 978-1-4673-1261-5
A1L-A Analog Circuits and Techniques I
- Aytac Atac, Christian Harder, Ralf Wunderlich, Stefan Heinen:
A low power variable GBW opamp from 60MHz to 2GHz for multi-standard receivers. 1-4 - Victoria Pisani, Ivan Grech, Owen Casha
, Edward Gatt:
Low-voltage CMOS current feedback amplifier. 5-8 - Firas Yengui, Lioua Labrak, Patrice Russo, Felipe Frantz, Nacer Abouchi:
Optimization based on surrogate modeling for analog integrated circuits. 9-12 - Ahmed Hamza, Andrew Philip, Mohamed Ali, Mohamed Dessouky, Mohamed Kassem:
Web-based analog design using tradeoff charts. 13-16 - Athanasios Dimakos, Matthias Bucher, Rupendra Kumar Sharma, Ilias Chlis:
Ultra-low voltage drain-bulk connected MOS transistors in weak and moderate inversion. 17-20
A1L-B Bioengineering Circuits and Systems I
- Christoph Bulach, Ulrich Bihr, Maurits Ortmanns:
Evaluating the influence of the bit error rate on the information of neural spike signals. 21-24 - Arsam N. Shiraz, Andreas Demosthenous, Anne Vanhoestenberghe:
Towards an optimized wearable neuromodulation device for urinary incontinence. 25-28 - Virgilio Valente, Clemens Eder, Andreas Demosthenous, Nick Donaldson:
Towards a closed-loop transmitter system with integrated class-D amplifier for coupling-insensitive powering of implants. 29-32 - Florent Dupont, Cyril Condemine, Jean-François Beche, Marc Belleville:
Multi-application electrical stimulator architecture dedicated to waveform control by electrode-tissue impedance spectra monitoring. 33-36 - Abdulnasir Hossen:
Selection of wavelet-bands for neural network discrimination of Parkinsonian tremor from essential tremor. 37-40
A1L-C Digital Signal Processing
- Alfredo Rosado, Taras Iakymchuk, Manuel Bataller, Marek Wegrzyn:
Hardware-efficient matrix inversion algorithm for complex adaptive systems. 41-44 - Taras Iakymchuk, Alfredo Rosado, Emilio Soria-Olivas, Manuel Bataller:
Implementation of a new adaptive algorithm using fuzzy cost function and robust to impulsive noise. 45-48 - Salvador Javier Haboba, Riccardo Rovatti, Gianluca Setti:
RADS converter: An approach to Analog to Information conversion. 49-52 - Lin Bai, Patrick Maechler, Michael Muehlberghuber, Hubert Kaeslin:
High-speed compressed sensing reconstruction on FPGA using OMP and AMP. 53-56
A1L-D RF Building Blocks
- Amir Hossein Masnadi Shirazi, Hooman Rashtian, Shahriar Mirabbasi:
A linearity enhancement technique and its application to CMOS wideband low-noise amplifiers. 57-60 - Tomoyuki Arai, Ali Hajimiri:
A 7GHz wideband self-correcting quadrature VCO. 61-64 - Omid Talebi Amiri, Adil Koukab:
Design methodology and integration of a 1.8GHz outphasing power amplifier for mobile terminals. 65-68 - You Zheng, Carlos E. Saavedra:
4.0-5.5 GHz tunable power splitter RFIC using active inductors. 69-72 - Wenlong Jiang, Armin Tavakol, Popong Effendrik, Marcel van de Gevel, Frank Verwaal, Robert Bogdan Staszewski:
Design of ADPLL system for WiMAX applications in 40-nm CMOS. 73-76
A1L-E SPECIAL SESSION: Computationally Intensive Applications on FPGAs
- Orsalia Georgia Hazapis, Evangelos Logaras, Elias S. Manolakos:
A soft IP core generating SoCs for the efficient stochastic simulation of large Biomolecular Networks using FPGAs. 77-80 - Konstantinos Manolopoulos, A. Belias, Georgios Georgis, Dionysios I. Reisis, E. G. Anasontzis:
Signal processing for deep-sea observatories with reconfigurable hardware. 81-84 - George Lentaris, Dionysios Diamantopoulos, G. Stamoulias, Kostas Siozios, Dimitrios Soudris, Marcos Avilés Rodrigálvarez:
FPGA-based path-planning of high mobility rover for future planetary missions. 85-88 - Ahmed Mahdi, Panagiotis Sakellariou, Nikos Kanistras, Ioannis Tsatsaragkos, Vassilis Paliouras:
Hardware design and verification techniques for Giga-bit Forward-Error Correction systems on FPGAs. 89-92 - Ioannis Vourkas, Georgios Ch. Sirakoulis:
FPGA based cellular automata for environmental modeling. 93-96 - Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa:
A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator. 97-100 - David Gascon, Andreu Sanuy, Javier J. Sieiro:
Compact class-AB follower for wideband closed loop line drivers. 101-104 - Akinori Moriyama, Satoshi Taniyama, Takao Waho:
A low-distortion switched-source-follower track-and-hold circuit. 105-108 - Damiano Cascella, Francesco Cannone, Gianfranco Avitabile, Giuseppe Coviello:
A 2.5-GS/s 62dB THD SiGe Track-and-Hold Amplifier with feedthrough cancellation technique. 109-112 - Behnam Sedighi, Anh T. Huynh, Efstratios Skafidas:
A CMOS track-and-hold circuit with beyond 30 GHz input bandwidth. 113-116
A2L-B Sensing and Sensor Networks
- Takamoto Watanabe, Hirofumi Isomura, Tomohito Terasawa:
All-Digital A/D converter TAD for sensor interface over wide temperature ranges. 117-120 - Ali Mohammadi, Mehmet R. Yuce, S. O. Reza Moheimani:
A readout circuit implementation to reduce the flicker noise in MEMS electrothermal sensors. 121-124 - Hassan Abbass, Hawraa Amhaz, Gilles Sicard, David Alleysson:
In Pixel Implementation of autoadaptative integration time. 125-128 - Jochen Rust, Steffen Paul:
Design and implementation of a neurocomputing ASIP for environmental monitoring in WSN. 129-132 - Marko Mailand, Stefan Getzlaff, Andrew David Dehennis:
A system-proof-of-concept for remote measurement applications. 133-136
A2L-C DSP Algorithm and Implementation
- Marko Butorac, Mladen Vucic:
FPGA implementation of simple digital signal processor. 137-140 - Abdallah Meraoumia, Salim Chitroub, Ahmed Bouridane:
Improving palmprint identification by combining multiple classifiers and using gabor filter. 141-144 - Gianvito Urgese, Mariagrazia Graziano, Marco Vacca, Muhammad Awais, Stefano Frache, Maurizio Zamboni:
Protein alignment HW/SW optimizations. 145-148 - Matteo Causo, Ting An, Lirida Alves de Barros Naviner:
Parallel scaling-free and area-time efficient CORDIC algorithm. 149-152 - Seyede Mahya Safavi, Mahdi Shabany:
A VLSI architecture for multiple antenna eigenvalue-based spectrum sensing. 153-156
A2L-D RF and mmWave Circuits
- Hossein Jalili, Ali Fotowat-Ahmady, Mahta Jenabi:
A 1-mW current reuse quadrature RF front-end for GPS L1 band in 0.18µm CMOS. 157-160 - Kaushik Ghosal, Tejasvi Anand, Vikram Chaturvedi, Bharadwaj Amrutur:
A power-scalable RF CMOS receiver for 2.4 GHz Wireless Sensor Network applications. 161-164 - Arash Moradi, Mohamad Sawan:
A 20 Mb/s 0.084 nJ/bit ISM-band transmitter dedicated to medical sensor networks. 165-168 - Shailesh Kulkarni, Dixian Zhao, Patrick Reynaert:
Analysis and characterization of mismatches in outphasing transmitter. 169-172 - Sophie Drean, Nicolas Martin, Nathalie Deltimple, Eric Kerherve, Baudouin Martineau, Didier Belot:
A 60GHz class F-E power VCO with vector-modulator feedback in 65nm CMOS technology. 173-176
A3L-A Analog Circuits and Techniques III
- Siraporn Sakphrom, Apinunt Thanachayanont:
A low-power CMOS RF power detector. 177-180 - Domenico Pepe, Domenico Zito:
Millimeter-wave high-Q active inductor in 65nm CMOS. 181-184 - Quentin Beraud-Sudreau, Olivier Mazouffre, Michel Pignol, Louis Baguena, Claude Neveu, Jean-Baptiste Bégueret, Thierry Taris:
Windowed phase comparator for an 80Gbit/s CDR. 185-188 - Mazyar Abedinkhan, Amir Masoud Sodagar, Reza Mohammadi, Payman Adl:
A novel multi-step C-2C DAC architecture. 189-192 - Andrea Costantini, Alessandro Pezzotta, Andrea Baschirotto, Marcello De Matteis, Stefano D'Amico, Fabrizio Murtas, Giuseppe Gorini:
A CMOS 0.13µm low power front-end for GEM detectors. 193-196
A3L-B Sensors and Photonics
- Takamoto Watanabe, Tomohito Terasawa:
All-digital A/D converter TAD for high-resolution and low-power sensor/RF interface. 197-200 - Maria-Alexandra Paun, Jean-Michel Sallese, Maher Kayal:
Temperature considerations on Hall Effect sensors current-related sensitivity behaviour. 201-204 - Juan A. Leñero-Bardallo, Wei Tang, Dongsoo Kim, Joon Hyuk Park, Eugenio Culurciello:
A tri-mode event-based vision sensor with an embedded wireless transmitter. 205-208 - Jürgen Oehm, Christian Koch, Ivan Stoychev, Andreas Gornik:
Improved high precision optical angle measurement system with no interference of light gradients and mismatch. 209-212 - Mohammed Hassan, Horst Zimmermann:
A 10Gb/s inductorless push pull current mirror transimpedance amplifier. 213-216
A3L-C Digital Circuits on FPGAs
- Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson:
Performance evaluation for FPGA-based processing of tree-like structures. 217-220 - Alexandru Amaricai, Oana Boncalo:
FPGA implementation of very high radix square root with prescaling. 221-224 - Raouf Senhadji-Navarro, Ignacio Garcia-Vargas, Jose Luis Guisado:
Performance evaluation of RAM-based implementation of Finite State Machines in FPGAs. 225-228 - Neil Scicluna, Edward Gatt, Owen Casha, Ivan Grech, Joseph Micallef:
FPGA-based autonomous parking of a car-like robot using Fuzzy Logic Control. 229-232 - Fernando Gehm Moraes, Matheus T. Moreira, Carlos Lucas, D. Correa, Douglas de O. Cardoso, M. Magnaguagno, Guilherme M. Castilhos, Ney Laert Vilar Calazans:
A generic FPGA emulation framework. 233-236
A3L-D Wireless and Wireline Communications
- Timothy De Keulenaer, Yu Ban, Zhisheng Li, Johan Bauwelinck:
Design of a 80 Gbit/s SiGe BiCMOS fully differential input buffer for serial electrical communication. 237-239 - Hazem Wael Marar, Khaldoon Abugharbieh, Abdel-Karim Al-Tamimi:
A power efficient 3-Gbits/s 1.8V PMOS-based LVDS output driver. 240-243 - Anu Lehtovuori, Risto Valkonen, Martti Valtonen:
Accessible approach to wideband matching. 244-247 - Shenjie Wang, Catherine Dehollain:
A generalized graphical model to specify A/D resolution from receiver front-end. 248-251
A4L-A Analog Filters
- Raul Loeches-Sanchez, Roberto Gómez-García, Bernard Jarry, Julien Lintignat, Bruno Barelaud:
Lumped-element-based single/dual-passband analog filters using signal-interference principles. 252-255 - Antonio Jose Ginés, Alberto Villegas, Eduardo J. Peralías, Adoración Rueda:
Self-biased input common-mode generation for improving dynamic range and yield in inverter-based filters. 256-259 - Marcello De Matteis, Stefano D'Amico, Andrea Costantini, Alessandro Pezzotta, Andrea Baschirotto:
A 1.25mW 3rd-order Active-Gm-RC 250MHz-bandwidth analog filter based on power-stability optimization. 260-263 - Drazen Jurisic, Neven Mijat, George S. Moschytz:
Dynamic range improvement of new leap-frog filter using numerical optimization. 264-267 - Ginés Doménech-Asensi, F. Martinez-Viviente, J. Illade-Quinteiro, Juan Zapata-Pérez, Ramón Ruiz Merino, José-Alejandro López Alcantud, Juan Martínez-Alajarín, Francisco J. Fernández-Luque, Juan M. Carrillo, Miguel Angel Domínguez:
A fourth order CMOS band pass filter for PIR sensors. 268-271
A4L-B Mixed-signal Test and Verification
- Kamel Beznia, Ahcène Bounceur, Louay Abdallah, Ke Huang, Salvador Mir, Reinhardt Euler:
Accurate estimation of analog test metrics with extreme circuits. 272-275 - Janez Trontelj Jr., Blaz Smid, Janez Trontelj:
Single pass temperature calibration of the ASIC on a general purpose ATE. 276-279 - Leandro S. Freitas, Gabriel A. G. Andrade, Luiz C. V. dos Santos:
A template for the construction of efficient checkers with full verification guarantees. 280-283 - Laurence Pierre:
A formal framework for testing with assertion checkers in mixed-signal simulation. 284-287
A4L-C VLSI Digital Implementations
- Diogo Brito, Jorge R. Fernandes, Paulo F. Flores, José Monteiro:
Design and characterization of a QLUT in a standard CMOS process. 288-291 - Seyed Ebrahim Esmaeili, Riadul Islam, Asim J. Al-Khalili, Glenn E. R. Cowan:
Dual-edge triggered sense amplifier flip-flop utilizing an improved scheme to reduce area, power, and complexity. 292-295 - Marc Pons, Jean-Luc Nagel, Christian Piguet:
Maximum delay variation temperature-aware standard cell design. 296-299 - Ameneh Golnari, Golnoosh Sharifan, Yalda Amini, Mahdi Shabany:
A low complexity architecture for the cell search applied to the LTE systems. 300-303 - Homin Jiang, Howard Liu, Kim Guzzino, Derek Kubo, Chao-Te Li, Ray Chang:
Digitizing The Yuan Tseh Lee Array for Microwave Background Anisotropy by 5Gsps ADC boards. 304-307
A4L-D Algorithms for Communications
- Syed M. Zafi S. Shah, Abdul W. Umrani, Aftab Ahmad Memon, Syed Muhammad Zaigham Abbas Shah:
PMEPR reduction for OFCDM using SLM and PTS. 308-311 - Vivek Yenamandra, Feiran Lei, Saleh R. Al-Araji, Nazar T. Ali, Mohammed Ismail:
Adaptive slope and threshold companding technique for PAPR reduction in OFDM systems. 312-315 - Isael Diaz, Rodolfo Torrea Duran, Sofie Pollin, Liesbet Van der Perre, Viktor Öwall:
Selective channelization on an SDR platform for LTE-a carrier aggregation. 316-319 - Chinmaya Mahapatra, A. Ramakrishnan, Thanos Stouraitis, Victor C. M. Leung:
A novel implementation of sequential output based parallel processing - orthogonal wavelet division multiplexing for DAS on SDR platform. 320-323
A4L-E SPECIAL SESSION: Advances in Embedded Vision Hardware
- Stephen J. Carey, David Robert Wallace Barr, Bin Wang, Alexey Lopich, Piotr Dudek:
Mixed signal SIMD cellular processor array vision chip operating at 30, 000 fps. 324-327 - Francisco Barranco, Javier Díaz, Begoña del Pino, Eduardo Ros:
Bottom-up visual attention model based on FPGA. 328-331 - Manuel Moreno García, Óscar Guerra Vinuesa, Rocío del Río Fernández, Belén Pérez-Verdú, Ángel Rodríguez-Vázquez:
CMOS SPADs selection, modeling and characterization towards image sensors implementation. 332-335 - Jordi Albo-Canals, Santiago Ortega, Sergi Perdices, Alexey Badalov, Xavier Vilasís-Cardona:
Embedded low-power low-cost Camera Sensor based on FPGA and its applications in mobile robots. 336-339 - Fadoua Guezzi Messaoud, Antoine Dupret, Arnaud Peizerat, Yves Blanchard:
High Dynamic Range image sensor with self adapting integration time in 3D technology. 340-343
B1L-A Data Converters
- Marco Zamprogno, Alberto Minuti, Francesca Girardi, Germano Nicollini:
A/D conversion of the battery voltage in advanced CMOS technologies. 344-347 - Reza Mohammadi, Hossein Shamsi, Mazyar Abedinkhan:
On the design of a 2-2-0 MASH delta-sigma-pipeline modulator. 348-351 - Luis Hernández, Enrique Prefasi, Susana Patón, Pieter Rombouts:
Analysis of VCO based noise shaping ADCs linearized by PWM modulation. 352-355 - Nicolas Beilleau, Vincent P. M. Bourguet, Fernando Rangel de Sousa:
Design of an undersampled BP ΣΔ modulator using LC and time-interleaved resonators. 356-359 - Johannes Uhlig, René Schüffny:
Incremental-ΣΔ-ADCs with dynamic conversion length adaption. 360-363
B1L-B Bioengineering Circuits and Systems II
- Peter Pracný, Pere Llimos Muntal, Erik Bruun:
Interpolation filter design for hearing-aid audio class-D output stage application. 364-367 - Boram Kim, Kazuo Nakazato:
Dual data pulse width modulator for wireless Simultaneous Measurement of Redox Potential and Temperature using a Single RFID Chip. 368-371 - Dariusz Komorowski, Stanislaw Pietraszek, Damian Grzechca:
The wireless system for EGG signal acquisition. 372-375 - José L. Ausín, Javier Ramos, J. Francisco Duque-Carrillo, Guido Torelli:
A high dynamic range wideband CMOS phase angle detector for bioimpedance spectroscopy. 376-379
B1L-C SPECIAL SESSION: Digital Circuits for Embedded Control and Security
- Alberto Oliveri, Marco Storace:
Hardware-in-the-loop simulations of circuit architectures for the computation of exact and approximate explicit MPC control functions. 380-383 - Raúl Jiménez, Guillermo Feria, Juan Antonio Gómez Galán, Fernando Gómez-Bravo, Manuel Sanchez-Raya:
VLSI Implementation of digital frequency sensors as hardware countermeasure. 384-387 - Macarena C. Martínez-Rodríguez, Piedad Brox, Javier Castro-Ramirez, Erica Tena, Antonio J. Acosta, Iluminada Baturone:
ASIC-in-the-loop methodology for verification of piecewise affine controllers. 388-391 - Susana Eiroa, Javier Castro-Ramirez, Macarena Cristina Martínez-Rodríguez, Erica Tena, Piedad Brox, Iluminada Baturone:
Reducing bit flipping problems in SRAM physical unclonable functions for chip identification. 392-395
B1L-D Digital Circuits for Channel Coding
- Hazem A. Ahmed, Hamed Salah, Tallal Elshabrawy, Hossam A. H. Fahmy:
Low energy high speed reed-solomon decoder using two parallel modified evaluator Inversionless Berlekamp-Massey. 396-399 - Oscar Sanchez, C. Jegoy, Michel Jézéquel, Yannick Saouter:
High speed low complexity radix-16 Max-Log-MAP SISO decoder. 400-403 - Fabian Angarita, Vicente Torres-Carot, Asuncion Perez-Pascual, Javier Valls:
High-throughput FPGA-based emulator for structured LDPC codes. 404-407 - Vicente Torres-Carot, Asuncion Perez-Pascual, Trinidad Sansaloni, Javier Valls:
Fully-parallel LUT-based (2048, 1723) LDPC code decoder for FPGA. 408-411 - Francisco Garcia-Herrero, María José Canet, Javier Valls:
Decoder for an enhanced serial generalized bit flipping algorithm. 412-415 - Andrea Barbieri, Sergio Pernici, Germano Nicollini:
Dynamic range improvement in 2nd-order low-pass multibit ΣΔ modulators. 416-419 - Christoph Zorn, Timon Brückner, Maurits Ortmanns, Wolfgang Mathis:
Performance tuning of multi-bit continuous time ΣΔ-modulators using a switched system model. 420-423 - Sha Tao, Julian Garcia, Saul Rodriguez, Ana Rusu:
Analysis of exponentially decaying pulse shape DACs in continuous-time sigma-delta modulators. 424-427 - Matthias Lorenz, Michael Maurer, Yiannos Manoli, Maurits Ortmanns:
Joint estimation of filter nonidealities in continuous-time sigma-delta modulators by using an unscented Kalman filter. 428-431 - Timon Brückner, Martin Kiebler, Christoph Zorn, Wolfgang Mathis, Maurits Ortmanns:
Discrete-time simulation of arbitrary digital/analog converter waveforms in continuous-time sigma-delta modulators. 432-435
B2L-B Analysis and Design Techniques for Low-Power Circuits
- Majid Zamani, Clemens Eder, Andreas Demosthenous:
CBSC-based pipelined analog-to-digital converters: Power dissipation bound analysis. 436-439 - Christian Berthet, Philippe Georgelin, Janvier Ntyame, Mathieu Raffin:
Peak power estimation using activity measured on emulator. 440-443 - Mariem Slimani, Philippe Matherat, Yves Mathieu:
A dual threshold voltage technique for glitch minimization. 444-447 - S. M. Yasser Sherazi, Peter Nilsson, Henrik Sjöland, Joachim Neves Rodrigues:
A 100-fJ/cycle sub-VT decimation filter chain in 65 nm CMOS. 448-451 - Panagiotis Sakellariou, Vassilis Paliouras:
Low-power two's-complement multiplication based on selective activation. 452-455
B2L-C Circuit Level CAD
- Catalin-Adrian Tugui, R. Benassi, S. Apostol, Philippe Bénabès:
Efficient optimization methodology for CT functions based on a modified bayesian kriging approach. 456-459 - Hiroshi Tezuka, Kunihiro Fujiyoshi:
An efficient solution space for floorplan of 3D-LSI. 460-463 - Mohammad A. Ahmed, Shantesh Pinge, Malgorzata Chrzanowska-Jeske:
Fast floorplanning for fixed-outline and nonrectangular regions. 464-467 - Vinicius dos S. Livramento, Chrystian Guth, José Luís Güntzel, Marcelo O. Johann:
Lagrangian relaxation-based Discrete Gate Sizing for leakage power minimization. 468-471 - Cristian E. Onete, Maria Cristina C. Onete:
Finding the Hamiltonian circuits in an undirected graph using the mesh-links incidence. 472-475
B2L-D Nonlinear Circuits and Systems I
- Mathilde Brandon, Myriam Ariaudo, Sylvain Traverso, J. Bouvier, Jean-Luc Gautier, Inbar Fijalkow:
Improved Linearization of a high power amplifier to reduce spectral distortions near the saturation area. 476-479 - Juan Núñez, Maria J. Avedillo, José M. Quintana:
Bifurcation diagrams in MOS-NDR frequency divider circuits. 480-483 - Antonio Buonomo, Alessandro Lo Schiavo:
Nonlinear harmonic analysis of multistage amplifiers. 484-487 - Masfandyar Asfandyar Awan, Malik Summair Asghar, Michael Peter Kennedy:
A "divide-by-odd number" direct injection CMOS LC injection-locked frequency divider. 488-491 - Oualid Hammi, Sung-Chan Jung, Fadhel M. Ghannouchi:
Design for linearizability of GaN based multi-carrier Doherty power amplifier through bias optimization. 492-495
B3L-A Nyquist Rate Data Converters
- Taimur Gibran Rabuske, Fabio Gibran Rabuske, Jorge R. Fernandes, Cesar Ramos Rodrigues:
A 4-bit 1.5GSps 4.2mW comparator-based binary search ADC in 90nm. 496-499 - Taimur Gibran Rabuske, Jorge R. Fernandes, Saeid Nooshabadi, Cesar Ramos Rodrigues, Fabio Gibran Rabuske:
A 749nW 1MSps 8-bit SAR ADC at 0.5V employing boosted switches. 500-503 - Niko Bako, Adrijan Baric:
A low-power fully differential cyclic 9-bit ADC. 504-507 - Behnam Sedighi, Anh T. Huynh, Efstratios Skafidas, Daniel Micusik:
Design of hybrid resistive-capacitive DAC for SAR A/D converters. 508-511 - Kisu Kim, Masayuki Ikebe, Junichi Motohisa, Eiichi Sano:
A 11b 5.1µW multi-slope ADC with a TDC using multi-phase clock signals. 512-515
B3L-B Circuit Techniques for Energy Harvesting Applications
- Naser Khosro Pour, Stefano Facchin, François Krummenacher, Maher Kayal:
An ultra-low power li-ion battery charger for micro-power solar energy harvesting applications. 516-519 - Mehrdad A. Ghanad, Catherine Dehollain:
A passive CMOS rectifier with leakage current control for medical implants. 520-523 - Dean Karolak, Thierry Taris, Yann Deval, Jean-Baptiste Bégueret, André Augusto Mariano:
Design comparison of low-power rectifiers dedicated to RF energy harvesting. 524-527 - Weiwei Shi, Oliver Chiu-sing Choy:
A process-compatible passive RFID tag's digital design for subthreshold operation. 528-531 - Meeta Srivastav, Leyla Nazhandali:
Design and analysis of multi-core homogeneous systems for energy harvesting applications. 532-535
B3L-C Methodologies for Systems-on-Chip
- Tiago Rogério Mück, Antônio Augusto Fröhlich:
On AOP techniques for C++-based HW/SW component implementation. 536-539 - Ghaith Tarawneh, Alex Yakovlev:
An RTL method for hiding clock domain crossing latency. 540-543 - Marcelo Mandelli, Guilherme M. Castilhos, Fernando Gehm Moraes:
Enhancing performance of MPSoCs through distributed resource management. 544-547 - Fernando Gehm Moraes, Everton Alceu Carara, Marcelo Ruaro, Guilherme A. Madalozzo:
Evaluation of adaptive management techniques in NoC-Based MPSoCs. 548-551 - Masayuki Wakizaka, Hiroaki Yoshida, Yuko Hara-Azumi, Shigeru Yamashita:
A redundant wire addition method for Patchable Accelerator. 552-555
B3L-D Multimedia Systems and Signal Processing I
- Martin Kumm, Peter Zipf:
Hybrid multiple constant multiplication for FPGAs. 556-559 - Faouzi Hamdi, Tomasz Toczek, Barthélémy Heyrman, Dominique Ginhac:
Scene-based noise reduction on a smart camera. 560-563 - Guilherme Corrêa, Pedro Assuncao, Luís Alberto da Silva Cruz, Luciano Volcan Agostini:
Dynamic tree-depth adjustment for low power HEVC encoders. 564-567 - Thaísa Leal da Silva, Luís Alberto da Silva Cruz, Luciano Volcan Agostini:
Fast HEVC intra mode decision based on dominant edge evaluation and tree structure dependencies. 568-571 - Pargles Dall'Oglio, Cassio Cristani, Marcelo Schiavon Porto, Luciano Volcan Agostini:
A high quality hardware friendly motion estimation algorithm focusing in HD videos. 572-575
B4L-A PhD Competition
- Dominik Cirmirakis, Dai Jiang, Andreas Demosthenous, Nick Donaldson, Timothy A. Perkins:
A telemetry operated vestibular prosthesis. 576-578 - Rosario Arjona, Iluminada Baturone:
Model-based design for selecting fingerprint recognition algorithms for embedded systems. 579-582 - Matheus T. Moreira, Ney Laert Vilar Calazans:
Electrical characterization of a C-Element with LiChEn. 583-585 - Sonia Vargas-Sierra, Gustavo Liñán Cembrano, Ángel Rodríguez-Vázquez:
Control and acquisition system for a High Dynamic Range CMOS Image Sensor. 586-589 - Vasilis N. Thanasoulis, Johannes Partzsch, Bernhard Vogginger, Christian Mayr, René Schüffny:
Long-term pulse stimulation and recording in an accelerated neuromorphic system. 590-592 - Elisa Calvo-Gallego, Alejandro Cabrera Aldaya, Piedad Brox, Santiago Sánchez-Solano:
Real-time FPGA connected component labeling system. 593-596
B4P-G Poster Session 1
- Zakaria El Alaoui Ismaili, Frederic Nabki, Wessam Ajib, Mounir Boukadoum:
A 500 MHz to 6 GHz frequency synthesizer architecture for cognitive radio applications. 597-600 - Tiago Borges, Ernesto Ventura Martins, Luís Nero Alves:
Understanding large swing and low swing operation in DyCML gates. 601-604 - Vladimir M. Milovanovic, Horst Zimmermann:
A fully complementary and fully differential self-biased asynchronous CMOS comparator. 605-608 - Armia Mrassy, Mohamed Dessouky:
Channel mismatch background calibration for pipelined time interleaved ADCs. 609-612 - Yuji Osaki, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa:
A low-power single-slope analog-to-digital converter with digital PVT calibration. 613-616 - Anna Arbat, Cristiano Calligaro, Vladislav Dayan, Evgeny Pikhay, Yakov Roizin:
SkyFlash EC project: Architecture for a 1Mbit S-Flash for space applications. 617-620 - Shafqat Ali, Steve Tanner, Pierre-André Farine:
A practical method for modeling amplifier nonlinearities. 621-624 - Marius Voicu, Domenico Pepe, Domenico Zito:
Performances and trends in millimeter-wave CMOS voltage controlled oscillators. 625-628 - Nuno Lourenço, Luís Nero Alves, José Luis Cura:
A multi-valued 350nm CMOS voltage reference. 629-632 - Ahmed Zein, Amr Tarek, Mohamed Bahr, Mohamed Dessouky, Haitham Eissa, Ahmed Ramadan, Amr Tosson:
Layout stress and proximity aware analog design methodology. 633-636 - Young-min Park, Tae-In Kwon, Kang-Il Cho, Yong-Sik Kwak, Gil-Cho Ahn, Chang-Seob Shin, Myung-Jin Lee, Seung-Bin You, Ho-Jin Park:
A 1.1 V 82.3dB audio ΔΣ ADC using asynchronous SAR type quantizer. 637-640
B4P-H Poster Session 2
- Haiyan Zhou, Matthias Völker, Johann Hauer:
A mixed-signal front-end ASIC for EEG acquisition system. 649-652 - José Luis Merino, Catherine Dehollain:
LC tank full bridge control for large coil variations. 653-656 - Sidinei Ghissoni, Eduardo Costa, José Monteiro, Ricardo Reis:
Efficient area and power multiplication part of FFT based on twiddle factor decomposition. 657-660 - Swaraj Mahato, Pieter De Wit, Elie Maricau, Georges G. E. Gielen:
Offset measurement method for accurate characterization of BTI-induced degradation in opamps. 661-664 - Hugo B. Goncalves, Miguel A. Martins, Jorge R. Fernandes:
A study on MOSFET rectifiers with transistors operating in the weak inversion region. 665-668 - Matheus T. Moreira, Ricardo A. Guazzelli, Ney Laert Vilar Calazans:
Return-to-One DIMS logic on 4-phase m-of-n asynchronous circuits. 669-672 - Saeid Yasami, Magdy A. Bayoumi:
An ultra-low power current reused CMOS low noise amplifier for x-band space application. 673-676 - Zhi-Wei Chen, Jin-Tai Yan:
Utilization of multi-bit flip-flops for clock power reduction. 677-680
B4P-H04 Offset Measurement Method for Accurate Characterization of BTI-Induced
- Frank Schumacher, Markus Holzer, Thomas Greiner:
Critical path minimized raster scan hardware architecture for computation of the Generalized Hough Transform. 681-684
B4P-H05 A Study on MOSFET Rectifiers with Transistors Operating in the Weak
- Farshad Moradi, Dag T. Wisland, Jens Kargaard Madsen, Hamid Mahmoodi:
Flip-flop design using novel pulse generation technique. 685-688 - Jirí Bucek, Pavel Kubalík, Róbert Lórencz, Tomás Zahradnický:
Dedicated hardware implementation of a linear congruence solver in FPGA. 689-692 - Rania F. Ahmed, Ahmed Gomaa Radwan, Ahmed H. Madian, Ahmed M. Soliman:
Analog fault diagnosis and testing by inverse problem technique. 693-696 - Benjamin P. Wilkerson, Jin-Ku Kang:
A non-coherent BPSK receiver with dual band filtering for implantable biomedical devices. 697-700 - Luca Frontini, Seyedruhollah Shojaii, Alberto Stabile, Valentino Liberali:
A new XOR-based Content Addressable Memory architecture. 701-704 - Patrick Adde, Raphaël Le Bidan:
A low-complexity soft-decision decoding architecture for the binary extended Golay code. 705-708 - Othmane Madani, Mohamed Lamine Tounsi, Mustapha Chérif-Eddine Yagoub:
Fullwave-mode analysis of shielded microstrip discontinuities on anisotropic substrates. 709-712
C1L-A RF Circuits and Techniques I
- Faizah Abu Bakar, Jan Holmberg, Tero Nieminen, Qaiser Nehal, Pekka Ukkonen, Ville Saari, Kari Halonen, Markku Åberg, Iiro Sundberg:
Multiband integrated synthetic aperture radar (SAR) receiver. 713-716 - Jidan Al-Eryani, Alexander Stanitzki, Karsten Konrad, Nima Tavangaran, Dieter Brückmann, Rainer Kokozinski:
Low-power area-efficient delay element with a wide delay range. 717-720 - Lounis Zerioul, Emmanuelle Bourdel, Myriam Ariaudo:
Skin effect modeling in time domain for RF network on chip. 721-724 - Lubomír Brancík, Edita Kolarova:
Stochastic differential equations approach in the analysis of MTLs with randomly varied parameters. 725-728 - Feiran Lei, Vivek Yenamandra, Steven Bibyk, Mohammed Ismail:
A RF/DC current-mode detector for BiST and digital calibration of current-driven mixers. 729-732
C1L-B Emerging Technologies I
- Ahmad Alfaifi, Frederic Nabki, Mourad N. El-Gamal:
A dual-axis bulk micromachined accelerometer with low cross-sensitivity. 733-736 - Muhammad Ali, Mohammad A. Ahmed, Malgorzata Chrzanowska-Jeske:
TSV stress-aware performance and reliability analysis. 737-740 - Muhammad Awais, Marco Vacca, Mariagrazia Graziano, Guido Masera:
FFT implementation using QCA. 741-744 - Khaled Salah:
Analysis of coupling capacitance between TSVs and metal interconnects in 3D-ICs. 745-748
C1L-C Digital Test, Fault Tolerance and Reliability
- Maria Chalkia, Yiorgos Tsiatouhas:
The leafs scan-chain for test application time and scan power reduction. 749-752 - Samuel N. Pagliarini, Arwa Ben Dhia, Lirida Alves de Barros Naviner, Jean-François Naviner:
Automatic selective hardening against soft errors: A cost-based and regularity-aware approach. 753-756 - Ting An, Matteo Causo, Lirida Alves de Barros Naviner, Philippe Matherat:
Transient fault analysis of CORDIC processor. 757-760 - Arwa Ben Dhia, Lirida Alves de Barros Naviner, Philippe Matherat:
A new fault-tolerant architecture for CLBs in SRAM-based FPGAs. 761-764 - Carlos Gómez Osuna, Miguel A. Sánchez Marcos, Pablo Ituero, Marisa López-Vallejo:
A monitoring infrastructure for FPGA self-awareness and dynamic adaptation. 765-768
C1L-D Multimedia Systems and Signal Processing II
- Afef Chammem, Mihai Mitrea, Françoise J. Prêteux:
Adaptive disparity map computation for stereoscopic video watermarking. 769-772 - Fatma Taher, Naoufel Werghi, Hussain Al-Ahmad:
Bayesian classification and artificial neural network methods for lung cancer early diagnosis. 773-776 - Supakorn Prungsinchai, Fouad Khelifi, Ahmed Bouridane:
Sub-images based image hashing with non-negative factorization. 781-784 - Basak Oztas, Mahsa T. Pourazad, Panos Nasiopoulos, Victor C. M. Leung:
A study on the HEVC performance over lossy networks. 785-788
C2L-A RF Circuits and Techniques II
- Domenico Pepe, Domenico Zito:
0.4V low-power 60-GHz oscillator in 65nm CMOS. 789-792 - Timothy Cronin, Domenico Pepe, Domenico Zito:
Complements on phase noise analysis and design of CMOS ring oscillators. 793-796 - Jingcheng Zhuang, Robert Bogdan Staszewski:
A low-power all-digital PLL architecture based on phase prediction. 797-800 - Amer Samarah, Anthony Chan Carusone:
A dead-zone free and linearized digital PLL. 801-804 - Lorenzo Mereni, Domenico Pepe, Domenico Zito:
Feasibility study including detector non-idealities of a 95-GHz CMOS SoC radiometer for passive imaging. 805-808
C2L-B Emerging Technologies II
- Victor Silva, Mário P. Véstias, Horácio C. Neto, Jorge R. Fernandes:
Non-volatile memory circuits for FIMS and TAS writing techniques on magnetic tunnelling junctions. 809-812 - Xiaobao Chen, Zuocheng Xing, Bingcai Sui:
Validation and analysis of negative differential resistance of single-electron transistor with conductance model. 813-816 - Marco Carminati, Giorgio Ferrari, Marco Sampietro, A. P. Ivanov, Tim Albrecht:
Low-noise dual-channel current amplifier for DNA sensing with solid-state nanopores. 817-820
C2L-B01 Non-Volatile Memory Circuits for FIMS and TAS Writing Techniques on
- Arnoldo Salazar, Sergio Camacho-Leon, Sergio Omar Martinez-Chapa, Olivier Rossetto:
CMOS Active Column Sensor for biodetection applications based on Surface Plasmon Resonance. 821-824 - Khaled Salah, Alaa B. El-Rouby, Hani F. Ragai, Yehea I. Ismail:
Modeling and analysis of through silicon via: Electromagnetic and device simulation approach. 825-828
C2L-C Variability-aware Design and Noise Mitigation
- Salim Farah, Magdy A. Bayoumi:
CEMS-PG: A parametrized algorithm for balanced partitioning and wakeup of power gated circuits. 829-832 - Hanwool Jeong, Younghwi Yang, Junha Lee, Jisu Kim, Seong-Ook Jung:
Static read stability and write ability metrics in FinFET based SRAM considering read and write-assist circuits. 833-836 - Jae Hoon Kim, Young Hwan Kim:
Statistical leakage analysis using the deterministic modeling of cell leakage current. 837-840 - Monica Figueiredo, Rui L. Aguiar:
Uncertainty in DLL deskewing schemes. 841-844 - Erika Covi, Alessandro Cabrini, Guido Torelli:
High-drive capability buffer for highly variable resistive loads. 845-848 - Sergio Callegari, Federico Bizzarri:
Should ΔΣ modulators used in AC motor drives be adapted to the mechanical load of the motor? 849-852 - Daisaburo Yoshioka:
Design of a low complexity S-box based on a piecewise linear chaotic map. 853-856 - Kang Zhou, Lilong Cai:
On current control method for single-phase AC resistance spot welding. 857-860 - Jordi Albo-Canals, Giovanni Egidio Pazienza:
A brief analysis of the main SPICE models of the memristor. 861-864
C3L-A Power Management Circuits
- Chao Li, Jordi Cosp-Vilella, Herminio Martínez-Garcia:
Field Programmable switched capacitor voltage converter. 865-868 - Libin George, Torsten Lehmann, Tara Julia Hamilton:
A reconfigurable buck-boost switched capacitor converter with adaptive gain and discrete frequency scaling control. 869-872 - Antonio David Souza, Sergio Bampi:
Design of a capacitorless low-dropout voltage regulator with fast load regulation in 130nm CMOS. 873-876
C3L-B Neural Networks and Nonlinear Circuits
- Vasilis N. Thanasoulis, Johannes Partzsch, Stephan Hartmann, Christian Mayr, René Schüffny:
Dedicated FPGA communication architecture and design for a large-scale neuromorphic system. 877-880 - Fernando Perez-Peña, Arturo Morgado Estevez, Carlos Rioja-del-Rio, Alejandro Linares-Barranco, Angel Jiménez-Fernandez, Juan López Coronado, José Luis Muñoz-Lozano:
Towards AER VITE: Building spike gate signal. 881-884 - Paramartha Indirayanti, Wouter Volkaerts, Patrick Reynaert, Wim Dehaene:
Picosecond pulse generation with nonlinear transmission lines in 90-nm CMOS for mm-wave imaging applications. 885-888
C3L-C Energy Efficient High-level Design and Modeling techniques
- Ruomin Wang, Julien Denoulet, Sylvain Feruglio, Farouk Vallette, Patrick Garda:
High level modeling of signal integrity in field bus communication with SystemC-AMS. 889-892 - Antonio Artés, José L. Ayala, Francky Catthoor:
IMOSIM: Exploration tool for Instruction Memory Organisations based on accurate cycle-level energy modelling. 893-896
Accurate Cycle-Level Energy Modelling
- Shoaleh Hashemi Namin, Huapeng Wu, Majid Ahmadi:
Power efficiency of digit level polynomial basis finite field multipliers in GF(2283). 897-900 - Esmaeil Amini, Zahra Jeddi, Magdy A. Bayoumi:
A high-throughput ECC architecture. 901-904 - Rafael Westphal, José Luís Almada Güntzel, Luiz Cláudio Villar dos Santos:
Energy-efficient multi-task computing on MPSoCs: A case study from a memory perspective. 905-908
C3L-D Communication Algorithms and Building Blocks
- Mahmoud Al-Qutayri, Saleh R. Al-Araji, Jeedella S. Jeedella, Omar Al-Kharji Al-Ali, Nader Anani:
Second-order TDTL with initialization process. 909-912 - Leïla Nasraoui, Leïla Najjar Atallah, Mohamed Siala:
Encoding sequence design for a reduced complexity time synchronization approach for OFDM systems. 913-916 - Vitor Fialho, Fernando Fortes, Manuela Vieira:
Test setup for error vector magnitude measurement on WLAN transceivers. 917-920 - Krishnamohan Thangarajah, Rashid Rashidzadeh, Shervin Erfani, Majid Ahmadi:
A hybrid algorithm for range estimation in RFID systems. 921-924
Sensors and Imagers
- Pedro Amo-López, María Elena Domínguez Jiménez, Gabriela Sansigre Vidal, David Sanz de la Fuente, Fernando Cruz-Roldán:
Discrete cosine transform Type-IV-based multicarrier modulators in frequency offset channels. 925-928
C4L-A Sensors and Imagers
- Liang Zhang, Frederic Morel, Christine Hu-Guo, Abdelkader Himmi, Andrei Dorokhov, Yann Hu:
A CMOS pixel sensor with 4-bit column-parallel self-triggered ADC for the ILC vertex detector. 929-932 - Xintian Shi, Roberto Dinapoli, Dominic Greiffenberg, Beat Henrich, Aldo Mozzanica, Bernd Schmitt, Hans Krüger, Heinz Graafsma, Alexander Klyuev, Alessandro Marras, Ulrich Trunk:
A low noise high dynamic range analog front-end ASIC for the AGIPD XFEL detector. 933-936 - Piotr Michalik, Jordi Madrenas, Daniel Fernández:
Sense/drive architecture for CMOS-MEMS accelerometers with relaxation oscillator and TDC. 937-940 - Priyanka Kumar, Edoardo Charbon, Robert Bogdan Staszewski, Andre Borowski:
Low power time-of-flight 3D imager system in standard CMOS. 941-944 - Tsung-Hsun Tsai, Richard Hornsey:
A double-delta compensating technique for pulse-frequency modulation CMOS image sensor. 945-948
Advances in Nanoscale Devices and Circuits: Modeling, Design, Testing
- Teresa Serrano-Gotarredona, Bernabé Linares-Barranco:
Design of adaptive nano/CMOS neural architectures. 949-952 - Nikolaos Fasarakis, Andreas Tsormpatzoglou, Dimitrios H. Tassis, Konstantinos Papathanasiou, C. A. Dimitriadis, Gérard Ghibaudo:
Compact modeling for the transcapacitances of undoped or lightly doped nanoscale cylindrical surrounding gate MOSFETs. 953-956 - Dimitrios Tzagkas, Spiridon Nikolaidis, Abdoul Rjoub:
Estimating the starting point of conduction in nanoscale CMOS gates. 957-960 - Lampros Dermentzoglou, John Liaperdos, Angela Arapoyanni, Yiorgos Tsiatouhas:
Testing wireless transceivers' RF front-ends utilizing defect-oriented BIST techniques. 961-964 - Rodrigo Picos, Joan Font-Rosselló, Eugeni García-Moreno, Antonio E. Teruel:
Fast and accurate estimation of gain and unity-gain bandwidth of an OpAmp. 965-968
C4L-C Algorithms and Processors
- Goran Molnar, Mladen Vucic:
FIR fractional Hilbert transformers with raised-cosine magnitude response. 969-972 - Nikolaos Polychronakis, Dionysios I. Reisis, Emmanouil Tsilis, Ioannis Zokas:
Conflict free, parallel memory access for radix-2 FFT processors. 973-976 - Ayush Kumar, Nimisha Agarwal, Juhi Bhadviya, Anil Kumar Tiwari:
An efficient 2-D jacobian iteration modeling for image interpolation. 977-980 - Nimisha Agarwal, Ayush Kumar, Juhi Bhadviya, Anil Kumar Tiwari:
A switching based adaptive image interpolation algorithm. 981-984 - Huabiao Qin, Lianbing Tian, Zongwei Hu:
A highly parallelized processor for face detection based on Haar-like features. 985-988
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